JP5285252B2 - Nitride semiconductor device - Google Patents

Description

  The present invention relates to a nitride semiconductor device using a nitride semiconductor as an active layer, and in particular, a semiconductor device such as a high electron mobility transistor (HEMT) or a field effect transistor (FET). The present invention relates to a nitride semiconductor device having a control electrode in Schottky contact.

  FIG. 5 shows a cross-sectional view of a conventional semiconductor device made of a group III-V nitride semiconductor. The semiconductor device shown in FIG. 5 has a so-called HEMT structure, on a substrate 11 made of a sapphire substrate, a buffer layer 12 made of gallium nitride (GaN), a channel layer 13 made of gallium nitride, and n-type aluminum gallium nitride. A carrier supply layer 14 made of (AlGaN) and a Schottky layer 15 made of non-doped aluminum gallium nitride are sequentially stacked. From the potential well in the vicinity of the heterojunction interface made up of the channel layer 13 and the carrier supply layer 14. A two-dimensional electron gas layer with extremely high electron mobility is formed. In the semiconductor device having such a structure, the carrier (two-dimensional electron gas) flowing between the source electrode 17a and the drain electrode 17b is controlled by controlling the voltage applied to the gate electrode 18 in Schottky contact with the Schottky layer 15. doing. Reference numeral 16 denotes a cap layer made of silicon nitride.

  The breakdown voltage of the conventional nitride semiconductor device having such a structure is greatly influenced by the Schottky characteristic formed by the contact between the gate metal and the nitride semiconductor layer. In general, Schottky characteristics of a gate metal formed on a nitride semiconductor layer, such as an aluminum gallium nitride (AlGaN) layer or a gallium nitride (GaN) layer, show a high gate leakage current, which triggers impact ionization, Reduce the breakdown voltage (drain breakdown voltage when the FET is off), which is an important parameter for nitride semiconductor devices with high output elements, to a lower level than expected, and fully exploit the high breakdown voltage characteristics of wide gap materials. There was a problem that could not. On the other hand, even in a semiconductor device in which a gate electrode is formed on a nitride semiconductor layer such as an aluminum gallium nitride (AlGaN) layer or a gallium nitride (GaN) layer, the surface trapped by electrons trapped in the surface level of the nitride semiconductor layer There is a problem that the potential fluctuates and frequency dispersion (current collapse) of the current-voltage characteristic occurs.

  In order to solve such a problem, the applicant of the present application has proposed a nitride semiconductor device including a nitride semiconductor layer having a microcrystalline structure with excellent insulating characteristics (Patent Documents 1 and 2).

On the other hand, in order to improve the breakdown voltage, it is known to use a field plate structure as shown in FIG. In a conventional field plate structure, a cap layer 16 made of silicon nitride, silicon oxide, or the like is used between a nitride semiconductor layer and an electrode portion connected to a gate electrode (for example, Patent Document 3).
Japanese Patent Laying-Open No. 2005-311029 JP-A-2005-183906 JP 2004-200248 A

  The nitride semiconductor device provided with the nitride semiconductor layer having a microcrystalline structure with excellent insulation characteristics previously proposed by the applicant of the present application has a current collapse by controlling electrons trapped in the surface order or reducing the surface state density. Reduction was suppressed and high frequency characteristics were improved. However, higher breakdown voltage is desired.

  On the other hand, in a semiconductor device having a conventional field plate structure, silicon nitride or silicon oxide is used as a cap layer. Therefore, current collapse occurs when silicon oxide is used, and when silicon nitride is used, silicon oxide is used compared to when silicon oxide is used. There was a problem that the breakdown voltage decreased.

  The present invention significantly reduces the leakage current in the Schottky characteristics of the gate electrode formed in the nitride semiconductor layer, and achieves high breakdown voltage by suppressing impact ionization in the nitride semiconductor layer, and at the same time, An object of the present invention is to provide a nitride semiconductor device capable of suppressing collapse.

In order to achieve the above object, the invention according to claim 1 of the present application provides at least one group III element consisting of at least one of the group consisting of gallium, aluminum, boron and indium, and at least one of the group consisting of nitrogen, phosphorus and arsenic. In a nitride semiconductor device including a group III-V nitride semiconductor layer composed of a group V element containing nitrogen, a first nitride semiconductor layer stacked on a substrate, and a top of the first nitride semiconductor layer A second nitride semiconductor layer that does not contain aluminum, a source electrode and a drain electrode that are in ohmic contact with the first nitride semiconductor layer, and a gate electrode. The second nitride semiconductor layer has a microcrystalline structure whose deposition temperature is lower than that of the first nitride semiconductor layer, and the gate electrode is a part of the second nitride semiconductor layer. In a cut in the recess formed by leaving said second nitride semiconductor layer on the bottom with missing rather, Schottky contact with the second nitride semiconductor layer remaining on the bottom of the recess, remains in the bottom of the recess the A field plate portion extending on the second nitride semiconductor layer on the drain side, which is thicker than the second nitride semiconductor layer, is provided .

  The nitride semiconductor device of the present invention has a structure including a nitride semiconductor layer having a highly insulating microcrystalline structure between a gate and a drain electrode, whereby electrons trapped in a surface level between the gate and the drain electrode. The current collapse phenomenon is suppressed and the high-frequency characteristics are improved by suppressing the current density or reducing the surface state density. At the same time, instead of using silicon nitride, instead of using silicon nitride, it has a structure having a nitride semiconductor layer having a highly insulating microcrystalline structure formed by low-temperature growth that suppresses a decrease in breakdown voltage. A nitride semiconductor device having a higher breakdown voltage than the field plate structure can be formed.

  In particular, when the gate electrode is formed so as to form a Schottky junction through a thin nitride semiconductor layer having a microcrystalline structure, a nitride semiconductor device having a higher breakdown voltage can be formed.

  Hereinafter, the nitride semiconductor device of the present invention will be described in detail by taking a HEMT as a group III-V nitride semiconductor device as an example.

Reference example 1

FIG. 1 is a sectional view of a nitride semiconductor device according to a first reference example of the present invention, and FIG. 2 is an explanatory view of the manufacturing process. As shown in FIG. 2A, nitridation with a thickness of about 200 nm is performed on a substrate 11 made of silicon carbide (SiC) by MOCVD (metal organic chemical vapor deposition) method, MBE (electron beam epitaxial) method, or the like. Buffer layer 12 made of aluminum (AlN), channel layer 13 made of non-doped gallium nitride (GaN) with a thickness of 2.5 μm, carrier supply layer 14 made of n-type aluminum gallium nitride (AlGaN), made of non-doped aluminum gallium nitride A cap crystal 19 having a microcrystalline structure made of non-doped gallium nitride (GaN) having a microcrystalline structure and having a thickness of 100 nm formed at a temperature lower by about 500 ° C. than the film forming temperature of the Schottky layer 15 is formed. Yes. The cap layer 19 having a microcrystalline structure is formed at a temperature lower by about 500 ° C. than the film formation temperature of the Schottky layer 15, thereby becoming a highly insulating nitride semiconductor layer. Specifically, the specific resistance of the cap layer 19 having a microcrystalline structure has a high resistance of about 10 ¹¹ Ω · cm. (Nitride semiconductor layers such as the channel layer 13 and the Schottky layer 15 are epitaxially grown at a film forming temperature of 1130 ° C.) Note that a field plate portion is formed on the cap layer 19 having this microcrystalline structure as described later. Therefore, it is necessary to form the nitride semiconductor device in a desired thickness according to the operating conditions of the nitride semiconductor device.

  The cap layer 19 having a microcrystalline structure has a full width at half maximum of the X-ray diffraction rocking curve on the (004) plane when the crystallinity of the GaN layer having a thickness of 1 μm grown under the same growth conditions is evaluated by X-ray diffraction. Becomes 12000 seconds. Therefore, it is confirmed that the cap layer 19 having a microcrystalline structure has a polycrystalline structure. (Note that the GaN layer grown at 1130 ° C. has a single crystal structure, and its half-value width is 300 to 600 seconds.)

  Next, as shown in FIG. 2B, the cap layer 19 having a microcrystalline structure in the source electrode 17a and drain electrode 17b formation regions on the Schottky layer 15 is removed, and the Schottky layer 15 is exposed. Thereafter, as shown in FIG. 2C, a source electrode 17a and a drain electrode 17b made of titanium (Ti) / aluminum (Al) are formed, and rapid heating is performed at 850 ° C. for 30 seconds to make ohmic contact with the Schottky layer 15. Form.

  Next, as shown in FIG. 2D, a part of the microcrystalline structure cap layer 19 in the gate electrode formation region between the source electrode 17a and the drain electrode 17b is removed in a concave shape, and a Schottky layer 15 is formed on the bottom thereof. Expose. Thereafter, as shown in FIG. 2E, the gate electrode 18 made of a nickel (Ni) / (Au) laminate or the like is extended on the concave portion and the cap layer 19 having a microcrystalline structure on the drain electrode 17b side. To form. At the bottom of the concave portion, a Schottky contact is formed between the gate electrode 18 and the Schottky layer 15, and the gate electrode 18 extending toward the drain electrode 17b forms a field plate portion.

In the reference example of the present invention, since the cap layer 19 having a highly insulating microcrystalline structure is provided, the gate leakage current is reduced and collision ionization in the channel can be suppressed. Furthermore, by using a field plate structure, electric field concentration at the gate electrode end can be reduced. As a result, the off breakdown voltage has been improved from the conventional 100V to 170V. It has been reported that the off breakdown voltage of a nitride semiconductor HEMT is not due to thermal runaway but due to impact ionization, and is largely governed by the tunnel current flowing from the Schottky electrode into the channel (International Conference on Nitride Semiconductor, Nara, 2003, Tu-P2.067).

Next to the actual施例explained shown in Figure 3. Similar to the first reference example shown in FIG. 1, a thickness of about 200 nm is formed on a substrate 11 made of silicon carbide (SiC) by MOCVD (metal organic chemical vapor deposition) method, MBE (electron beam epitaxial) method, or the like. Buffer layer 12 made of aluminum nitride (AlN), channel layer 13 made of non-doped gallium nitride (GaN) with a thickness of 2.5 μm, carrier supply layer 14 made of n-type aluminum gallium nitride (AlGaN), non-doped aluminum gallium nitride The cap layer 19 having a microcrystalline structure with a thickness of 100 nm formed at a temperature lower by about 500 ° C. than the film forming temperature of the Schottky layer 15 is formed. Further, according to the process described in the first reference example, the cap layer 19 having a microcrystalline structure in the source electrode 17a and drain electrode 17b formation regions on the Schottky layer 15 is removed, and the Schottky layer 15 is exposed. Thereafter, a source electrode 17a and a drain electrode 17b made of titanium (Ti) / aluminum (Al) are formed on the exposed Schottky layer 15, and rapid heating is performed at 850 ° C. for 30 seconds to form ohmic contact with the Schottky layer 15. .

  Next, a part of the cap layer 19 having a microcrystalline structure in the gate electrode formation region between the source electrode 17a and the drain electrode 17b is removed in a concave shape. Here, in this example, the cap layer 19 having a microcrystalline structure is not completely removed, and the cap layer 19 having a microcrystalline structure is left about 20 nm or less at the bottom of the concave portion. Thereafter, in accordance with the steps described in the first embodiment, the gate electrode 18 made of a nickel (Ni) / (Au) laminate or the like is extended on the concave portion and the cap layer 19 having a microcrystalline structure on the drain electrode 17b side. To be formed. At the bottom of the concave portion, a Schottky contact is formed between the gate electrode 18 and the Schottky layer 15 via the slightly remaining cap layer 19 of the microcrystalline structure, and the gate electrode 18 extending to the drain electrode 17b side is A field plate portion is formed.

According to the present embodiment, since the microcrystalline cap layer 19 having excellent insulating characteristics is present at the Schottky interface, the Schottky barrier of the gate electrode 18 is high, gate leakage is reduced, and collision ionization in the channel is suppressed. In addition, higher breakdown voltage characteristics can be obtained than in the first reference example.

Reference example 2

Next, another method for manufacturing the nitride semiconductor device described in the first reference example will be described. On a substrate 11 made of silicon carbide (SiC), nitriding with a thickness of about 200 nm is performed by MOCVD (metal organic chemical vapor deposition) method, MBE (electron beam epitaxial) method or the like, as shown in FIG. Buffer layer 12 made of aluminum (AlN), channel layer 13 made of non-doped gallium nitride (GaN) with a thickness of 2.5 μm, carrier supply layer 14 made of n-type aluminum gallium nitride (AlGaN), made of non-doped aluminum gallium nitride A semiconductor substrate having a structure in which the Schottky layers 15 are sequentially stacked is prepared.

Next, as shown in FIG. 4B, in order to selectively grow a cap layer 19 having a microcrystalline structure in the source electrode 17a, drain electrode 17b and gate electrode 18 formation region on the Schottky layer 15, silicon oxide (SiO ₂ ) Mask material 20 is formed. Thereafter, as shown in FIG. 4C, a cap layer 19 having a microcrystalline structure made of non-doped gallium nitride (GaN) having a microcrystalline structure having a thickness of 100 nm is formed at a temperature lower by about 500 ° C. than the deposition temperature of the Schottky layer 15. Are selectively grown in areas other than the electrode forming portion. Thereafter, as shown in FIG. 4D, the mask material 20 is removed, and the source electrode 17a, the drain electrode 17b, and the gate electrode as shown in FIG. 4E according to the steps described in the first embodiment. 18 is formed.

Thus, even when the cap layer 19 having a microcrystalline structure is selectively grown without using etching, a nitride semiconductor device having high breakdown voltage characteristics can be formed as in the first reference example.

  Although the embodiments of the present invention have been described above, the present invention is not limited to these embodiments and can be modified. For example, the type of the gate electrode, the thickness of the Schottky layer 15 and the carrier supply layer 14, and the impurity concentration are appropriately selected so that carriers do not exist in the channel immediately below the control electrode and carriers exist in channels other than immediately below the control electrode. Can be set.

  Further, instead of the nitride semiconductor device having the HEMT structure, the nitride semiconductor layer to which impurities are added is used as an active layer (channel layer), and the above-described Schottky layer 15 is formed on the FET structure. Can do. The nitride semiconductor layer is not limited to the GaN / AlGaN system, and the second nitride semiconductor layer on which the gate electrode is formed (corresponding to the cap layer 19 having a microcrystalline structure in the above embodiment) A layer containing GaN, InN or a mixed crystal semiconductor thereof and not containing aluminum can be used. The first nitride semiconductor layer (corresponding to the Schottky layer 15 in the above embodiment) can be formed of a layer containing GaN, InN, AlN, or a mixed crystal semiconductor thereof. Furthermore, a sapphire substrate may be used instead of the silicon carbide (SiC) substrate. In that case, it is preferable to use gallium nitride (GaN) as the buffer layer. A silicon (Si) substrate may be used instead of the silicon carbide (SiC) substrate.

  The composition of the electrode in ohmic contact with the first nitride semiconductor layer or the second nitride semiconductor layer may be appropriately selected according to the type of the nitride semiconductor layer used.

  Although the second nitride semiconductor layer has been described as having a microcrystalline structure, this is an aggregate of microcrystalline grains or a structure in which they are rearranged, the growth temperature, the gas composition of the atmosphere during growth, and the substrate to be grown. The size and arrangement of the crystal grains vary depending on the type of the material, and can be obtained by controlling the growth temperature within a range where desired Schottky characteristics, insulation characteristics, and the like can be obtained. If the growth temperature of the second nitride semiconductor layer is set to a temperature 400 degrees or more lower than the growth temperature of the first nitride semiconductor layer, it is suitable for forming a control electrode of HEMT or FET.

It is sectional drawing of the nitride semiconductor device which is the 1st reference example of this invention. It is explanatory drawing of the manufacturing process of the nitride semiconductor device which is the 1st reference example of this invention. It is a cross-sectional view of a nitride semiconductor device is a real施例of the present invention. It is a figure explaining the manufacturing method of the nitride semiconductor device which is the 2nd reference example of this invention. It is sectional drawing of the semiconductor device which consists of a conventional III-V group nitride semiconductor. It is sectional drawing of the nitride semiconductor device provided with the conventional field plate structure.

11; substrate, 12; buffer layer, 13; channel layer, 14; carrier supply layer, 15; Schottky layer, 16; SiN cap layer, 17a; source electrode, 17b; drain electrode, 18; Structure cap layer, 20; mask material

Claims (1)

Group III-V nitride composed of a group III element consisting of at least one of the group consisting of gallium, aluminum, boron and indium and a group V element containing at least nitrogen from the group consisting of nitrogen, phosphorus and arsenic In a nitride semiconductor device composed of a semiconductor layer,
A second nitride semiconductor layer comprising a first nitride semiconductor layer laminated on a substrate and the group III-V nitride semiconductor layer laminated on the first nitride semiconductor layer and containing no aluminum A source electrode and a drain electrode that are in ohmic contact with the first nitride semiconductor layer, and a gate electrode,
The second nitride semiconductor layer has a microcrystalline structure having a deposition temperature lower than that of the first nitride semiconductor layer,
The gate electrode is part of a cut with deletion rather of the second nitride semiconductor layer in a recess formed by leaving said second nitride semiconductor layer on the bottom, the second remaining in the bottom of the recess A field plate portion which is in Schottky contact with the nitride semiconductor layer and extends on the second nitride semiconductor layer on the drain side which is thicker than the second nitride semiconductor layer remaining at the bottom of the recess ; A nitride semiconductor device.

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