JP5282954B2 - RF power amplifier - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce a risk of a meltdown of an electronic part in an output power coupler even when a VSWR (voltage standing wave ratio) value becomes extremely large by a load variation. <P>SOLUTION: An RF power amplifying device HPA_MD has a first and a second RF power amplifying circuit PA1 and PA2, and an output power coupler Out_PC composed of Wilkinson power combiner. RF amplifying output signals of the RF power amplifying circuits PA1 and PA2 are supplied to a first and a second input terminal of the output power coupler Out_PC, and the RF amplifying output signals are generated from an output terminal Out. In the output power coupler Out_PC, an impedance between the first input terminal and output terminal and an impedance between the second input terminal and output terminal are almost equally set, and a resistor R61 between the first input terminal and the second input terminal is replaced with a reactance element L63 such as an inductor generating e.g. an eddy current. <P>COPYRIGHT: (C)2010,JPO&amp;INPIT

Description

  The present invention relates to an RF (radio frequency) power amplifying apparatus, and in particular, even when the value of VSWR (voltage standing wave ratio) becomes extremely large due to load fluctuation, the risk of fusing of electronic components of the output power coupler is reduced. It relates to technology that is useful for mitigation.

  There are a plurality of communication methods in mobile communication represented by mobile phones. For example, in Europe, there is W-CDMA, which is a third generation wireless communication system that has recently started service, in addition to GSM and EDGE that have improved the data communication speed of GSM, which are widely used as the second generation wireless communication system. In North America, in addition to DCS and PCS, which are the second generation wireless communication systems, cdma1x, which is the third generation wireless communication system, has become widespread. GSM is an abbreviation for Global System for Mobile Communication. EDGE is an abbreviation for Enhanced Data rate for GSM Evolution. W-CDMA is an abbreviation for Wide-band Code Division Multiple Access. DCS is an abbreviation for Digital Cellar System. PCS is an abbreviation for Personal Communication System. cdma1x is an abbreviation for Code Division Multiple Access 1x.

  The operation of the high-frequency power amplifier of the cellular phone terminal is a saturation operation in the basic mode GSM that uses only phase modulation, and EDGE that uses amplitude modulation along with phase modulation is several dB from the saturation operation point of GSM. This is a linear operation at the operating point where the back-off is taken. In addition, in W-CDMA and cdma-1x that also use amplitude modulation in conjunction with phase modulation, the operation of the high-frequency power amplifier is a linear operation.

  An antenna switch is disposed between the high frequency power amplifier and the antenna in the high frequency circuit portion of the mobile phone terminal that supports GSM and EDGE. The antenna switch executes a function of switching between a TDMA (Time Division Multiple Access) transmission slot and a reception slot.

  In the high-frequency circuit portion of the mobile phone terminal corresponding to W-CDMA and cdma-1x, a duplexer is disposed between the high-frequency power amplifier and the antenna. The duplexer performs a function of processing in parallel the transmission of an RF transmission signal with a low RF frequency and the reception of an RF reception signal with a high RF frequency in a CDMA (code division multiple access) system. Furthermore, in W-CDMA, cdma-1x, and the like, an isolator is disposed between the high frequency power amplifier and the duplexer so that the load fluctuation effect at the antenna does not reach the high frequency power amplifier. However, the isolator is a large and expensive component because it is difficult to integrate the isolator into a structure in which the high-frequency power amplifier is manufactured.

  In the following Patent Document 1, it is possible to use a parallel power amplifier or a balanced power amplifier that achieves low distortion and high efficiency with a wide range of load impedance without using an isolator. Have been described. This parallel or balanced power amplifier has a plurality of amplification paths, and an input signal at one input terminal is supplied to inputs of the plurality of amplification paths by an input power divider. Each amplification path includes an amplifier and a phase shifter, phase shifters are arranged on the plurality of amplification paths so that the phases of operation of the amplifiers are different in the plurality of amplification paths, and a plurality of amplification paths are arranged by the output power combiner. Combine outputs into a single output.

  On the other hand, in the parallel or balanced power amplifier described in Patent Document 1 below, even if impedance mismatch occurs between the output of the power amplifier and the antenna, the entire ACPR (adjacent channel leakage power) of the balanced power amplifier is generated. Ratio) can be maintained well. The reason is that the impedance conversion of one power amplifier of the two amplification paths is inductive rotation on the Smith chart, and the impedance conversion of the other power amplifier is capacitive rotation on the Smith chart. As a result, when one impedance becomes high impedance, the other impedance becomes low impedance, and distortion of the synthesized signal can be corrected. ACPR is an abbreviation for Adjacent Channel Leakage Power Ratio.

JP 2008-135822 A

  Prior to the present invention, the inventors engaged in the development of an RF power amplifier module having a GSM transmission function. At the beginning of this development, a development challenge was given to maintain good ACPR even when impedance mismatch between the output of the RF power amplifier and the antenna occurs.

  Therefore, prior to the present invention, the present inventors examined the use of the parallel or balanced RF power amplifier described in Patent Document 1 above.

  FIG. 1 is a diagram showing a balanced RF power amplifier studied by the present inventors prior to the present invention.

  The RF power amplifier module HPA_MD shown in FIG. 1 includes an input power divider In_PD, a first input phase shifter In_PS1, a second input phase shifter In_PS2, a first input matching circuit In_MN1, a second input matching circuit In_MN2, and a first RF power amplifier circuit. PA1 and a second RF power amplifier circuit PA2 are included. The RF power amplifier module HPA_MD of FIG. 1 further includes a first output matching circuit Out_MN1, a second output matching circuit Out_MN2, a first output phase shifter Out_PS1, a second output phase shifter Out_PS2, and an output power combiner Out_PC.

  The RF input signal of the input terminal In is supplied to the input terminal of the first input phase shifter In_PS1 and the input terminal of the second input phase shifter In_PS2 by the input power divider In_PD, and the output signal of the first input phase shifter In_PS1 and the second input The output signal of the phase shifter In_PS2 is supplied to the input terminal of the first input matching circuit In_MN1 and the input terminal of the second input matching circuit In_MN2. The output signal of the first input matching circuit In_MN1 and the output signal of the second input matching circuit In_MN2 are respectively supplied to the input terminal of the first RF power amplifier circuit PA1 and the input terminal of the second RF power amplifier circuit PA2. The output signal of the first RF power amplifier circuit PA1 and the output signal of the second RF power amplifier circuit PA2 are respectively supplied to the input terminal of the first output matching circuit Out_MN1 and the input terminal of the second output matching circuit Out_MN2. The output signal of the first output matching circuit Out_MN1 and the output signal of the second output matching circuit Out_MN2 are respectively supplied to the input terminal of the first output phase shifter Out_PS1 and the input terminal of the second output phase shifter Out_PS2. The output signal of the first output phase shifter Out_PS1 and the output signal of the second output phase shifter Out_PS2 are respectively supplied to the first input terminal and the second input terminal of the output power combiner Out_PC, and are output from the output terminal Out of the output power combiner Out_PC. An RF amplified output signal is generated.

The input power divider In_PD is configured by a Wilkinson power divider including an input terminal, a first output terminal, and a second output terminal. As is well known, in the Wilkinson power divider, the first microstrip line or the first lossless lumped constant circuit is connected between the input terminal and the first output terminal, and the input terminal and the second output terminal. A second microstrip line or a second lossless lumped constant circuit is connected between the first output terminal and the second output terminal. If the output impedance of the input signal source connected to the input terminal is 50Ω, the first and second microstrip lines have a line width such that the characteristic impedance is 50Ω × (2) ^1/2 = 70.5Ω. The resistor R11 has a resistance value of 2 × 50Ω = 100Ω. Since the RF frequency of a GSM mobile phone terminal of GSM800 or GSM850 is approximately 1 GHz, the line length of a quarter-wave (λ / 4) microstrip line is extremely long, approximately 4.5 cm. Accordingly, the first and second lossless lumped constant circuits are used in the input power divider In_PD of the RF power amplifier module HPA_MD shown in FIG. The first lossless lumped constant circuit is configured to have an impedance of 70.5Ω by the low-pass filter capacitor C10, inductor L11, and capacitor C11. The second lossless lumped constant circuit is also configured to have an impedance of 70.5Ω by the low-pass filter capacitor C10, inductor L12, and capacitor C12. Since the first and second lossless lumped constant circuits each generate a phase of 90 °, the first and second lossless lumped constant circuits are 180 ° between the first output terminal and the second output terminal. Generate a phase difference. On the other hand, since the 100Ω resistor R11 between the first output terminal and the second output terminal generates a phase difference of 0 ° between the first output terminal and the second output terminal, the first output terminal and the second output terminal. The signal having a phase difference of 180 ° and the signal having a phase difference of 0 ° are canceled to obtain the maximum isolation.

  One end of the input capacitor C01 is connected to the input terminal In of the RF power amplifier module HPA_MD, and the input terminal of the input power divider In_PD is connected to the other end of the input capacitor C01. The first output terminal of the input power divider In_PD is connected to the input terminal of the first input phase shifter In_PS1, and the second output terminal of the input power divider In_PD is connected to the input terminal of the second input phase shifter In_PS2. Yes. The first input phase shifter In_PS1 is configured to generate a phase of + 45 ° by the capacitor C21 and the inductor L1, and the second input phase shifter In_PS2 is configured to generate a phase of −45 ° by the inductor L22 and the capacitor C22. Has been.

  The output terminal of the first input phase shifter In_PS1 is connected to the input terminal of the first input matching circuit In_MN1, and the output terminal of the second input phase shifter In_PS2 is connected to the input terminal of the second input matching circuit In_MN2. The first input matching circuit In_MN1 includes a capacitor C31 and an inductor L31. The first input matching circuit In_MN1 has a relatively high output impedance of the input power divider In_PD and the first input phase shifter In_PS1 and a relatively low input impedance of the first RF power amplifier circuit PA1. Has a function to match between. The second input matching circuit In_MN2 is also configured by a capacitor C32 and an inductor L32, and the relatively high output impedance of the input power divider In_PD and the second input phase shifter In_PS2 and the relatively low input impedance of the second RF power amplifier circuit PA2 Has a function to match between.

  The first RF power amplifier circuit PA1 configured by the first stage RF amplifier A1, the next stage RF amplifier A2, and the final stage RF amplifier A3 amplifies the RF signal at the output terminal of the first input phase shifter In_PS1, and converts the first RF amplified signal into the first RF amplifier signal. 1 is supplied to the input terminal of the output matching circuit Out_MN1. The second RF power amplifier circuit PA2 configured by the first stage RF amplifier A1, the next stage RF amplifier A2, and the final stage RF amplifier A3 also amplifies the RF signal at the output terminal of the second input phase shifter In_PS2, and converts the second RF amplified signal into the second RF amplifier signal. This is supplied to the input terminal of the 2-output matching circuit Out_MN2.

  The first output matching circuit Out_MN1 is composed of an inductor L41 and a capacitor C41, and the comparison between the relatively low output impedance of the final stage RF amplifier A3 of the first RF power amplifier circuit PA1 and the first output phase shifter Out_PS1 and the output power coupler Out_PC. It has a function to match between high input impedance. The second output matching circuit Out_MN1 is composed of an inductor L42 and a capacitor C42, and the comparatively low output impedance of the final stage RF amplifier A3 of the second RF power amplifier circuit PA2 is compared with the second output phase shifter Out_PS2 and the output power coupler Out_PC. It has a function to match between high input impedance.

  The first output phase shifter Out_PS1 is configured to generate a phase of −45 ° by the inductor L51 and the capacitor C51, and the second input phase shifter In_PS2 is configured to generate a phase of + 45 ° by the capacitor C52 and the inductor L52. It is configured.

The output power combiner Out_PC is configured by a Wilkinson power combiner including a first input terminal, a second input terminal, and an output terminal. As is well known, in the Wilkinson power combiner, a first microstrip line or a first lossless lumped constant circuit is connected between a first input terminal and an output terminal, and a second input terminal and an output terminal. A second microstrip line or a second lossless lumped constant circuit is connected between the first input terminal and the second input terminal. If the input impedance of the load connected to the output terminal is 50Ω, the first and second microstrip lines have a line width and a line such that the characteristic impedance is 50Ω × (2) ^1/2 = 70.5Ω. The resistor R61 has a resistance value of 2 × 50Ω = 100Ω. Since the RF frequency of a GSM mobile phone terminal of GSM800 or GSM850 is approximately 1 GHz, the line length of a quarter-wave (λ / 4) microstrip line is extremely long, approximately 4.5 cm. . Accordingly, the first and second lossless lumped constant circuits are used in the output power combiner Out_PC of the RF power amplifier module HPA_MD shown in FIG. The first lossless lumped constant circuit is configured to have an impedance of 70.5Ω by the low-pass filter capacitor C61, inductor L61, and capacitor C63. The second lossless lumped constant circuit is also configured to have an impedance of 70.5Ω by the low-pass filter capacitor C62, inductor L62, and capacitor C63. Since the first and second lossless lumped constant circuits each generate a phase of 90 °, the first and second lossless lumped constant circuits have a position of 180 ° between the first input terminal and the second input terminal. Generate a phase difference. On the other hand, the 100Ω resistor R61 between the first input terminal and the second input terminal generates a phase difference of 0 ° between the first output terminal and the second output terminal, so that the first input terminal and the second input A signal having a phase difference of 180 ° and a signal having a phase difference of 0 ° with respect to the terminal are canceled to obtain maximum isolation.

  In the RF power amplifier module HPA_MD shown in FIG. 1, the power amplification power transistors of the first stage RF amplifier A1, the next stage RF amplifier A2 and the last stage RF amplifier A3 of the first and second RF power amplifier circuits PA1 and PA2 are as follows. These are constituted by LD (Laterally Diffused) type N-channel power MOS transistors manufactured on a silicon semiconductor substrate. Also, the input power divider In_PD, the first and second input phase shifters In_PS1-2, the first and second input matching circuits In_MN1-2, the first and second output matching circuits Out_MN1-2, The plurality of capacitors, the plurality of inductors, and the plurality of resistors included in the second output phase shifter Out_PS1-2 and the output power coupler Out_PC are configured by microelectronic components mounted on the RF power amplifier module HPA_MD. It is.

  On the other hand, the present inventor conducted a load fluctuation test of the RF power amplifier module HPA_MD shown in FIG. 1 in the development of the GSM RF power amplifier module prior to the present invention. In the load fluctuation test, the load condition of the output terminal Out of the RF power amplifier module HPA_MD shown in FIG. 1 is changed from an ideal state. In an ideal load condition of the output terminal Out of the RF power amplifier module HPA_MD, the output impedance of, for example, 50 ohms of the output terminal Out and the load impedance of, for example, 50 ohms of the antenna are equally matched.

  Under this ideal load condition, the reflectance Γ, which is the ratio of the reflected wave / traveling wave, is zero, so the value of VSWR (voltage standing wave ratio) obtained by (1 + Γ) / (1-Γ) is 1. It becomes. VSWR is an abbreviation for Voltage Standing-Wave Ratio. However, if the load impedance of the antenna falls below 50 ohms due to the change in the load of the antenna, for example, the reflectivity Γ increases from zero, so the value of VSWR (voltage standing wave ratio) also increases from 1. On the other hand, in the RF power amplifier module HPA_MD shown in FIG. 1, the first and second RF power amplifier circuits PA1 and PA2 are connected in the form of a parallel or balanced power amplifier. Therefore, as described at the beginning, even if an impedance mismatch between the output and the antenna occurs, the impedance conversion of one path becomes inductive rotation on the Smith chart, and the impedance conversion of the other path is on the Smith chart. Therefore, the distortion of the synthesized signal can be corrected and the overall ACPR can be maintained satisfactorily.

  However, the present inventors have found a problem that the RF power amplifier module HPA_MD shown in FIG. 1 is destroyed when the value of VSWR (voltage standing wave ratio) is extremely increased in the load fluctuation test described above. It is. The present inventors further investigated the contents of destruction of the RF power amplifier module HPA_MD shown in FIG. 1, and found that the first input terminal and the second input terminal of the output power combiner Out_PC constituted by the Wilkinson power combiner. The resistance R61 of 100Ω between the two was damaged. The resistor R61 is also constituted by a microelectronic component mounted on the RF power amplifier module HPA_MD, and specifically, it is a surface mount device (SMD: Surface Mount Device) called “0603 type”. According to the JIS standard, the 0603 surface mount device is a microelectronic component having a length (L) of 0.6 mm, a width (W) of 0.3 mm, and a thickness (t) of 0.23 mm. Also, the maximum allowable power consumption Pmax of the 0603 type surface mount device is 1/16 (W) = 62.5 mW, which is extremely small, 100 mW or less.

  FIG. 2 shows the power consumption of the resistor R61 of the output power coupler Out_PC when the value of VSWR (voltage standing wave ratio) changes from 1 to 15 due to load fluctuations in the RF power amplifier module HPA_MD shown in FIG. FIG. That is, in FIG. 2, characteristic L1 shows an ideal state where the ratio of VSWR (voltage standing wave ratio) is 1: 1, and characteristic L15 shows the ratio of VSWR (voltage standing wave ratio) of 15: 1. The worst case is shown.

  From FIG. 2, it can be understood that the worst condition when the value of VSWR (voltage standing wave ratio) is 15 consumes approximately 430 mW, which greatly exceeds the maximum allowable power consumption Pmax. As a result, when the value of VSWR (voltage standing wave ratio) becomes extremely large, the resistor R61 of the output power coupler Out_PC of the RF power amplifier module HPA_MD shown in FIG. 1 is blown. That is, when impedance mismatch between the output and the antenna occurs, the RF signal having inductive rotation of one path before synthesis and the capacitive rotation of the other path can be corrected even if the distortion of the combined signal can be corrected. It is assumed that the RF signal possessed is applied between both ends of the resistor R61. 2 indicates the phase of the RF transmission output signal, the vertical axis of FIG. 2 indicates the power consumption of the resistor R61, and the result of FIG. 2 is based on a high-frequency circuit simulation.

  The present invention has been made as a result of the study of the present inventors prior to the present invention as described above.

  Accordingly, an object of the present invention is to reduce the risk of fusing of electronic components of the output power coupler even when the value of VSWR (voltage standing wave ratio) becomes extremely large due to load fluctuation. is there.

  The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

  A typical one of the inventions disclosed in the present application will be briefly described as follows.

  That is, a typical RF power amplifier (HPA_MD) of the present invention includes an output power combiner configured by a first RF power amplifier circuit (PA1), a second RF power amplifier circuit (PA2), and a Wilkinson power combiner. (Out_PC).

  First and second RF amplified output signals of the first and second RF power amplifier circuits are respectively supplied to first and second input terminals of the output power combiner (Out_PC), and the output power combiner An RF amplified output signal is generated from the output terminal (Out) of the device.

  In the output power combiner, a predetermined impedance is set between the first input terminal and the output terminal, and an impedance substantially equal to the predetermined impedance is set between the second input terminal and the output terminal. Yes. The resistor (R61) between the first input terminal and the second input terminal of the output power coupler is replaced with a reactance element (L63) such as an inductor that generates eddy current, for example. (See FIG. 3).

  The effects obtained by the representative ones of the inventions disclosed in the present application will be briefly described as follows.

  That is, even when the value of VSWR (voltage standing wave ratio) becomes extremely large due to load fluctuation, the risk of fusing of the electronic components of the output power coupler can be reduced.

<Typical embodiment>
First, an outline of a typical embodiment of the invention disclosed in the present application will be described. The reference numerals of the drawings referred to with parentheses in the outline description of the representative embodiments merely exemplify what are included in the concept of the components to which the reference numerals are attached.

  [1] A typical embodiment of the present invention is an RF power amplifying apparatus comprising a first RF power amplifying circuit (PA1), a second RF power amplifying circuit (PA2), and an output power combiner (Out_PC) ( HPA_MD).

  The output power combiner (Out_PC) includes a Wilkinson power combiner including a first input terminal, a second input terminal, and an output terminal (Out).

  A first RF amplified output signal of the first RF power amplifier circuit and a second RF amplified output signal of the second RF power amplifier circuit are connected to the first input terminal and the second input terminal of the output power combiner (Out_PC). Supplied respectively.

  An RF amplified output signal of the RF power amplifier (HPA_MD) is generated from the output terminal (Out) of the output power combiner.

  A predetermined impedance is set between the first input terminal and the output terminal of the output power coupler, and a predetermined impedance is set between the second input terminal and the output terminal of the output power coupler. The impedance is set to be approximately equal.

  The resistor (R61) between the first input terminal and the second input terminal of the output power combiner configured by the Wilkinson power combiner is replaced by a reactance element (L63). (See Figure 3).

  According to the embodiment, an undesired RF signal generated by a load variation at the output terminal (Out) is applied to the reactance element (L63), and a current flows through the reactance element (L63). However, since the power consumption due to the current is reactive power consumption, the possibility that the reactance element (L63) is thermally destroyed like the resistor (R61, FIG. 1) can be reduced.

  In a preferred embodiment, the reactance element is an inductor (L63) (see FIG. 3).

  In another preferred embodiment, the inductor (L63) generates an eddy current (see FIG. 3).

  According to another preferred embodiment, since the eddy current generated by the inductor (L63) generates a power loss, an undesired RF signal due to a transient load fluctuation at the output terminal (Out). It is possible to absorb this energy in a short time.

  The RF power amplifying apparatus (HPA_MD) according to another preferred embodiment further includes an input power divider (In_PD) including an input terminal, a first output terminal, and a second output terminal.

  An RF input signal can be supplied to the input terminal of the input power divider, and a first RF input signal generated at the first output terminal of the input power divider is supplied from the first RF power amplifier circuit (PA1). The second RF input signal supplied to the input terminal and generated at the second output terminal of the input power divider is supplied to the input terminal of the second RF power amplifier circuit (PA2) (FIG. 3). reference).

  In yet another preferred embodiment, between the input terminal and the first output terminal of the input power divider, the first RF power amplifier circuit (PA1), and the first input of the output power combiner. A first signal path is formed between the terminal and the output terminal.

  Between the input terminal and the second output terminal of the input power divider, the second RF power amplifier circuit (PA2), and between the second input terminal and the output terminal of the output power combiner, A second signal path is formed.

  The total first total phase shift amount of the first signal path and the total second total phase shift amount of the second signal path are set substantially equal to each other (see FIG. 3).

  In still another preferred embodiment, a first first half phase shift amount from the input terminal of the input power divider in the first half of the first signal path to the input terminal of the first RF power amplifier circuit, and The second half phase shift amount from the input terminal of the input power divider in the first half of the second signal path to the input terminal of the second RF power amplifier circuit is set to have an opposite polarity and substantially equal to the absolute value. .

  A first second phase shift amount from the output terminal of the first RF power amplifier circuit in the second half of the first signal path to the output terminal of the output power combiner; and the second RF power amplification in the second half of the second signal path The second half phase shift amount from the output terminal of the circuit to the output terminal of the output power combiner is set to have an opposite polarity and an almost absolute value (see FIG. 3).

  In still another preferred embodiment, a first input matching circuit (In_MN1) is inserted between the first output terminal of the input power divider and the input terminal of the first RF power amplifier circuit (PA1). And a second input matching circuit (In_MN2) is inserted between the second output terminal of the input power divider and the input terminal of the second RF power amplifier circuit (PA2). (See FIGS. 3 and 4).

  In still another preferred embodiment, a first output matching circuit (Out_MN1) is inserted between the output terminal of the first RF power amplifier circuit (PA1) and the first input terminal of the output power coupler. And a second output matching circuit (Out_MN2) is inserted between the output terminal of the second RF power amplifier circuit (PA2) and the second input terminal of the output power coupler. (See FIG. 3).

  In still another preferred embodiment, output matching of the first RF power amplifier circuit (PA1) is performed between the first input terminal and the output terminal of the output power combiner (Out_MN & PC), and the output The output matching of the second RF power amplifier circuit (PA2) is performed between the second input terminal and the output terminal of the power combiner (see FIG. 4).

  In another preferred embodiment, a first circuit element having the predetermined impedance is connected between the first input terminal and the output terminal of the output power coupler, and the output power coupler includes a first circuit element. A second circuit element having substantially the same impedance is connected between two input terminals and the output terminal (see FIG. 3).

  In a more preferred embodiment, the first circuit element and the second circuit element are each configured by a microstrip line having a predetermined line length (see FIG. 3).

  In an even more preferred embodiment, the first circuit element is constituted by a first lossless lumped constant circuit (C61, L61, C63), and the second circuit element is constituted by a second lossless lumped constant circuit (C62, L62). , C63) (see FIG. 3).

  In a specific embodiment, the inductor (L63) is integrated on a semiconductor chip (61) on which power transistors of the first RF power amplifier circuit (PA1) and the second RF power amplifier circuit (PA2) are formed. (See FIGS. 5, 6, and 11).

  In another specific embodiment, a wiring board on which a semiconductor chip (61) on which power transistors of the first RF power amplifier circuit (PA1) and the second RF power amplifier circuit (PA2) are formed is mounted ( 60), the inductor (L63) is mounted (see FIG. 10).

  In a more specific embodiment, the semiconductor chip (61) in which the power transistor and the inductor (L63) are integrated is formed of a silicon substrate (see FIGS. 5 and 6). ).

  In an even more specific embodiment, the power transistor is an LD type MOS transistor.

  Another even more specific embodiment is characterized in that the semiconductor chip (61) in which the power transistor and the inductor (L63) are integrated is constituted by a compound semiconductor substrate (FIG. 11).

<< Description of Embodiment >>
Next, the embodiment will be described in more detail. In all the drawings for explaining the best mode for carrying out the invention, components having the same functions as those in the above-mentioned drawings are denoted by the same reference numerals, and repeated description thereof is omitted.

<< Configuration of High Output RF Power Amplifier Module >>
FIG. 3 is a diagram showing a configuration of a balanced RF power amplifier according to one embodiment of the present invention.

  The balanced RF power amplifier shown in FIG. 3 is specifically configured as a high-power RF power amplifier module HPA_MD. The high power RF power amplifier module HPA_MD in FIG. 3 is similar to the RF power amplifier module HPA_MD shown in FIG. 1 in that the input power divider In_PD, the first and second input phase shifters In_PS1-2, and the first and second It includes input matching circuits In_MN1-2 and first and second RF power amplifier circuits PA1-2. Further, the high output RF power amplifier module HPA_MD of FIG. 3 further includes the first and second output matching circuits Out_MN1 to 2 and the first and second output phase shifters, similarly to the RF power amplifier module HPA_MD shown in FIG. Out_PS1-2 and output power combiner Out_PC are included. The GSM850 RF transmission input signal having a frequency of 824 MHz to 849 MHz and the GSM900 RF transmission input signal having a frequency of 889 Hz to 915 MHz are supplied to the input terminal In of the high output RF power amplifier module HPA_MD via the input capacitor C01. It is possible.

  Input power divider In_PD, input phase shifter In_PS1-2, input matching circuit In_MN1-2, RF power amplifier circuit PA1-2, output matching circuit Out_MN1-2, output phase shifter Out_PS1 of high output RF power amplifier module HPA_MD in FIG. Since the configurations of ˜2 are the same as those in FIG. 1, repeated description thereof is omitted.

  The high power RF power amplifier module HPA_MD in FIG. 3 differs from the RF power amplifier module HPA_MD shown in FIG. 1 only in the configuration and operation of the output power combiner Out_PC.

That is, the output power combiner Out_PC of the high output RF power amplifier module HPA_MD of FIG. 3 is constituted by a Wilkinson power combiner, and a first microstrip line or a first lossless circuit is provided between the first input terminal and the output terminal. A lumped constant circuit is connected, a second microstrip line or a second lossless lumped constant circuit is connected between the second input terminal and the output terminal, and an inductor is connected between the first input terminal and the second input terminal. L63 is connected. If the input impedance of the load connected to the output terminal is 50Ω, the first and second microstrip lines have a line width and a line such that the characteristic impedance is 50Ω × (2) ^1/2 = 70.5Ω. The inductor L63 has an impedance of 2 × 50Ω = 100Ω. Since the RF frequency of a GSM mobile phone terminal of GSM800 or GSM850 is about 1 GHz, the line length of a quarter-wave (λ / 4) microstrip line is as long as about 4.5 cm. . Therefore, the first and second lossless lumped constant circuits are used in the output power combiner Out_PC of the high output RF power amplifier module HPA_MD in FIG. The first lossless lumped constant circuit is configured to have an impedance of 70.5Ω by the low-pass filter capacitor C61, inductor L61, and capacitor C63. The second lossless lumped constant circuit is also configured to have an impedance of 70.5Ω by the low-pass filter capacitor C62, inductor L62, and capacitor C63. Since the first and second lossless lumped constant circuits each generate a phase of 90 °, the first and second lossless lumped constant circuits have a position of 180 ° between the first input terminal and the second input terminal. Generate a phase difference. On the other hand, the inductor L63 having an impedance of 100Ω between the first input terminal and the second input terminal generates a phase difference of 0 ° between the first output terminal and the second output terminal. The 180 ° phase difference signal and the 0 ° phase difference signal with the second input terminal are canceled to obtain the maximum isolation.

  Thus, between the first input terminal and the second input terminal of the output power coupler Out_PC of the high output RF power amplifier module HPA_MD of FIG. 3, the 100Ω resistor R61 of FIG. L63 is connected.

  The inductance value of the inductor L63 connected between the first input terminal and the second input terminal of the output power coupler Out_PC of the high output RF power amplifier module HPA_MD in FIG. 3 is set according to the following calculation formula. However, the frequency f of the RF transmission signal at this time is 800 MHz.

R61 = jωL63 = j2πfL63 (Expression 1)
100Ω = 6.28 × 800 × 10 ⁶ × L63
∴L63 = 19.9 × 10 ⁻⁶ = 19.9 nH
An undesired RF signal is applied between both ends of the inductor L63 used in place of the 100Ω resistor R61 of FIG. 1 in the output power coupler Out_PC of the high output RF power amplifier module HPA_MD of FIG. . In accordance with the inductance value of the inductor L63, the current flowing through the inductor L63 due to an undesired RF signal due to load variation is determined. Since the power consumed by this current flowing through the inductor L63 is reactive power, the inductor L63 of the output power coupler Out_PC in FIG. 3 is thermally destroyed like the resistor R61 of the output power coupler Out_PC in FIG. The possibility of being reduced is reduced.

  The preferred inductor L63 of the output power combiner Out_PC of FIG. 3 has the ability to absorb undesired RF signal energy due to transient load fluctuations at the output terminal Out in a short time, and heat during energy absorption. It has a device that reduces the possibility of mechanical destruction. Details of the preferred inductor L63 of the output power combiner Out_PC will be described in detail in the following specific embodiments.

<< Specific High-Output RF Power Amplifier Module >>
FIG. 4 is a diagram showing a configuration of a balanced RF power amplifier according to a specific embodiment of the present invention.

  The input divider / input phase shifter In_PD & PS of the high output RF power amplifier module shown in FIG. 4 includes the functions of the input power divider In_PD of the high output RF power amplifier module of FIG. 3 and the first and second input phase shifters In_PS1. It has two functions. That is, the capacitor C21 and the inductor L22 of the input divider / input phase shifter In_PD & PS in FIG. 4 divide the input signal of the input terminal into the first output terminal and the second output terminal, and the first and second outputs. A 90 ° phase difference is generated at the output terminal. The input divider / input phase shifter In_PD & PS in FIG. 4 has a reduced number of elements compared to the function of the input power divider In_PD in FIG. 3 and the first and second input phase shifters In_PS1 and 2, and the resistance in FIG. R11 is also omitted.

  Further, the output matching circuit / output power combiner Out_MN & PC of the high output RF power amplifier module shown in FIG. 4 has the functions and outputs of the first and second output matching circuits Out_MN1 and 2 of the high output RF power amplifier module of FIG. It has the function of the power combiner Out_PC. In other words, the output matching circuit / output power combiner Out_MN & PC in FIG. 4 includes relatively low output impedances and outputs of the first and second RF power amplifier circuits PA1-2 and the first and second output phase shifters Out_PS1-2. It has a function of matching with the relatively high input impedance of the antenna at the terminal Out. That is, the inductor L61 and the inductor L62 of the output matching circuit / output power coupler Out_MN & PC in FIG. 4 convert the relatively low output impedances of the first and second output phase shifters Out_PS1 to 2 into relatively high impedances. Further, the inductor L61 and the inductor L62 of the output matching circuit / output power combiner Out_MN & PC of FIG. 4 combine the first and second output signals of the first and second output phase shifters Out_PS1 to 2 and combine them. The RF output signal is supplied to the output terminal Out.

  Accordingly, the first and second output phase shifters Out_PS1 to 2 and the output matching circuit / output power combiner Out_MN & PC in FIG. 4 are the same as the first and second output matching circuits Out_MN1 to 2, first and second in FIG. Compared with the output phase shifter Out_PS1 to 2 and the output power combiner Out_PC, the number of elements is reduced.

  In the high-power RF power amplifier module shown in FIG. 4, power detection is performed to perform automatic power control (APC: Automatic Power Control) using a transmission power level signal Vramp supplied from a baseband processing unit via an RF integrated circuit. A device Pdet is arranged. The power detector Pdet includes a first detection circuit DET1, a second detection circuit DET2, and an addition circuit Sum. The output signal of the first RF power amplifier circuit PA1 is supplied to the input terminal of the first detection circuit DET1 via the capacitor C64 and the first output phase shifter Out_PS1, and the capacitor C65 and the second signal are supplied to the input terminal of the second detection circuit DET2. The output signal of the first RF power amplifier circuit PA1 is supplied via the output phase shifter Out_PS2. The detection output signal of the first detection circuit DET1 and the detection output signal of the second detection circuit DET2 are supplied to the addition circuit Sum, and the power detection signal Vdet generated from the output of the addition circuit Sum is the inverting input of the automatic power control amplifier APC_Amp. To the terminal. A transmission power level signal Vramp is supplied to the non-inverting input terminal + of the automatic power control amplifier APC_Amp, and the automatic power control signal Vapc generated from the output of the automatic power control amplifier APC_Amp is applied to the input terminal In of the RF power amplifier module HPA_MD. The gain of the connected variable gain amplifier VGA is controlled.

  5 shows the final stage RF amplifier A3 and the first and second output phase shifters Out_PS1-2 and output matching of the first and second RF power amplifier circuits PA1-2 in the high-power RF power amplifier module shown in FIG. It is a figure which shows the device arrangement | positioning of a circuit and output electric power coupler Out_MN & PC.

  On the left side of FIG. 5, a plurality of LD type N-channel power MOS transistors constituting the first stage RF amplifier A1, the next stage RF amplifier A2, and the last stage RF amplifier A3 of the first and second RF power amplifier circuits PA1 and PA2 are shown. An integrated silicon chip Si_Chip is arranged. However, in FIG. 5, only the power MOS transistor of the final stage RF amplifier A3 of the first and second RF power amplifier circuits PA1-2 is shown. Between the power MOS transistors of the two final stage RF amplifiers A3, a spiral inductor constituting the inductor L63 of the output matching circuit / output power coupler Out_MN & PC of FIG. 3 is arranged.

  On the other hand, a part of the wiring board of the high-power RF power amplifier module shown in FIG. 4 is shown on the right side of FIG. A part of the wiring board on the right side of FIG. 5 is used to configure the first and second output phase shifters Out_PS1 to 2 and the output matching circuit / output power combiner Out_MN & PC of the high output RF power amplifier module of FIG. It is equipped with ultra-small electronic components. This microelectronic component is a “0603 type” surface mount device (SMD), an inductor is indicated by a symbol SMD_L and a solid line, and a capacitance is indicated by a symbol SMD_C and a broken line.

  The drain of the power MOS transistor of the final stage RF amplifier A3 of the first RF power amplifier circuit PA1 is connected to one end of an inductor L51 constituting the first output phase shifter Out_PS1 by three bonding wires WB. In the first output phase shifter Out_PS1, the other end of the inductor L51 is connected to one end of the capacitor C51, and the other end of the capacitor C51 is connected to the ground wiring GND. The other end of the inductor L51 of the first output phase shifter Out_PS1 and one end of the capacitor C51 are connected to the wiring region T1, and the wiring region T1 is connected to one end of the inductor L63 on the silicon chip Si_Chip and the output matching circuit / output power coupler Out_MN & PC. It is connected to one end of the inductor L61. In the output matching circuit / output power coupler Out_MN & PC, the other end of the inductor L61 is connected to the wiring region of the output terminal Out, the wiring region of the output terminal Out is connected to one end of the capacitor C63, and the other end of the capacitor C63 is grounded. Connected to GND.

  The drain of the power MOS transistor of the final-stage RF amplifier A3 of the second RF power amplifier circuit PA2 is also connected to one end of the capacitor C52 constituting the second output phase shifter Out_PS2 by three bonding wires WB. In the second output phase shifter Out_PS2, the other end of the capacitor C52 is connected to one end of the inductor L52, and the other end of the inductor L52 is connected to the ground wiring GND. The other end of the capacitor C52 of the second output phase shifter Out_PS2 and one end of the inductor L52 are connected to the wiring region T2, and the wiring region T2 is connected to the other end of the inductor L63 on the silicon chip Si_Chip and the output matching circuit / output power coupler Out_MN & PC. Connected to one end of the inductor L62. In the output matching circuit / output power coupler Out_MN & PC, the other end of the inductor L62 is connected to the wiring region of the output terminal Out, the wiring region of the output terminal Out is connected to one end of the capacitor C63, and the other end of the capacitor C63 is grounded. Connected to GND. Also, one end and the other end of the capacitor C62 of the output matching circuit / output power coupler Out_MN & PC are connected to one end and the other end of the inductor L52 of the second output phase shifter Out_PS2, respectively.

  FIG. 6 is a diagram showing a structure of an end face of a main part of the wiring board and silicon chip Si_Chip of the high-power RF power amplifier module shown in FIG.

  As shown in FIG. 6, the wiring board 60 is constituted by a multilayer wiring insulating substrate including an uppermost layer wiring WL0, an intermediate layer wiring WL1, and a lowermost layer wiring WL2, and a silicon chip 61 and a 0603 type surface are formed on the wiring substrate 60. A mounting device (SMD) 62 is mounted. In the wiring board 60, vias formed of a highly heat conductive and highly conductive material for heat dissipation and grounding reinforcement are formed so as to penetrate from the uppermost layer to the lowermost layer of the wiring board 60. The lower main surface of the silicon chip 61 is electrically and mechanically connected to the upper portion of the via Via by solder, while the lower main surface of the silicon chip 61 is thermally and electrically connected to the ground wiring of the motherboard of the mobile phone terminal and solder by the solder. A ground wiring GND that is connected mechanically and mechanically is formed. A plurality of signal terminals T that are electrically and mechanically connected to the signal wiring of the mother board of the mobile phone terminal are formed around the ground wiring GND formed on the lower main surface of the wiring board 60 and below the vias. Has been.

  As described above, in the high-power RF power amplifier module shown in FIG. 6, the silicon chip 61 in which the plurality of power MOS transistors constituting the first and second RF power amplifier circuits PA1 and PA2 are integrated includes the wiring substrate 60. Is formed on the heat radiation via via having a low thermal resistance. Therefore, the heat from the silicon chip 61 can be efficiently dissipated to the mother board of the mobile phone terminal through the heat dissipation vias and the ground wiring GND.

  Therefore, even if the inductor L63 of the output matching circuit / output power combiner Out_MN & PC absorbs an undesired RF signal energy due to load fluctuation at the output terminal Out in a short time, this inductor L63 The heat from can also be dissipated efficiently.

  A 0603 type surface mount device (SMD) 62 having a thickness (t) of 0.23 mm is used, and a silicon chip 61 having a thickness of about 0.2 mm is used to reduce the thermal resistance of the power MOS transistor. . Furthermore, the wire height of the bonding wire WB is also set to about 0.3 mm or less. After the wire bonding step of wiring the bonding wire WB, the surface protection resin 63 is formed on the surface of the RF power amplifier module. As a result, the total thickness of the RF power amplifier module can be set to approximately 1.2 mm or less, so that the high-power RF power amplifier module of FIG. It can be installed.

《Inductor integrated on silicon chip》
FIG. 7 is a diagram showing the planar structure and the end face structure of the inductor L63 of the output matching circuit / output power coupler Out_MN & PC integrated on the silicon chip 61 shown in FIG.

  FIG. 7A shows a planar structure of the inductor L63, and FIG. 7B shows a principal end face structure of the inductor L63.

  As shown in FIG. 7A, the upper right end of the outermost periphery of the spiral inductor L63 is connected to the wiring region T1 of FIG. 6, and the lower left end of the innermost periphery of the inductor L63 is connected via a cross-under wiring. Are connected to the wiring region T2 of FIG. Further, a card ring GD is formed outside the outermost periphery of the spiral inductor L63. This card ring GD has a function of protecting the inductor L63 in the card ring GD from the influence of an RF interference signal or leakage charge from the periphery.

As shown in FIG. 7B, the spiral-shaped inductor L63 is mainly formed of the silicon chip 61 by the uppermost signal wiring M2. However, the cross under wiring connected to the lower left other end of the innermost circumference of the inductor L63 is formed by the uppermost layer via wiring Via2 and the intermediate layer signal wiring M1. The card ring GD is formed of the silicon chip 61 by the intermediate layer signal wiring M1, the intermediate layer via wiring Via1, the lowermost layer signal wiring M0, and the lowermost layer via wiring Via0. The lower portion of the card ring GD is connected to the chip back surface ground electrode GND through a P-type high concentration impurity region P ⁺ formed through the silicon chip 61.

  The inductor L63 of the output matching circuit / output power coupler Out_MN & PC generates a magnetic field by an undesired RF signal due to load fluctuations at the output terminal Out, and the eddy current (Eddy Current) is generated by the magnetic field by the conductive layer of the silicon chip 61. Alternatively, it flows to the chip back surface ground electrode GND. By passing the eddy current, the energy of an undesired RF signal due to load fluctuation is absorbed in a short time. At this time, even if some heat is generated, the heat from the inductor L63 is efficiently dissipated through the low thermal resistance heat radiation vias and the ground wiring GND formed in the wiring board 60 shown in FIG. Can.

  FIG. 8 is a diagram showing measured data regarding the RF characteristics of the inductor L63 of the output matching circuit / output power combiner Out_MN & PC integrated on the silicon chip 61 shown in FIGS.

  8A shows the Q value of the inductor L63, FIG. 8B shows the series resistance component R of the inductor L63, and FIG. 8C shows the inductance L of the inductor L63. Yes.

  The RF transmission input signal of GSM850 has a frequency of 824 MHz to 849 MHz, and the RF transmission input signal of GSM900 has a frequency of 889 Hz to 915 MHz. Further, the RF transmission input signal of DCS 1800 has a frequency of 1710 MHz to 1785 MHz, and the RF transmission input signal of PCS 1900 has a frequency of 1850 Hz to 1910 MHz. Therefore, the RF transmission frequency used in the mobile phone terminal is approximately 800 MHz to 2 GHz even for the fundamental wave component, and approximately 4 GHz for the second harmonic component.

  From FIG. 8 (C), the inductance L of the inductor L63 is a substantially constant value up to about 4 GHz, whereas from FIG. 8 (B), the series resistance component R of the inductor L63 abruptly increases as the frequency increases. It can be understood that it increases. The reason why the series resistance component R of the inductor L63 rapidly increases as the frequency increases is presumed that the loss due to the eddy current generated in the series resistance component R by the magnetic field of the inductor L63 increases as the frequency increases. .

  Therefore, as shown in FIG. 8A, the Q value (Q = jωL63 / R) of the inductor L63 is significantly reduced in the vicinity of about 4 GHz. However, a decrease in the Q value at a high frequency of the inductor L63 of the output matching circuit / output power coupler Out_MN & PC integrated on the silicon chip 61 is caused by an undesired RF signal energy due to a transient load fluctuation at the output terminal Out. This is a suitable operation for absorbing the water in a short time.

  FIG. 9 shows a resistor R61 between the first and second input terminals of the output matching circuit / output power combiner Out_MN & PC in the high output RF power amplifier module shown in FIGS. FIG. 5 is a diagram showing RF characteristics when the capacitor is connected and when the inductor L63 is connected as shown in FIG. FIG. 9 shows the result of a high-frequency circuit simulation in a state where the ratio of VSWR (voltage standing wave ratio) is 9: 1.

  FIG. 9A compares the change in the RF transmission power Pout with respect to the change in the phase of the RF transmission output signal between when the resistor R61 is connected and when the inductor L63 is connected. The change in the RF transmission power Pout with respect to the change in the phase of the RF transmission output signal can be made smaller when the inductor L63 is connected than when the resistor R61 is connected.

  FIG. 9B shows a comparison between a change in current consumption of the resistor R61 and a change in current consumption of the inductor L63 with respect to a change in the phase of the RF transmission output signal. In both cases, the change in the current consumption of the element with respect to the change in the phase of the RF transmission output signal has substantially the same tendency.

<< Other configurations of inductor >>
FIG. 10 is a diagram showing another end face structure of the inductor L63 of the output matching circuit / output power coupler Out_MN & PC of the high-power RF power amplifier module shown in FIG.

  In FIG. 10, the inductor L63 of the output matching circuit / output power coupler Out_MN & PC is not integrated on the silicon chip 61 as shown in FIGS. 5 to 7, but is formed on the wiring substrate 60.

  That is, as shown in FIG. 10, the spiral inductor L63 of the output matching circuit / output power coupler Out_MN & PC is configured by the uppermost layer wiring WL0 of the wiring board 60. Further, the inductor L63 generates a magnetic field by an undesired RF signal due to a load variation at the output terminal Out, and an eddy current flows through the intermediate layer wiring WL1 by this magnetic field. Due to the passage of the eddy current, energy of an undesired RF signal due to load fluctuation is absorbed in a short time. At this time, even if some heat is generated, the heat from the inductor L63 can be efficiently dissipated through the vias formed in the wiring board 60 and the ground wiring GND. The innermost terminal of the inductor L63 can be electrically connected by crossover to an external signal line on the outermost periphery of the inductor L63 by a bonding wire, although not shown.

  FIG. 11 is a diagram showing an end face structure of a main part when the inductor L63 of the output matching circuit / output power coupler Out_MN & PC of the high output RF power amplifier module shown in FIG. 4 is integrated on the GaAs compound semiconductor chip GaAs_Chip. In the GaAs compound semiconductor chip GaAs_Chip, a hetero bipolar transistor (HBT) as a power transistor of the final stage RF amplifier A3 of the first and second RF power amplifier circuits PA2 is also integrated. On the surface of the compound semiconductor chip GaAs_Chip, a collector layer (C), a base layer (B) and an emitter layer (E) of a heterobipolar transistor (HBT) are formed in order, and the emitter layer (E) penetrates the chip GaAs_Chip. And electrically connected to the ground electrode GND on the back surface via the vias formed in this manner. Heat from the heterobipolar transistor (HBT) can be efficiently dissipated through the via via connected to the emitter layer (E) and the ground electrode GND on the back surface.

  The inductor L63 is formed by the uppermost layer wiring of the GaAs compound semiconductor chip GaAs_Chip. Further, the inductor L63 generates a magnetic field by an undesired RF signal due to the load fluctuation of the output terminal Out, and an eddy current (Eddy Current) flows to the lowermost layer wiring due to the magnetic field. Due to the passage of the eddy current, energy of an undesired RF signal due to load fluctuation is absorbed in a short time. At this time, even if some heat is generated, the heat from the inductor L63 can be efficiently dissipated through the other vias Via and the ground electrode GND on the back surface. The innermost terminal of the inductor L63 can be electrically connected by crossover to an external signal line on the outermost periphery of the inductor L63 by a bonding wire, although not shown. In addition, the vias connected to the emitter layer (E) of the heterobipolar transistor (HBT) and the other vias connected to the lowermost layer wiring just below the inductor L63 are on the back surface of the GaAs compound semiconductor chip GaAs_Chip. They can be simultaneously formed by a dry etching process.

  FIG. 12 is a diagram showing another planar structure of the inductor L63 of the output matching circuit / output power coupler Out_MN & PC that can be integrated in the silicon chip 61 shown in FIG.

  As shown in FIG. 12, a concave inductor L64 is formed on the top of a spiral inductor L63 having the same structure as in FIG. When the lower inductor L63 generates a magnetic field by an undesired RF signal due to load fluctuation at the output terminal Out, a detection signal can be generated between one end T3 and the other end T4 of the upper inductor L64. Thus, the upper inductor L64 is magnetically coupled to the lower inductor L63.

  FIG. 13 shows another specific implementation of the present invention using a detection signal generated between one end T3 and the other end T4 of the upper inductor L64 magnetically coupled to the lower inductor L63 shown in FIG. It is a figure which shows the structure of the balanced type RF power amplifier by the form of.

  The RF power amplifier shown in FIG. 13 is different from the high-power RF power amplifier shown in FIG. 4 in the following points.

  That is, the detection signal generated between one end T3 and the other end T4 of the upper inductor L64 magnetically coupled to the lower inductor L63 shown in FIG. 12 is the non-inverting input terminal + and the inverting input of the error amplifier Err_Amp. And the power detection signal Vdet of the error amplifier Err_Amp is supplied to the inverting input terminal of the automatic power control amplifier APC_Amp. A transmission power level signal Vramp is supplied to the non-inverting input terminal + of the automatic power control amplifier APC_Amp, and the automatic power control signal Vapc generated from the output of the automatic power control amplifier APC_Amp is applied to the input terminal In of the RF power amplifier module HPA_MD. The gain of the connected variable gain amplifier VGA is controlled.

  Although the invention made by the present inventor has been specifically described based on the embodiments, it is needless to say that the present invention is not limited thereto and can be variously modified without departing from the gist thereof.

  For example, the present invention can be applied to a dual-band RF power amplifier module. That is, the output power combiner of the first low-band balanced RF power amplifier that amplifies the GSM850 RF transmission input signal (824 MHz to 849 MHz) and the GSM900 RF transmission input signal (889 Hz to 915 MHz), which is a dual band low band. The present invention is adopted. Also, the output power combination of the second high-band balanced RF power amplifier that amplifies the RF transmission input signal (1710 MHz to 1785 MHz) of DCS1800, which is a dual band high band, and the RF transmission input signal (1850 Hz to 1910 MHz) of PCS1900. The present invention is also applied to the vessel.

  Further, the present invention is not limited to the GSM system as described above, and the present invention is also applied to the output power combiner of the third balanced RF power amplifier that amplifies the WCDMA RF transmission input signal. It is possible. Thereby, it is possible to configure a multi-mode RF power amplifier module.

FIG. 1 is a diagram showing a balanced RF power amplifier studied by the present inventors prior to the present invention. FIG. 2 is a diagram showing the power consumption of the resistance of the output power combiner when the value of the voltage standing wave ratio changes due to load fluctuations in the RF power amplifier module shown in FIG. FIG. 3 is a diagram showing a configuration of a balanced RF power amplifier according to one embodiment of the present invention. FIG. 4 is a diagram showing a configuration of a balanced RF power amplifier according to a specific embodiment of the present invention. FIG. 5 shows the final stage RF amplifier of the first and second RF power amplifier circuits, the first and second output phase shifters, the output matching circuit and the output power combiner in the high output RF power amplifier module shown in FIG. It is a figure which shows device arrangement | positioning. FIG. 6 is a diagram showing a principal-part end face structure of the wiring board and silicon chip of the high-power RF power amplifier module shown in FIG. FIG. 7 is a diagram showing a planar structure and an end face structure of the main part of the inductor of the output matching circuit / output power coupler integrated on the silicon chip shown in FIG. FIG. 8 is a diagram showing measured data relating to the RF characteristics of the inductor of the output matching circuit / output power coupler integrated on the silicon chip shown in FIGS. FIG. 9 shows a high-power RF power amplifier module shown in FIGS. 4 to 7, in which a resistor is connected between the first and second input terminals of the output matching circuit / output power coupler as shown in FIG. It is a figure which shows RF characteristic with the case where it connects and the case where an inductor is connected like FIG. FIG. 10 is a diagram showing another end face structure of the inductor of the output matching circuit / output power coupler of the high output RF power amplifier module shown in FIG. FIG. 11 is a diagram showing an end face structure of a main part when the inductor of the output matching circuit / output power coupler of the high output RF power amplifier module shown in FIG. 4 is integrated on a GaAs compound semiconductor chip. FIG. 12 is a diagram showing another planar structure of the inductor of the output matching circuit / output power coupler that can be integrated on the silicon chip shown in FIG. FIG. 13 shows a balance according to another specific embodiment of the present invention using a detection signal generated between one end and the other end of the upper inductor magnetically coupled to the lower inductor shown in FIG. It is a figure which shows the structure of a type | mold RF power amplifier.

Explanation of symbols

HPA_MD High-power RF power amplifier module In_PD Input power divider In_PS1 First input phase shifter In_PS2 Second input phase shifter In_MN1 First input matching circuit In_MN2 Second input matching circuit PA1 First RF power amplifier circuit PA2 Second RF power Amplifier circuit A1 First stage RF amplifier A2 Next stage RF amplifier A3 Last stage RF amplifier Out_MN1 First output matching circuit Out_MN2 Second output matching circuit Out_PS1 First output phase shifter Out_PS2 Second output phase shifter Out_PC Output power combiner R61 Resistor L63 Inductor VGA Variable gain amplifier APC_Amp Automatic power control amplifier In_PD & PS Input power divider Out_MN & PC Output matching circuit / Output power combiner Pdet Power detector DET1 1st Detection circuit DET2 second detection circuit Sum adder circuit C01, C10 ... C65 capacity L11, L12 ... L62 inductor Si_Chip silicon chip WB bonding wires SMD_C surface mount devices (capacitance)
SMD_L Surface mount device (inductor)
T1 wiring area T2 wiring area 60 wiring board 61 silicon chip 62 surface mount device 63 surface protection resin WL0 top layer wiring WL1 middle layer wiring WL2 bottom layer wiring Via via GND ground wiring T signal terminal GD guard ring M2 top layer signal wiring M1 middle Layer signal wiring M0 bottom layer signal wiring Via2 top layer via wiring Via1 middle layer via wiring Via0 bottom layer via wiring GaAs_Chip GaAs compound semiconductor chip HBT heterobipolar transistor C collector B base E emitter L63 lower inductor L64 upper inductor Err_Amp error amplifier Vdet Signal Vramp Transmission power level signal Vapc Automatic power control signal

Claims (16)

An RF power amplifying apparatus comprising a first RF power amplifying circuit, a second RF power amplifying circuit, and an output power combiner,
The output power combiner is constituted by a Wilkinson power combiner including a first input terminal, a second input terminal, and an output terminal;
A first RF amplified output signal of the first RF power amplifier circuit and a second RF amplified output signal of the second RF power amplifier circuit are respectively supplied to the first input terminal and the second input terminal of the output power combiner. ,
From the output terminal of the output power combiner, an RF amplified output signal of the RF power amplifier is generated,
A predetermined impedance is set between the first input terminal and the output terminal of the output power coupler, and a predetermined impedance is set between the second input terminal and the output terminal of the output power coupler. It is set to approximately equal impedance,
An RF is characterized in that a resistance element is not connected and an inductor is connected between the first input terminal and the second input terminal of the output power combiner constituted by the Wilkinson power combiner. Power amplification device. The RF power amplifying apparatus according to claim 1, wherein the inductor generates an eddy current . An input power divider including an input terminal, a first output terminal, and a second output terminal;
An RF input signal can be supplied to the input terminal of the input power divider, and a first RF input signal generated at the first output terminal of the input power divider is supplied to an input terminal of the first RF power amplifier circuit. The RF power amplifier according to claim 2, wherein the second RF input signal supplied to the second output terminal of the input power divider is supplied to the input terminal of the second RF power amplifier circuit. apparatus. A first signal between the input terminal of the input power divider and the first output terminal, the first RF power amplifier circuit, and between the first input terminal and the output terminal of the output power combiner. A pathway is formed,
A second signal between the input terminal and the second output terminal of the input power divider, the second RF power amplifier circuit, and between the second input terminal and the output terminal of the output power combiner; A pathway is formed,
4. The RF according to claim 3, wherein a total first total phase shift amount of the first signal path and a total second total phase shift amount of the second signal path are set substantially equal to each other. 5. Power amplification device. A first first-phase shift amount from the input terminal of the input power divider in the first half of the first signal path to the input terminal of the first RF power amplifier circuit; and the input power division of the first half of the second signal path. The second first half phase shift amount from the input terminal of the device to the input terminal of the second RF power amplifier circuit is set to have an opposite polarity and an approximately equal absolute value,
A first second phase shift amount from the output terminal of the first RF power amplifier circuit in the second half of the first signal path to the output terminal of the output power combiner; and the second RF power amplification in the second half of the second signal path 5. The RF power according to claim 4, wherein the second half phase shift amount from the output terminal of the circuit to the output terminal of the output power combiner is set to have an opposite polarity and substantially equal absolute value. Amplification equipment. A first input matching circuit is inserted between the first output terminal of the input power divider and the input terminal of the first RF power amplifier circuit, and the second output terminal of the input power divider and the second RF The RF power amplifier according to claim 5, wherein a second input matching circuit is inserted between the input terminal of the power amplifier circuit . A first output matching circuit is inserted between the output terminal of the first RF power amplifier circuit and the first input terminal of the output power combiner, and the output terminal of the second RF power amplifier circuit and the output power combiner The RF power amplifying apparatus according to claim 6, wherein a second output matching circuit is inserted between the second input terminal of the device. Output matching of the first RF power amplifier circuit is performed between the first input terminal and the output terminal of the output power combiner, and the second input terminal and the output terminal of the output power combiner are The RF power amplifier according to claim 6 , wherein output matching of the second RF power amplifier circuit is performed . A first circuit element having the predetermined impedance is connected between the first input terminal and the output terminal of the output power coupler, and between the second input terminal and the output terminal of the output power coupler. The RF power amplifying apparatus according to claim 6 , wherein the second circuit element having the substantially equal impedance is connected . 10. The RF power amplifying apparatus according to claim 9 , wherein each of the first circuit element and the second circuit element includes a microstrip line having a predetermined line length . 10. The RF power amplifier according to claim 9 , wherein the first circuit element is constituted by a first lossless lumped constant circuit, and the second circuit element is constituted by a second lossless lumped constant circuit. . The RF power amplifying apparatus according to claim 11 , wherein the inductor is integrated on a semiconductor chip on which power transistors of the first RF power amplifying circuit and the second RF power amplifying circuit are formed . 12. The RF power amplifier according to claim 11 , wherein the inductor is mounted on a wiring board on which a semiconductor chip on which power transistors of the first RF power amplifier circuit and the second RF power amplifier circuit are formed is mounted. apparatus. 13. The RF power amplifying apparatus according to claim 12 , wherein the semiconductor chip on which the power transistor and the inductor are integrated is formed of a silicon substrate . The RF power amplifier according to claim 14 , wherein the power transistor is an LD type MOS transistor . 13. The RF power amplifier according to claim 12 , wherein the semiconductor chip in which the power transistor and the inductor are integrated is formed of a compound semiconductor substrate .

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