JP5270614B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- JP5270614B2 JP5270614B2 JP2010118266A JP2010118266A JP5270614B2 JP 5270614 B2 JP5270614 B2 JP 5270614B2 JP 2010118266 A JP2010118266 A JP 2010118266A JP 2010118266 A JP2010118266 A JP 2010118266A JP 5270614 B2 JP5270614 B2 JP 5270614B2
- Authority
- JP
- Japan
- Prior art keywords
- lead
- semiconductor device
- internal
- semiconductor element
- solder
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000004065 semiconductor Substances 0.000 title claims description 76
- 238000000034 method Methods 0.000 claims description 15
- 230000008569 process Effects 0.000 claims description 15
- 238000007789 sealing Methods 0.000 claims description 15
- 239000011347 resin Substances 0.000 claims description 14
- 229920005989 resin Polymers 0.000 claims description 14
- 238000005304 joining Methods 0.000 claims description 12
- 230000000630 rising effect Effects 0.000 claims description 4
- 239000000758 substrate Substances 0.000 claims 1
- 229910000679 solder Inorganic materials 0.000 description 72
- 239000006071 cream Substances 0.000 description 14
- 230000001681 protective effect Effects 0.000 description 12
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 6
- 229910052782 aluminium Inorganic materials 0.000 description 6
- 238000004519 manufacturing process Methods 0.000 description 6
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 5
- 229910052802 copper Inorganic materials 0.000 description 5
- 239000010949 copper Substances 0.000 description 5
- 238000002844 melting Methods 0.000 description 4
- 230000008018 melting Effects 0.000 description 4
- 238000005452 bending Methods 0.000 description 3
- 230000008859 change Effects 0.000 description 3
- 238000000465 moulding Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 238000009826 distribution Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000010354 integration Effects 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000007639 printing Methods 0.000 description 2
- 238000004080 punching Methods 0.000 description 2
- 230000009467 reduction Effects 0.000 description 2
- 238000003860 storage Methods 0.000 description 2
- 238000013459 approach Methods 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 230000004907 flux Effects 0.000 description 1
- 230000005484 gravity Effects 0.000 description 1
- 239000000155 melt Substances 0.000 description 1
- 238000010309 melting process Methods 0.000 description 1
- 230000001105 regulatory effect Effects 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 230000035882 stress Effects 0.000 description 1
- 230000008646 thermal stress Effects 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L24/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L24/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/33—Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
- H01L2224/331—Disposition
- H01L2224/3318—Disposition being disposed on at least two different sides of the body, e.g. dual array
- H01L2224/33181—On opposite sides of the body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
- H01L2224/4005—Shape
- H01L2224/4007—Shape of bonding interfaces, e.g. interlocking features
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
- H01L2224/401—Disposition
- H01L2224/40151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/40221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/40245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
- H01L2224/401—Disposition
- H01L2224/40151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/40221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/40245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/40247—Connecting the strap to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
- H01L2224/401—Disposition
- H01L2224/40151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/40221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/40245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/40247—Connecting the strap to a bond pad of the item
- H01L2224/40249—Connecting the strap to a bond pad of the item the bond pad protruding from the surface of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/45124—Aluminium (Al) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73221—Strap and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8336—Bonding interfaces of the semiconductor or solid state body
- H01L2224/83365—Shape, e.g. interlocking features
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/83801—Soldering or alloying
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
- H01L2224/8434—Bonding interfaces of the connector
- H01L2224/84345—Shape, e.g. interlocking features
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
- H01L2224/8438—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/84385—Shape, e.g. interlocking features
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
- H01L2224/848—Bonding techniques
- H01L2224/84801—Soldering or alloying
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
- H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
- H01L2224/9222—Sequential connecting processes
- H01L2224/92242—Sequential connecting processes the first connecting process involving a layer connector
- H01L2224/92247—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
- H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
- H01L2924/1815—Shape
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Lead Frames For Integrated Circuits (AREA)
Description
従来の半導体装置として、第1のリード下面および第2のリード下面が樹脂封止下面と同一面で、かつ、パワー素子の電極へ平板状の内部リードをはんだ付けする構造が開示されている(例えば、特許文献1参照)。
そのため、第1のリードを屈曲させた構造では、半導体装置の面積を小さくすることが難しく、また、第1のリードと内部リードの間に接合部材としてはんだ層を設けても、その厚さを十分に確保することができず、接合強度の低下が懸念された。
また、各リードと内部リードとの接合位置のばらつきを抑制し、半導体素子内の電流分
布の偏りを抑制することが可能な半導体装置を得ることを目的とする。
次に、この発明の実施の形態1について、図1〜6を用いて説明する。
図1は、本発明の実施の形態1の半導体装置1の断面図である。
図1に示すように、プレス機による打ち抜き加工で成型された第一のリード11、第二のリード12、ゲート用リード13は、それぞれ同一平面上に配置された状態である。第一のリード11上にはMOSFET素子(半導体素子)21が配置される。このMOSFET素子21は、上面に上面電極22が、下面に下面電極23が設けられ、さらに上面電極22と離間した領域(上面)にゲート電極24が形成されている。MOSFET素子21と第一のリード11は、はんだ51を介して接合されている。
2によって、MOSFET素子21とMOSFET素子21上に配置される内部リード31の端部との接合がなされる。
ゲート電極24とゲート用リード13とは、アルミワイヤ71によって互いに接続されている。
また、円弧を形成する角度をより増大させた場合は、図2(b)に示すような、中心角が半円よりも大きな円弧部32a(例えば、3/4円弧。)が、両端部に設けられた内部リード32となる。
まず、リードフレーム材料として銅板を投入する(材料投入)。銅板は、量産時におい
ては帯状となっている。
次に、図4(a)に平面工程図を示すように、プレス機で銅板10を抜き加工し、各リード(第一のリード11、第二のリード12、ゲート用リード13)の端部が外枠となる銅板10に繋がって一続きとなった状態を得る。
その後、図4(b)に示すように、プレス機で第二のリード12の先端部に、ダボ出し加工を行い、突起部61を形成する。各リードは、後述する樹脂封止工程の後に、外枠となる銅板10から切り離されるが、それまでは繋がった状態で製造が進められるものである。このようにリードフレームが形成される(リードフレーム加工)。
その後、第一のリード11上のクリームはんだ(はんだ51)の上に、マウンタでMOSFET素子21を載せる(半導体素子搭載)。このMOSFET素子21の上面には、円形の開口部25aをもつ保護膜25が被膜されている。
なお、ダイボンダ1台で上記工程を処理する場合もあり、その場合は、クリームはんだに代えて糸はんだが供給される。
次に、クリームはんだ52a、53aの上に、マウンタで内部リード31を搭載する(内部リード搭載)。その後、リフロー装置に通し、リードフレーム10を加熱し、はんだを溶融させ、MOSFET素子21と内部リード31、第二のリード12と内部リード31をはんだ付けする(はんだ溶融)。このはんだ溶融時に、内部リード31は、セルフアライメント効果によって位置ずれを補正される。
ここで、内部リード31は、中心線を基準とした左右対称形状であり、重心が対称軸上にあるため、溶融はんだ52、53上に載置された状態でも、バランスを崩しにくい構造となっていることは言うまでもない。
従って、はんだ53の厚みを確保することで、温度サイクルで生じる熱ストレスに対して応力を緩和しやすくなり、はんだ接合部の信頼性を高めることが可能となる。
その後、MOSFET素子21のゲート電極24とリードフレーム10のゲート用リード13とを、素子配置面側にてアルミワイヤ71で接続する(ワイヤボンド)。アルミワイヤ71とゲート端子およびゲート用リード13との接合は、ワイヤボンダで超音波接合することで行う。
次に、成型機と成型金型を用いて、封止樹脂14を注入し、樹脂封止(樹脂成型)を行う(樹脂封止)。
その後、プレス機でリードフレーム10の余分な部分を切断除去する(タイバーカット)。このような処理によって、図1に示す半導体装置1を得ることができる。
次に、この発明の実施の形態2について図7および図8を用いて説明する。
先述の実施の形態1では、内部リード31は、上面および裏面が平らな平板状であったが、この実施の形態2では、MOSFET素子21の上面に配置されるはんだ層を所定の
厚さに確保するために、図7に示すように、内部リード33の、MOSFET素子21に対向する面部から下向きに突出する突出部64を設けたことを特徴としている。
次に、この発明の実施の形態3について図9〜11を用いて説明する。
図9は、この発明の実施の形態3による半導体装置の平面構造を示す図である。
第一のリード14上に第一のMOSFET素子(半導体素子)26を配置し、第一のMOSFET素子26の下面電極をはんだを介して第一のリード14と接合している。
第一のMOSFET素子26の上面電極には、はんだを介して内部リード35の一端が接合されており、他端は、はんだを介して第二のリード15と接合されている。ここで第二のリード15の接合部にはダボ出し加工により第二のリード15を変形させた突起部62を設けてあり、この突起部62によって内部リード35の一端と第二のリード15を接合するはんだの厚みを確保している。
第二のMOSFET素子27の上面電極には、はんだを介して内部リード36の一端が接合されており、もう一方の端部は、はんだを介して第三のリード16と接合されている。ここで第三のリード16の接合部には、ダボ出し加工により第三のリード16を変形させた突起部63を設けてあり、この突起部63によって内部リード36の一端と第三のリード16を接合するはんだの厚みを確保している。
これら第一のリード14、第二のMOSFET素子27、第一の内部リード35、第二の内部リード36、アルミワイヤ72、73、ゲート用リード17、18を封止樹脂で一体に成型、固定している。ただし、外部との接続端子部となる部分の第一のリード14の一部、第二のリード15の一部、第三のリード16の一部、ゲート用リード17、18の一部は、封止樹脂の外側に露出した状態となる。
図9に示した実施の形態3における第一、第二の内部リード35、36の形状は、例えば、実施の形態1および2で示した内部リード31の形状と同様である。
からなる下アーム112が接続されている。
また、図11に本発明の半導体装置を用いた回転電機100の構成を示す。図11に示すように、回転電機100は、制御手段101と電流切替手段102と固定コイル103、104と、可動コイル105を含む構成である。
また、第一の内部リード35と第二の内部リード36を同一形状とすることで、半導体装置を製造するにあたり、複数種類の内部リードを製造する必要がなく、部分共用化による工程の簡略化とコスト低減が可能となる。
11、14 第一のリード 12、15 第二のリード
13、17、18 ゲート用リード 16 第三のリード
21 MOSFET素子(半導体素子) 22 上面電極
23 下面電極 24 ゲート電極
25 保護膜 25a、25b 開口部
26 第一のMOSFET(半導体素子)
27 第二のMOSFET(別の半導体素子)
31、32、33、34 内部リード 31a、32a 円弧部
35 第一の内部リード(内部リード)
36 第二の内部リード(別の内部リード) 41 封止樹脂
50 ディスペンサ 51 はんだ
52 はんだ(第一の接合部材) 52a、53a クリームはんだ
53 はんだ(第二の接合部材) 61、62 突起部
63 突起部(別の突起部) 64、65 突出部(半導体素子側)
71、72、73 アルミワイヤ 100 回転電機
101 制御手段 102 電流切替手段
103、104 固定コイル 105 可動コイル
111 上アーム 112 下アーム
120 蓄電手段。
Claims (8)
- 平板状の第一のリード、上記第一のリードと離間して同一平面上に配置された平板状の第二のリード、上記第二のリードの端部形状は変化させず平面部の一部を突出させてなる突起部、上記第一のリード上に載置された半導体素子、一端が上記半導体素子上に第一の接合部材を介して接合され、他端が上記第二のリードに設けられた上記突起部上に第二の接合部材を介して接合された平板状の内部リード、上記内部リードおよび上記半導体素子を含む上記第一、第二のリード上面を覆って封止するとともに、上記第一、第二のリードの外部との接続のための端子部分を露出させる封止樹脂を備え、上記第二のリードの平面よりも突出した上記突起部の表面部を覆うように上記第二の接合部材が配置され、上記突起部の上記表面部は、上記突起部の上面となる平坦な円形状の上面部と、上記突起部の立ち上がり部となる上記第二のリードの上記平面から上記上面部の外周へつながる略円筒形状の外側面部よりなり、上記内部リードの他端は上記突起部に支えられ、上記第二の接合部材の厚みは上記突起部の高さ分だけ確保されたことを特徴とする半導体装置。
- 上記突起部は、ダボ出し加工によって形成されたことを特徴とする請求項1記載の半導体装置。
- 上記内部リードの平面形状は、所定幅で一方向に伸びる略短冊状であり、上記所定幅の中心を通る線を基準とした左右対称形状であることを特徴とする請求項1記載の半導体装置。
- 上記内部リードの少なくとも一方の端部の平面形状が、円弧形状に形成されたことを特徴とする請求項3記載の半導体装置。
- 上記半導体素子上に配置される上記第一の接合部材は、平面形状が円形となるように形成されたことを特徴とする請求項4記載の半導体装置。
- 上記内部リードの上記半導体素子に接続される端面部に、上記半導体素子側に突出した内部リード突出部を設けたことを特徴とする請求項3記載の半導体装置。
- 上記第一、第二のリードと離間して同一平面上に配置された平板状の第三のリード、上記第三のリードの端部形状は変化させず平面部の一部を突出させてなる別の突起部、上記第二のリード上に載置された別の半導体素子、一端が上記別の半導体素子上に第三の接合部材を介して接合され、他端が上記第三のリード上に設けられた上記別の突起部上に第四の接合部材を介して接合された平板状の別の内部リードを備え、上記封止樹脂によって上記別の内部リードおよび上記別の半導体素子を含む上記第三のリード上面を覆って封止するとともに、上記第三のリードの外部との接続のための端子部分を露出させ、上記第三のリードの平面よりも突出した上記別の突起部の表面部を覆うように、上記第四の接合部材が配置されたことを特徴とする請求項1記載の半導体装置。
- 上記内部リードと、上記別の内部リードは、同一形状であることを特徴とする請求項7記載の半導体装置。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2010118266A JP5270614B2 (ja) | 2010-05-24 | 2010-05-24 | 半導体装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2010118266A JP5270614B2 (ja) | 2010-05-24 | 2010-05-24 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2011249395A JP2011249395A (ja) | 2011-12-08 |
JP5270614B2 true JP5270614B2 (ja) | 2013-08-21 |
Family
ID=45414338
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2010118266A Expired - Fee Related JP5270614B2 (ja) | 2010-05-24 | 2010-05-24 | 半導体装置 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP5270614B2 (ja) |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP2930747A1 (en) * | 2014-04-07 | 2015-10-14 | Nxp B.V. | Lead for connection to a semiconductor device |
JP5714157B1 (ja) * | 2014-04-22 | 2015-05-07 | 三菱電機株式会社 | パワー半導体装置 |
EP3226292B1 (en) * | 2014-11-27 | 2019-05-29 | Shindengen Electric Manufacturing Co., Ltd. | Lead frame, semiconductor device, method for manufacturing lead frame, and method for manufacturing semiconductor device |
CN107851639B (zh) * | 2015-10-28 | 2020-08-25 | 三菱电机株式会社 | 电力用半导体装置 |
WO2018150556A1 (ja) * | 2017-02-20 | 2018-08-23 | 新電元工業株式会社 | 電子装置及び接続子 |
CN111630644B (zh) * | 2018-03-02 | 2023-07-14 | 新电元工业株式会社 | 半导体装置及其制造方法 |
JP7120083B2 (ja) * | 2019-03-06 | 2022-08-17 | 株式会社デンソー | 半導体装置 |
WO2020208739A1 (ja) * | 2019-04-10 | 2020-10-15 | 新電元工業株式会社 | 半導体装置 |
JP2021141235A (ja) * | 2020-03-06 | 2021-09-16 | 株式会社東芝 | 半導体装置 |
DE112022002169T5 (de) * | 2021-05-14 | 2024-02-29 | Rohm Co., Ltd. | Halbleiterbauelement |
JP7292352B2 (ja) * | 2021-11-02 | 2023-06-16 | 三菱電機株式会社 | 樹脂封止型半導体装置及び樹脂封止型半導体装置の製造方法 |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0224555U (ja) * | 1988-08-04 | 1990-02-19 | ||
US4935803A (en) * | 1988-09-09 | 1990-06-19 | Motorola, Inc. | Self-centering electrode for power devices |
JPH065756A (ja) * | 1992-06-23 | 1994-01-14 | Shindengen Electric Mfg Co Ltd | 樹脂封止型半導体装置および製造方法 |
JPH08116007A (ja) * | 1994-10-13 | 1996-05-07 | Nec Corp | 半導体装置 |
JPH09219480A (ja) * | 1995-12-08 | 1997-08-19 | Fuji Electric Co Ltd | 樹脂モールド型半導体装置 |
JP4416140B2 (ja) * | 2000-04-14 | 2010-02-17 | 日本インター株式会社 | 樹脂封止型半導体装置 |
JP4454357B2 (ja) * | 2004-03-26 | 2010-04-21 | 新電元工業株式会社 | 樹脂封止型半導体装置及びその製造方法 |
JP5018013B2 (ja) * | 2006-10-25 | 2012-09-05 | 富士電機株式会社 | 樹脂封止半導体装置 |
-
2010
- 2010-05-24 JP JP2010118266A patent/JP5270614B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JP2011249395A (ja) | 2011-12-08 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP5270614B2 (ja) | 半導体装置 | |
US8203848B2 (en) | Circuit device and method of manufacturing the same | |
US8981552B2 (en) | Power converter, semiconductor device, and method for manufacturing power converter | |
JP5176507B2 (ja) | 半導体装置 | |
JP5279632B2 (ja) | 半導体モジュール | |
JP2004266096A (ja) | 半導体装置及びその製造方法、並びに電子装置 | |
JP2008270302A (ja) | 半導体装置 | |
JP4804497B2 (ja) | 半導体装置 | |
JPWO2020129195A1 (ja) | 半導体装置、及び、半導体装置の製造方法 | |
JP2009267054A (ja) | 半導体装置およびその製造方法 | |
JP2009049173A (ja) | 半導体装置及びその製造方法 | |
JP4918391B2 (ja) | 半導体装置 | |
JP2019161086A (ja) | 半導体装置およびその製造方法 | |
JP5147295B2 (ja) | 半導体装置 | |
JP4110513B2 (ja) | 半導体パワーモジュールの製造方法 | |
JP5533983B2 (ja) | 半導体装置 | |
JP4946959B2 (ja) | 半導体装置の製造方法 | |
JP2009224529A (ja) | 半導体装置およびその製造方法 | |
JP2011151109A (ja) | 半導体装置およびその製造方法 | |
JP5217014B2 (ja) | 電力変換装置およびその製造方法 | |
JP2008300672A (ja) | 半導体装置 | |
JP2021027146A (ja) | 半導体装置 | |
JP2007157763A (ja) | 回路モジュール | |
JP5048627B2 (ja) | リードフレーム及び半導体装置 | |
JP5622934B2 (ja) | 半導体装置 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20120619 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20120626 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20120801 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20130416 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20130509 |
|
R151 | Written notification of patent or utility model registration |
Ref document number: 5270614 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R151 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
LAPS | Cancellation because of no payment of annual fees |