JP5120917B2 - Semiconductor device and manufacturing method thereof - Google Patents

Description

  The present invention relates to a semiconductor device and a manufacturing method thereof.

  It is generally known that silicon is used as a power element for power electronics that performs power control, energy conversion, etc., but malfunction occurs when used at a high temperature of, for example, 180 ° C. to 400 ° C. There are things to do. Thus, silicon carbide has attracted attention as a semiconductor material capable of high-temperature operation (see Non-Patent Documents 1-3).

Conventionally, when a power element is mounted on a ceramic wiring board or the like, it is known that the aluminum electrode of the power element and the ceramic wiring board are electrically connected by a wire, but the wire bonding type mounting is downsized. It is difficult to pursue (see Non-Patent Documents 4-6). Therefore, so-called three-dimensional mounting is required in which the aluminum electrode surface of the power element is mounted facing the wiring surface of the ceramic wiring board.
High-Temperature Electronics, edited by Randall Kirschman, IEEE Press, NY, 1999. S. Abedinpour, K. Shenai, "Power electronics technologies for the new millennium", IEEE Third International Caracas Conference on Devices, Circuits, and Systems (ICCDCS2000), IEEE Catalog Number: 00TH8474C, pp. P111-1-P111-9. K. Shenai, “High-power robust semiconductor electron ics technologies in the new millennium” Microelectronics Journal, Vol 32, No. 5-6, 2001, pp. 397-408. GG Harman, Wire Bonding in Microelectronics, McGraw-Hill, New York (1989). W. Gerling, Electrical and physical characterization of gold-ball bonds on aluminum layers.In: Electronic Components Conf. (1984), p. 13. DT Rooney, DP Nager, D. Geiger and D. Shanguan, Evaluation of wire bonding performance, process conditions, and metallurgical integrity of chip on board wire bonds, Microelectron.Reliab. 45-2 (2005), pp. 379-390.

  However, in the case of three-dimensional mounting, for example, when the aluminum electrode of the power element and the ceramic wiring board are simply soldered, aluminum is easily oxidized in the atmosphere, and a thin oxide film is formed on the aluminum electrode, so that a good electrical property is obtained. Difficult to get a connection.

  In view of the circumstances as described above, it is an object of the present invention to provide a semiconductor device and a method for manufacturing the same that can achieve three-dimensional mounting and improve electrical connection reliability.

In order to solve the above-described problems, the method of manufacturing a semiconductor device according to the present invention forms a plurality of gold bumps on the aluminum electrode of the silicon carbide element by setting the bonding stage temperature to 100 ° C. or higher and 460 ° C. or lower by the ball bump method. A step of providing a solder material so as to cover the plurality of gold bumps and the aluminum electrode between the gold bumps, and a step of reflowing the solder material .

This manufacturing method is prior to the previous step of forming Kikin bumps, steps may also contains I to which plasma cleaning the aluminum electrode.

Further, the solder material may be Au—Sn based, and the Sn content of Au—Sn based may be 20 wt% .

  Further, in the reflow step, the silicon carbide element may be electrically connected to the ceramic wiring board via the plurality of gold bumps and the solder material by reflowing the solder material.

  The silicon carbide element may include an integrated circuit for power electronics.

  Furthermore, the semiconductor device of the present invention is manufactured by the above method.

Furthermore, the semiconductor device of the present invention includes a silicon carbide element having an aluminum electrode, a plurality of gold bumps formed on the aluminum electrode of the silicon carbide element, and the plurality of gold bumps and gold in the silicon carbide element. A solder material provided so as to cover the aluminum electrode between the bumps, and a ceramic wiring board electrically connected to the silicon carbide element through the gold bump and the solder material. At least one of the bumps has a shear strength of 58.4 MPa or more and 140.8 MPa or less.

In this semiconductor device, the solder material may be Au—Sn-based, and the Au—Sn-based Sn content may be 20 wt% .

  The silicon carbide element may include an integrated circuit for power electronics.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

  1 to 6B are views for explaining a method for manufacturing a semiconductor device according to an embodiment of the present invention. Specifically, FIGS. 1 to 3 are diagrams for explaining the ball bump method, FIGS. 4 and 5 are diagrams for explaining a solder application and reflow process, and FIGS. 6 (A) and 6 (B). These are figures which show an example of the temperature profile in a reflow process.

  As shown in FIG. 1, a silicon carbide element (hereinafter referred to as a SiC element) 10 including an integrated circuit is prepared. The SiC element 10 can be used as an output drive unit or conversion unit that handles large power in a system that performs power conversion, energy conversion, and the like. Examples of the SiC element 10 for power electronics include a rectifying element such as SBD (Schottky Barrier Diode), a field effect transistor such as a power MOSFET, and the like.

  SiC element 10 includes a silicon carbide substrate, a first electrode 12 that is an aluminum electrode formed on one surface of the substrate, and a second electrode 14 formed on the other surface of the substrate. Taking the case where the SiC element 10 is an SBD device as an example, the first electrode 12 made of aluminum functions as an anode, and the second electrode 14 made of silver functions as a cathode. SiC element 10 only needs to include at least one aluminum electrode, and can take various forms depending on the type of device.

  As shown in FIGS. 1 to 3, a plurality of gold bumps 26 are formed on the first electrode 12 that is an aluminum electrode of the SiC element 10. This step can be formed by applying a ball bump method (also called a stud bump (registered trademark) method).

Specifically, first, as shown in FIG. 1, SiC element 10 is placed on bonding stage 30 in a wafer state, and gold wire 20 is placed above first electrode 12. The gold wire 20 is supported by the bonding tool 24, and the tip of the gold wire 20 is exposed from the bonding tool 24. Then, the tip of the gold wire 20 is melted by an electric torch or the like (not shown) to form a gold ball 22 at the tip of the gold wire 20. Thereafter, the bonding tool 24 is lowered in the direction of the first electrode 12, and the gold ball 22 is crushed by the tip of the bonding tool 24 as shown in FIG. The electrode 12 is joined. According to this method, the oxide film on the first electrode 12 can be removed by applying ultrasonic vibration, and the gold ball 22 can be bonded to the new aluminum surface. Therefore, the bonding strength and the electrical connection reliability are improved. Can be achieved.

  When the joining is completed, the bonding tool 24 is moved, and the neck portion 21 connected to the gold ball 22 is cut. Then, a series of these steps are repeated, and a plurality of gold bumps 26 are repeatedly formed on one first electrode 12 as shown in FIG.

  In the present embodiment, the bump forming process described above is performed by setting the maximum temperature of the bonding stage 30 (also referred to as a bonding temperature) to 185 ° C. or higher and 460 ° C. or lower, more preferably 235 ° C. or higher and 300 ° C. or lower. . In other words, the bonding stage 30 is heated and the maximum temperature of the SiC element 10 is controlled within the above range. According to this, the gold bump 26 can be bonded to the first electrode 12 made of aluminum with high bonding strength while achieving good ohmic contact with the SiC element 10 as will be discussed in the examples described later.

  When the bump formation process described above is performed in the state of a semiconductor wafer, the plurality of SiC elements 10 are then cut into pieces by dicing or the like to obtain a plurality of SiC elements 10 in a chip state as shown in FIG. be able to.

  Prior to the bump formation step, the first electrode 12 of the SiC element 10 can be subjected to plasma cleaning, for example, plasma etching. Thereby, since the thin oxide film formed on aluminum can be removed, the joint strength and electrical connection reliability between the gold bump 26 and the first electrode 12 can be further improved.

Next, as shown in FIGS. 4 and 5, SiC element 10 is mounted on a wiring board. For example, the first electrode 12 of the SiC element 10 is electrically connected to the ceramic wiring board 40 via the gold bumps 26 and the solder material 50, and the second electrode 14 of the SiC element 10 is further connected via the solder material 54. And electrically connected to another ceramic wiring board 44. Ceramics, such as AlN, is excellent in heat dissipation and is therefore suitable as a wiring board for power electronics.

  Specifically, first, as shown in FIG. 4, a solder material 50 is provided on the first electrode 12 side in the SiC element 10. For example, a paste material can be used as the solder material 50 and can be applied on the first electrode 12 so as to cover the plurality of gold bumps 26.

Here, as the solder material 50, high-temperature solder (also called high melting point solder) can be used. For example, a lead-free Au—Sn-based material is preferably used. Of these, the Sn content is preferably about 20 wt%. If the Sn content is about 20 wt%, the desired temperature profile in the reflow process can be satisfied, and excessive reaction with the gold bumps caused by tin can be suppressed, so that the formation of mechanically brittle alloy layers can be suppressed. it can. Therefore, the bonding strength between SiC element 10 and ceramic wiring board 40 can be improved.

  As shown in FIG. 4, the SiC element 10 is set on the plate 32, the ceramic wiring board 40 is set at a desired position by the spacer 34, and the first first reflow process is performed. The temperature profile of the first reflow process is, for example, as shown in FIG. Thus, the first electrode 12 of the SiC element 10 can be electrically connected to the wiring layer of the ceramic wiring substrate 40, for example, the Cu layer 42, via the plurality of gold bumps 26 and the solder material 50.

  Then, as shown in FIG. 5, following the first reflow process, the solder material 52 is provided on the second electrode 14 side of the SiC element 10, the second reflow process is performed, and the second electrode 14 of the SiC element 10 is soldered. It is electrically connected to the wiring layer 46 of another ceramic wiring substrate 44 through the material 52. The composition of the solder material 52 provided on the second electrode 14 side is not particularly limited, and may be appropriately determined according to the material of the second electrode 14. The temperature profile of the second reflow process is, for example, as shown in FIG.

  As described above, when the reflow process is performed a plurality of times, the first reflow process having the highest maximum temperature is performed first, and the second reflow process having the lower maximum temperature is performed thereafter. Thereby, it can prevent that the solder material hardened | cured in the first 1st reflow process melt | dissolves again by a 2nd reflow process.

  In this way, the semiconductor device 100 including the SiC element 10 and the ceramic wiring boards 40 and 44 can be manufactured. As shown in FIG. 7, by applying the above method, a plurality of SiC elements 60, 62, 64 can be mounted on the ceramic wiring substrate 70 to manufacture a semiconductor module 110 such as a power module.

  As described above, the semiconductor device and the manufacturing method thereof have been described. Next, the range of the bonding temperature in the bump forming process, the composition of the solder material, and the like will be considered.

Example 1
FIG. 8 illustrates the relationship between the bonding temperature in the bump forming process and the shear strength of the bump with respect to the aluminum electrode.

  As a sample of this example, an SiC chip as an SBD device was used, the maximum bonding temperature was set within a range of 53 ° C. to 460 ° C., and a plurality of ball bump methods were used on the aluminum electrode of the SiC chip. Gold bumps were formed. Then, the shear strength of each gold bump at each set temperature was measured, and the maximum, minimum, and average of the shear strength were calculated.

  Under the same conditions, the chip material was replaced with Si, and gold bumps were formed at 165 ° C., the maximum temperature at which the Si chip could be bonded without causing malfunction. The shear strength of the gold bumps was about 65 g per unit bump. Met.

  On the other hand, as shown in FIG. 8, when the bonding temperature is 200 ° C. or higher, it can be seen that a shear strength of about 67.5 g or more exceeding about 65 g per unit bump of the Si chip can be obtained. When the bonding temperature is 100 ° C., it is 58.4 MPa, and when it is 460 ° C., it is 140.8 MPa.

(Example 2)
FIG. 9A shows the bonding temperature in the bump forming process and the current-voltage characteristics at each bonding temperature, and FIG. 9B calculates the resistance at each bonding temperature from FIG. 9A. It is a table.

  As a sample of this example, an SiC chip as an SBD device was used, the temperature range of the bonding temperature was set within a range of 165 ° C. to 500 ° C., and a plurality of ball bump methods were used on the aluminum electrode of the SiC chip. Gold bumps were formed. Thereafter, the aluminum electrode of the SiC chip was electrically connected to the ceramic (AlN / Cu (Au)) wiring substrate through a gold bump and a solder material of Au-20 wt% Sn.

  9A and 9B also show current-voltage characteristics and resistance in a bare chip having only an aluminum electrode without a gold bump for reference.

  According to FIG. 9 (A) and FIG. 9 (B), when the bonding temperature is 460 ° C. or lower, good voltage-current characteristics and resistance values that are almost the same as those of bare chips can be obtained. It can be seen that the resistance value increases and the electrical characteristics are impaired.

  Therefore, according to Examples 1 and 2, when the maximum temperature range of the bonding temperature is 185 ° C. or higher and 460 ° C. or lower, more preferably 235 ° C. or higher and 300 ° C. or lower, good ohmic contact with the silicon carbide element is achieved. It can be seen that the gold bump can be bonded to the aluminum electrode with high bonding strength.

(Example 3)
FIG. 10 is a diagram showing an outline of a chip shear test. FIGS. 11A and 11B are different in the relationship between the shear strength and the bonding temperature based on the shear test shown in FIG. It is the graph considered using solder material. Note that FIG. 11A uses Au-20Sn solder as the solder material, and FIG. 11B uses Pb90-Sn solder as the solder material. In each drawing, bonding temperatures of 200 ° C., 300 ° C., and 375 are used. The graph which measured the shear strength with respect to each of ° C is shown.

  As a sample 90 of this example, as shown in FIG. 10, a ceramic wiring substrate 80 in which a Cu layer, a Ni layer, and an Au layer (a gold flash layer for preventing Ni oxidation) is formed on an AlN layer is prepared. Further, a SiC chip 84 having gold bumps 82 formed on an Al electrode 81 at a predetermined bonding temperature was prepared, and both were joined by a solder material 86. Then, the shear tool 88 was pressed against the sample 90 under predetermined conditions (test speed: 150 μm / s, test height: 270 μm), and the SiC chip 84 was peeled from the ceramic wiring board 80. Thus, the relationship between the shear strength of the sample 90 and the bonding temperature of the gold bump 82 based on the composition of the solder material 86 was examined. The average values of the shear strength at each bonding temperature in FIG. 11A are 200 ° C .: 39.65 Kgf, 300 ° C .: 42.84 Kgf, 375 ° C .: 38.32 Kgf, respectively, while FIG. The average values of the shear strength at each bonding temperature were 200 ° C .: 3.77 Kgf, 300 ° C .: 5.78 Kgf, and 375 ° C .: 9.72 Kgf, respectively.

  Considering from these measurement results, first, the case where the Au-20Sn solder shown in FIG. 11 (A) is used is longer than the case where the Pb90-Sn solder shown in FIG. 11 (B) is used. Even at the bonding temperature, the shear strength is several times higher and the bonding strength between the SiC chip 84 and the ceramic wiring substrate 80 is extremely high. In addition, in any of the solders used, the shear strength increases as the bonding temperature for forming the gold bumps increases, and this tendency is particularly observed when the Pb90-Sn solder shown in FIG. 11B is used. It is noticeable. In addition, in the gold bump formed at a bonding temperature of 375 ° C. when using Au-20Sn solder shown in FIG. 11A, there is a slight decrease in shear strength. This is due to bonding during reflow. The cause is considered to be a failure.

  From the above, it can be said that the Al electrode of the power device can be firmly connected to the substrate by the gold bump and Au—Sn eutectic solder.

Example 4
12 and 13 are diagrams showing X-ray mapping of each component on the fracture surface after the shear test shown in FIG. Specifically, FIG. 12 shows a fracture surface on the chip side after the shear test, and each mapping photograph shows SEM, Ni, Au, and Sn, respectively. On the other hand, FIG. 13 shows a fracture surface on the substrate side after the shear test, and each mapping photograph shows SEM, Ni, Au, and Sn, respectively. As the conditions for the shear test, the bonding temperature of the gold bump was set to 300 ° C., and Au-20Sn solder was used as the solder material.

  Considering these measurement results, the Ni component deposited as a diffusion barrier on Cu of the ceramic wiring substrate was clearly seen on the fracture surface. Ni was also detected as a main component in X-ray mapping of the corresponding substrate. Therefore, it is apparent that the chip connected by Au-20Sn is fractured at the bonding portion between the Au-20Sn solder and the substrate rather than the bonding portion between the Au-20Sn solder and the chip after the shear test. It can be said. This indicates that the bonding between the Au-20Sn solder and the Al anode electrode is extremely strong. That is, it can be seen that the strength of the bonding portion between the chip and the solder is superior to the strength of the bonding portion between the solder and the substrate.

  According to the embodiment of the present invention, since the maximum temperature of the bonding stage is set in the above range, the gold bump is bonded to the aluminum electrode with high bonding strength while achieving good ohmic contact with the silicon carbide element. can do. Therefore, it is possible to provide a semiconductor device capable of realizing high-temperature operation and cooling-free operation using a SiC material, miniaturization by three-dimensional mounting, improvement of bonding strength by the bump and high electrical connection reliability, and a method for manufacturing the same.

(Example 5)
14A to 14C are diagrams showing the dependency of the resistance value of the chip bonded according to the present invention and the high temperature holding time, and FIG. 15 is a diagram showing an outline of the four-terminal method used for the measurement. .

  Specifically, after forming the Au bump 102 on the Al electrode 101 of the SiC chip 100 at a temperature of 300 ° C., the Au bump 102 and the Au-20Sn solder paste are formed based on the temperature profile shown in FIG. The SiC chip 100 and the ceramic wiring substrate 104 were joined via 103. And about the obtained chip | tip, 125 degreeC, 175 degreeC, and 200 degreeC hold | maintained high temperature maintenance experiment in the air. In the experiment, two sample chips were prepared for each temperature, and the resistance value was measured every certain time using the four-terminal method shown in FIG.

  The results are shown in FIGS. 14 (A) to (C). The cases are (A) 125 ° C., (B) 175 ° C., and (C) 200 ° C., respectively. As is apparent from the figure, at any temperature, a very good result is obtained that the amount of change in the resistance value is 11% or less during the high temperature holding for 1000 hours. Further, it can be seen that the change amount of the resistance value is smaller at any temperature up to 500 hours.

  Therefore, according to the present invention, a semiconductor device having good high temperature / resistance characteristic can be realized.

It is a figure explaining the bump formation process concerning the embodiment of the present invention. It is a figure explaining the bump formation process concerning the embodiment of the present invention. It is a figure explaining the bump formation process concerning the embodiment of the present invention. It is a figure explaining the solder joining process concerning the embodiment of the present invention. It is a figure explaining the solder joining process concerning the embodiment of the present invention. 6A and 6B show an example of a temperature profile in the solder reflow process. It is a figure which shows an example of the semiconductor device manufactured by the method concerning embodiment of this invention. It is a figure which shows the relationship between bonding temperature and shear strength. 9A and 9B are diagrams showing the relationship between the bonding temperature and the voltage-current characteristics or resistance. It is a figure which shows the outline of the shear test of a chip | tip. FIG. 11A and FIG. 11B are graphs showing the relationship between shear strength and bonding temperature. It is a figure which shows X-ray mapping of each component in the chip side fracture surface after a shear test. It is a figure which shows X-ray mapping of each component in the board | substrate side fracture surface after a shear test. 14A to 14C are diagrams showing the dependency of the resistance value of the bonded chip and the high temperature holding time. It is a figure explaining the four-terminal method used for the measurement of the forward direction current-voltage curve and resistance value of a sample.

Explanation of symbols

10 Silicon carbide element (SiC element)
DESCRIPTION OF SYMBOLS 12 1st electrode 14 2nd electrode 20 Gold wire 21 Neck part 22 Gold ball 24 Bonding tool 26 Gold bump 30 Bonding stage 40,44 Ceramic wiring board 42,46 Wiring layer 50,52 Solder material 60,62,64 SiC element 70 Ceramic wiring board 80 Ceramic wiring board 81 Al electrode 82 Gold bump 84 SiC chip 86 Solder material 88 Shear tool 90 Sample 100 SiC chip 101 Al electrode 102 Au bump 103 Au-20Sn solder paste 104 Ceramic wiring board 110 Semiconductor module

Claims (11)

A step of forming a plurality of gold bumps by a ball bump method on a silicon carbide element aluminum electrode with a bonding stage set temperature range of 100 ° C. to 460 ° C., and the aluminum between the gold bumps and the gold bumps A method of manufacturing a semiconductor device , comprising: a step of providing a solder material so as to cover an electrode; and a step of reflowing the solder material . In the manufacturing method of the semiconductor device according to claim 1 ,
A method of manufacturing a semiconductor device, wherein the solder material is Au-Sn. The method of manufacturing a semiconductor device according to claim 2 .
The manufacturing method of the semiconductor device whose Sn content rate of the said Au-Sn type | system | group is 20 wt% . In the manufacturing method of the semiconductor device in any one of Claims 1-3 ,
A method of manufacturing a semiconductor device, wherein, in the reflow step, the silicon carbide element is electrically connected to a ceramic wiring substrate through the gold bump and the solder material by reflowing the solder material. In the manufacturing method of the semiconductor device in any one of Claims 1-4 ,
A method for manufacturing a semiconductor device, further comprising a step of plasma cleaning the aluminum electrode before the gold bump formation step. In the manufacturing method of the semiconductor device in any one of Claims 1-5 ,
The silicon carbide element is a method for manufacturing a semiconductor device including an integrated circuit for power electronics. The semiconductor device manufactured by the method according to any one of claims 1 to 6. A silicon carbide element having an aluminum electrode;
A plurality of gold bumps formed on the aluminum electrode of the silicon carbide element;
A solder material provided to cover the aluminum electrodes between the plurality of gold bumps and the gold bumps in the silicon carbide element;
A ceramic wiring board electrically connected to the silicon carbide element through the gold bump and the solder material;
With
A semiconductor device in which at least one of the gold bumps has a shear strength of 58.4 MPa or more and 140.8 MPa or less. The semiconductor device according to claim 8 .
A semiconductor device in which the solder material is Au-Sn. The semiconductor device according to claim 9 .
A semiconductor device in which the Au-Sn Sn content is 20 wt% . The semiconductor device according to any one of claims 8 to 10 ,
A semiconductor device in which the silicon carbide element includes an integrated circuit for power electronics.