JP5172404B2 - Multilayer wiring board manufacturing method and multilayer wiring board intermediate product - Google Patents

Description

  The present invention relates to a method for producing a multilayer wiring board having a build-up layer in which a conductor layer and an insulating layer are alternately laminated and formed into a multilayer without having a core substrate, and an intermediate product of the multilayer wiring board.

  In recent years, semiconductor integrated circuit elements (IC chips) used as computer microprocessors and the like have become increasingly faster and more functional, with an accompanying increase in the number of terminals and a tendency to narrow the pitch between terminals. . In general, a large number of terminals are densely arranged on the bottom surface of an IC chip, and such a terminal group is connected to a terminal group on the motherboard side in the form of a flip chip. However, it is difficult to connect the IC chip directly on the mother board because there is a large difference in the pitch between the terminals on the IC chip side terminal group and the mother board side terminal group. For this reason, a method is generally employed in which a package is prepared by mounting an IC chip on an IC chip mounting wiring board, and the package is mounted on a motherboard.

  As an IC chip mounting wiring board constituting this type of package, a multilayer wiring board in which build-up layers are formed on the front surface and the back surface of a core substrate has been put into practical use. In this multilayer wiring board, for example, a resin substrate (a glass epoxy substrate or the like) in which a reinforcing fiber is impregnated with a resin is used as the core substrate. Then, by utilizing the rigidity of the core substrate, an interlayer insulating layer and a conductor layer are alternately stacked on the front surface and the back surface of the core substrate to form a buildup layer. That is, in this multilayer wiring board, the core board plays a role of reinforcement and is formed much thicker than the build-up layer. In addition, wiring (specifically, a through-hole conductor or the like) is formed through the core substrate for conduction between buildup layers formed on the front surface and the back surface.

  By the way, in recent years, with the increase in the speed of semiconductor integrated circuit elements, the signal frequency used has become a high frequency band. In this case, the wiring penetrating the core substrate contributes as a large inductance, leading to transmission loss of high-frequency signals and circuit malfunction, which hinders speeding up. In order to solve this problem, a coreless wiring board having no core board has been proposed as an IC chip mounting wiring board (for example, Patent Document 1). In this coreless wiring board, since the entire wiring length is shortened by omitting a relatively thick core board, the transmission loss of high-frequency signals is reduced, and the semiconductor integrated circuit element can be operated at high speed.

  Here, a conventional method of manufacturing a coreless wiring board will be described.

  First, a support substrate 200 (for example, a glass epoxy substrate) for reinforcement at the time of manufacture is prepared, and a base resin insulating layer 201 is formed on the support substrate 200 (see FIG. 15). Next, a laminated metal sheet body 202 composed of two metal foils 202 a and 202 b is arranged on the main surface of the base resin insulating layer 201, and the first resin insulating layer 211 is wrapped so as to wrap the laminated metal sheet body 202. (See FIG. 16). The first resin insulating layer 211 is in close contact with the laminated metal sheet body 202 and in close contact with the base resin insulating layer 201 in the peripheral region of the laminated metal sheet body 202 to seal the laminated metal sheet body 202. .

  Moreover, after forming a via hole in the first resin insulating layer 211 by performing laser processing, a desmear process for removing smear in the via hole is performed. Thereafter, plating is performed to form via conductors 204 in the respective via holes 203, and further, etching is performed by a conventionally known technique to pattern the conductor layer 205 on the resin insulating layer 211 (see FIG. 17). ).

Then, as shown in FIG. 18, the second to fourth resin insulation layers 212 to 214 and the conductor layer 205 are also formed by the same method as the first resin insulation layer 211 and the conductor layer 205 described above. Then, build-up is performed on the resin insulating layer 211. Further, a solder resist 216 is formed by applying and curing a photosensitive epoxy resin on the uppermost resin insulating layer 214. Thereafter, the solder resist 216 is exposed and developed to pattern the openings 209 for exposing the terminal pads 218. Through the above manufacturing process, a laminated body 220 in which the laminated metal sheet body 202, the resin insulating layers 211 to 214, and the conductor layer 205 are laminated on the support substrate 200 is formed. In this laminated body 220, the region on the laminated metal sheet body 202 is a portion that becomes the wiring laminated portion 221 (build-up layer) of the coreless wiring board. In this laminated body 220, the periphery of the wiring laminated portion 221 is removed, and then peeled off at the adhesion interface between the two metal foils 202 a and 202 b in the laminated metal sheet body 202 to separate the wiring laminated portion 221 from the support substrate 200. (See FIG. 19). Thereafter, the metal foil 202a adhering to the main surface of the wiring laminated portion 221 is removed by etching to form a metal terminal 222 (for example, a solder bump) connected to the via conductor 204, whereby a coreless wiring substrate. 230 (see FIG. 20) is obtained.
Japanese Patent No. 3615727

  As described above, in the conventional manufacturing method, the core layered wiring substrate 230 is manufactured by building up the wiring laminated portion 221 on the support substrate 200 and then removing the support substrate 200. In the case of this manufacturing method, the support substrate 200 is a useless member that does not become a product, and man-hours for removing the support substrate 200 are also required, which increases the manufacturing cost of the coreless wiring substrate 230.

  The present invention has been made in view of the above problems, and an object thereof is to provide a method for manufacturing a multilayer wiring board that can reduce the manufacturing cost of the multilayer wiring board, and an intermediate product of the multilayer wiring board. is there.

And as means (means 1) for solving the above-mentioned problem, it does not have a core substrate, but has a build-up layer formed by alternately laminating conductor layers and insulating layers, and the surface of the build-up layer. A method for manufacturing a multilayer wiring board in which an element mounting area for mounting a semiconductor integrated circuit element is set , wherein two copper foils as two sheet-like metal materials made of a conductive metal material are laminated. A laminated metal sheet prepared by laminating a sheet-like build-up material, which is made of an insulating resin base material containing inorganic fibers and later becomes the insulating layer, on both surfaces of the laminated metal sheet body adhered in a peelable state. and body preparation step, wherein an outer edge of the metal laminate sheet for build-up material was laminated in a state of being fixed to the frame, on its both surfaces, the build-up layer by alternately laminating the insulating layer and the conductor layer A build-up layer forming step to be formed, a splitting step of splitting the build-up layer-formed laminated metal sheet body into two by peeling at the adhesion interface of each sheet-like metal material in the laminated metal sheet body, And a surface conductor layer forming step of patterning the sheet-like metal material exposed through the dividing step to form a surface conductor layer.

  Therefore, according to the multilayer wiring board manufacturing method of means 1, in the laminated metal sheet body preparation step, two sheet metal materials made of conductive metal material are laminated and adhered in a peelable state. In the buildup layer forming step, the buildup layer is formed by alternately laminating the insulating layers and the conductor layers on both sides of the laminated metal sheet body. In this manufacturing method, since the build-up layer is not formed on the support substrate as in the prior art, a step of preparing the support substrate and laminating the base dielectric layer on the support substrate is not necessary. Furthermore, since the support substrate itself is not necessary, the manufacturing cost of the multilayer wiring substrate can be reduced.

Wherein in the buildup layer formation step, it intends row formation of the conductor layer and the insulating layer in a state of fixing the outer edge of the laminated metal sheet to the frame. By fixing the outer edge of the laminated metal sheet body to the frame body in this way, the laminated metal sheet body can be held in a good flat shape without wrinkles, so the formation of the conductor layer and the insulating layer in the build-up layer forming step Can be done appropriately.

In the laminated metal sheet body preparing step, a sheet-like buildup material that will be the insulating layer later is prepared by laminating on both surfaces of the laminated metal sheet body, and in the buildup layer forming step, the laminated metal sheet body is prepared. It intends row formation of the conductor layer and the insulating layer an outer edge in a state of fixing to the frame of. In this case, by laminating the build-up material on the laminated metal sheet body, the thickness of the laminated metal sheet body can be increased. As a result, the laminated metal sheet body can be easily fixed to the frame body, and the conductor layer and the insulating layer can be more appropriately formed.

  The sheet metal material is a copper foil, and in the surface conductor layer forming step, the copper foil is preferably etched and patterned. If it does in this way, a surface conductor layer can be formed easily.

  It is preferable that the frame includes a conductive material and is used as a power supply structure for electrolytic plating when the conductor layer is formed in the buildup layer forming step. If it does in this way, it can energize using a frame at the time of electroplating, it is not necessary to prepare the electric supply structure for electroplating separately, and the manufacturing cost of a multilayer wiring board can be held down.

Further, as another means (means 2) for solving the above-mentioned problem, the build-up layer has a multi-layered structure in which conductor layers and insulating layers are alternately laminated without having a core substrate, Two copper foils as two sheet-like metal materials made of a conductive metal material, which is an intermediate product of a multilayer wiring board in which an element mounting area for mounting a semiconductor integrated circuit element is set on the surface of the layer to the on both sides of the metal laminate sheet which is adhered to a release ready lamination, and made by laminating the sheet-like build-up material which becomes an insulating layer after an insulating resin base member including inorganic fibers The build-up layer formed by alternately laminating the insulating layer and the conductor layer on both sides of the laminated metal sheet body laminated with the build-up material, with the outer edge portion fixed to a frame body And be prepared There is an intermediate product of a multilayer wiring board, characterized in that the.

Therefore, according to the intermediate product of the multilayer wiring board of the means 2, the buildup layer is directly formed on the laminated metal sheet body without using the support substrate as in the prior art. In this case, a multilayer wiring board can be manufactured without going through a process of preparing a support substrate and laminating a base dielectric layer on the support substrate. Therefore, the material cost of the support substrate and the underlying dielectric layer is not required, and the manufacturing cost of the multilayer wiring substrate can be reduced.
In addition, the multilayer wiring board having no core of the present invention refers to “a multilayer wiring board mainly composed mainly of the same interlayer insulating layer” or “each conductor layer only by vias whose diameter is expanded in the same direction”. The connected multilayer wiring board can be mentioned.

  The conductor layer is patterned on the interlayer insulating layer by a known method such as a subtractive method, a semi-additive method, or a full additive method. Examples of the metal material used for forming the conductor layer include copper, copper alloy, nickel, nickel alloy, tin, tin alloy and the like.

  The insulating layer can be appropriately selected in consideration of insulation, heat resistance, moisture resistance, and the like. Preferred examples of the material for forming the insulating layer include thermosetting resins such as epoxy resins, phenol resins, urethane resins, silicone resins, and polyimide resins, thermoplastic resins such as polycarbonate resins, acrylic resins, polyacetal resins, and polypropylene resins. Is mentioned. In addition, composite materials of these resins and glass fibers (glass woven fabric or glass nonwoven fabric) or organic fibers such as polyamide fibers may be used.

  Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings. FIG. 1 is an enlarged cross-sectional view showing a schematic configuration of a coreless wiring board (multilayer wiring board) of the present embodiment, and FIG. 2 is a plan view of the coreless wiring board.

  As shown in FIG. 1, the coreless wiring substrate 10 does not have a core substrate, and includes four resin insulating layers (insulating layers) 21, 22, 23, 24 made of epoxy resin, and a conductor layer 26 made of copper. The buildup layer 20 is formed by alternately laminating layers. The resin insulation layers 21 to 24 are interlayer insulation layers made of the same thickness and material, and are formed using a sheet-like buildup material made of an epoxy resin. In the coreless wiring substrate 10, terminal pads 27 are provided on the surface (upper surface) of the fourth resin insulating layer 24. FIG. 1 is a cross-sectional view showing a part of the coreless wiring substrate 10. On the upper surface of the coreless wiring substrate 10, a plurality of terminal pads 27 are arranged, for example, in an array (see FIG. 2).

  The surface of the resin insulation layer 24 is almost entirely covered with the solder resist 28. The solder resist 28 has openings 29 through which the terminal pads 27 are exposed. An IC chip (semiconductor integrated circuit element) is flip-chip connected to each exposed terminal pad 27 via a solder bump (not shown). As shown in FIG. 2, on the upper surface (main surface) of the coreless wiring substrate 10, a region where each terminal pad 27 is formed becomes an element mounting region 25.

  LGA (land grid array) pads 30 are arranged in an array on the surface (lower surface) of the first resin insulating layer 21. The resin insulation layers 21, 22, 23, and 24 are provided with via holes 32 and via conductors 33, respectively. Each via conductor 33 is a conductor whose diameter is expanded in the same direction (upward in the drawing), and electrically connects each conductor layer 26, terminal pad 27, and LGA pad 30 to each other. Each LGA pad 30 is electrically connected to a mother board (not shown).

  The coreless wiring substrate 10 of the present embodiment is manufactured, for example, according to the following procedure.

  First, as shown in FIG. 3, a laminated metal sheet body 42 in which two copper foils 42 a and 42 b (sheet-like metal material) made of copper as a conductive metal material are laminated and adhered in a peelable state. Prepare (laminated metal sheet body preparation step). Specifically, the laminated metal sheet body 42 is formed by laminating the copper foils 42a and 42b via metal plating (for example, chromium plating). In addition, the thickness of each copper foil 42a, 42b is 18 micrometers, and the size of the laminated metal sheet body 42 is 500 mm long and 500 mm wide.

  Then, as shown in FIGS. 4 and 5, the outer edge portion of the laminated metal sheet body 42 is fixed with a frame body 43. The frame body 43 used in the present embodiment is formed using a copper material that is a conductive material, and has a function as a feeding structure for electrolytic plating in addition to a function of fixing the laminated metal sheet body 42. The laminated metal sheet body 42 is fixed to the frame body 43 by using, for example, an adhesive tape excellent in chemical resistance that does not deteriorate the adhesiveness even when a plating solution adheres. However, the laminated metal sheet body 42 may be fixed to the frame body 43 by other fixing means such as screwing. In addition, the dashed-dotted line drawn in FIG. 5 is a cutting planned line. That is, the coreless wiring board 10 of the present embodiment is manufactured in the form of a multi-cavity wiring board, and a plurality of coreless wiring boards 10 can be obtained simultaneously by dividing the multi-cavity wiring board on the planned cutting line. ing.

  In the present embodiment, the resin insulating layers 21, 22, 23, 24 and the conductor layer 26 are alternately laminated on both sides of the laminated metal sheet body 42 with the laminated metal sheet body 42 fixed by the frame body 43. Then, the buildup layer 20 is formed (buildup layer forming step).

  Specifically, as shown in FIG. 6, first, sheet-like buildup materials 45 are arranged on both surfaces of the laminated metal sheet body 42, and a vacuum is used in a vacuum press hot press machine (not shown). By applying pressure and heating, the buildup material 45 is cured to form the first resin insulating layer 21.

  Then, as shown in FIG. 7, a via hole 32 is formed at a predetermined position of the resin insulating layer 21 by performing laser processing, and then a desmear process for removing smear in each via hole 32 is performed. Thereafter, by performing electroless copper plating and electrolytic copper plating according to a conventionally known method, the via conductor 33 is formed in each via hole 32 and the conductor layer 26 is formed on the resin insulating layer 21. Here, energization is performed using the frame body 43 as an electroplating power supply structure, and an electroplating process is performed. Further, the conductor layer 26 is patterned on the resin insulating layer 21 by performing etching by a conventionally known method (for example, a semi-additive method) (see FIG. 8).

  The second to fourth resin insulation layers 22 to 23 and the conductor layer 26 are also formed by the same method as the first resin insulation layer 21 and the conductor layer 26 described above, and build on the resin insulation layer 21. I will go up. Then, a solder resist 28 is formed by applying and curing a photosensitive epoxy resin on the resin insulating layer 24 on which the terminal pads 27 are formed. Next, exposure and development are performed with a predetermined mask placed, and the opening 29 is patterned in the solder resist 28. Through the above manufacturing process, the intermediate product 100 of the coreless wiring board 10 provided with the buildup layers 20 on both surfaces of the laminated metal sheet body 42 can be obtained (see FIG. 9).

  Thereafter, the frame body 43 that has fixed the outer edge portion of the laminated metal sheet body 42 is removed, and peeled off at the adhesion interface between the two copper foils 42a and 42b in the laminated metal sheet body 42 as shown in FIG. Then, the intermediate product 100 is divided into two wiring boards 101 (dividing step). In the wiring substrate 101 after the separation, the copper foils 42a and 42b on the main surface are patterned by etching to form the LGA pad 30 as the surface conductor layer (surface conductor layer forming step). Further, in the wiring substrate 101 after separation, the outer edge portion (fixed portion by the frame body 43) of the laminated metal sheet body 42 (copper foils 42a and 42b) is an unnecessary portion (non-product region) that does not become a product of the wiring substrate 10. This part is cut and removed.

  The wiring board obtained through the above manufacturing process is a multi-cavity wiring board in which a plurality of parts to be products of the coreless wiring board 10 are arranged vertically and horizontally. Therefore, a plurality of coreless wiring boards 10 of FIG. 1 can be obtained simultaneously by dividing the multi-piece wiring board.

  Therefore, according to the present embodiment, the following effects can be obtained.

  (1) In the manufacturing method of the coreless wiring substrate 10 according to the present embodiment, the buildup layers 20 are directly formed on both surfaces of the laminated metal sheet body 42 composed of the two copper foils 42a and 42b. Thus, the process of preparing the support substrate 200 and laminating the base resin insulation layer 201 on the support substrate 200 becomes unnecessary. Furthermore, since the material cost of the support substrate 200 and the base resin insulating layer 201 is not required, the manufacturing cost of the coreless wiring substrate 10 can be reduced.

  (2) In the case of the present embodiment, in the buildup layer forming step, the conductor layer 26 and the resin insulating layers 21 to 24 are formed in a state where the outer edge portion of the laminated metal sheet body 42 is fixed to the frame body 43. ing. In this case, since the laminated metal sheet body 42 can be held in a good flat shape without wrinkles, the conductor layer 26 and the resin insulating layers 21 to 24 can be appropriately formed.

  (3) In the case of the present embodiment, the LGA pad 30 can be easily formed by etching and patterning the copper foils 42a and 42b on the main surface of the wiring substrate 101 in the surface conductor layer forming step. it can.

  In addition, you may change embodiment of this invention as follows.

  In the above embodiment, a laminated metal sheet body 42 composed of two copper foils 42a and 42b is prepared in the laminated metal sheet body preparation step, and in the buildup layer forming step, both surfaces of the laminated metal sheet body 42 are prepared. Although the build-up layer 20 including the resin insulating layers 21 to 24 and the conductor layer 26 is laminated, the present invention is not limited to this. For example, as shown in FIG. 11, in the laminated metal sheet body preparation step, a laminate in which a sheet-like buildup material 45 that will later become the resin insulating layer 21 is laminated on both surfaces of the laminated metal sheet body 42 is prepared. Here, as the build-up material 45, an insulating resin base material including an inorganic fiber (for example, glass cloth) in a polymer material (for example, an epoxy resin) may be used. In the buildup layer forming step, the buildup layer composed of the conductor layer 26 and the resin insulating layers 22 to 24 in a state where the outer edge portion of the laminated metal sheet body 42 laminated with the buildup material 45 is fixed to the frame body 43. 20 is formed. If it does in this way, fixation of the lamination metal sheet body 42 to the frame 43 can be performed easily, and formation of the conductor layer 26 and the resin insulation layers 22-24 can be performed more appropriately.

  In the above embodiment, the coreless wiring board 10 is manufactured using the laminated metal sheet body 42 in which the copper foils 42a and 42b as the sheet-like metal material are in close contact, but the copper plate is used as the sheet-like metal material. The coreless wiring board 10 may be manufactured by using a laminated metal sheet body in which the two are in close contact with each other. Specifically, as shown in FIG. 12, the resin insulating layers 21 to 24 and the both sides of a laminated metal sheet 71 formed by laminating two copper plates 71a and 71b are used in the same manner as in the above embodiment. The conductor layer 26 is built up. However, the laminated metal sheet body 71 has sufficient strength as compared with the laminated metal sheet body 42 made of the copper foils 42a and 42b. Therefore, the laminated metal sheet body 71 is not fixed by the frame body 43, and the buildup layer 20 composed of the resin insulating layers 21 to 24 and the conductor layer 26 is formed on both surfaces thereof. Thereby, the intermediate product 110 of the coreless wiring board 10 can be obtained. Then, as shown in FIG. 13, the intermediate product 110 is separated into two wiring boards 111 by peeling at the adhesion interface between the two copper plates 71 a and 71 b in the laminated metal sheet 71. Thereafter, as shown in FIG. 14, the copper plate 71a on the main surface of the wiring board 111 is thinned to a predetermined thickness (for example, 18 μm) by etching. Thereafter, the LGA pad 30 is formed by further etching and patterning. As a result, a multi-piece wiring board in which a plurality of portions to be products of the coreless wiring board 10 are arranged vertically and horizontally is completed. Thereafter, by dividing the multi-piece wiring board, a plurality of coreless wiring boards 10 shown in FIG. 1 can be obtained simultaneously.

  In the above embodiment, the frame body 43 is formed using a copper material, but may be formed using a metal material other than copper. Moreover, when the metal material which comprises the frame 43 may mix as an impurity in the plating solution of copper plating, you may coat | cover the surface of the frame 43 with a resin material. Furthermore, when sufficient strength can be maintained without using a metal material, the frame body 43 may be formed only from a resin material. In this case, an electroplating power supply member is provided separately from the frame 43.

  In the above embodiment, the package form of the coreless wiring substrate 10 is LGA (Land Grid Array), but is not limited to LGA alone, for example, PGA (Pin Grid Array), BGA (Ball Grid Array), etc. Also good.

Sectional drawing which shows schematic structure of the coreless wiring board of this Embodiment. The top view which shows the coreless wiring board of this Embodiment. Explanatory drawing which shows the manufacturing method of the coreless wiring board of this Embodiment. Explanatory drawing which shows the manufacturing method of the coreless wiring board of this Embodiment. Explanatory drawing which shows the manufacturing method of the coreless wiring board of this Embodiment. Explanatory drawing which shows the manufacturing method of the coreless wiring board of this Embodiment. Explanatory drawing which shows the manufacturing method of the coreless wiring board of this Embodiment. Explanatory drawing which shows the manufacturing method of the coreless wiring board of this Embodiment. Explanatory drawing which shows the manufacturing method of the coreless wiring board of this Embodiment. Explanatory drawing which shows the manufacturing method of the coreless wiring board of this Embodiment. Explanatory drawing which shows the manufacturing method of the coreless wiring board of another embodiment. Explanatory drawing which shows the manufacturing method of the coreless wiring board of another embodiment. Explanatory drawing which shows the manufacturing method of the coreless wiring board of another embodiment. Explanatory drawing which shows the manufacturing method of the coreless wiring board of another embodiment. Explanatory drawing which shows the manufacturing method of the conventional coreless wiring board. Explanatory drawing which shows the manufacturing method of the conventional coreless wiring board. Explanatory drawing which shows the manufacturing method of the conventional coreless wiring board. Explanatory drawing which shows the manufacturing method of the conventional coreless wiring board. Explanatory drawing which shows the manufacturing method of the conventional coreless wiring board. Explanatory drawing which shows the conventional coreless wiring board.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 ... Coreless wiring board as a multilayer wiring board 20 ... Build-up layer 21-24 ... Resin insulating layer as an insulating layer 25 ... Element mounting area 26 ... Conductor layer 30 ... LGA pad 42, 71 ... Laminate as a surface conductor layer Metal sheet body 42a, 42b ... Copper foil as sheet metal material 43 ... Frame body 45 ... Insulating resin base material as build-up material 71a, 71b ... Copper plate as sheet metal material 100, 110 ... Intermediate product

Claims (5)

Does not have a core substrate, has a build-up layer that is formed by alternately laminating conductor layers and insulating layers, and an element mounting area for mounting a semiconductor integrated circuit element is set on the surface of the build-up layer A method for manufacturing a multilayer wiring board, comprising:
It consists of an insulating resin base material containing inorganic fibers on both sides of a laminated metal sheet body in which two copper foils as two sheet-like metal materials made of a conductive metal material are laminated and adhered in a peelable state. Laminated metal sheet body preparation step of preparing a laminate of a sheet-like buildup material to be the insulating layer later ,
Build-up in which the build-up layer is formed by alternately laminating the insulating layer and the conductor layer on both sides thereof with the outer edge of the laminated metal sheet laminated with the build-up material fixed to a frame. A layer forming step;
A dividing step of dividing the laminated metal sheet body in which the build-up layer has been formed into two parts by peeling at the adhesion interface of each sheet-like metal material in the laminated metal sheet body,
And a surface conductor layer forming step of forming a surface conductor layer by patterning the sheet-like metal material exposed through the dividing step. The method for manufacturing a multilayer wiring board according to claim 1, wherein the surface of the frame is covered with a resin material . Prior Symbol surface conductor layer forming step, a method for manufacturing a multilayer wiring board according to claim 1 or 2, characterized in that patterning the copper foil by etching. The frame body, while being configured to include a conductive material, according to claim 1 to 3, characterized in that it is utilized for electroless plating power feeding structure when forming the conductive layer in the buildup layer forming step The manufacturing method of the multilayer wiring board of any one of Claims 1. Does not have a core substrate, has a build-up layer that is formed by alternately laminating conductor layers and insulating layers, and an element mounting area for mounting a semiconductor integrated circuit element is set on the surface of the build-up layer An intermediate product of a multilayer wiring board,
It consists of an insulating resin base material containing inorganic fibers on both sides of a laminated metal sheet body in which two copper foils as two sheet-like metal materials made of a conductive metal material are laminated and adhered in a peelable state. After laminating a sheet-like build-up material that becomes the insulating layer later ,
The build-up layer formed by alternately laminating the insulating layer and the conductor layer on both sides thereof with the outer edge of the laminated metal sheet laminated with the build-up material fixed to a frame. An intermediate product of a multilayer wiring board characterized by comprising

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