JP5077736B2 - Contact assembly and LSI chip inspection apparatus using the same - Google Patents

Description

  The present invention relates to a contact assembly for electrical connection used for circuit inspection of a semiconductor integrated circuit chip or a liquid crystal device in which electrodes (pads) of a chip are arranged on a plane, connection between two electronic devices, and the like, and The present invention relates to a contact holding structure for holding the positional accuracy of a contact in a contact assembly that can be used for a CSP (Chip Size Package) socket or the like in which circuit terminals are arranged in a grid on a plane. The present invention also relates to an LSI chip inspection apparatus and a circuit inspection apparatus such as a CSP using the same.

  A thin plate in which an elastic deformation portion (curving portion) that elastically deforms against an external force is interposed between the input and output portions of the contact in order to cope with a narrow pitch of the pad arrangement of the chips arranged on the wafer. FIG. 3 of Patent Document 1 discloses a contactor assembly in which a plurality of contacts made of a sheet-like material are arranged without interfering with each other at a predetermined angle with respect to the X axis of a terminal array arranged on XY orthogonal coordinates. (Hereinafter, this arrangement structure is referred to as a contact assembly).

  In general, for example, in a connector or the like, as a means for maintaining the positional accuracy of the contactor, a method of holding the connection side (usually referred to as a terminal) into a holding hole provided in a rigid substrate by holding, press-fitting, or the like Has been adopted. This rigid substrate is usually formed by molding, but if the pitch becomes fine, it is difficult to form the holding holes.

In the conventional contactor assembly described above, as disclosed in the front view of FIG. 29 (FIG. 5 of Patent Document 1), the output terminal of the contactor 1 is held in the holding hole provided in the sheet-like base material 27. 6 is inserted and held, and the input terminal 5 is fitted into a guide hole provided in the guide sheet 28 made of a sheet-like base material on the input contact side of the contact 1, and fixed through the connection post 25 and the support post 26. Thus, a contactor assembly holding structure for electrically connecting the electronic device under test and the inspection circuit board has been proposed, but no practical structure has been proposed.
JP 2002-296295 A

  The present invention has been made in order to solve the above-described problems, and is a contact arranged substantially in parallel without interfering with each other at a predetermined angle with respect to the X axis of the terminal arrangement arranged on the XY orthogonal coordinates. An object of the present invention is to solve problems such as maintaining the positional accuracy of the contacts of the child assembly and facilitating assembly work. The present invention also provides various inspection apparatuses including an LSI chip inspection apparatus using the contact assembly.

  The present invention provides a contactor assembly used when connecting an electronic device under test and a circuit inspection apparatus, a first terminal that contacts a pad of the electronic device under test, and a second contact that contacts a pad of the circuit inspection apparatus. And a ribbon-shaped resin film in which a plurality of the vertical probes are arranged at predetermined intervals in the longitudinal direction. The vertical probe has an elastic deformation portion between the first and second terminals. A plurality of contacts and a plurality of contacts, the vertical probe is shifted between the adjacent contacts by a predetermined interval in the longitudinal direction, and a predetermined interval is overlapped in the surface direction of the ribbon-shaped resin film. A guide member having a frame structure having a positioning member for positioning and fixing each contact in the surface direction, and an opening capable of accommodating a plurality of positioned and fixed contacts and having a thickness substantially equal to the width of the contact. The guide block is provided with a groove into which the inserted positioning member is fitted, and the contact is positioned and held in a state where the tip of the vertical probe protrudes vertically from the upper and lower surface positions of the guide block. It is characterized by.

In the contact according to the present invention, a vertical probe which has a horizontally long curved shape and is formed so that both ends of the curved portion face the vertical direction, and a long hole is opened in a portion surrounded by the curved portion. is composed of a ribbon-like resin film, both tips of the curved portion and wherein the projecting perpendicularly from the lateral direction on both sides of the ribbon-like resin film.

In the vertical probe according to the present invention, the tip of the curved portion protrudes vertically from both sides of the ribbon-shaped resin film in the short direction, one of which constitutes an input terminal that contacts the pad of the electronic device under test , and the other An output terminal that contacts a circuit wiring pad of an inspection circuit board connected to the circuit inspection apparatus is configured.

  The long side of the long hole opened in the ribbon-shaped resin film according to the present invention has a beam structure having the same width as the vertical probe, and this beam is elastically deformed together with the vertical probe against the contact pressure of the vertical probe. It is characterized by doing.

  When the thickness of the contact according to the present invention is t and the pitch of the pads formed in a grid pattern on the electronic device under test is p, the vertical probe tips of the stacked contacts are a ribbon. It arrange | positions on the straight line which makes the angle (theta) which has the relationship of Sin (theta) = t / p with respect to the longitudinal direction of a glass-like resin film, It is characterized by the above-mentioned.

A plurality of through-holes are provided at the same position on the plurality of contactors stacked according to the present invention, and a positioning rod is inserted into the through-holes so that the tip of the vertical probe is connected to the electronic device under test. It is matched to the number of pads and the pad position, characterized in that to fix several sheets of contacts double in.

  The electronic device under test that comes into contact with the input terminal protruding from the guide block according to the present invention is mounted at an angle of θ relative to the longitudinal direction of the guide block during inspection.

  An inspection circuit board having a circuit wiring that comes into contact with an output terminal protruding from the guide block according to the present invention is provided, and an overhang part is provided in a part of the inspection circuit board and inserted into a connector socket, and an electronic device to be tested and a circuit inspection The apparatus is electrically connected to the apparatus.

  When the inspection circuit board according to the present invention is provided with a through hole, and a plurality of inspection circuit boards are provided, a part of the output terminal of the vertical probe is inserted into the through hole and contacted with the circuit wiring pad of the lower board It is characterized by making it.

  According to the present invention, by providing the holding structure for the contactor assembly using the guide block, it interferes with each other at a predetermined angle with respect to the X axis of the input / output terminal array arranged on the XY orthogonal coordinates. In addition to maintaining the positional accuracy of the contacts of the contact assembly arranged without the need for assembly, the assembly work can be facilitated.

  As various inspection device names appear in relation to the present invention, the circuit inspection device is an apparatus for inspecting an electronic device under test, and an apparatus electrically connected to the contact assembly. Say. This circuit inspection apparatus is not specifically shown in the drawings. The electronic device under test used in the present invention is a CSP in which input / output terminals are arranged in a grid, an FPGA (Field Programmable Gate Array), or the like. The LSI chip inspection apparatus means an inspection apparatus that simultaneously and collectively contacts a plurality of pads of LSI chips arranged on a wafer to test various electrical characteristics.

(Embodiment 1)
Embodiment 1 of the present invention will be described below with reference to the drawings. FIGS. 1A and 1B are a front view and a plan view showing the structure of the contact 1 used in the present invention. The contact 1 used in the present invention is composed of a ribbon-like resin film 3 and a vertical probe 2 formed on the film surface. The structure is made by using a resin film such as polyimide as the ribbon-like resin film 3, attaching a copper foil to be the vertical probe 2 thereon, and using an etching technique by a well-known photolithography method. . As the material of the copper foil, beryllium copper is preferable because the probe requires rigidity.

  In this way, one contact 1 (thickness t, width W) in which the vertical probe 2 and the ribbon-like resin film 3 are integrated is formed. The vertical probe 2 includes a curved structure formed in a horizontally long U shape (length L, width W) having substantially the same width as the ribbon-shaped resin film 3, and the U-shaped open end is a ribbon. One of them forms an input terminal 5 while the other forms an output terminal 6 by projecting at right angles (height s) from both long sides of the resin film 3. The input unit terminal 5 is in contact with the pad of the electronic device under test, and the output unit terminal 6 is in contact with the pad of the inspection circuit so as to establish conduction between the electronic device under test and the inspection circuit. In the example of FIG. 1, two vertical probes 2 are provided for one contact 1, but may be increased or decreased according to the number of pads of the electronic device under test.

  The ribbon-shaped resin film 3 on which the vertical probe 2 is formed is provided with a long hole 7 having an opening area substantially equal to the curved shape surrounded by the U-shaped elastic deformation portion 4 of the vertical probe 2. Yes. In this portion, the ribbon-like resin film 3 is connected by a beam (having a very thin beam structure) having substantially the same width as that of the vertical probe 2, and this beam portion becomes the elastic deformation portion 4. ing. When the contact pressure is applied to the input terminal 5 and the output terminal 6, not only the vertical probe 2 but also the ribbon-like resin film 3 can be elastically deformed integrally. Further, a plurality (three in FIG. 1) of positioning through holes 8 are formed in the ribbon-shaped resin film 3. This through hole will be described later.

  A structure in which a plurality of contacts 1 formed in this way are stacked together is a contact assembly. However, the contact 1 does not have the same structure one by one, but uses the one in which the position of the vertical probe 2 is shifted by one pitch. This state is shown in the front view of FIG. FIG. 2A is the same (1a) as described in FIG. FIG. 2B is a diagram (1b) in which the position of the vertical probe 2 is shifted by a pitch p ′ with reference to FIG. FIG. 2C is a diagram (1c) that is further shifted by the pitch p ′ with reference to FIG. 2B. FIG. 2 (d) shows a further shift (1d) by the pitch p 'with reference to FIG. 2 (c). Although FIG. 2 illustrates the case where the number of the contact elements 1 is four (1a to 1d), it can be increased or decreased according to the number of pads of the electronic device under test. The p ′ dimension will be described later.

  Here, in the case where a plurality of installation intervals of the vertical probes 2 are formed in one contact 1 in accordance with the pad pitch arrangement of the electronic device under test, the pad pitch of the electronic device under test is extremely miniaturized. Therefore, the interval between the vertical probes 2 becomes extremely narrow, and a space for providing the U-shaped elastic deformation portion 4 (curved portion) cannot be obtained. Therefore, in the present invention, a plurality of contacts 1 each having a vertical probe 2 having a large elastic deformation portion 4 are overlapped with respect to the X axis of the pad pitch array of the electronic device under test arranged on the XY orthogonal coordinates. A contactor assembly is formed that can be disposed at a predetermined angle without interfering with each other. Since the contact assembly has a structure in which the vertical probe 2 and the ribbon-shaped resin film 3 are bonded and integrated, the vertical probe 2 that is a conductor and the ribbon-shaped resin film that is an insulator even when they are stacked. As a result, the insulating properties are maintained as a whole.

  FIG. 3 is a plan view showing an arrangement state of the contact 1 when a contact assembly is configured by arranging a plurality of contacts 1 in an overlapping manner. Since a plurality of contacts 1 are arranged, as a matter of course, a plurality of input unit terminals 5 and output unit terminals 6 are also arranged. The input unit terminal 5 and the output unit terminal 6 are arranged in the X-axis direction and the Y-axis direction on XY orthogonal coordinates, respectively, and the input unit terminal 5 and the output unit terminal 6 are pitched in both the X-axis direction and the Y-axis direction. It arrange | positions so that it may become p.

  This XY rectangular coordinate system corresponds to an XY rectangular coordinate system in which axes are respectively set in the row and column directions of a plane lattice in which a plurality of pads 10 or pads 11 of an inspection circuit in the electronic device under test are arranged in a lattice pattern. Further, the pitches p in the X direction and the Y direction on the XY orthogonal coordinates are in contact with each other so as to correspond to the pitch of a plane grid in which a plurality of pads 10 or test circuit pads 11 in the electronic device under test are arranged in a grid pattern. The child 1 is placed.

In FIG. 3, the angle θ represents an angle formed by a straight line in the longitudinal direction of the contact 1 having a ribbon-like structure with the X axis of the XY orthogonal coordinate system. This
L> p
By overlapping a plurality of contacts 1 having the above relationship, the terminals of the vertical probe 2 can be arranged on a straight line having an angle θ with respect to the X axis. As shown in FIG. 1, when the thickness θ of the contact 1 (the total thickness of the vertical probe 2 and the ribbon-like resin film 3) is t and the pitch of the pads of the electronic device under test is p, the angle θ is The angle θ is
sin θ = t / p
It can be obtained from the relationship.

Now, as shown in FIG. 3, assuming that 4 × 4 = 16 pads are arranged at a pitch p in a grid pattern in the XY direction for one electronic device under test, the pad 1 in the first row Four contacts 1 are arranged by shifting the arrangement of the vertical probe 2 by p ′ so that the input terminal 5 of the vertical probe 2 is in contact with each of -1, 1-2, 1-3, and 1-4. (1a-1d) It laminates | stacks and the contactor assembly 9a is comprised. Where p ′ is
p ′ = t / tan θ
Given in.

  Similarly, a contactor assembly 9b that contacts the pads 2-1, 2-2, 2-3, 2-4 in the second row is formed, and then the pads 3-1, 3-2, 3 in the third row are formed. -3, 3-4, and contact assembly 9c that contacts the pads 4-1, 4-2, 4-3, and 4-4 in the fourth row. . The contactor assemblies 9a to 9d are integrated to form the contactor assembly 9. As a result, a contactor assembly that contacts all of the 16 pads arranged in a grid at the same time is configured. When the contactor assembly 9 is constituted by the contactor 1 having two vertical probes 2 as shown in FIG. 1, the contactor assembly is simultaneously applied to all pads for two electronic devices under test at the same time. Measurement can be performed in a state in which a solid is in contact.

  Next, an assembly structure when a plurality of contactor assemblies are assembled and held will be described with reference to FIG. In the present embodiment, an example will be described in which four contactors 1 each having two vertical probes 2 formed on one ribbon-like resin film 3 are laminated. FIG. 4 is a perspective view when the contactor assembly 9 is configured by integrating contactor assemblies 9a to 9d configured by stacking four contactors 1 (1a to 1d). In FIG. 4, only four ribbon-shaped resin films 3 constituting the contactor assembly 9a are shown, and 12 sheets constituting the contactor assemblies 9b to 9d are omitted.

  In FIG. 4, through-holes 8 having the same diameter are opened in the same position in all 16 ribbon-like resin films 3. In the present embodiment, the through-holes 8 are opened at three locations near both ends and the center of the ribbon-like resin film 3, and by inserting the positioning rods 12 when assembling the contactor assembly 9, The vertical probe 2 is positioned, and at the same time, the 16 contacts 1 are fixed. The fitting between the through-hole 8 and the positioning rod 12 is preferably a static degree. At this time, if one end of the positioning rod 12 is sharpened in a conical shape, it can be easily inserted.

  Thus, the contactor assembly 9 has 16 input terminal terminals 5 projecting upward and 16 output terminal terminals 6 projecting downward, and the input terminal terminals 5 are covered. The output terminal 6 is in contact with the pad of the test circuit. The input unit terminal 5 and the output unit terminal 6 are arranged such that 16 terminals are arranged in a grid pattern and rotated by an angle θ with respect to the XY coordinates in the grid pattern.

  Next, a holding structure for holding the contactor assembly described in FIG. 4 will be described with reference to FIGS. 5 and 6. FIG. 5 is a plan view showing the holding structure, and FIG. 6 is a perspective view thereof. 5 and 6 also show a connector structure for connecting to the inspection circuit.

  As shown in FIGS. 5 and 6, the holding structure for holding the contactor assembly 9 is composed of a plate-like guide block 13 made of an electrically insulating material such as resin, ceramic, quartz, etc., and the guide block 13 is in a ribbon shape. It has the same thickness as the width dimension (W) of the resin film 3 and has a frame structure including a rectangular opening 15 having an opening area with a width and a length in which the contactor assembly 9 just fits. Further, the frame portion is formed with a groove 16 into which the tip of the positioning rod 12 used when assembling the contactor assembly 9 is fitted, and the groove 16 is provided at both side symmetrical positions along the longitudinal direction of the opening 15. Yes.

  The depth of the groove 16 is set so that the surface positions of the contact assembly 9 and the guide block 13 match when the contact assembly 9 is inserted into the guide block 13. As a result, the input terminal 5 and the output terminal 6 protrude from the surface position of the guide block 13. Thus, the positioning accuracy of the contactor assembly 9 is improved and the assembling work is simplified. Further, since the contact assembly 9 is restrained from being stretched vertically and horizontally by the guide block 13, even when the arrangement of the pads of the electronic device under test is miniaturized, the probing can be performed accurately, and particularly excellent in thermal expansion. can get.

  Further, the guide block 13 is provided with overhang portions 14 and 17 extending on both sides of a portion where the input portion terminal 5 and the output portion terminal 6 are arranged when the contact assembly 9 is fitted. The overhanging portion 14 functions to insulate and cover the circuit wiring of the connector portion or to reinforce the inspection circuit board as will be described later.

  As can be seen from FIG. 6, the contactor assembly 9 housed in the guide block 13 includes a pad 10 (16 in this case) having a plurality of input portion terminals 5 provided on the back side of the electronic device under test 18. Contact at the same time. At this time, the electronic device under test 18 is arranged to be inclined by an angle θ with respect to the XY direction of the guide block 13 as described above. This arrangement is brought about by unillustrated conveying means, positioning means, pressing means, etc. FIG. 6 shows a state in which two electronic devices 18 to be tested are supplied simultaneously.

  On the other hand, the plurality of output portion terminals 6 of the contactor assembly 9 protrude from the lower surface side of the guide block 13 and simultaneously contact the wiring pads 11 (see FIG. 7) of the circuit wiring 21 of the inspection circuit board 19. The inspection circuit board 19 is composed of a printed wiring board, a flexible wiring board, or the like, and a plurality of pieces are overlapped as necessary, and the overhanging portion 23 is inserted into the connector socket 22, thereby being electrically connected to the circuit inspection device. The

  FIG. 7 is a perspective view showing an example of an inspection circuit board. The inspection circuit board 19 has circuit wiring 21 formed by patterning a copper foil on a flexible film such as polyimide, and includes an overhang portion 23 for connecting a connector socket. The circuit wiring 21 is formed corresponding to each of the output terminal 6, and in FIG. 7, the three output terminal 6 are in contact with the three circuit wirings 21.

  Further, as shown in FIG. 7, a through hole 24 is formed in the inspection circuit board 19. In the case where one inspection circuit board cannot be accommodated in the through hole 24, for example, when two inspection circuit boards 19 and 20 are required as shown in FIG. Is brought into contact with the circuit wiring 21 of the lower inspection circuit board 20 through the through-hole 24. In FIG. 7, the inspection circuit board 19 is provided with three through holes 24 in one partition unit. However, the number may be increased or decreased as necessary, and the inspection circuit board 20 is provided with a through hole to provide three inspection circuits. It may be a substrate.

  When the inspection circuit boards 19 and 20 are stacked, if the overlapped board thickness is within the height of the output terminal 6, the tip of the output terminal 6 protrudes from the stacked inspection circuit board through the through hole. There is no problem in contact with 21. The contact pressure of the output terminal 6 varies somewhat depending on the upper and lower sides of the inspection circuit board. However, since the length of the deformed portion of the vertical probe is large, it can be kept within the range of variation.

(Modification of Embodiment 1)
The purpose of the modified example of the first embodiment is to use a programmable electronic component (a signal configuration circuit described later or a CPLD (Complex Programmable Logic Device), FPGA, or the like, which is arranged in a lattice shape, using the substantially same structure as the first embodiment. ) Is used to make electrical connection to the pads of the chips arranged on the wafer using the structure of the first embodiment, for example, a general-purpose commercially available external tester or a computer with a memory (described in the third embodiment). And the pad of the wafer chip can be electrically connected with a few wirings.

  The structure of the modified example of the first embodiment is that the connection to the narrow pitch wiring such as the input / output terminals from the CPLD or FPGA arranged in a grid pattern is narrower than the input / output terminals of the CPLD or FPGA in the conventional PCB substrate. In order to reach the wiring with the pitch, the through-holes vacated in the PCB substrate are large, and there is a problem that high-density mounting cannot be performed as compared with the modified example of the first embodiment. In addition, there is a drawback that application of a ceramic substrate or the like that enables other high-density mounting without using PCB is also expensive.

  In the first embodiment and the modified example of the first embodiment, the inspection circuit board is made of a flexible film and can have a thickness of 20 to 30 microns, and the wiring thickness can be achieved with a similar thickness. Further, the thickness of the anisotropic polymer 53 is about 0.2 mm, and the vertical probe 2 for always ensuring the contact force at the contact point is also about 0.6 mm in the thickness direction. Therefore, the input / output terminals of CPLD and FPGA The distance from the test circuit board to the inspection circuit board can be reduced, and high-density mounting becomes possible.

  A modification of the first embodiment will be described with reference to the drawings. FIG. 8 is a perspective view for explaining the configuration and function of the contactor assembly holding mechanism used in the modification of the first embodiment. The configuration of the contactor assembly holding mechanism shown in FIG. 8 is substantially the same as that of the first embodiment. A different configuration from the first embodiment is that circuit wiring 21 </ b> A is additionally arranged on the inspection circuit board 19 and inspection circuit board 20 in addition to the circuit wiring 21. Further, instead of the electronic device under test 18 (shown in FIG. 6), a programmable electronic device 18-1 such as CPLD or FPGA having a structure substantially similar to the electronic device under test 18 is replaced. It is.

  FIG. 9 is a perspective view of an inspection circuit board for connecting the contact assembly used in the first to first embodiments to an external tester or a computer with a memory. In FIG. 9, the shape of the inspection circuit board 19 is different from that of the first embodiment, and a circuit wiring 21 </ b> A is additionally arranged in addition to the circuit wiring 21. 8 and 9, circuit wirings 21 and 21A are electrically connected to terminals of the programmable electronic device 18-1. Further, the circuit wirings 21 and 21A are connected to a signal that can be transmitted / received from a host inspection circuit or a computer with a memory and a power supply line, and can drive the programmable electronic device 18-1.

  The circuit wirings 21 and 21A are input / output communication signal circuits of the programmable electronic device 18-1. For example, the circuit wiring of the chip can be inspected by being connected to the pads of the chips arranged on the wafer.

(Embodiment 2)
Embodiment 2 of the present invention will be described with reference to the drawings. The second embodiment has a structure that does not require the rod 12 for laminating the contact 1 in the first embodiment. That is, the lamination of the ribbon-like resin films is formed by joining the ribbon-like resin films adjacent to each other with an adhesive. And the space | interval (gap) which a ribbon-shaped resin film laminate | stacks is ensured by the thickness of the adhesive agent with which it filled partially.

  The configuration and function of the second embodiment will be described with reference to FIGS. FIG. 10 is an overall side view of the second embodiment. Reference numeral 51 denotes a holder for fixing an electronic component 52 in which electric output terminals such as CSP (Chip Size Package) and BGA (Ball Grid Array) are arranged in a grid. The electronic component 52 corresponds to the device under test 18 in the first embodiment. 11 is an exploded perspective view of FIG. In FIG. 11, the electronic component 52 is fixedly disposed in the hole 51-1 of the holder 51. An anisotropic polymer 53 is disposed below the electronic component 52, and a contactor assembly is disposed below the anisotropic polymer 53.

  FIG. 12 is a bottom perspective view showing the arrangement of the electrical output terminals 52-1 of the electronic component 52. FIG. 13 is a perspective view showing an example of an anisotropic polymer. This anisotropic polymer 53 is made of a material in which a large number of fine wire-like conductive materials are embedded in the main body 53-2 made of a rectangular non-conductive material across the front and back, and is in general contact when an electrical output terminal contacts one of them. Electricity is applied to the opposite side from the place where it was When the input terminal of the probe is in direct contact with the electrical output terminal 52-1 of the electronic component 52, slip occurs when the shape of the contact portion of the electrical output terminal 52-1 is spherical, and therefore an anisotropic polymer 53 is interposed. The material of the anisotropic polymer 53 corresponds to that sold by Shin-Etsu Chemical Co., Ltd.

  FIG. 14 is a perspective view of a probe assembly 70 assembled by joining the resinous film 71 and the probe 72 in the second embodiment. FIG. 15 is a perspective view showing a state in which a plurality of probe assemblies 70 shown in FIG. 14 are arranged in the plane direction. In FIG. 15, reference numeral 80 denotes a bonding material made of a polymer organic material such as an adhesive. Adjacent probe assemblies 70 are fixed to the required probe assembly 70 via a bonding material 80. Therefore, the electrical output terminal 52-1 of the electronic component 52 is connected to the input terminal of the probe 72 through the anisotropic polymer 53. Electrical connection with external wiring or the like is the same as in the first embodiment.

  According to the second embodiment, a contact assembly that does not require a bar penetrating between the resinous films 71 is obtained.

(Embodiment 3)
Next, a third embodiment of the present invention will be described. Conventionally, using an inspection device such as a commercially available external tester that is located away from the probe card, the electrical contacts are brought into contact with the electrodes of many chips arranged on the wafer and simultaneously contacted with the wafer chip terminals. It was difficult to contact the child and conduct the test circuit. The reason is that the probe card has a multi-layered board, and there is a space limitation in accommodating many wirings. Also, commercially available external testers were very expensive. The third embodiment pays attention to such a situation, and its purpose is to solve the problem of requiring a large wiring space by a relatively inexpensive personal computer and a computer with a memory.

  In addition, after a signal from an external tester is transmitted and received by a programmable system including CPLD or FPGA in the board, communication with the signal configuration circuit 78 is enabled, and the wiring board is a multi-layered board, which is the problem. The purpose is to solve the problem of placement.

  In order to achieve the above object, particularly when a programmable electronic device having a rectangular outer periphery terminal is used as a signal configuration circuit, since these programmable electronic devices are larger than the chip on the wafer, The programmable electronic device is characterized in that a special consideration or contrivance is made for the arrangement angle of the programmable electronic device and the wafer without arranging the programmable electronic device on the same plane.

  FIG. 16 is a block diagram showing a configuration example of a system of the electrical function testing device according to Embodiment 3 of the present invention. This system for an electrical function inspection apparatus has a computer with a memory on a wiring board so that a large number of wirings are not necessary and the inspection process can be speeded up. In FIG. 16, reference numeral 120 denotes a general-purpose computer such as a personal computer. Reference numeral 74 denotes a probe card with a circuit, which is indicated by a two-dot chain line in FIG. The circuit-equipped probe card 74 includes a communication interface 121 connected to the general-purpose computer 120, a computer 122 with memory connected to the communication interface 121, and a signal configuration circuit 78 connected to the computer 122 with memory.

  The signal configuration circuit 78 is applied to the electronic device under test 18 having a relatively small number of input / output terminals shown in FIG. 6 and the programmable electronic device 18-1 having a relatively large number of input / output terminals shown in FIG. Equivalent to. A plurality of signal configuration circuits 78 are provided and can be activated in response to tests having different purposes. Reference numeral 73 denotes a wafer chip terminal. The probe 100 is disposed between the signal component circuit 78 of the probe card with circuit 74 and the wafer chip terminal 73, and both members are electrically connected. Inspection information for each individual wafer is sent from the general-purpose computer 120 to the communication interface 121. The inspection information is transmitted to the computer with memory 122 through the communication interface 121, and the test contents and results are transmitted to and received from the computer with memory 122 and the signal configuration circuit 78. The signal configuration circuit 78 generates an inspection signal corresponding to the wafer chip terminal 73 and transmits / receives a necessary signal to / from the wafer chip terminal 73 at the time of inspection. The signal configuration circuit 78 also receives the inspection result information from the wafer chip terminal 73 and sends it to the computer 122 with memory. The computer with memory 122 exchanges information with the general-purpose computer 120 via the communication interface 121.

  The signal configuration circuit 78 corresponds to a plurality of signal configuration circuits 78 for each side of the electrode (pad) arranged in a rectangular shape of the wafer chip terminal 73. For example, when 200 electrodes are staggered on one side of the wafer chip terminal 73, two signal configuration circuits 78 correspond to each other. In this case, 100 wires from the terminals of one signal component circuit 78 are connected to the odd-numbered electrodes of the wafer chip terminal 73, and 100 wires are connected from the terminals of the other signal component circuit 78. Are connected to the even-numbered electrodes of the wafer chip terminal 73. Accordingly, in the case of corresponding to the four sides of the rectangular array, the eight signal configuration circuits 78 correspond to 800 electrodes of one wafer chip terminal 73. The present invention is not limited to the wafer chip terminals 73 that are specially arranged in a rectangular shape, but also when one signal configuration circuit 78 corresponds to the wafer chip terminals 73 that are arranged in a straight line. Applicable.

  FIG. 17 is a block diagram showing a modified example of the system of the electrical function testing device according to Embodiment 3 of the present invention. The system of this electrical function testing apparatus is designed to handle a high-speed inspection process by eliminating the need for a large number of wires by exchanging signals with an external tester outside the substrate. 17, the signal configuration circuit 78, the wafer chip terminal 73, and the probe 100 of the probe card 74 have the same configuration and operation as those shown in FIG. 75 is a programmable system and 76 is an external tester. The external tester 76 is a commercially available LSI tester and is connected to several hundreds or more of multiple signal lines 79, and includes signals that enable chip inspection on one or more wafers. However, in order to perform simultaneous batch inspection on chips on a plurality of wafers, connecting to terminals on the wafer is limited by the space of the probe card 74 with a circuit. Testing is considered difficult.

  The programmable system 75 has a CPLD or FPGA as a main device, has a serial / parallel conversion function, a boundary scan function, or the like, and can perform signal processing as a multi-functional system. In addition, since it is programmable, when the contents of inspection processing are set or changed for the first time, processing is performed according to a command from the general-purpose computer 120, and the contents can be processed in a short time. Therefore, the signal from the external tester 76 can be processed by the programmable system 75 so that the number can be wired in the wiring space of the probe card 74 with circuit, and the signal can be transmitted to and received from the signal component circuit 78.

  Next, a third embodiment of the present invention will be described in detail with reference to the drawings. FIG. 18 is a perspective view schematically showing the overall configuration of the LSI chip inspection apparatus 1000 according to the third embodiment. The LSI chip inspection apparatus 1000 performs a high-speed inspection by bringing a plurality of probes into contact with a plurality of pads arranged in a memory-related line, for example.

  In FIG. 18, 709-1 is an X direction positioning member, and 710-1 is a Y direction positioning member. The X direction positioning member 709-1 and the Y direction positioning member 710-1 in Embodiment 3 have substantially the same shape and function. However, the X-direction positioning member 709-1 has a slit-shaped first engagement groove 711 formed to open downward as shown in FIGS. 18 and 19. Further, the Y-direction positioning member 710-1 has a slit-like second engagement groove 712 formed so as to open upward as shown in FIG. 19. As a result, a plurality of X-direction positioning members 709-1 are arranged from above and Y-direction positioning members 710-1 are arranged from below, so that the first engagement grooves 711 and the second engagement grooves 712 are aligned. When assembled, a lattice-like positioning structure is formed as a whole. The X-direction positioning member 709-1 and the Y-direction positioning member 710-1 function as means for achieving accurate and strong positioning with each other.

  A plurality of probes 603-1 are arranged in the Y direction on the upper side of the X direction positioning member 709-1 and the Y direction positioning member 710-1 assembled as described above in a state of being connected by a ribbon-like film. The probes 603-1 are arranged in a stacked manner at a predetermined interval by arranging a plurality of ribbon-like films connecting the probes 603-1 in the thickness direction (X direction). Actually, as described in relation to the first and second embodiments, the ground line pattern 604-1 and the electric conduction portion 606-3 are etched and plated based on the lithography technique on the film 605-1 which is a film-like insulating film. It is formed and arranged in a processing means such as. Reference numeral 110 denotes a one-axis test circuit. 120 is a general-purpose computer, 121 is a communication interface, 122 is a computer with a memory, 123 is a wiring board, and 124 is wiring on the wiring board.

  FIG. 19 is an enlarged perspective view showing the main part of the LSI chip inspection apparatus 1000 shown in FIG. In FIG. 19, reference numeral 110 denotes a single-axis test circuit, which corresponds to the signal configuration circuit 78 shown in FIG. Two sets of the one-axis test circuit 110 are firmly attached to the side surface of the X-direction positioning member 709-1. FIG. 20 is a front view of the single-axis test circuit 110. The uniaxial test circuit includes a flexible film 111, a signal configuration circuit 112, a connection wiring 113, and an input / output line 114. A cutout 115 is formed in a portion of the flexible film 111 adjacent to the terminal of the connection wiring 113. The notch 115 formed in the uniaxial test circuit 110 is for avoiding interference between the uniaxial test circuit 110 and the Y-direction positioning member 710-1.

  The flexible film 111 is made of the same material as that of the ribbon-like film 707 in the eighth embodiment, and the connection wiring 113 plays a role of electrical connection with the probe substantially the same as the copper wiring 772. The signal configuration circuit 112 sends the inspection information from the general-purpose computer 120 described with reference to FIG. Since the signal configuration circuit 112 can secure a necessary space in the vertical direction on the paper surface, it can be arranged so that one inspection circuit can exist for each chip. In FIG. 20, the connection wiring 113 is shown to be connected to the pad 602 on the chip from the two signal configuration circuits 112, but in practice, one of the many signal configuration circuits 112 is substantially connected to one through the connection wiring 113. Connected to pads 602 on the chip.

  FIG. 21 is a view seen from the direction of arrow Y in FIG. FIG. 22 is a view seen from the direction of arrow X in FIG. 19 and 21, the fixing pin 109 is press-fitted into the hole 791-1 formed in the X-direction positioning member 709-1, and the flange of the fixing pin 109 and one end of the convex portion of the X-direction positioning member 709-1. A round bar 109 is held and fixed. In this embodiment, the round bar 109 is arranged from one linear direction (in this case, only from the X direction). In the embodiment described later, the arrangement is from the X and Y directions. In FIG. 22, the connection wiring 113 slightly protrudes from the flexible film 111 and is in contact with the output deformation portion 610-1, thereby achieving electrical connection. The notch 115 formed in the uniaxial test circuit 110 is for avoiding interference between the uniaxial test circuit 110 and the X-direction positioning member 709-1.

  In the third embodiment, the wiring board 123 and the signal configuration circuit 112 forming the signal configuration circuit 78 are on different planes, and are arranged orthogonal to the flexible film 111 to which the signal configuration circuit 112 is attached. For this reason, the planar size of the electronic device 111 and the number of the electronic devices 111 can be accommodated by increasing the height of the flexible film 111 in the orthogonal direction of the wiring substrate 123.

(Embodiment 4)
A fourth embodiment will be described with reference to the drawings. The fourth embodiment is effective when more contacts than the third embodiment are associated with the wafer chip terminals. The system configuration is the same as the block diagram shown in FIG. However, the fourth embodiment is effective in the case of an electronic device in which output terminals such as CPLD and FPGA are arranged in a lattice shape in the signal configuration circuit due to an increase in the number of wafer chip terminals.

  FIG. 23 shows a perspective view of the configuration of the fourth embodiment. In FIG. 23, 120 is a general-purpose computer, 121 is a communication interface, 122 is a computer with memory, 123 is a wiring board, and 124 is wiring on the wiring board. Reference numeral 800 denotes a contactor assembly, which has a configuration similar to that of the contactor assembly in the first or second embodiment. 709-1 is the same X-direction positioning member as described in the third embodiment, and 710-1 is the same Y-direction positioning member as described in the third embodiment. The X direction positioning member 709-1 and the Y direction positioning member 710-1 have substantially the same shape and function. Reference numeral 77 denotes a wafer chip terminal, and the probe acts so as to maintain a contact force in contact with the wafer chip terminal 77.

  Reference numeral 77-1 denotes a chip having a large number of wafer chip terminals 77. 77-2 is a wafer for holding a large number of chips 77-1, and a plurality of chips 77-1 are provided as a part of the wafer 77-2. In FIG. 23, the chip 77-1 is disposed on the lower surface of the wafer 77-2.

  The process of connecting the memory-equipped computer 122 to the signal configuration circuit 112 is the same as in the third embodiment.

  In FIG. 23, the surface A of the wafer 77-2 and the surface B of the wiring board 123 are parallel. The plane C of the programmable device in the signal configuration circuit 112 and the plane A on the wafer are perpendicular.

  As described above, according to the fourth embodiment, inspection signals can be exchanged directly from the inspection circuit to all the pads of all the chips arranged on the wafer in correspondence between the chip 1 and the inspection circuit 1. A high-speed wafer inspection system can be constructed at once. In the third embodiment, the object is achieved by the electrical connecting means of the first and second embodiments.

(Embodiment 5)
From the viewpoint of effective use of equipment, it is economical to use the computer and electronic circuit portions for general purposes and to perform wafer inspection by replacing only the probe assembly when a new chip pad arrangement is obtained. The object is achieved by using the coordinate conversion circuit of the fifth embodiment and the programmable electronic device in combination.

  Specifically, the fifth embodiment provides a method for replacing the probe 603-1 or the like with an LSI chip having a different size and position and a different pad arrangement without changing the wiring board 123 and the signal configuration circuit 78. To do.

  In the fifth embodiment, the structure (signal configuration circuit 78) of FIG. 8 relating to the modified example of the first embodiment is arranged in parallel, and the circuit wiring 21 is passed through the coordinate conversion circuit shown in FIG. Achieved by connecting to the -1 contact. The circuit wiring that is the input / output of one programmable electronic device 18-1 is programmable even if connected to the pad terminals of a plurality of different chips, so that the inspection purpose can be achieved.

  Also, without arranging the uniaxial test circuit 110, which is substantially the same as the uniaxial test circuit 110, in an orthogonal state, a plurality of uniaxial test circuits 110 are arranged in parallel, and pads such as ASICs can correspond to rectangular array chips. And provide a simplified method of equipment

  A fifth embodiment will be described with reference to the drawings. The fifth embodiment is effective when a contact is made to correspond to a high-density wafer chip terminal as in the third or fourth embodiment. FIG. 24 is a front view schematically showing a system configuration of the LSI chip inspection apparatus 1000 according to the fifth embodiment. In FIG. 24, reference numeral 110 denotes a single-axis test circuit, which is formed by attaching a signal configuration circuit 112 (or signal configuration circuit 78) to a flexible film 111. For the signal configuration circuit 112, CPLD, FPGA, or the like is used. The internal structure has the structure of a modification of the first embodiment.

  Reference numeral 125 denotes a probe assembly as a circuit to be inspected. As shown in FIG. 22, the probe assembly 125 includes a probe 603-1, a connection wiring 113, a flexible film 111, and the like. .., L1 and a2, b2,... L2 in FIG. 26 and the converted probe 603-1 can be energized by connecting the wiring to the connection wiring 113 and the terminals a1, b1,.

  Reference numeral 126 denotes a coordinate conversion circuit. For intermediary connection between a terminal of the circuit to be inspected 125 (chip terminal 77 and the like) and a terminal of the uniaxial test circuit 110 (terminal of the vertical probe), and for correcting or changing a positional deviation between the two terminals Perform coordinate transformation. Reference numeral 123 denotes a wiring board, which is the same as described in the third and fourth embodiments. In FIG. 24, the probe assembly 125 and the coordinate conversion circuit 126 are unitized and can be attached to and detached from the probe card 74 with circuit.

  FIG. 25 is a block diagram showing a circuit configuration of a system of the LSI chip inspection apparatus 1000 according to the fifth embodiment of the present invention. In this embodiment, the circuit configuration of the system is basically the same as that shown in the block diagram of FIG. 16, but the coordinate conversion circuit 126 is arranged between the probe card with circuit 74 and the wafer chip terminal 73. Is different.

  The operation of the LSI chip inspection apparatus 1000 according to the fifth embodiment having the above configuration will be described below. When a wafer chip is selected as the circuit to be inspected, the arrangement structure of the wafer chip terminals 73 may differ from the arrangement structure of the terminals on the LSI chip inspection apparatus 1000 side (the signal configuration circuit 78, ie, the signal configuration circuit 112 side). . In this case, when the circuit inspection of the wafer chip is performed, in the present embodiment, the coordinate conversion between the wafer chip and the probe card 74 is performed by the operation of the coordinate conversion circuit 126, and the terminal is placed on the rectangular outer periphery of the wafer chip terminal 73. The arrangement structure of the terminals of the signal configuration circuit 78 is made electrically conductive through the coordinate conversion circuit 126.

  26 and 27 are schematic diagrams for explaining an example of the coordinate conversion operation by the coordinate conversion circuit 126. FIG. In these drawings, FIG. 26 is a schematic diagram showing an arrangement structure (terminal position) of wafer chip terminals 73 in a specific wafer chip and a coordinate conversion process for a predetermined wafer chip terminal 73. FIG. It is a schematic diagram which shows the arrangement | positioning position of the chip terminal 73, and the arrival position of the signal of the coordinate transformation circuit after a coordinate transformation process.

  In FIG. 26, black dots (hereinafter “●”) are wafer chip terminal positions in the wafer chip, and are referred to as wafer chip terminal positions (a 1, b 1, c 1,...). The point indicated by ● is also the target point to which the signal after coordinate conversion arrives. The positions of these wafer chip terminals as A group (a1), (b1), (c1), (d1), (e1), (f1), (g1), (h1), (i1), (j1 ), (K1), (l1) and (a2), (b2), (c2), (d2), (e2), (f2), (g2), (h2), (i2), (J2), (k2), and (l2). The A group corresponds to the chip A, and the B group corresponds to the chip B. The interval between the A group and the B group in the X direction is the Smm interval. The Y direction arrangement is omitted. The arrangement of the signals of the A group and the B group is identical or almost identical.

  Similarly, in FIG. 26, a plan view of the circuit wiring 21 that is an output from the signal configuration circuit 78 is represented as position coordinates, and ◯ is referred to as a signal configuration circuit wiring position (X1, X2, X3,...). To do. The point indicated by ◯ indicates the starting point of the signal to be coordinate-transformed. As the α group, (X1), (X2), (X3), (X4) (X5), (X6), (X7), (X8), (X9), (X10), (X11), (X12), β groups (Y1), (Y2), (Y3), (Y4) (Y5), (Y6), (Y7), (Y8), (Y9), (Y10), (Y11), (Y12), They are arranged at intervals of Pmm in the X and Y directions, respectively. The Y direction arrangement is omitted. The α group, β group, and γ group are signal configuration circuit wiring positions output from a plurality of CPLDs having the same X coordinate or Y coordinate. Since the α group in FIG. 26 is composed of four rows of circles, it indicates that the α group is composed of four programmable electronic devices 18-1.

  There are Z1, Z2, Z6, Z11,. It is assumed that the arrangements of the signals of the α group, the β group, and the γ group are identical or almost identical.

  The A and B groups and the α, β, and γ groups do not exist from the beginning with respect to the special arrangement, but by the arrangement of the circuit wiring 21 that is the output from the signal arrangement circuit 78 and the terminal arrangement of the chips on the wafer. To decide.

  (X1, X2,... X5,... Y1, Y2,... Y5,... Z1, Z2,...) Are arranged on the inspection circuit board 19 or the inspection circuit board 20. (X6, X7,... X10,... Y6, Y7,... Y10...) Are arranged on the inspection circuit board 19 or the inspection circuit board 20.

  The relationship as shown in FIG. 26 schematically representing the position of the circuit wiring 21 and the wafer chip terminal is based on the probe assembly 125 corresponding to the chip terminal on the wafer, the standard one-axis test circuit 110, and the wiring board 123. It is a relational position that usually appears when configuring a chip inspection apparatus. When in such a relational position of ○ and ●, from the circuit signal line 21, ● in the X1 → a1, X2 → b1, X4 → c1,... X16 → i1. This indicates that coordinate conversion has been performed by one programmable electronic device 18-1, since the signal line of ◯ from the group of is not wired.

  X5 → a2, Y4 → b2, ..Z1 → d2 (wired across). X20 → I2 When wired across three groups in this way, it is obtained from three of the programmable electronic devices 18-1. Wiring is performed so that chips on the wafer in the second group are inspected by the received signal.

(Explanation of possibility by programmable electronic device 18-1)
From the above, it is possible to assign and wire the circuit wiring 21 of the programmable electronic device 18-1 to the chip terminal on the wafer. The condition in this case is that the number of ○ is naturally larger than the number of ●. In a specific design, it may be necessary to devise multilayer wiring to avoid contact of wiring intersections.

  Note that the coordinate conversion destination for each wafer chip does not have to be as shown in FIG. 26, and this is only one example of converting the wafer chip arrangement structure into a rectangular array. After the coordinate of the position of the wafer chip is converted, it is recognized as a rectangular arrangement structure as shown in FIG. 27 and an electrical function test or inspection is performed.

  In the third embodiment described above, when the signal configuration circuit 112 having terminals on the rectangular outer periphery is used as the signal configuration circuit 78, these signal configuration circuits 112 are connected to the chip 77-1 on the wafer 77-2. In consideration of the fact that the computer 122 with memory and the signal component circuit 112 are not arranged on the same plane, special consideration or contrivance is given to the arrangement angle of the signal component circuit 112 and the wafer 77-2. However, in the fifth embodiment, since the coordinate conversion is performed by the coordinate conversion circuit 126, it is not necessary to give special consideration or contrivance to the arrangement angle between the signal configuration circuit 112 and the wafer 77-2, and a simple configuration is adopted. be able to.

(Embodiment 6)
In the above description of the first to fifth embodiments, a chip (LSI) as a circuit to be inspected is placed on a wafer in semiconductor manufacturing, and a plurality of chips are inspected collectively. Has been described as a characteristic embodiment of the present invention. However, there are other methods for inspecting a plurality of chips at once. For example, the chips are individually cut out from the wafer, or a plurality of chips are cut out as a unit, and the cut out chips are subjected to some receiving plate (tray). Alternatively, it is possible to perform batch inspection of chips by arranging them on a test board and inspecting a plurality of chips at once.

  FIG. 28 shows a sixth embodiment of the present invention in which a plurality of chips as described above are arranged on a test board and the LSI chip inspection apparatus 1000 described above is applied to the plurality of chips. It is a perspective view which shows the chip | tip holding structure which enabled it to collectively inspect. In FIG. 6, the current test method in which a plurality of chips to be tested are inserted into chip sockets arrayed on a test board, wiring from a chip tester is connected to the test board, and the inserted chips to be tested are sequentially measured. If the socket terminal pins arranged on the test board are replaced with the terminals on the output side of the probe assembly, the inspection method is similar, that is, the socket pin terminal into which the chip to be tested is inserted is connected to the CPDL. It is possible to measure a plurality of chips under test on a test board simultaneously in parallel by controlling the circuit network with a personal computer, a workstation or the like. By inputting a test program including a test pattern and a control program that defines the measurement procedure to a personal computer etc., the expensive chip tester is replaced by a personal computer, etc., and the inspection time of the chip under test by simultaneous parallel inspection is eliminated. Therefore, a significant cost reduction effect can be obtained even in the current packaged chip test. In addition, the current chip tester is managed by inputting test information including test patterns to a personal computer, workstation, etc. using the current chip tester, and simultaneously inspecting the chip under test by this personal computer, workstation, etc. Inspection costs can be reduced while using them as resources.

  Even in the collective inspection of a plurality of chips arranged on such a test board, the coordinate conversion processing operation using the coordinate conversion circuit in the fifth embodiment is possible. Therefore, even if chips are irregularly arranged on the test board, the electrical function inspection can be performed by recognizing that the chips are regularly arranged by coordinate transformation (for example, a rectangular array). Further, even if the terminal position of the chip is changed because the chip size is further reduced in the future (the integration density becomes higher) by having the coordinate conversion circuit, the specifications on the LSI chip inspection apparatus 1000 side are as follows. This can be dealt with by performing the coordinate conversion process as it is.

  As described above, as various embodiments of the present invention have been described, the object to be measured is not limited to a package structure, and a plurality of chips formed on a semiconductor wafer or arranged on a test board. Probe inspection can be simultaneously performed on a plurality of chips. In addition, if a material with a small coefficient of thermal expansion is used for the contact assembly holding structure, it is possible to suppress the extension of the contact assembly against the finer pad pitch of the object to be measured during the burn-in test. Misalignment of the probe does not occur, and high-temperature characteristic inspection is possible.

  Furthermore, even if the wafer diameter is increased and the chip is further miniaturized, the contactor assembly holding structure of the present invention can be dealt with by expanding the arrangement in the XY directions.

  It is a figure explaining the contactor used for Embodiment 1 of this invention, The figure (a) is a front view, The figure (b) is a top view.   It is a front view which shows the contactor used for the said Embodiment 1, The figure (a), (b), (c), (d) has each shown four types of contactors used for one Embodiment. .   It is a fragmentary top view explaining the structure of the contactor assembly used for the said Embodiment 1, and its function.   It is a perspective view explaining the structure of the contactor assembly used for the said Embodiment 1. FIG.   It is a top view explaining the structure of the contactor assembly holding mechanism used for the said Embodiment 1, and its function.   It is a perspective view explaining the structure of the contactor assembly holding | maintenance mechanism used for the said Embodiment 1, and its function.   It is a perspective view of the test | inspection circuit board for connecting the contactor assembly used for the said Embodiment 1, and a circuit test | inspection apparatus.   It is a perspective view explaining the structure of the contactor assembly holding | maintenance mechanism used for the example of a change of the said Embodiment 1, and its function.   It is a perspective view of the test | inspection circuit board for connecting the contactor assembly and circuit test | inspection apparatus which are used for the modification of the said Embodiment 1. FIG.   It is a whole side view of the electronic component used in Embodiment 2 of this invention.   FIG. 11 is an exploded view of the electronic component shown in FIG. 10.   It is a figure which shows the arrangement | sequence of the electrical output terminal of the electronic component used in the said embodiment.   It is a perspective view which shows the anisotropic polymer used for the electronic component used in the said embodiment.   It is a perspective view of the probe assembly by which the resinous film and the probe in the said embodiment were joined and assembled.   FIG. 4 is a perspective view showing a state in which a plurality of adjacent probe assemblies are coupled and fixed via a bonding material in the embodiment.   It is a block diagram of the control system of the prober apparatus used for Embodiment 3 of this invention.   It is a block diagram which shows the system configuration | structure of the electrical function test | inspection apparatus as a modification of Embodiment 3 of this invention.   It is a perspective view showing the partial structure of the contactor assembly used in the said embodiment.   It is the perspective view which expanded further the principal part of the contactor assembly used in the said embodiment.   It is a front view of the test circuit for 1 axis tests performed in the embodiment.   It is the figure which looked at the contactor assembly used in the said embodiment from the arrow X direction in FIG.   It is the figure which looked at the contactor assembly used in the said embodiment from the arrow Y direction in FIG.   It is a perspective view which shows the whole structure of the test | inspection system by the contactor assembly which concerns on Embodiment 4 of this invention.   It is a front view which shows roughly the system configuration | structure of the electric signal inspection apparatus which concerns on Embodiment 5 of this invention.   It is a block diagram which shows the circuit structure of the system of the LSI chip test | inspection apparatus 1000 which concerns on Embodiment 5 of this invention.   In Embodiment 5 of this invention, as coordinate conversion operation | movement by a coordinate conversion circuit, it is a schematic diagram showing the coordinate conversion process with respect to the arrangement structure (terminal position) of the wafer chip terminal in a specific wafer chip, and a predetermined wafer chip terminal. .   FIG. 27 is a schematic diagram showing the arrangement of the wafer chip terminals shown in FIG. 26 and the arrival position of the signal of the coordinate conversion circuit after the coordinate conversion processing.   It is a perspective view which shows the chip holding | maintenance structure for chip | tip collective inspection applied to the LSI chip inspection apparatus 1000 concerning Embodiment 6 of this invention.   It is a front view which shows the conventional contactor assembly holding mechanism.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1, 1a-1d Contact 2 Vertical probe 3 Ribbon-shaped resin film 4 Elastic deformation part 5 Input part terminal 6 Output part terminal 7 Elongate hole 8 Through-hole 9, 9a-9d Contactor assembly 10 Electronic device pad 11 to be tested 11 Inspection circuit wiring pad 12 Positioning rod 13 Guide block 14 Overhanging portion 15 Opening portion 16 Groove 17 Overhanging portion 18 Electronic device under test 19, 20 Inspection circuit board 21 Circuit wiring 22 Connector socket 23 Overhanging portion 24 Through hole 25 Connecting post 26 Support post 27 Sheet-like Substrate 28 Guide Sheet 29 Inspection Circuit Board 30 Electronic Device Under Test 1000 LSI Chip Inspection Device

Claims (10)

In a contactor assembly that is installed between an electronic device under test and a circuit inspection device and is used for electrical conduction between the two devices,
A first terminal that contacts the pad of the electronic device under test; a second terminal that contacts the pad of the circuit inspection apparatus; and an elastically deformable portion between the first and second terminals. A contact made of a vertical probe, and a ribbon-like resin film in which the plurality of vertical probes are arranged at predetermined intervals in the longitudinal direction;
A plurality of the contactors are overlapped with each other such that the vertical probes are shifted by a predetermined distance in the longitudinal direction between adjacent contacts and at a predetermined interval in the surface direction of the ribbon-shaped resin film. A positioning member for positioning and fixing in the surface direction;
A guide block having a frame structure having an opening capable of accommodating the plurality of positioned and fixed contacts and having a thickness substantially equal to the width of the contacts;
The contact is positioned and held in a state in which a groove for fitting the inserted positioning member is provided in the guide block and the tip of the vertical probe protrudes vertically from the upper and lower surface positions of the guide block. Child assembly. The contact has an elastically deforming portion having a horizontally long curved shape, and a vertical probe formed so as to have first and second terminals facing the vertical direction at both ends of the elastically deforming portion; long hole in a portion surrounded by the curved portion of the elastic deformation portion is composed of a ribbon-like resin film is opened, the both tips of the curved portions projecting perpendicularly from the lateral direction on both sides of the ribbon-like resin film 2. The contact assembly according to claim 1, wherein: The vertical probe are each vertically protrude from the lateral direction on both sides of the tip ribbon-shaped resin film of the curved portion, one to form an input unit terminals in contact with pads of electronic device under test, the other, the circuit test 3. The contact assembly according to claim 2, wherein an output portion terminal is configured to come into contact with a circuit wiring pad of an inspection circuit board connected to the apparatus .   The long side of the long hole opened in the ribbon-shaped resin film has a beam structure having the same width as that of the vertical probe, and the beam is elastically deformed together with the vertical probe against the contact pressure of the vertical probe. The contactor assembly according to claim 2.   When the thickness of the contact is t and the pitch of the pads formed in a lattice pattern on the electronic device under test is p, the vertical probe tip of the superimposed contacts is a ribbon-shaped resin film. The contactor assembly according to claim 1, wherein the contactor assembly is arranged on a straight line having an angle θ having a relationship of Sinθ = t / p with respect to the longitudinal direction. A plurality of through-holes are provided at the same position in the superimposed contact pieces, and a positioning rod as a positioning member is inserted into the through-hole to connect the terminal portion of the vertical probe to the electronic device under test. contact child assembly of claim 1, wherein in a state that is matched to the pad, characterized in that to fix the double number of sheets of contacts.   2. The contact assembly according to claim 1, wherein the electronic device under test that comes into contact with the input terminal protruding from the guide block is mounted at an angle of θ relative to the longitudinal direction of the guide block during inspection. .   An inspection circuit board having circuit wiring that comes into contact with the output terminal protruding from the guide block is provided, and a protruding portion is provided on a part of the inspection circuit board and inserted into a connector socket to electrically connect the electronic device under test and the circuit inspection apparatus. The contact assembly according to claim 1, wherein the contact assembly is connected to each other.   When the inspection circuit board is provided with a through hole, and a plurality of inspection circuit boards are provided, a part of the output terminal of the vertical probe is inserted into the through hole and brought into contact with the circuit wiring pad of the lower board. The contactor assembly according to claim 8.   2. The contact assembly according to claim 1, wherein a space is maintained between the plurality of superimposed contacts by an organic insulating material such as an adhesive.

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