JP4900336B2 - Method for manufacturing group III nitride light emitting device, and group III nitride light emitting device - Google Patents

Description

  The present invention relates to a method for manufacturing a group III nitride light emitting device, and a group III nitride light emitting device.

  Patent Document 1 describes a method of manufacturing a nitride semiconductor light emitting device with high luminance and high output. In this method, an active layer made of a nitride semiconductor containing at least indium is used. The n-type nitride semiconductor layer includes an AlGaN layer, and the AlGaN layer is formed in contact with the active layer. The p-type nitride semiconductor layer includes an InGaN or GaN layer, and this layer (InGaN layer or GaN layer) is formed in contact with the active layer, and an AlGaN layer is formed outside the layer.

Patent Document 2 describes a nitride semiconductor laser that achieves high output. In the nitride semiconductor device, the active layer has a well layer and a barrier layer made of a nitride semiconductor containing at least In. The active layer includes a nitride semiconductor layer provided entirely between the well layer and the barrier layer that is equal to or larger than the band gap energy of the barrier layer.
Japanese Patent Laid-Open No. 11-243227 JP 2004-104088 A

  In a group III nitride light-emitting device that generates light with a long wavelength, it is necessary to increase the indium composition of the active layer as compared with an active layer that generates light with a short wavelength. According to the inventor's experiment, when an InGaN having an indium composition of 0.18 or more is grown for an active layer on a group III nitride substrate such as a GaN substrate, it is caused by lattice mismatch between InGaN and GaN. The threading dislocations generated were observed.

  In the inventor's experiment, when growing InGaN having an indium composition of 0.18 or more, in the initial stage of the growth, the underlying gallium nitride semiconductor layer provided on the sapphire substrate is caused by lattice mismatch with InGaN. Thus, it is promoted that InGaN is grown in an island shape. In this growth, there is a possibility that new threading dislocations may occur due to the bonding of the island-shaped InGaN layers.

This result is obtained from an experiment using a sapphire substrate, and the gallium nitride semiconductor on the sapphire substrate inherently has a large threading dislocation density (for example, about 1 × 10 ⁺⁸ cm ⁻² or more). The above phenomenon in InGaN growth of high indium has not been clarified. However, when high-indium InGaN growth is performed on a low-dislocation gallium nitride substrate (for example, a dislocation density of about 1 × 10 ⁺⁷ cm ⁻² or less), the occurrence of threading dislocations has become apparent in the growth of InGaN layers.

  By replacing the InGaN with Al as a constituent element and using InAlGaN, the degree of lattice mismatch can be slightly reduced. However, adoption of InAlGaN shifts the emission wavelength to a short wavelength. Therefore, InAlGaN cannot be used as the material of the well layer in order to avoid wavelength shift. Therefore, it is required to prevent the generation of threading dislocations associated with InGaN growth.

  The present invention has been made in view of such circumstances, and is capable of generating light having a wavelength longer than 500 nm, and is capable of avoiding a decrease in emission intensity due to threading dislocations. An object of the present invention is to provide a method for manufacturing a light emitting device, and to provide a group III nitride light emitting device capable of generating light having a wavelength longer than 500 nm and avoiding a decrease in light emission intensity due to threading dislocations. Objective.

One aspect of the present invention is a method for manufacturing a group III nitride light-emitting element that generates light having a wavelength longer than 500 nm. In this method, (a) a step of growing a barrier layer for an active layer made of a gallium nitride semiconductor on a main surface of a gallium nitride semiconductor substrate, and (b) partially covering the main surface of the barrier layer. Forming an aluminum nitride region; and (c) growing an InGaN well layer covering the main surface of the barrier layer and the aluminum nitride region. The gallium nitride semiconductor substrate has a region of threading dislocation density of 1 × 10 ⁺⁷ cm ⁻² or less, and the average film thickness of the aluminum nitride region is thinner than one monolayer.

  According to this method, since the aluminum nitride region that partially covers the main surface of the barrier layer is formed prior to the growth of InGaN, InGaN is grown on the surface that is not covered by the aluminum nitride region. This InGaN growth proceeds so as to cover the surface of the aluminum nitride region. Similarly, a plurality of InGaN grows from several openings in the aluminum nitride region. These InGaNs are connected without generating dislocations because the aluminum nitride region is thin. By this growth, an InGaN layer for generating light having a wavelength longer than 500 nm is grown.

  In the method according to the present invention, the coverage of the aluminum nitride region covering the main surface of the barrier layer is preferably 0.1 or more and 0.9 or less. In this method, if the coverage is too small, the crystal quality is significantly reduced due to island growth. If the coverage is too large, the InGaN well layer cannot sufficiently cover the aluminum nitride region.

  In the method according to the present invention, the well layer and the barrier layer may be grown by metal organic vapor phase epitaxy.

  In the method according to the present invention, in the step of forming the aluminum nitride region, an aluminum source and a nitrogen source are supplied to the growth reactor without supplying an indium source and a gallium source to the growth reactor, Grown up. In this method, an aluminum nitride region is grown by simultaneously supplying an aluminum material and a nitrogen material. Preferably, the aluminum source is an induced aluminum source and the nitrogen source is ammonia and amines.

  In the method according to the present invention, after growing the barrier layer and before growing the aluminum nitride region, the first growth temperature for the growth of the barrier layer to the second growth temperature for the growth of the well layer. The method may further include a step of changing the substrate temperature. Preferably, the step of growing the aluminum nitride region is performed after changing the substrate temperature, and the second growth temperature is lower than the first growth temperature.

  According to this method, since the growth of the well layer is continued after the growth of the aluminum nitride region, the growth of the well layer is started without changing the temperature to the growth temperature of the well layer after the growth of the aluminum nitride region. The

  In the method according to the present invention, in the step of changing the substrate temperature, the growth furnace pressure is changed from a first pressure in the growth of the barrier layer to a second pressure in the growth of the well layer. According to this method, the growth of the aluminum nitride region is performed under conditions of reduced pressure growth.

  According to the method of the present invention, after growing the barrier layer, before growing the aluminum nitride region, the method grows from a first pressure in the growth of the barrier layer to a second pressure in the growth of the well layer. The method may further comprise changing the furnace pressure. The second pressure is preferably lower than the first pressure.

  In the method according to the present invention, the thickness of the well layer is preferably 20 nm or less. In the method according to the present invention, the well layer may have a thickness of 0.5 nm or more.

In the method according to the present invention, the indium composition X of In _X Ga _1-X N in the InGaN well layer may be 0.18 or more. In this method, if the indium composition X is 0.18 or more, long wavelength light emission is provided. In the method according to the present invention, the indium composition X may be 0.30 or less. In this method, an indium composition that is too large gives a large strain to the well layer.

  In the method according to the present invention, the main surface of the gallium nitride substrate is a semipolar surface, and the main surface of the gallium nitride substrate has an angle of less than 90 degrees from the c-plane of hexagonal gallium nitride of the gallium nitride substrate. Can be inclined at. According to this method, the blue shift due to the piezoelectric field is reduced by the semipolarity. In the method according to the present invention, the main surface of the gallium nitride substrate may be a polar surface. According to this method, a group III nitride light-emitting device can be produced using a large-diameter substrate having a low dislocation density. In addition, if the main surface of the gallium nitride substrate is a relatively small inclined semipolar surface, a Group III nitride light-emitting device is fabricated using a large-diameter substrate with a low dislocation density compared to using a nonpolar surface. it can.

  In the method according to the present invention, the main surface of the gallium nitride substrate may be a nonpolar surface. According to this method, a group III nitride light-emitting device capable of avoiding a decrease in emission intensity due to threading dislocations using a nonpolar plane is produced.

Another aspect of the present invention is a group III nitride light-emitting device that generates light having a wavelength longer than 500 nm. The group III nitride light-emitting device includes: (a) a gallium nitride support base having a threading dislocation density region of 1 × 10 ⁺⁷ cm ⁻² or less; and (b) an active layer provided on the gallium nitride support base. Prepare. The active layer includes a barrier layer made of a gallium nitride based semiconductor, an aluminum nitride region partially covering the main surface of the barrier layer, an InGaN well layer covering the main surface of the barrier layer and the aluminum nitride region, An average film thickness of the aluminum nitride region is thinner than one monolayer, and the main surface of the barrier layer covers the first area not covered by the aluminum nitride region and the aluminum nitride region. The InGaN well layer includes an epitaxial growth portion provided in the first area and an extension portion extending from the epitaxial growth portion along the surface of the aluminum nitride region. .

  According to this group III nitride light-emitting device, the main surface of the barrier layer is partially covered with the aluminum nitride region, and the InGaN well layer having a high indium composition includes the epitaxially grown portion and the extended portion. Since the extended portion on the aluminum nitride region is not in contact with the barrier layer, the crystallinity of the epitaxially grown portion is inherited regardless of the lattice mismatch between the barrier layer and InGaN. Therefore, the crystal quality is improved throughout the InGaN well layer. Therefore, the group III nitride light-emitting device can generate light having a wavelength longer than 500 nm, and can avoid a decrease in emission intensity due to threading dislocations.

  In the group III nitride light-emitting device according to the present invention, the coverage of the aluminum nitride region covering the main surface of the barrier layer is 0.1 or more and preferably 0.9 or less. In this group III nitride light-emitting device, if the coverage is too small, the crystal quality is significantly lowered due to island-like growth, and a high-quality epitaxial growth portion cannot be obtained. If the coverage is too large, the aluminum nitride region cannot be sufficiently covered with the extended portion.

  In the group III nitride light emitting device according to the present invention, the thickness of the well layer is preferably 20 nm or less. The well layer may have a thickness of 0.5 nm or more. In the method according to the present invention, the indium composition X of the InGaN well layer may be 0.18 or more. In this group III nitride light emitting device, long wavelength light emission is provided if the indium composition X of the InGaN well layer is 0.18 or more. In the group III nitride light emitting device according to the present invention, the indium composition X of the InGaN well layer may be 0.30 or less. In this group III nitride light-emitting device, an excessively large indium composition gives a large strain to the well layer.

The group III nitride light emitting device according to the present invention may further include an InGaN buffer layer provided between the GaN support base and the active layer. The indium composition Y in In _Y Ga _1-Y N of the InGaN buffer layer is smaller than the indium composition of the InGaN well layer. According to this group III nitride light emitting device, strain of InGaN having a high indium composition can be reduced.

  In the group III nitride light emitting device according to the present invention, the main surface of the gallium nitride supporting base may be a polar surface. According to the group III nitride light-emitting device, a gallium nitride supporting base having a low dislocation density is provided.

  In the group III nitride light emitting device according to the present invention, the main surface of the gallium nitride support base is a semipolar surface, and the main surface of the gallium nitride support base is c of hexagonal gallium nitride of the gallium nitride substrate. It is inclined at an angle of 90 degrees or less from the surface. According to this group III nitride light emitting device, the blue shift due to the piezoelectric field is small. Moreover, a low dislocation density gallium nitride supporting substrate can be used.

  The above and other objects, features, and advantages of the present invention will become more readily apparent from the following detailed description of preferred embodiments of the present invention, which proceeds with reference to the accompanying drawings.

  As described above, according to one aspect of the present invention, there is provided a group III nitride light-emitting device capable of generating light having a wavelength longer than 500 nm and avoiding a decrease in emission intensity due to threading dislocation. A method of manufacturing is provided. According to another aspect of the present invention, there is provided a group III nitride light emitting device capable of generating light having a wavelength longer than 500 nm and avoiding a decrease in emission intensity due to threading dislocations.

  The knowledge of the present invention can be easily understood by considering the following detailed description with reference to the accompanying drawings shown as examples. Subsequently, referring to the attached drawings, a method of manufacturing a group III nitride light emitting device, a method of manufacturing an epitaxial wafer for the group III nitride light emitting device, and an implementation of the group III nitride light emitting device of the present invention will be described. A form is demonstrated. Where possible, the same parts are denoted by the same reference numerals.

  FIG. 1 is a drawing showing main steps of a method for manufacturing a group III nitride light emitting device and a method for manufacturing an epitaxial wafer according to the present embodiment. Referring to FIG. 1, a flowchart 100 is shown. 2 and 3 are diagrams showing main steps of a method for manufacturing a group III nitride light emitting device and a method for manufacturing an epitaxial wafer. In this embodiment mode, a method for manufacturing a group III nitride light-emitting element that generates light having a wavelength longer than 500 nm will be described.

In step S101, a gallium nitride semiconductor substrate (hereinafter referred to as “GaN substrate”) 13 as shown in FIG. The GaN substrate 13 is made of hexagonal gallium nitride. The GaN substrate has a region of threading dislocation density of 1 × 10 ⁺⁷ cm ⁻² or less. An available GaN substrate that satisfies this dislocation density condition includes, for example, a high dislocation region having a large threading dislocation density and a low dislocation region having a small threading dislocation density, which are alternately arranged. The GaN substrate 13 has a main surface 13a and a back surface 13b. In the GaN substrate 13, the maximum distance D between two points on the edge 13c can be, for example, a diameter of 45 mm or more.

Referring to FIG. 2 (a), the vector V _C is indicates the direction of the c-axis, the vector V _N indicates a normal line of the principal surface 13a. These vectors form an angle θ. The main surface 13a of the GaN substrate 13 can be, for example, a polar surface whose angle θ is substantially zero. According to the polar plane, a group III nitride light-emitting device can be produced using a large-diameter substrate having a low dislocation density. Alternatively, the main surface 13a of the GaN substrate 13 can be, for example, a semipolar surface, and has a predetermined direction at an angle θ of 15 degrees or more and less than 90 degrees with respect to a plane orthogonal to the c-axis of the hexagonal gallium nitride. It is inclined to. With this inclination, a semiconductor light emitting device capable of reducing the influence of the piezoelectric field can be manufactured. Further, if the main surface of the gallium nitride substrate is relatively small, a group III nitride light-emitting device can be manufactured using a large-diameter substrate having a low dislocation density as compared with the case of using a nonpolar surface. The angle θ is defined by, for example, (θ _M ² + θ _A ² ) ^1/2 . The angle component θ _A is a tilt angle component with respect to the a-axis direction of hexagonal gallium nitride, and the angle component θ _M is a tilt angle component with respect to the m-axis direction of hexagonal gallium nitride. Preferably, the predetermined direction can be either the a-axis or m-axis direction.

In step S102, after the GaN substrate 13 is installed in the reaction furnace 11, the GaN substrate 13 is heat-treated using ammonia and hydrogen as shown in FIG. The reaction furnace 11 can be a metal organic vapor phase growth furnace. The raw materials for metal organic vapor phase epitaxy for producing a semiconductor light emitting device by using trimethylgallium (TMG), trimethylaluminum (TMA), trimethylindium (TMI), ammonia (NH ₃ ), silane (SiH ₄ ), Biscyclopentadienyl magnesium (CP ₂ Mg) was used.

  In step S102, the first conductivity type gallium nitride based semiconductor region 15 is grown on the GaN substrate 13 as shown in FIG. In this embodiment, an n-type GaN layer 17 is grown on the GaN substrate 13. Next, an InGaN buffer layer 19 is grown on the n-type GaN layer 17. The growth temperature of the InGaN buffer layer 19 can be, for example, not less than 800 degrees Celsius and not more than 900 degrees Celsius.

Thickness _{D 19} of the InGaN buffer layer 19 is, for example, can be at 20nm or more, thereby can be advantageously Motas an effect as the buffer layer. The thickness D ₁₉ can be, for example, it is 300nm or less, thereby there is an advantage that the generation of dislocations due to lattice mismatch can be suppressed. The indium composition of the InGaN buffer layer 19 can be, for example, 0.02 or more, which has the advantage that it can have an effect as a buffer layer. The indium composition can be, for example, 0.08 or less, which has the advantage that the occurrence of dislocations due to lattice mismatch can be suppressed. Prior to the growth of the active layer, an InGaN buffer layer 19 having a smaller indium composition than the well layer is grown, so that strain caused by lattice mismatch between the gallium nitride substrate and the quantum well layer can be alleviated and the light emission efficiency can be improved. There is an advantage.

In step S103, an active layer 21 is grown on the InGaN buffer layer 19 as shown in FIG. The active layer 21 is in contact with the main surface 19 a of the InGaN buffer layer 19. The active layer 21 includes a barrier layer 25 and an In _X Ga _1-X N (0 <X <1) well layer 29.

In the growth of the active layer 21, the barrier layer 25 is grown on the InGaN buffer layer 19 at the deposition temperature TB in step S < _b > 104. The thickness _{D B} of the barrier layer 25 can be, for example, not 6nm or 25nm or less. The barrier layer 25 is made of a gallium nitride based semiconductor, and can be, for example, GaN, InGaN, AlGaN, or the like. The growth temperature _{T B} of the barrier layer 25 made of GaN may be, for example less 950 degrees to 850 degrees Celsius.
In addition, the following are conditions for forming the barrier layer 25 made of InGaN:
The growth temperature _{T B:} C 720 degrees Celsius 900 degrees reactor pressure: 40 kPa above 101kPa less indium vapor ratio: 0.1 Growth rate: 0.1 micrometer / hour to 0.8 micrometers / hour or less or The film forming conditions for the barrier layer 25 made of AlGaN include the following:
Growth temperature TB: 880 degrees Celsius or more and 950 degrees Celsius or less In-furnace pressure: 20 kPa or more and 101 kPa or less Aluminum vapor phase ratio: 0.1 or less Growth rate: 0.1 micrometer / hour or more and 0.8 micrometer / hour or less

In the growth of the active layer 21, in step S105, an aluminum nitride region 27 that partially covers the main surface 25a of the barrier layer 25 is formed. In this step, an aluminum material (for example, organic aluminum) and a nitrogen material (for example, NH ₃ and / or amines) are supplied to the growth furnace without supplying the indium material and the gallium material to the growth furnace. To deposit. An aluminum material and a nitrogen material are simultaneously supplied to grow an aluminum nitride region 27 having an average film thickness thinner than one monolayer on the main surface 25a of the barrier layer 25. Since the average film thickness of the aluminum nitride region 27 is thinner than one monolayer, the aluminum nitride region 27 can only partially cover the main surface 25 a of the barrier layer 25. One monolayer of AlN has a thickness of about 0.27 nm, for example. The following are used as suitable growth conditions.
TMA flow rate: 0.005 liter / min NH ₃ flow rate: 10 liter / min Deposition temperature T _AlN : 700 degrees Celsius Deposition rate: 0.05 micrometer / hour Thickness: 0.5 Monolayer growth time: 10 seconds Furnace pressure: 20 kPa.
Further, the following film formation conditions can be applied to the formation of the aluminum nitride region 27:
Growth temperature T _AlN : 900 degrees Celsius or higher and 1100 degrees Celsius or lower In-furnace pressure: 20 kPa or higher and 60 kPa or lower Deposition rate: 0.01 micrometer / hour or higher and 0.1 micrometer / hour or lower

  The coverage of the aluminum nitride region 27 covering the main surface 25a of the barrier layer 25 is preferably 0.1 or more. If the coverage is too small, the deterioration of crystal quality due to island growth becomes remarkable. Further, the coverage is preferably 0.9 or less. In this method, an excessively large coverage cannot sufficiently cover the aluminum nitride region with the InGaN well layer.

In the growth of the active layer 21, in step S106, an InGaN well layer 29 that covers the main surface 25a of the barrier layer 25 and the aluminum nitride region 27 is grown. The following deposition conditions can be applied to the formation of the InGaN well layer 29:
Growth temperature T _W : 730 degrees Celsius or more and 770 degrees Celsius or less In-furnace pressure: 60 kPa or more and 100 kPa or less Indium gas phase ratio: 0.5 or more and 0.8 or less Deposition rate: 0.1 micrometers / hour or more and 0.8 micrometers Meters per hour or less

The thickness _DW of the well layer 29 is preferably 20 nm or less. This is because if it is thicker than 20 nm, the crystallinity tends to decrease. The thickness _DW of the well layer 29 can be 0.5 nm or more. If it is thinner than 0.5 nm, it is necessary to increase the indium composition for obtaining a desired wavelength. The indium composition of the InGaN well layer 29 ( _{X in} In _X Ga _1-X N) can be 0.18 or more. If the indium composition X is 0.18 or more, a wavelength exceeding 500 nm can be obtained with the well layer thickness of 3 nm used as a standard. The indium composition X of the InGaN well layer 29 can be 0.30 or less. If it is larger than 0.3, the crystallinity tends to be lowered.

  Next, in the growth of the active layer 21, the barrier layer 31 is grown on the InGaN well layer 29 in step S107. The barrier layer 31 can be grown under the same conditions as the barrier layer 25.

  In Step S108, Step S105, Step S106, and Step S107 can be repeated until a desired quantum well structure is completed.

FIG. 4A to FIG. 4D are drawings schematically showing the growth of the well layer when the active layer is formed by the method according to the present embodiment. According to the present embodiment, as shown in FIG. 4A, the aluminum nitride region 27 is formed in the area 25b of the major surface 25a of the barrier layer 25 prior to the growth of InGaN. Therefore, the InGaN 29a is grown in the area 25c that is not covered by the aluminum nitride region 27. This InGaN grows so as to cover the surface of the aluminum nitride region 27, and InGaN 29c is formed during the growth of the well layer. Similarly, a plurality of InGaN 29a and 29b grow from several openings 27a in the aluminum nitride region, and these InGaN are connected to each other without generating dislocations to form InGaN 29c. In general, in the lattice mismatch type epitaxial growth of a group IV semiconductor (for example, SiGe / Si substrate) or a group III-V compound semiconductor (for example, InGaAs / GaAs substrate), when the lattice mismatch degree f is larger than 2%, island-shaped growth is performed. It is known that threading dislocations are generated when the islands merge with each other and the crystallinity is deteriorated. In InGaN, when the In composition is 0.18, the degree of lattice mismatch with GaN corresponds to about 2%, and thus the crystallinity is deteriorated by the same mechanism. The in-plane lattice constant immediately before the growth of the active layer is the value of GaN, but when aluminum nitride with a small lattice constant is formed with an in-plane coverage of 0.1 to 0.9, island growth in the initial stage of the InGaN layer Is suppressed, and the occurrence of threading dislocations can be suppressed. For this reason, compared with the case where there is no aluminum nitride layer, crystallinity can be improved and luminous efficiency can be improved.
The lattice mismatch degree f is defined as follows:
f = 100 × ((epitaxial layer lattice constant) − (substrate lattice constant)) / substrate lattice constant GaN a-axis lattice constant: 0.3189 nanometers InGaN a-axis lattice with an In composition of 0.18 Constant: 0.3252 nanometer InGaN growth progresses, and InGaN 29d grown flat is formed on the main surface 25a of the barrier layer 25 and the entire surface of the aluminum nitride region 27. By this growth, a high indium composition InGaN layer that generates light having a wavelength longer than 500 nm is grown.

  FIGS. 4E to 4G are diagrams schematically showing the growth of a well layer when an active layer is formed without using an aluminum nitride region on the barrier layer. In the initial stage of InGaN growth, isolated island-shaped InGaN 26 a and 26 b are grown on the surface 25 a of the barrier layer 25. When the InGaN growth is further advanced, island-shaped InGaN 26c and 26d are grown and the InGaN 26c and 26d are connected to each other. When InGaN is subsequently grown, dislocations 24 are generated on the connection surface between InGaN 26c and InGaN 26d.

  According to the method of the present embodiment, the generation of dislocations is suppressed even when an InGaN layer having a high indium composition is grown.

In a preferred embodiment, after the growth of the barrier layer 25, the step S103 is performed by growing the well layer 29 from the pressure P _B (for example, 40 kPa to 101 kPa) in the growth of the barrier layer 25 before the growth of the aluminum nitride region 27. The step of changing the pressure of the growth reactor 11 to the pressure P _W (for example, 40 kPa to 101 kPa) can be further provided. The pressure P _W in the deposition of the well layer 29 is preferably lower than the pressure P _B in the deposition of the barrier layer 25. According to this method, the growth of the aluminum nitride region 27 is performed under the conditions of reduced pressure growth. Since trimethylaluminum easily reacts with ammonia in a gas phase, a growth pressure close to normal pressure of 101 kPa is not preferable because a growth rate cannot be obtained.

Further, in a preferred embodiment, step S103, after the growth of the barrier layer 25, prior to growing the aluminum nitride region 27, the substrate to the growth temperature T _W of the well layer 29 from the growth temperature T _B of the barrier layer 25 It is preferable to provide the process of changing temperature. The growth of the aluminum nitride region 27 is performed after changing the substrate temperature. The growth temperature _{T W} of the barrier layer 25 is lower than the growth temperature _{T B} of the well layer 29. According to this method, since the growth of the well layer 29 is performed following the growth of the aluminum nitride region 27, the well layer 29 is not changed to the growth temperature of the well layer 29 after the growth of the aluminum nitride region 27. Growth begins. In the step of changing the substrate temperature, the pressure of the growth furnace 11 can be changed from the pressure P _B in the growth of the barrier layer 25 to the pressure P _W in the growth of the well layer 29.

  After the growth of the active layer 21, as shown in FIG. 3B, a second conductivity type gallium nitride based semiconductor region 33 is grown. In this embodiment, an electron blocking layer 35 is grown on the active layer 21. The electron blocking layer 35 is in contact with the active layer 21. The electron block layer 35 can be made of, for example, AlGaN, GaN, or the like. The growth temperature of the electron blocking layer 35 can be, for example, not less than 950 degrees Celsius and not more than 1100 degrees Celsius. The thickness of the electron block layer 35 can be, for example, 5 nm or more and 50 nm or less. Next, a p-type contact layer 37 is grown on the electron block layer 35. The p-type contact layer 37 can be made of, for example, p-type GaN, p-type InGaN, or the like.

  In step S <b> 110, an anode electrode is formed on the p-type contact layer 37 and a cathode electrode is formed on the back surface 13 b of the GaN substrate 13.

FIG. 5 is a schematic diagram schematically showing the structure of the group III nitride light-emitting device according to this embodiment. The group III nitride light-emitting element 41 generates light having a wavelength longer than 500 nm. Examples of the group III nitride light emitting element 41 include a light emitting diode and a semiconductor laser. The group III nitride light-emitting device 41 includes a gallium nitride support base 43 having a threading dislocation density region of 1 × 10 ⁺⁷ cm ⁻² or less, and an active layer 45 provided on the gallium nitride support base 43. The active layer 45 includes a barrier layer 47, an aluminum nitride region 49, and an InGaN well layer 51. The barrier layer 47 is made of a gallium nitride based semiconductor, and can be made of, for example, undoped GaN, undoped InGaN, or the like. Aluminum nitride region 49 partially covers main surface 47 a of barrier layer 47. As shown in FIG. 5, the shape of the aluminum nitride region 49 is different for each barrier layer. The average film thickness of the aluminum nitride region 49 is thinner than one monolayer. The InGaN well layer 51 covers the main surface 47 a of the barrier layer 47 and the aluminum nitride region 49. The main surface 47a of the barrier layer 47 includes a first area 49b and a second area 49c. The first area 49 b is not covered with the aluminum nitride region 49, and the second area 49 c is covered with the aluminum nitride region 49. InGaN well layer 51 includes an epitaxial growth portion 51b provided in first area 49b, and an extension portion 51c extending from epitaxial growth portion 51b along the surface of aluminum nitride region 49.

  According to this group III nitride light-emitting device 41, the main surface 47a of the barrier layer 47 is partially covered with the aluminum nitride region 49, and the InGaN well layer 51 having a high indium composition is formed into the epitaxially grown portion 51b and the extended portion. The existing part 51c is included. Since the extension 51c on the aluminum nitride region is not in contact with the barrier layer 47, the crystallinity of the epitaxial growth portion 51b is inherited regardless of the lattice mismatch between the barrier layer 47 and InGaN. Therefore, the crystal quality is improved over the entire InGaN well layer 51. Therefore, the group III nitride light-emitting element 41 is capable of generating light having a wavelength longer than 500 nm and avoiding a decrease in emission intensity due to threading dislocations. Therefore, the crystal quality is improved throughout the InGaN well layer. Therefore, the group III nitride light-emitting device can generate light having a wavelength longer than 500 nm, and can avoid a decrease in emission intensity due to threading dislocations.

  Since the epitaxially grown portion 51b is provided on the barrier layer 47 that appears in the opening of the aluminum nitride region 49, it has a good crystal quality like the barrier layer. Since the average film thickness of the aluminum nitride region 47 is thinner than one monolayer in the extension 51c, the extension 51c by lateral growth from the epitaxial growth part 51b has a crystal quality equivalent to the crystal quality of the epitaxial growth part 51b. Can take over.

  As already described, the coverage of the aluminum nitride region 49 covering the main surface 47a of the barrier layer 47 is preferably 0.1 or more and 0.9 or less. If the coverage is too small, the crystal quality is significantly lowered due to island growth, and a high quality epitaxial growth portion 51b cannot be obtained. If the coverage is too large, the aluminum nitride region cannot be sufficiently covered with the extending portion 51c. More preferably, the coverage is not less than 0.3 and not more than 0.7. Further, since the thickness of the aluminum nitride region 49 is a monolayer, the influence on the electrical properties in the quantum well structure is small.

  The thickness of the well layer 51 can be 20 nm or less and 0.5 nm or more. When the indium composition X of the InGaN well layer 51 is 0.18 or more, long wavelength light emission is provided. The indium composition X of the InGaN well layer 51 can be 0.30 or less. An indium composition that is too large gives large strain to the well layer 51. The group III nitride light-emitting element 41 can generate light in the wavelength range of 500 nm or more and 550 nm or less.

  In the group III nitride light-emitting device 41, it is provided between the n-type gallium nitride semiconductor region 53 and the p-type gallium nitride semiconductor region 55.

The n-type gallium nitride based semiconductor region 53 can further include an n-type InGaN buffer layer 57 provided between the GaN support base 43 and the active layer 45. The indium composition Y in In _Y Ga _1-Y N of the InGaN buffer layer 57 is smaller than the indium composition of the InGaN well layer 51. According to this, strain of InGaN having a high indium composition can be reduced. The n-type gallium nitride based semiconductor region 53 can further include an n-type GaN layer 59 provided between the GaN support base 43 and the InGaN buffer layer 57.

  The p-type gallium nitride based semiconductor region 55 can include a p-type electron block layer 61 and a p-type contact layer 63.

  The main surface 43a of the gallium nitride support base 43 can be a polar surface. This provides a low dislocation density gallium nitride support substrate. Further, the main surface 43a of the gallium nitride support base 43 can be a semipolar surface. According to this, the blue shift due to the piezoelectric field is small. In either case, a gallium nitride supporting base having a low dislocation density and a large diameter can be used.

FIG. 6 is a drawing schematically showing a crystal lattice in the vicinity of the interface between the well layer and the barrier layer. Referring to FIG. 6 (a), an active layer utilizing a partial coating of AlN is shown. The surface of the barrier layer B covers AlN is partially well layers W _P of the high indium composition has been growing over the barrier layer and the AlN regions. On the other hand, referring to FIG. 6 (b), an active layer that does not utilize the partial coating of AlN is shown. Well layer W _C a high indium composition has been directly overlying growth the entire surface of the barrier layer B.

FIG. 6C shows the stress distribution in the quantum well structure shown in FIGS. 6A and 6B with reference to the barrier layer. In FIG. 6 (c), it is shown and the stress characteristic line S _C of the structure of the stress characteristic line S _P and Figure of the structure shown in FIG. 6 (a) 6 (b) . Since the indium composition of the well layer W is large, lattice irregularities exist. However, due to the action of the AlN partial coating, the stress distribution near the interface between the barrier layer and the well layer is changed as shown in FIG. Since the contact area between the barrier layer and the well layer is reduced by the AlN partial coating, the maximum value of the stress is reduced and does not exceed the critical strain.

  By using AlN covering the surface of the well layer, it is not necessary to use a well layer containing Al as a constituent element. For the purpose of reducing lattice mismatch, for example, AlN is grown immediately before the well layer growth so that the coverage is 50% (0.5 monolayer). The maximum value of the local stress in the well layer can be reduced, and the threading dislocation density associated with the combination of island growth of InGaN growth is reduced.

  The hexagonal gallium nitride is inclined in a predetermined direction at an angle θ of 15 degrees or more and 90 degrees or less with respect to a plane orthogonal to the c-axis. The main surface of the gallium nitride substrate can be a nonpolar surface. By using this nonpolar plane, a group III nitride light-emitting device capable of avoiding a decrease in emission intensity due to threading dislocation is produced.

(Example)
A single quantum well (SQW) structure was fabricated by metal organic vapor phase epitaxy as follows. The emission wavelength is about 510 nm. Trimethylgallium (TMGa), trimethylindium (TMIn), trimethylaluminum (TMA), ammonia (NH ₃ ), and silane (SiH ₄ ) were used as raw materials. The substrate used was the following 2 inch n-type freestanding GaN substrate:
[11-20] direction off angle, [1-100] direction off angle, dislocation density (cm ⁻² )
16.3 to 16.8 degrees, 0.20 to 0.35 degrees, 5 × 10 ^{+5 to} 7 × 10 ⁺⁶
The following procedure was used for growth. First, NH ₃ and H ₂ were supplied into the furnace while controlling the furnace pressure to 101 kPa, and cleaning was performed at a substrate temperature of 1050 degrees Celsius for 10 minutes. Thereafter, an n-type GaN buffer layer having a thickness of 2000 nm was grown while supplying TMG, NH ₃ , and SiH ₄ to the growth reactor. Next, after the supply of raw materials other than NH ₃ was stopped and the temperature was lowered to 750 degrees Celsius, an In _0.04 Ga _0.96 N buffer layer having a thickness of 50 nm was grown.

  After raising the substrate temperature to 880 degrees Celsius, a GaN barrier layer having a pressure of 101 kPa and a thickness of 15 nm was grown.

Next, the supply of raw materials other than NH ₃ is stopped, the growth temperature is lowered to 700 degrees Celsius, and the pressure in the furnace is reduced to 20 kPa. An AlN initial layer was grown for 10 seconds at a growth rate of / h. The thickness of the AlN initial layer was 0.5 monolayer.

Subsequently, TMGa and TMIn were supplied to the growth reactor to grow an In _0.18 Ga _0.82 N well layer having a thickness of 3 nm.

  Thereafter, the substrate temperature was raised again to 880 degrees Celsius, and then a GaN barrier layer having a thickness of 10 nm was grown. Thereafter, the furnace pressure was returned to 101 kPa.

The substrate temperature was lowered and the epitaxial wafer was taken out of the growth furnace. Thus, the SQW structure shown in FIG. For comparison, an epitaxial wafer without the AlN initial layer ML was also produced. The surface of the epitaxial wafer was observed with a scanning electron microscope at a magnification of 20,000 times. On the surface of the epitaxial wafer without the AlN initial layer ML, as shown in FIG. 7B, V pits (V-shaped defects) due to threading dislocations were observed at a high density on the surface. The V pit density VPD was about 8 × 10 ⁺⁸ cm ⁻² , for example. On the other hand, as shown in FIG. 7C, the surface of the epitaxial wafer having the AlN initial layer ML has almost no V pits, which is equivalent to the threading dislocation density of the original GaN substrate. The V pit density VPD was, for example, less than 1 × 10 ⁺⁶ cm ⁻² . These results indicated that dislocations occurred in the well layer.

  The optical properties of the active layer were evaluated using a room temperature photoluminescence (PL) method. A He—Cd laser with a wavelength of 325 nm was used, a spot diameter of 200 μm, and a laser power of 1 mW. As shown in FIG. 7D, the peak wavelength of the PL spectrum was about 510 nm. The epitaxial wafer having the AlN initial layer has a PL strength approximately twice that of the epitaxial wafer having no AlN initial layer. The full width at half maximum was 50 nm for an epitaxial wafer having an AlN layer and 63 nm for an epitaxial wafer without an Al layer. The cause of the increase in the full width at half maximum of an epitaxial wafer without an AlN layer is considered to be the influence of strain nonuniformity due to the generation of dislocations.

(Example 2)
A light emitting diode (LED) was fabricated by metal organic vapor phase epitaxy as follows. The substrate used was a 2 inch free standing GaN substrate:
[11-20] direction off angle, [1-100] direction off angle, dislocation density (cm ⁻² )
16.2 to 16.5 degrees, 0.15 to 0.32 degrees, 5 × 10 ^{+5 to} 6 × 10 ⁺⁶

It grew in the following procedure. First, cleaning was performed for 10 minutes at a substrate temperature of 1050 degrees Celsius while supplying NH ₃ and H ₂ into the growth furnace while adjusting the pressure in the growth furnace to 101 kPa. Thereafter, TMG, NH ₃ and SiH ₄ were introduced to grow an n-type GaN buffer layer having a thickness of 2000 nm. After the supply of raw materials other than NH ₃ was stopped and the temperature was lowered to 750 degrees Celsius, an In _0.04 Ga _0.96 N buffer layer having a thickness of 50 nm was grown.

  Next, after raising the substrate temperature to 880 degrees Celsius, a GaN barrier layer having a thickness of 15 nm was grown.

Next, the supply of raw materials other than NH ₃ was stopped, the growth temperature was lowered to 700 degrees Celsius, and the pressure in the growth furnace was reduced to 20 kPa. Thereafter, a supply of trimethylaluminum to the growth furnace was supplied to grow an AlN initial layer to a thickness of 0.5 monolayer. The growth rate was 0.05 μm / h.

Immediately thereafter, TMGa and TMIn were introduced to grow an In _0.18 Ga _0.82 N well layer having a thickness of 3 nm.

  Thereafter, the substrate temperature was raised again to 880 degrees Celsius, and a GaN barrier layer having a thickness of 15 nm was grown. Growth of the AlN initial layer, well layer, and barrier layer was repeated three times to produce a triple quantum well structure.

Thereafter, the growth furnace pressure was returned to 101 kPa and the substrate temperature was raised to 1000 degrees Celsius, and then a 20 nm thick Mg-doped Al _0.08 Ga _0.92 N layer was grown. Subsequently, p-type GaN having a thickness of 50 nm was grown. After the temperature was lowered, the epitaxial wafer having the LED structure was taken out of the growth furnace. For comparison, an epitaxial wafer without an AlN initial layer was produced in the same manner.

  Subsequently, device processes were performed in the following order. A translucent p-electrode was formed on the epitaxial wafer. Thereafter, a mesa for element isolation was formed on the epitaxial wafer. An n-electrode was formed on the back surface of the GaN substrate. Electrode annealing and p-pad electrode formation were performed to produce a substrate product. For example, a vapor deposition method was used to deposit the electrode material, a photolithography method was used to form a mesa pattern, and a reactive ion etching method was used to form a mesa.

The light emitting diodes are arranged on the substrate product so that the size of the semiconductor chip is 400 μm × 400 μm. The substrate product was separated to form a plurality of semiconductor chips. Several light emitting diodes on the substrate product were energized and the electroluminescence intensity was measured. The emission wavelength was about 510 nm. The light output value at an applied current of 20 mA was as follows.
0.9mW with AlN layer
No AlN layer 0.4 mW.
This indicates that the output is improved with the AlN layer.

  While the principles of the invention have been illustrated and described in the preferred embodiments, it will be appreciated by those skilled in the art that the invention can be modified in arrangement and detail without departing from such principles. The present invention is not limited to the specific configuration disclosed in the present embodiment. We therefore claim all modifications and changes that come within the scope and spirit of the following claims.

FIG. 1 is a drawing showing main steps of a method for manufacturing a group III nitride light emitting device and a method for manufacturing an epitaxial wafer according to the present embodiment. FIG. 2 is a drawing showing main steps of a method for manufacturing a group III nitride light emitting device and a method for manufacturing an epitaxial wafer. FIG. 3 is a drawing showing main steps of a method for manufacturing a group III nitride light emitting device and a method for manufacturing an epitaxial wafer. FIG. 4A to FIG. 4D are drawings schematically showing the growth of the well layer when the active layer is formed by the method according to the present embodiment. FIGS. 4E to 4G are diagrams schematically showing the growth of a well layer when an active layer is formed without using an aluminum nitride region on the barrier layer. FIG. 5 is a schematic diagram schematically showing the structure of the group III nitride light-emitting device according to this embodiment. FIG. 6 is a drawing schematically showing the vicinity of the interface between the well layer and the barrier layer. FIG. 7 is a view showing an embodiment relating to an epitaxial wafer having a light emitting diode structure.

Explanation of symbols

DESCRIPTION OF SYMBOLS 13 ... Gallium nitride semiconductor substrate (GaN substrate), 13a ... Main surface of GaN substrate, 13b ... Back surface of GaN substrate, 13c ... Edge, 15 ... First conductivity type gallium nitride semiconductor region, 17 ... N-type GaN layer, 19 ... InGaN buffer layer, 21 ... active layer, 25 ... barrier layer, 27 ... aluminum nitride _{region, 29 ... In X Ga 1-} X N (0 <X <1) well layer, 33 ... second conductive type gallium nitride based semiconductor region 35 ... Electronic block layer,
37 ... p-type contact layer

Claims (18)

A method for producing a group III nitride light emitting device that generates light having a wavelength longer than 500 nm,
A step of growing a barrier layer for an active layer made of a gallium nitride based semiconductor on the main surface of the gallium nitride semiconductor substrate;
Forming an aluminum nitride region that partially covers the major surface of the barrier layer;
And a step of growing an InGaN well layer so as to cover a main surface of the barrier layer and the aluminum nitride region,
The gallium nitride semiconductor substrate has a region of threading dislocation density of 1 × 10 ⁺⁷ cm ⁻² or less,
The coverage of the aluminum nitride region covering the main surface of the barrier layer is 0.1 or more and 0.9 or less,
The method wherein the average thickness of the aluminum nitride region is less than one monolayer. The method according to claim 1 , wherein the growth of the well layer and the barrier layer is performed by metal organic vapor phase epitaxy. In the step of forming the aluminum nitride region, the aluminum nitride region is grown by supplying the aluminum source and the nitrogen source to the growth furnace without supplying the indium source and the gallium source to the growth reactor. The method according to claim 1 or 2 . After growing the barrier layer, prior to growing the aluminum nitride region, changing a substrate temperature from a first growth temperature in the growth of the barrier layer to a second growth temperature in the growth of the well layer Further comprising
The growth of the aluminum nitride region is performed after changing the substrate temperature,
The method according to any one of claims 1 to 3 , wherein the second growth temperature is lower than the first growth temperature. In the step of changing the substrate temperature, the pressure in the growth furnace to a second pressure in the growth of the well layer from the first pressure in the growth of the barrier layer is changed, that the claim 4, wherein The described method. After growing the barrier layer, prior to growing the aluminum nitride region, changing the growth furnace pressure from a first pressure in the growth of the barrier layer to a second pressure in the growth of the well layer Further comprising
The method according to claim 1, wherein the second pressure is lower than the first pressure. The thickness of the said well layer is 20 nm or less, The method as described in any one of Claims 1-6 characterized by the above-mentioned. 8. The method according to claim 1 , wherein an indium composition X in In _X Ga _1-X N of the InGaN well layer is 0.18 or more. The main surface of the gallium nitride semiconductor substrate is a semipolar surface;
The primary surface of the gallium nitride semiconductor substrate, any of claims 1 to 8, wherein the c-plane of the hexagonal gallium nitride gallium nitride semiconductor substrate is inclined at an angle less than 90 degrees, and wherein The method described in any one of the paragraphs. The method according to claim 1 , wherein the main surface of the gallium nitride semiconductor substrate is a nonpolar surface. The method according to any one of claims 1 to 8 , wherein the main surface of the gallium nitride semiconductor substrate is a polar surface. A group III nitride light-emitting device that generates light having a wavelength longer than 500 nm,
A gallium nitride support substrate having a region of threading dislocation density of 1 × 10 ⁺⁷ cm ⁻² or less,
An active layer provided on the gallium nitride support substrate;
The active layer includes a barrier layer made of a gallium nitride based semiconductor, an aluminum nitride region partially covering the main surface of the barrier layer, an InGaN well layer covering the main surface of the barrier layer and the aluminum nitride region, Including
The average thickness of the aluminum nitride region is thinner than 1 monolayer,
The main surface of the barrier layer includes a first area not covered with the aluminum nitride region and a second area covered with the aluminum nitride region,
The InGaN well layer is seen containing a first epitaxial growth portion provided in the area, and extending portion which is provided from the epitaxial growth unit along the surface of the aluminum nitride region,
The group III nitride light emitting device, wherein a coverage of the aluminum nitride region covering the main surface of the barrier layer is 0.1 or more and 0.9 or less . 13. The group III nitride light emitting device according to claim 12 , wherein the well layer has a thickness of 20 nm or less. 14. The group III nitride light-emitting device according to claim 12 , wherein an indium composition X in In _X Ga _1-X N of the InGaN well layer is 0.18 or more. The group III nitride light-emitting device according to claim 14 , wherein the indium composition X is 0.30 or less. An InGaN buffer layer provided between the gallium nitride support base and the active layer;
Indium composition Y in _{an In} Y _{Ga 1-Y} N of the InGaN buffer layer is smaller than the indium composition of the InGaN well layer, as described in any one of claims 12 to claim 15, characterized in that Group III nitride light emitting device. The primary surface of the gallium nitride support base, any of claims 12 to claim 16, wherein the c-plane of the hexagonal gallium nitride of the gallium nitride support base is inclined at an angle less than 90 degrees, and wherein A group III nitride light-emitting device according to claim 1. The group III nitride light-emitting element according to any one of claims 12 to 16 , wherein the main surface of the gallium nitride supporting base is a polar surface.