JP4978012B2 - ELECTRO-OPTICAL DEVICE, MANUFACTURING METHOD THEREOF, AND ELECTRONIC DEVICE - Google Patents

Description

The present invention relates to an electro-optical device suitable for, for example, a liquid crystal device, a manufacturing method thereof, and an electronic apparatus.

In general, an electro-optical device, for example, a liquid crystal device that performs predetermined display using liquid crystal as an electro-optical material has a configuration in which liquid crystal is sandwiched between a pair of substrates. Of these, TFT drive, TFD
In an electro-optical device such as an active matrix driving type liquid crystal device by driving or the like, a pixel electrode and a pixel electrode corresponding to each intersection of a large number of scanning lines (gate lines) and data lines (source lines) arranged vertically and horizontally, respectively. A switching element is provided on a substrate (active matrix substrate).

A switching element such as a TFT element is turned on by an on signal supplied to the gate line, and an image signal supplied via the source line is written to the pixel electrode (transparent electrode (ITO)).
Thereby, a voltage based on the image signal is applied to the liquid crystal layer between the pixel electrode and the counter electrode to change the arrangement of the liquid crystal molecules. In this way, the transmittance of the pixel is changed, and light passing through the pixel electrode and the liquid crystal layer is changed according to the image signal to perform image display.

An element substrate constituting such a switching element is configured by laminating a semiconductor thin film, an insulating thin film or a conductive thin film having a predetermined pattern on a glass or quartz substrate.

By the way, the image signal supplied from the outside through the video signal line is sampled by the sample hold circuit and supplied to each data line. Data supplied to the data line is held by the wiring capacitance of the data line, and is written to each pixel electrode via the switching element that is turned on.

Therefore, data needs to be held in the data line until writing to each pixel electrode is completed. In order to add a sufficient holding capacity to the data line, a technique for adding a holding capacity for preventing leakage of the sample and hold circuit has been disclosed.

Patent Documents 1 and 2 disclose a technique for forming a storage capacitor having a sufficient capacity in the pixel region.
JP 2001-330856 A JP 2001-330857 A

Incidentally, in recent years, miniaturization of elements has been promoted. Along with this, the wiring pattern is reduced in diameter, the interval between the wirings is also narrowed, and the space allowed for forming the storage capacitor is becoming smaller. For this reason, it is difficult to secure a sufficient capacity as a storage capacity of the data line, and there is a problem that a writing failure to the pixel electrode is likely to occur.

It is an object of the present invention to provide an electro-optical device and an electronic apparatus that can secure a sufficient storage capacity with a small area by configuring a storage capacity of a data line with a multilayer structure.

Electro-optical device according to the present invention includes a pixel electrode provided corresponding to intersections of a plurality of scanning lines and a plurality of data lines, and a storage capacitor that is electrically connected respectively to the plurality of data lines In the electro-optical device, the storage capacitor is formed from a layer between the data line and the pixel electrode, and is electrically connected to the data line, and the lower electrode is disposed on the lower electrode. An upper electrode electrically connected to the electrode through a pair of contact holes, and a fixed electrode to which a fixed potential is supplied between the lower electrode and the upper electrode, the fixed electrode being the lower electrode An electrode and a first capacitive insulating film are formed, and the upper electrode and the second capacitive insulating film are formed, and the lower electrode and the pair of contact holes are formed between the pair of contact holes in a plan view. In a direction intersecting the upper electrode Characterized by standing.

According to such a configuration, the storage capacitor has a multilayer structure of the lower electrode, the fixed electrode, and the upper electrode, and the lower electrode and the upper electrode share the fixed electrode. Thereby, a capacity is formed between the lower electrode and the fixed electrode, and a capacity is formed between the upper electrode and the fixed electrode. The fixed electrode is shared, and a sufficient capacitance value can be obtained with a small occupied area. As a result, even when the area of the storage capacitor formation region is relatively small due to miniaturization, a sufficient capacitance value can be ensured and data on the data line can be sufficiently held, and writing defects to the pixel electrode can occur. Can be prevented.

Further, the electro-optical device according to the present invention includes a pixel electrode provided corresponding to intersections of a plurality of scanning lines and a plurality of data lines, the plurality of storage capacitor which is electrically connected respectively to the data line and The storage capacitor is formed of a layer between the data line and the pixel electrode, and a first fixed electrode to which a fixed potential is supplied is provided on the first fixed electrode. Further, the data line and the first contact hole are provided between the second fixed electrode electrically connected to the first fixed electrode, and the first fixed electrode and the second fixed electrode. A relay electrode electrically connected via a second contact hole and another data line spaced apart from the data line and electrically connected to the first data line. The electrode is formed through the relay electrode and the first capacitive insulating film. The second fixed electrode is formed through the relay electrode and a second capacitive insulating film, and the first fixed electrode and the second fixed electrode are the first fixed electrode and the first fixed electrode when viewed in plan. The contact hole extends between the contact hole and the second contact hole in a direction crossing the relay electrode .

According to such a configuration, the storage capacitor has a multilayer structure of the first fixed electrode, the relay electrode, and the second fixed electrode, and the relay electrode is shared by the first and second fixed electrodes. Thereby, a capacity is constituted by the first fixed electrode and the relay electrode, and a capacity is constituted by the second fixed electrode and the relay electrode. The relay electrode is shared, and a sufficient capacitance value can be obtained with a small occupied area. As a result, even when the area of the storage capacitor formation region is relatively small due to miniaturization, a sufficient capacitance value can be ensured and data on the data line can be sufficiently held, and writing defects to the pixel electrode can occur. Can be prevented.

According to one embodiment of the present invention, the storage capacitor is provided in a peripheral region of a display region in which the pixel electrode is disposed.

According to such a configuration, a sufficient storage capacity can be obtained with a small area in the peripheral region of the display region.

According to another aspect of the present invention, in the display region in which the pixel electrode is disposed, a lower electrode in the display region formed on the data line via an interlayer insulating film, and an upper electrode in the display region A display region capacitive insulating film formed on the display region, and a display region upper electrode formed on the display region capacitive insulating film to which a fixed potential is supplied. The fixed electrode is formed of the same layer as the upper electrode in the display area, and the upper electrode is formed of the same layer as the pixel electrode.

According to such a configuration, the lower electrode is configured in the same layer as the lower electrode in the display area, and the fixed electrode is configured in the same layer as the upper electrode in the display area. Thereby, a sufficient storage capacity can be obtained with a small area without increasing the number of steps.

According to another aspect of the present invention, in the display region in which the pixel electrode is arranged, a lower electrode in the display region that is formed on the data line via an interlayer insulating film and is supplied with a fixed potential, and the display A display-region capacitive insulating film formed on the region- lower electrode; and a display-region upper electrode formed on the display-region capacitive insulating film, wherein the first fixed electrode includes the display region The relay electrode is formed of the same layer as the upper electrode in the display area, and the second fixed electrode is formed of the same layer as the pixel electrode. To do.

According to such a configuration, the first fixed electrode is configured in the same layer as the lower electrode in the display area, and the relay electrode is configured in the same layer as the upper electrode in the display area. Thereby, a sufficient storage capacity can be obtained with a small area without increasing the number of steps.

  An electronic apparatus according to an aspect of the invention is configured using the electro-optical device.

According to such a configuration, defective writing to the pixel electrode is not caused by a sufficient storage capacity of the data line, and high-quality image display is possible.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

<First Embodiment>
FIG. 1 is a cross-sectional view showing the structure of a storage capacitor employed in the electro-optical device according to the first embodiment of the invention. FIG. 2 is a plan view corresponding to FIG. This embodiment is applied to a liquid crystal device using a TFT substrate as an electro-optical device. FIG. 3 is a plan view of the liquid crystal device, which is an electro-optical device according to the present embodiment, viewed from the counter substrate side together with the components formed thereon. FIG. 4 is a cross-sectional view showing the liquid crystal device after the assembly process in which the TFT substrate and the counter substrate are bonded to each other and the liquid crystal is sealed is cut along the line HH ′ in FIG. FIG. 5 is a circuit diagram showing a circuit configuration of the electro-optical device. FIG. 6 is an equivalent circuit diagram of various elements and wirings in a plurality of pixels constituting the pixel region of the liquid crystal device. FIG. 7 is a cross-sectional view showing the pixel structure of the liquid crystal device in detail. In addition, in each said figure, in order to make each layer and each member into the magnitude | size which can be recognized on drawing, the scale is varied for every layer and each member.

First, an overall configuration of a liquid crystal device which is an electro-optical device according to the present embodiment will be described with reference to FIGS.
As shown in FIGS. 3 and 4, the liquid crystal device includes, for example, a quartz substrate, a glass substrate, a TFT substrate 10 using a silicon substrate, and a counter substrate using, for example, a glass substrate or a quartz substrate. The liquid crystal 50 is sealed between the two. Oppositely arranged TFT substrate 1
0 and the counter substrate 20 are bonded together by a sealing material 52.

On the TFT substrate 10, pixel electrodes (ITO) 9a constituting pixels are arranged in a matrix. A counter electrode (ITO) 21 is provided on the entire surface of the counter substrate 20. TFT
On the pixel electrode 9 a of the substrate 10, an alignment film 16 that has been subjected to a rubbing process is provided.
On the other hand, an alignment film 22 subjected to a rubbing process is also provided on the counter electrode 21 formed over the entire surface of the counter substrate 20. The alignment films 16 and 22 are made of a transparent organic film such as a polyimide film, for example.

  FIG. 5 is a circuit diagram showing an electrical configuration of the electro-optical device according to the present embodiment.

As shown in FIG. 5, the electro-optical device includes a display area 10a and a data line driving circuit 101 and a scanning line driving circuit 104 for driving the display area 10a.

In the display area 10a, pixels 9 are configured corresponding to the intersections of the plurality of scanning lines 11a extending in the X direction and the plurality of data lines 6a extending in the Y direction. When the display area 10a is constituted by a TFT liquid crystal panel, a TFT and a pixel electrode are formed in each pixel 9. TFT
Is turned on and off by a scanning signal supplied via the scanning line 11a, and the data supplied via the data line 6a is applied to the pixel electrode.

FIG. 6 shows an equivalent circuit in the case where the pixel 9 in the display region 10a in FIG. As shown in FIG. 6, in the pixel region, a plurality of scanning lines 11a and a plurality of data lines 6a are wired so as to intersect with each other, and a pixel electrode is formed in a region partitioned by the scanning lines 11a and the data lines 6a. 9a are arranged in a matrix. A TFT 30 is provided corresponding to each intersection of the scanning line 11 a and the data line 6 a, and the pixel electrode 9 a is connected to the TFT 30.

The TFT 30 is turned on by the ON signal of the scanning line 11a, whereby the data line 6a
The image signal supplied to is supplied to the pixel electrode 9a. A voltage between the pixel electrode 9 a and the counter electrode 21 provided on the counter substrate 20 is applied to the liquid crystal 50. In addition, a storage capacitor 70 is provided in parallel with the pixel electrode 9a, and the storage capacitor 70 makes it possible to hold the voltage of the pixel electrode 9a for a time that is, for example, three orders of magnitude longer than the time when the source voltage is applied. Storage capacity 70
Thus, the voltage holding characteristic is improved, and an image display with a high contrast ratio is possible.

  FIG. 7 is a schematic cross-sectional view of a liquid crystal device focusing on one pixel.

A plurality of pixel electrodes 9a are provided in a matrix on the TFT substrate 10, and data lines 6a and scanning lines 11a are provided along the vertical and horizontal boundaries of the pixel electrodes 9a. As will be described later, the data line 6a has an aluminum film or a laminated structure including an aluminum film, and the scanning line 11a is made of, for example, a conductive polysilicon film or a tungsten silicide film. The scanning line 11a is electrically connected to the gate electrode 3a facing the channel region 1a ′ in the semiconductor layer 1a. That is, the pixel switching TFT 30 is configured by disposing the gate electrode 3a connected to the scanning line 11a and the channel region 1a ′ so as to face each other at the intersection of the scanning line 11a and the data line 6a.

On the TFT substrate 10, in addition to the TFT 30 and the pixel electrode 9a, various configurations including these are provided in a laminated structure. As shown in FIG. 1, the stacked structure includes, in order from the bottom, a first layer including the scanning line 11a, a second layer including the TFT 30 including the gate electrode 3a, and the data line 6a.
A third layer including the storage capacitor 70, a fifth layer including the pixel electrode 9a, the alignment film 16, and the like.
Consists of layers. Further, the base insulating film 12 is provided between the first layer and the second layer, the first interlayer insulating film 41 is provided between the second layer and the third layer, and the second interlayer insulating film 42 is provided between the third layer and the fourth layer. , 4th and 5th
A third interlayer insulating film 43 is provided between the layers to prevent the above-described elements from being short-circuited. In addition, these various insulating films 12, 41, 42 and 43 include, for example,
A contact hole or the like for electrically connecting the high concentration source region 1d in the semiconductor layer 1a of the TFT 30 and the data line 6a is also provided. Hereinafter, each of these elements will be described in order from the bottom.

For the first layer, for example, Ti (titanium), Cr (chromium), W (tungsten), Ta (
A scanning line 11a made of a simple metal, an alloy, a metal silicide, a polysilicide, a laminate of these, or conductive polysilicon containing at least one of refractory metals such as tantalum) and Mo (molybdenum) is provided. Is provided. The scanning line 11a is planarly
It is patterned in a stripe shape in the horizontal direction and has a protruding portion extending in the Y direction in FIG. 6 along the data line 6a. Note that the protrusions extending from the adjacent scanning lines 11a are not connected to each other, and therefore the scanning lines 11a are divided one by one.

Thus, the scanning line 11a has a function of simultaneously controlling ON / OFF of the TFTs 30 existing in the same row. In addition, since the scanning line 11a is formed so as to substantially fill a region where the pixel electrode 9a is not formed, it also has a function of blocking light entering the TFT 30 from below. Thereby, generation of light leakage current in the semiconductor layer 1a of the TFT 30 is suppressed, and high-quality image display without flicker or the like is possible.

In the second layer, the TFT 30 including the gate electrode 3a is provided. The TFT 30 is shown in FIG.
As shown in FIG. 4, the semiconductor device has an LDD (Lightly Doped Drain) structure, and includes the above-described gate electrode 3a, for example, a semiconductor layer made of a polysilicon film and having a channel formed by an electric field from the gate electrode 3a 1a channel region 1a ′, insulating film 2 including a gate insulating film that insulates gate electrode 3a from semiconductor layer 1a, low concentration source region 1b and low concentration drain region 1c, high concentration source region 1d and high concentration in semiconductor layer 1a A concentration drain region 1e is provided.

The TFT 30 described above preferably has an LDD structure as shown in FIG. 7, but may have an offset structure in which no impurity is implanted into the low concentration source region 1b and the low concentration drain region 1c, and the gate electrode 3a may be provided. A self-aligned TFT that implants impurities at a high concentration as a mask and forms a high concentration source region and a high concentration drain region in a self-aligning manner may be used. In this embodiment, the gate electrode of the pixel switching TFT 30 is
Although only one single gate structure is provided between the high concentration source region 1d and the high concentration drain region 1e, two or more gate electrodes may be provided therebetween. If the TFT is configured with dual gates or triple gates or more in this way, leakage current at the junction between the channel and the source and drain regions can be prevented, and the off-time current can be reduced.
Further, the semiconductor layer 1a constituting the TFT 30 may be a non-single crystal layer or a single crystal layer. A known method such as a bonding method can be used for forming the single crystal layer. By making the semiconductor layer 1a a single crystal layer, it is possible to improve the performance of peripheral circuits in particular.

A base insulating film 12 made of, for example, a silicon oxide film is provided on the scanning line 11a described above and below the TFT 30. The base insulating film 12 includes the scanning line 11a and the TFT 3
In addition to the function to insulate from 0, it is formed on the entire surface of the TFT substrate 10, so that the TF for pixel switching due to roughness at the time of surface polishing of the TFT substrate 10 or dirt remaining after cleaning, etc.
It has a function to prevent a change in characteristics of T30.

A groove (contact hole) 12cv is formed in the base insulating film 12, and a part 3b of the gate electrode 3a is formed so as to fill the groove 12cv. The gate electrode 3a is formed so as to fill the groove 12cv and its lower end is in contact with the scanning line 11a. Accordingly, the scanning line 11a and the gate electrode 3a in the same row have the same potential. A structure in which another scanning line including the gate electrode 3a is formed so as to be parallel to the scanning line 11a may be employed. In this case, the scanning line 11a and the other scanning line have a redundant wiring structure. Thereby, for example, even when a part of the scanning line 11a has some defect and normal energization becomes impossible, the scanning line 11a
As long as another scanning line existing in the same row is healthy, the operation control of the TFT 30 can still be normally performed through the scanning line.

A data line 6a is provided in the third layer. The data line 6a is formed in a stripe shape so as to coincide with the extending direction of the semiconductor layer 1a of the TFT 30, that is, to overlap in the vertical direction. The data line 6a is made of, for example, an aluminum material having a high reflectance. The data line 6a may be formed in a multilayer structure using aluminum as the lower layer and titanium nitride as the upper layer.

Since the data line 6a contains aluminum which is a relatively low resistance material, the TFT 30
The image signal can be supplied to the pixel electrode 9a without any delay.

In the third layer, a relay layer 6a1 for relay to the storage capacitor 70 of the fourth layer is formed as the same film as the data line 6a. These are not formed so as to have a planar shape continuous with the data line 6a when viewed in plan, but are formed so as to be divided by patterning.

The relay layer 6a1 is formed in the same process as the data line 6a as a film having a multilayer structure of a layer made of aluminum and a layer made of titanium nitride in order from the lower layer. The titanium nitride layer
It functions as a barrier metal for preventing etching through of the contact hole 83 formed for the relay layer 6a1.

In the fourth layer, a storage capacitor 70 is provided. The storage capacitor 70 is a lower electrode 71 as a pixel potential side capacitor electrode connected to the high concentration drain region 1e of the TFT 30 and the pixel electrode 9a.
And the capacitor line 300 including the fixed potential side capacitor electrode are formed so as to face each other with the dielectric film 75 interposed therebetween. According to the storage capacitor 70, it is possible to remarkably improve the potential holding characteristic in the pixel electrode 9a. Further, since the storage capacitor 70 is formed so as not to reach the light transmission region substantially corresponding to the formation region of the pixel electrode 9a (in other words, formed so as to be within the light shielding region), The pixel aperture ratio of the entire electro-optical device is kept relatively large, and thus a brighter image can be displayed.

More specifically, the lower electrode 71 is made of a metal film and functions as a pixel potential side capacitor electrode.
However, the lower electrode 71 may be composed of a single layer film or a multilayer film containing a metal or an alloy.
Further, the lower electrode 71 has a function as a pixel potential side capacitor electrode, and the pixel electrode 9a and the T electrode.
It has a function of relay connection with the high-concentration drain region 1e of the FT30.

The capacitor line 300 functions as a fixed potential side capacitor electrode of the storage capacitor 70. The constant potential source may be a positive potential source or a negative potential constant source supplied to the data line driving circuit 101 described later, or a constant potential source supplied to the counter electrode 21 of the counter substrate 20. This capacitance line 3
00 has a two-layer structure of an aluminum layer 301 as a lower layer and a titanium nitride layer 302 as an upper layer.
On the FT substrate 10, it is formed in an island shape so as to correspond to each pixel. Lower electrode 71
And the capacitor line 300 are formed to have substantially the same shape.

As a result, the storage capacitor 70 does not have a wasteful spread in a plane, that is, without decreasing the pixel aperture ratio, and can achieve the maximum capacitance value under the circumstances. That is, the storage capacitor 70 has a smaller area and a larger capacitance value.

The dielectric film 75 is made of, for example, a relatively thin silicon oxide film or a silicon nitride film having a thickness of about 5 to 200 nm. From the viewpoint of increasing the storage capacitor 70, the thinner the dielectric film 75 is, the better as long as the reliability of the film is sufficiently obtained.

On the TFT 30 or the gate electrode 3a described above and below the data line 6a, for example, NSG (non-silicate glass), PSG (phosphorus silicate glass), BSG (boron silicate glass), BPSG (boron phosphorus silicate glass). A first interlayer insulating film 41 made of silicate glass film, silicon nitride film, silicon oxide film, or the like, or preferably NSG is formed. The first interlayer insulating film 41 is provided with a contact hole 81 that electrically connects the high concentration source region 1d of the TFT 30 and a data line 6a described later. Further, in order to electrically connect the high-concentration drain region 1e of the TFT 30 and the lower electrode 71 constituting the storage capacitor 70 to the first interlayer insulating film 41, the contact hole 8
2 is opened.

On the data line 6a and below the storage capacitor 70, for example, NSG, PSG, BSG, B
A silicate glass film such as PSG, a silicon nitride film, a silicon oxide film, or the like, or preferably a second interlayer insulating film 42 formed by a plasma CVD method using TEOS gas is formed. In the second interlayer insulating film 42, a contact hole 83 for electrically connecting the high concentration drain region 1e of the TFT 30 and the lower electrode 71 of the storage capacitor 70 is opened. That is, the high-concentration drain region 1e of the TFT 30 includes the contact hole 82 and the relay layer 6a.
1 and the contact hole 83 to be connected to the lower electrode 71 of the storage capacitor 70.

As described above, the pixel electrode 9a is formed in a matrix on the fifth layer, and the pixel electrode 9a
An alignment film 16 is formed thereon. Under the pixel electrode 9a, NSG, PSG,
A third interlayer insulating film 43 made of a silicate glass film such as BSG or BPSG, a silicon nitride film, a silicon oxide film or the like, or preferably a plasma TEOS film formed by a plasma CVD method using TEOS gas is formed. . The third interlayer insulating film 43 has a pixel electrode 9.
A contact hole 84 for electrically connecting a and the lower electrode 71 of the storage capacitor 70 is opened.

The surfaces of the second and third interlayer insulating films 42 and 43 are formed by CMP (Chemical Mechanical Polishin).
g) It is flattened by processing. Alignment defects of the liquid crystal layer 50 due to steps due to various wirings and elements existing under the planarized interlayer insulating films 42 and 43 are reduced.

As shown in FIGS. 2 and 3, the counter substrate 20 is provided with a light shielding film 53 as a frame for partitioning the display area. The counter substrate 20 is also provided with a light shielding film 23. As described above, a transparent conductive film such as ITO is formed on the entire surface of the counter substrate 20 as the counter electrode 21, and a polyimide-based alignment film 22 is formed on the entire surface of the counter electrode 21. Alignment film 2
No. 2 is rubbed in a predetermined direction so as to give a predetermined pretilt angle to the liquid crystal molecules.

In a region outside the light shielding film 53, a sealing material 52 that encloses liquid crystal is formed between the TFT substrate 10 and the counter substrate 20. The sealing material 52 is disposed so as to substantially match the contour shape of the counter substrate 20, and fixes the TFT substrate 10 and the counter substrate 20 to each other. The sealing material 52 is missing in a part of one side of the TFT substrate 10, and the liquid crystal injection port 108 for injecting the liquid crystal 50.
Is formed. Liquid crystal is injected from the liquid crystal injection port 108 into the gap between the bonded TFT substrate 10 and counter substrate 20. After the liquid crystal injection, the liquid crystal injection port 108 is sealed with a sealing material 109.

In an area outside the sealing material 52, an image signal is supplied to the data line 6a at a predetermined timing to drive the data line 6a and an external connection terminal 102 for connection to an external circuit. Are provided along one side of the TFT substrate 10. A scanning line driving circuit 104 that drives the gate electrode 3a by supplying a scanning signal to the scanning line 11a and the gate electrode 3a at a predetermined timing is provided along two sides adjacent to the one side. The scanning line driving circuit 104 has a T at a position facing the light shielding film 53 inside the sealing material 52.
It is formed on the FT substrate 10. Further, on the TFT substrate 10, a data line driving circuit 101,
Wiring 10 for connecting the scanning line driving circuit 104, the external connection terminal 102 and the vertical conduction terminal 107
5 is provided opposite to the three sides of the light shielding film 53.

The vertical conduction terminals 107 are formed on the four TFT substrates 10 at the corners of the sealing material 52. The lower end is between the TFT substrate 10 and the counter substrate 20.
The vertical conduction member 106 whose upper end is in contact with the counter electrode 21 is provided. The vertical conduction member 106 establishes electrical continuity between the TFT substrate 10 and the counter substrate 20.

In FIG. 5, the data line driving circuit 101 is supplied with a data supply timing signal such as a data transfer clock and a data enable signal via the external connection terminal 102 in FIG. Further, the scanning line driving circuit 104 is supplied with a scanning start pulse DY, a scanning side transfer clock CLY, and the like via the external connection terminal 102.

The scanning line driving circuit 104 sequentially outputs scanning signals to the scanning lines 11a when the scanning start pulse DY is input. The scanning-side transfer clock CLY is a signal that defines the scanning-side scanning speed, and the scanning signal is sequentially sent to each scanning line 11a in synchronization with the transfer clock.

A video signal is input to the input terminal 111 via the external connection terminal 102. The data line driving circuit 101 has gates TA1 to TA at timings based on the data supply timing signal.
By controlling m, the video signal transferred to the video signal 112 is supplied to each data line 6a (each data line S1 to Sm).

Between each data line S1 to Sm and the terminal 115 and in the peripheral region of the display region 10a,
Retention capacitors C1 to Cm for data lines are provided. The terminal 115 has a predetermined fixed potential,
For example, the reference potential is supplied, and the holding capacitors C1 to Cm hold the video signals supplied to the data lines S1 to Sm.

Each data line S1 to Sm is also connected to a terminal 114 via gates TB1 to TBm, respectively. The gates TB1 to TBm are turned on and off by a drive signal supplied to the terminal 113 so that the potentials from the terminal 114 can be precharged to the data lines S1 to Sm.

In the present embodiment, the storage capacitors C1 to Cm connected to the ends of the data lines S1 to Sm.
Has a multi-layer structure. FIG. 1 is a cross-sectional view showing the configuration of the storage capacitor. FIG. 2 is a plan view of the storage capacitor formation region.

1 and 2, the data line 6a is continuously formed on the data line 6a (data lines S1 to Sm) in the display area 10a. The data line 6a ′ is separated from the data line 6a and the end thereof is connected to the terminal 114. Data line 6 configured in the storage capacitor formation region
a and 6a ′ are also formed in the same layer as the data line 6a and the relay layer 6a ′ in the display area 10a.

An interlayer insulating film 87 is formed on the data lines 6a and 6a ′. This interlayer insulating film 87
Can be formed, for example, as the same layer as the second interlayer insulating film 42 (see FIG. 7). Contact holes 88 and 89 are opened in the interlayer insulating film 87. These contact holes 88 and 89 can be formed simultaneously with the contact hole 83 provided in the second interlayer insulating film 42.

On the interlayer insulating film 87, a relay source line 90 (shaded hatched portion) is formed as a lower electrode formed in the same layer as the lower electrode 71 of the display region 10a. The relay source line 90 is formed so as to fill the contact holes 88 and 89, and electrically connects the data line 6a and the data line 6a ′.

On the relay source line 90, a dielectric film 94 is formed in the same layer as the dielectric film 75 in the display region 10a. On the dielectric film 94, a fixed electrode 95 that is the same layer as the capacitor line 300 in the display region 10a and is a fixed potential side capacitor electrode is formed.

Further, in the present embodiment, a dielectric film 96 is formed on the fixed electrode 95, and an upper electrode 97 made of a metal material is formed on the dielectric film 96. The upper electrode 97 is
When the pixel electrode is formed from a metal material such as aluminum, it can be formed in the same layer as the pixel electrode. An interlayer insulating film 91 is formed between the relay source line 90 and the upper electrode 97, and contact holes 92 and 93 for connecting the relay source line 90 and the upper electrode 97 are formed in the interlayer insulating film 91. It is open. Through the contact holes 92 and 93, the relay source line 90 and the upper electrode 97 are electrically connected and maintained at the same potential. The fixed electrode 95 is held at a predetermined fixed potential. That is, the fixed electrode 95 is connected to the terminal 115 in FIG.

In the present embodiment, a first storage capacitor is formed by the relay source line 90, the dielectric film 94, and the fixed electrode 95, and the second electrode is formed by the upper electrode 97, the dielectric film 96, and the fixed electrode 95.
Is formed. The capacity of each of the storage capacitors C1 to Cm is the sum of the first and second storage capacitors. The first and second storage capacitors include a lower electrode 90, a fixed electrode 95, and an upper electrode 9
7 and the film thickness of the dielectric films 94 and 96. Dielectric films 94, 9
6 are equal to each other, the relay source line 90, the fixed electrode 95, and the upper electrode 97 have a storage capacity of about twice the capacity formed by the relay source line 90 and the fixed electrode 95. can get.

Note that the relay source lines 90 and the upper electrodes 97 constituting the adjacent storage capacitors need to be electrically isolated, but the dielectric films 94 and 96 are commonly used for the plurality of data lines 6a. it can. Further, since the insulation is maintained by the dielectric films 94 and 96, the fixed electrode 9
5 can also be used in common by the plurality of data lines 6a.

Further, two contact holes 92 and 93 are used for connection between the relay source line 90 and the upper electrode 97.
However, by using one or more contact holes, electrical conduction between them can be achieved.

As described above, in this embodiment, the storage capacitor is configured by disposing the relay source line and the upper electrode on the upper layer and the lower layer of the common fixed electrode, and the storage capacitor having a relatively large capacity with a small area is formed. Can be configured. Also, the relay source line is formed in the same layer as the lower electrode in the display area, the dielectric film is formed in the same layer as the dielectric film in the display area, and the fixed electrode is formed in the same layer as the capacitor electrode in the display area. Thus, a sufficient storage capacity can be configured while suppressing an increase in the number of processes.

<Second Embodiment>
FIG. 8 is a cross-sectional view showing the structure of the storage capacitor employed in the electro-optical device according to the second embodiment of the invention. FIG. 9 is a plan view corresponding to FIG. FIG. 10 is a cross-sectional view showing an example of a liquid crystal panel in which the pixel potential side capacitance electrode is formed above the fixed potential side capacitance electrode in the display region. In FIG. 8 and FIG. 9, the same components as those in FIG. 1 and FIG. In FIG. 10, the same components as those in FIG.

10, the configuration of the storage capacitor 120 is different from the configuration of the storage capacitor 70 of FIG. On the second interlayer insulating film 42, the lower electrode 1 which is a part of the capacitance line and functions as a fixed potential side capacitance electrode
21 is formed. A dielectric film 125 is formed on the lower electrode 121, and an upper electrode 130 serving as a pixel potential side capacitor electrode is formed on the dielectric film 125. The upper electrode 130 is formed so as to fill the contact hole 83, and is connected to the relay layer 6 a 1 through the contact hole 83. The upper electrode 130 is connected to the pixel electrode 9a through the contact hole 84.

8 and 9, on the interlayer insulating film 87, a lower electrode 141 (shaded hatched portion) as a first fixed electrode formed in the same layer as the lower electrode 121 which is the fixed potential side capacitor electrode in FIG. ) Is formed. On the lower electrode 141, a dielectric film 142 is formed in the same layer as the dielectric film 125 of FIG. On the dielectric film 142, a relay source line 140 is formed as a relay electrode in the same layer as the upper electrode 130 of FIG. The relay source line 140 is formed so as to fill the contact holes 88 and 89, and electrically connects the data line 6a and the data line 6a ′.

Furthermore, in the present embodiment, a dielectric film 143 is formed on the relay source line 140, and an upper electrode 144 as a second fixed electrode made of a metal material is formed on the dielectric film 143.
Is formed. An interlayer insulating film is formed in a portion where the relay source line 140 is not formed, and a contact hole 145 for electrically connecting the lower electrode 141 and the upper electrode 144 is opened in the interlayer insulating film. It is holed. By contact hole 145,
The lower electrode 141 and the upper electrode 144 are electrically connected and maintained at the same potential. The lower electrode 141 and the upper electrode 144 are maintained at a predetermined fixed potential as fixed potential side capacitance electrodes. That is, the lower electrode 141 and the upper electrode 144 are connected to the terminal 115 in FIG.

In the present embodiment, the first storage capacitor is formed by the lower electrode 141, the dielectric film 142, and the relay source line 140, and the upper electrode 144, the dielectric film 143, and the relay electrode 140 are formed.
As a result, a second storage capacitor is formed. The capacity of each of the storage capacitors C1 to Cm is the sum of the first and second storage capacitors. The first and second storage capacitors are determined by the surface area of the lower electrode 141, the relay source line 140 and the upper electrode 144, and the film thicknesses of the dielectric films 142 and 143. If the film thicknesses of the dielectric films 142 and 143 are the same, the capacitance of the lower electrode 141, the relay source line 140, and the upper electrode 144 is approximately twice the capacity formed by the lower electrode 141 and the relay source line 140. A value holding capacity is obtained.

Note that the relay source lines 140 constituting the adjacent storage capacitors need to be electrically isolated from each other, but the dielectric films 142 and 143 can be used in common for the plurality of data lines 6a. Further, since the insulation is maintained by the dielectric films 142 and 143, the lower electrode 141 and the upper electrode 144 can also be used in common for the plurality of data lines 6a.

Further, although an example in which the four contact holes 145 are used for the connection between the lower electrode 141 and the upper electrode 144 is illustrated, the electrical conduction between the two can be achieved by using one or more contact holes.

As described above, in this embodiment, the lower electrode and the upper electrode are arranged on the upper layer and the lower layer of the common relay source line to configure the storage capacitor, and the storage capacitor having a relatively large capacity can be obtained with a small area. Can be configured. The lower electrode is formed in the same layer as the lower electrode of the display area,
The dielectric film can be formed in the same layer as the dielectric film in the display area, and the relay source line can be formed in the same layer as the upper electrode in the display area, maintaining a sufficient capacity while suppressing an increase in the number of processes. Capacity can be configured.

Further, each of the above embodiments has an effect that the occurrence of flicker can be suppressed by reducing the asymmetry of the leak amount of the data line in the polarity inversion driving.

FIG. 11 is an explanatory diagram for explaining this characteristic. FIG. 11A is for explaining the characteristics of the first and second embodiments, and FIG. 11B is for explaining the characteristics in the conventional example.

In the conventional example shown in FIG. 11B, the storage capacitor has a lower electrode, an upper electrode, and a dielectric layer 153.
Consists of. The lower electrode is composed of a lower aluminum (Al) layer 151 and an upper titanium nitride (TiN) layer 152, and the upper electrode is also composed of a lower aluminum layer 154 and an upper titanium nitride layer 155. In the dielectric layer 153, the titanium nitride layer 152 is disposed in the lower layer, and the aluminum layer 154 is disposed in the upper layer.

The storage capacitor of the data line reverses the polarity of the pixel, so that the polarity of the upper electrode and the lower electrode is inverted in, for example, a field period or a horizontal period. However, the supply amount of electrons from aluminum is larger between aluminum (Al) and titanium nitride (TiN) due to the difference in work function. That is, when titanium nitride is positive (+) and aluminum is negative (-) (
In the case of the thick line arrow in FIG. 11B, the opposite case (in the case of the thin line arrow in FIG. 11B).
Leakage current becomes larger than.

In other words, the conventional example has a drawback that the amount of leak changes in the field period and the horizontal period due to polarity inversion driving and appears as flicker on the screen.

On the other hand, the first and second embodiments have a three-layer structure as shown in FIG. In each metal layer, the lower layer is an aluminum layer and the upper layer is a TiN layer. That is, the first layer has an aluminum layer 151 as a lower layer and a titanium nitride layer 152 as an upper layer, the second layer has an aluminum layer 154 as a lower layer, and a titanium nitride layer 155 as an upper layer, and the third layer is a lower layer. An aluminum layer 157 and a titanium nitride layer 158 as an upper layer are provided. Between the first layer and the second layer,
A dielectric layer 153 is formed, and a dielectric film 156 is formed between the second layer and the third layer.

Note that the first to third layers correspond to the relay source line 90, the fixed electrode 95, and the upper electrode 97 in the first embodiment, respectively, and the lower electrode 14 in the second embodiment.
1 corresponds to the relay source line 140 and the upper electrode 144.

In FIG. 11A, a thick line arrow indicates that the leak current is large, and a thin line arrow indicates that the leak current is small. For example, when the second layer is positive (+) and the first and third layers are negative (−), the amount of leakage from the titanium nitride layer 155 to the aluminum layer 157 is large. The amount of leakage to the titanium nitride layer 152 is small. Conversely, if the second layer is negative (−) and the first and third layers are positive (+), the amount of leakage from the aluminum layer 157 to the titanium nitride layer 155 is small, and the titanium nitride layer The amount of leakage from 152 to the aluminum layer 154 is large.

That is, in the first and second embodiments, the leak amount is substantially the same during positive polarity driving and negative polarity driving. Therefore, it is possible to prevent flicker from occurring in the polarity inversion driving cycle.

In each of the above embodiments, the storage capacitor is formed at the same time as the formation of each layer of the display region. However, each layer of the storage capacitor may be formed of a layer different from the display region.

In each of the above embodiments, the upper electrode of the storage capacitor has been described as not having the same film corresponding to the display region. For example, LCOS (Liquid Crystal On
When applied to (Silicon), the upper electrode of the storage capacitor can be formed of the same film as the reflective electrode of LCOS. In this case, the capacitance value can be increased without increasing the number of steps.

In addition, the apparatus of each said embodiment can employ a single wafer system and can manufacture a capacity | capacitance by low temperature formation. In each of the above embodiments, the storage capacitor and the storage capacitor are constituted by a metal layer, a dielectric layer, and a metal layer, and the dielectric layer formed on the metal layer needs to be formed by low-temperature treatment. In this case, as a method of forming a dielectric layer with good film quality, there is a method of forming an oxide film or a nitride film by single wafer thermal CVD. Even when ALD (Atomic Layer Deposition) is adopted, a dielectric film having a good film quality can be formed at a low temperature.

In each of the above embodiments, an example in which a storage capacitor around the display area is formed has been described. However, the present invention can be similarly applied to a storage capacitor of each pixel in the display area.

(Electronics)
Next, an overall configuration, particularly an optical configuration, of an embodiment of a projection color display device as an example of an electronic apparatus using the electro-optical device described in detail as a light valve will be described. FIG. 12 is an explanatory diagram of a projection type color display device.

In FIG. 12, a liquid crystal projector 1100, which is an example of a projection type color display device in the present embodiment, prepares three liquid crystal modules including a liquid crystal device having a drive circuit mounted on a TFT array substrate, and each has RGB light bulbs 100R. , 100G and 100B. In the liquid crystal projector 1100, when projection light is emitted from a lamp unit 1102 of a white light source such as a metal halide lamp, the light components R, G, and R corresponding to the three primary colors of RGB are obtained by three mirrors 1106 and two dichroic mirrors 1108. The light is divided into B and led to the light valves 100R, 100G and 100B corresponding to the respective colors. In particular, the B light is guided through a relay lens system 1121 including an incident lens 1122, a relay lens 1123, and an exit lens 1124 in order to prevent light loss due to a long optical path. And light valves 100R, 100G and 10
The light components corresponding to the three primary colors respectively modulated by 0B are the dichroic prism 111.
2, and then is projected as a color image on the screen 1120 via the projection lens 1114.

The electro-optical device of the present invention is not limited to a passive matrix liquid crystal display panel,
An active matrix type liquid crystal panel (for example, TFT (thin film transistor) or TFD (
The present invention can be similarly applied to a liquid crystal display panel provided with a thin film diode) as a switching element. In addition to liquid crystal display panels, electroluminescence devices,
Organic electroluminescence devices, plasma display devices, electrophoretic display devices, devices using electron emission (Field Emission Display and Surface-Conduction Elect
ron-Emitter Display etc.), DLP (Digital Light Processing) (aka DMD: Digita)
The present invention can be similarly applied to various electro-optical devices such as a micromirror device.

The present invention also provides a display device for forming an element on a semiconductor substrate, such as an LCOS (Liqu
id Crystal On Silicon).

In LCOS, a single crystal silicon substrate is used as an element substrate, and a transistor is formed on a single crystal silicon substrate as a switching element used for a pixel or a peripheral circuit. In addition, a reflective pixel electrode is used for the pixel, and each element of the pixel is formed under the pixel electrode.

FIG. 3 is a cross-sectional view illustrating a structure of a storage capacitor employed in the electro-optical device according to the first embodiment of the invention. The top view corresponding to FIG. FIG. 3 is a plan view of the liquid crystal device, which is the electro-optical device according to the present embodiment, viewed from the counter substrate side together with the components formed thereon. FIG. 4 is a cross-sectional view showing the liquid crystal device after the assembly process in which the TFT substrate and the counter substrate are bonded to each other and the liquid crystal is sealed is cut along the line HH ′ in FIG. 3. FIG. 3 is a circuit diagram showing a circuit configuration of the electro-optical device. FIG. 6 is an equivalent circuit diagram of various elements, wirings, and the like in a plurality of pixels constituting a pixel region of the liquid crystal device. FIG. 4 is a cross-sectional view illustrating a pixel structure of a liquid crystal device in detail. FIG. 6 is a cross-sectional view illustrating a structure of a storage capacitor employed in an electro-optical device according to a second embodiment of the invention. FIG. 9 is a plan view corresponding to FIG. 8. FIG. 4 is a cross-sectional view illustrating an example of a liquid crystal panel in which a pixel potential side capacitance electrode is formed above a fixed potential side capacitance electrode in a display region. Explanatory drawing for demonstrating the flicker reduction effect. Explanatory drawing which shows an example of an electronic device.

Explanation of symbols

6a: data line, 88, 89, 92, 93 ... contact hole, 90 ... relay source line, 95 ... fixed electrode, 97 ... upper electrode.

Claims (6)

An electro-optical device having pixel electrodes provided corresponding to intersections of a plurality of scanning lines and a plurality of data lines, and storage capacitors electrically connected to the plurality of data lines, respectively.
The holding capacity is
A lower electrode formed from a layer between the data line and the pixel electrode and electrically connected to the data line;
An upper electrode electrically connected to the lower electrode via a pair of contact holes on the lower electrode;
A fixed electrode to which a fixed potential is supplied is provided between the lower electrode and the upper electrode,
The fixed electrode is formed through the lower electrode and the first capacitive insulating film, and is formed through the upper electrode and the second capacitive insulating film. An electro-optical device that extends between holes in a direction intersecting with the lower electrode and the upper electrode. An electro-optical device having pixel electrodes provided corresponding to intersections of a plurality of scanning lines and a plurality of data lines, and storage capacitors electrically connected to the plurality of data lines, respectively.
The holding capacity is
A first fixed electrode formed from a layer between the data line and the pixel electrode and supplied with a fixed potential;
A second fixed electrode electrically connected to the first fixed electrode on the first fixed electrode;
The first fixed electrode and the second fixed electrode are electrically connected to the data line via the first contact hole, and are separated from the data line. A relay electrode electrically connected to the data line through the second contact hole;
The first fixed electrode is formed through the relay electrode and the first capacitive insulating film, and the second fixed electrode is formed through the relay electrode and the second capacitive insulating film, The first fixed electrode and the second fixed electrode extend between the first contact hole and the second contact hole in a direction crossing the relay electrode when viewed in a plan view. An electro-optical device.   The electro-optical device according to claim 1, wherein the storage capacitor is provided in a peripheral region of a display region where the pixel electrode is disposed. In the display region where the pixel electrode is disposed, a display area in the lower electrode formed via an interlayer insulating film on the data lines, and the display area in the display area Contents insulating film formed on the lower electrode A display region upper electrode formed on the display region capacitive insulating film and supplied with a fixed potential;
The lower electrode is composed of the same layer as the lower electrode in the display area,
The fixed electrode is composed of the same layer as the upper electrode in the display area,
The electro-optical device according to claim 1, wherein the upper electrode is formed of the same layer as the pixel electrode. Wherein in the display region where the pixel electrode is arranged, a display area in the lower electrode fixed potential is formed via an interlayer insulating film on the data line is supplied, the display area in the display region formed on the lower electrode An internal capacitance insulating film, and a display area upper electrode formed on the display area internal capacitance insulating film,
The first fixed electrode is composed of the same layer as the lower electrode in the display area,
The relay electrode is composed of the same layer as the upper electrode in the display area,
The electro-optical device according to claim 2, wherein the second fixed electrode is configured in the same layer as the pixel electrode.   An electronic apparatus comprising the electro-optical device according to any one of claims 1 to 5.

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