JP4869810B2 - Subtraction circuit - Google Patents

Description

  The present invention relates to a subtracting circuit, and more particularly to a subtracting circuit suitable for use in a pickup device.

  In general, the pickup device has not only a function of reading data from an optical disc but also a function of detecting an error in the track direction. An error signal based on the error in the track direction is output as a difference in the amount of light received by each light receiving element when a light spot is incident on the plurality of light receiving elements. For example, as shown in FIG. 6 (a), when the light spot 6 is uniformly incident on the first light receiving element 1 and the second light receiving element 2, the received light amounts of the respective light receiving elements become equal, resulting in an error. No signal is detected. On the other hand, as shown in FIG. 6B or FIG. 6C, when the incident position of the light spot 6 is shifted, the amount of light received by the first light receiving element 1 and the second light receiving element 2 is shifted. There is a difference between the two, and this difference is output as an error signal.

  FIG. 7 is a block diagram of a subtracting circuit that outputs a difference between light amounts received by two light receiving elements. In the subtraction circuit according to the prior art, a photocurrent is output as a current signal from each light receiving element. Each photocurrent is subjected to voltage conversion and then subtracted. Hereinafter, the subtraction circuit according to the prior art will be described in detail.

  First, the first light receiving element 1 and the second light receiving element 2 output a first photocurrent IP1 and a second photocurrent IP2, respectively, according to the amount of received light. As such a light receiving element, for example, a photodiode is used.

  Next, the first photocurrent IP1 and the second photocurrent IP2 are respectively supplied to the first voltage signal VP1 and the second photocurrent IP6 by the first current voltage converter 5 and the second current voltage converter 6, respectively. It is converted into a voltage signal VP2. The gains of the first voltage signal VP1 and the second voltage signal VP2 are set by a feedback resistor R2 of the first operational amplifier 5 and a feedback resistor R3 of the second operational amplifier 6, respectively.

  Next, the voltage signal VP1 is input to the non-inverting input terminal + of the operational amplifier 9. The voltage signal VP2 is input to the inverting input terminal − of the operational amplifier 9. That is, in the operational amplifier 9, since the first voltage signal VP1 is input to the non-inverting input terminal +, it is processed as an addition signal, and the second voltage signal VP2 is input to the inverting input terminal −. Therefore, the signal is processed as a subtraction signal. As a result of such signal processing, the operational amplifier 9 outputs an error signal VS based on the difference in the amount of light received by the first light receiving element 1 and the second light receiving element 2.

Examples of related technical literatures include the following patent literatures.
JP-A-7-147023 JP-A-11-340925

  As described above, in the subtraction circuit according to the prior art, the subtraction process is performed after the current signal is converted into the voltage signal. Therefore, in order to convert the first photocurrent IP1 and the second photocurrent IP2 into voltage signals, the first current-voltage converter 7 and the second current-voltage converter 8 are respectively It was necessary and the layout area was large.

  Further, the number of light receiving elements necessary for error detection is not limited to two, and more light receiving elements may be used. In this case, the layout area occupied by the subtraction circuit is further increased.

  However, the recent demand for low power consumption and low cost has been increasing, and it has been necessary to reduce the number of elements constituting the subtraction circuit according to the prior art.

In view of the above, the subtraction circuit according to the present invention includes an operational amplifier to which the first photocurrent output from the first light receiving element and the second photocurrent output from the second light receiving element are input. A first reference voltage is applied to a non-inverting input terminal of the operational amplifier via a first resistor, and a connection point between the non-inverting input terminal and the first resistor is The first photocurrent is input, the voltage of the non-inverting input terminal changes according to the first photocurrent, and the inverting input terminal of the operational amplifier is connected to a second resistor via a second resistor. A reference voltage is applied, the second photocurrent is input to a connection point between the inverting input terminal and the second resistor, and the voltage of the non-inverting input terminal is set to the first photocurrent. The output of the operational amplifier has a voltage corresponding to the difference between the first photocurrent and the second photocurrent. Is outputted, the first and second reference voltage, characterized in that without the first and second optical current is voltage the operational amplifier functions.

  In addition, the first photocurrent is input to a connection point between the non-inverting input terminal and the first resistor via a first current mirror circuit, and the inverting input terminal and the second resistor are connected. The second photocurrent is input to a connection point with the resistor via a second current mirror circuit.

  Further, the first reference voltage and the second reference voltage are the same voltage.

  The gain of the operational amplifier is set according to a feedback resistance of the operational amplifier.

  The subtraction circuit according to the present invention does not require an amplifier for converting the first photocurrent and the second photocurrent into voltages, unlike the arithmetic circuit according to the prior art. For this reason, the layout area required for the subtraction circuit is reduced. This becomes more important as the number of installed light receiving elements increases.

  In addition, the case where the light spot is incident on the first light receiving element 1 and the second light receiving element 2 equally is not the reference, but the case where the light spot is incident with a predetermined light receiving ratio is the reference. Sometimes it is good. In this regard, in the arithmetic circuit according to the present invention, the inverting input and the first photocurrent are connected via the first current mirror circuit, and the inverting input and the second photocurrent are connected to the second current. They are connected via a mirror circuit. Therefore, by changing the mirror constant of each current mirror circuit, the ratio of the received light amount between the first light receiving element and the second light receiving element as a reference can be easily set. Furthermore, by adjusting each current mirror circuit, the transient response characteristic of each photocurrent can be controlled, so that overshoot and undershoot can be prevented.

  Further, since the gain of the operational amplifier can be set according to the feedback resistance of the operational amplifier, the gain of the operational amplifier can be easily changed according to the order.

  Hereinafter, a subtraction circuit according to the present invention will be described in detail with reference to the drawings.

  FIG. 1 shows a block diagram of a subtraction circuit according to the present invention. In the subtraction circuit according to the present invention, the reference voltage Vref is applied to the non-inverting input terminal + of the operational amplifier 3 via the first resistor R1. A connection point P1 between the non-inverting input terminal + and the first resistor R1 is connected to the first light receiving element 1. Similarly, the reference voltage Vref is applied to the inverting input terminal − of the operational amplifier 3 via the second resistor R2. A connection point P2 between the inverting input terminal − and the second resistor R2 is connected to the second light receiving element 2.

  In such a configuration, when the first light receiving element 1 or the second light receiving element 2 is irradiated with light, the first photocurrent IP1 and the second photocurrent IP2 according to the amount of received light. Is output. Then, the value of the current flowing through the first resistor R1 and the second resistor R2 is changed by the first photocurrent IP1 and the second photocurrent IP2. For this reason, the voltage applied to the non-inverting input terminal + and the inverting input terminal − changes according to the first photocurrent IP1 and the second photocurrent IP2.

  That is, in the subtraction circuit according to the present invention, like the subtraction circuit according to the prior art shown in FIG. 8, the first current-voltage converter 7 for converting the voltage of the first photocurrent IP1 and the second photocurrent. The voltage corresponding to the current value of the first photocurrent IP1 and the second photocurrent IP2 does not go through the second current-voltage converter 8 that converts the voltage of IP2 to the non-inverting input terminal +, And the inverting input terminal −.

  Hereinafter, the subtraction circuit according to the present invention will be specifically described.

  First, the first light receiving element 1 and the second light receiving element 2 output the first photocurrent IP1 and the second photocurrent IP2, respectively, according to the amount of received light. As such a light receiving element, for example, a photodiode is used. A photodiode is a light receiving element that utilizes the fact that the reverse current of a semiconductor junction increases when irradiated with light.

  Next, the first photocurrent IP1 is inverted by a first current mirror circuit 4 comprising a transistor Q1 and a transistor Q2. Similarly, the second photocurrent IP2 is inverted by a second current mirror circuit 5 including a transistor Q3 and a transistor Q4.

  Here, the mirror ratio of the first current mirror circuit 4 and the mirror ratio of the second current mirror circuit 5 are adjusted as follows, for example. That is, as shown in FIG. 7A, when the light spot 6 is set on the basis of a position where the light spot 6 is equivalent to the first light receiving element 1 and the second light receiving element 2, the first current mirror circuit 4 is used. The second current mirror circuit 5 is adjusted to have the same mirror ratio. On the other hand, as shown in FIG. 7B, the light spot 6 is set on the basis of a position where the light spot 6 is closer to the first light receiving element 1, or as shown in FIG. 7C. 6 is set based on a position corresponding to the second light receiving element 2 as a reference, the mirror ratio of the first current mirror circuit 4 and the mirror ratio of the second current mirror circuit 5 are different. To be adjusted.

  Next, the first photocurrent IP1 inverted from the first current mirror circuit 4 is applied to the connection point P1. A reference voltage Vref is applied to the first resistor R1. Similarly, the second photocurrent IP2 inverted from the second current mirror circuit 5 is applied to the connection point P2. The reference voltage Vref is also applied to the second resistor R2.

  In such a configuration, when the first photocurrent IP1 and the second photocurrent IP2 change, the currents flowing through the first resistor R1 and the second resistor R2 also change. That is, the potential difference at both ends of the first resistor R1 and the potential difference at both ends of the second resistor R2 change according to the amount of light received by the first light receiving element 1 and the second light receiving element 2. Therefore, the potential applied to the non-inverting input terminal + and the inverting input terminal − changes.

  Next, an error signal VS corresponding to the potential difference between the non-inverting input terminal + and the inverting input terminal − is output from the output stage OUT of the operational amplifier 3. Then, based on the error signal VS, the light spot 6 is irradiated to the first light receiving element 1 and the second light receiving element 2 at a set ratio in a subsequent circuit (not shown). In addition, the irradiation direction of the light spot 6 is adjusted.

  Hereinafter, an example of the operational amplifier 3 will be described, and a subtraction process between the first photocurrent IP1 and the second photocurrent IP2 will be specifically described.

  FIG. 2 is a circuit diagram specifically showing the operational amplifier 3 for the subtraction circuit. The operational amplifier 3 in FIG. 1 is configured by the transistors Q5, Q6, Q7, Q8, and Q9 in FIG. 2, and the base of the transistor Q7 corresponds to the non-inverting input terminal +. The base corresponds to the inverting input terminal −. Also, the feedback resistor R3 connecting the output stage OUT of the operational amplifier 3 and the inverting input terminal − in FIG. 1 is formed at a position connecting the base of the transistor Q8 and the emitter of the transistor Q7 in FIG. The

  In such a configuration, this circuit operates so that the base voltage applied to the transistor Q7 is equal to the base voltage applied to the transistor Q8. The potential of the voltage signal VS output from the output stage OUT is a potential obtained by adding the base voltage of Q8 and the potential difference of the feedback resistor R3. This will be specifically described below.

  For simplicity, in the following description, the first light receiving element 1 and the second light receiving element 2 have the same performance, and when the same amount of light is irradiated, the same amount of photocurrent is applied. Is output. The first current mirror circuit 4 and the second current mirror circuit have the same mirror ratio. Further, it is assumed that the first resistor R1 and the second resistor R2 have the same resistance value.

  Under the above conditions, first, a case where the same amount of light is irradiated to the first light receiving element 1 and the second light receiving element 2 will be described. All of the first photocurrent IP1 flows through the first resistor R1. For this reason, the base voltage of the transistor Q7 is a voltage obtained by adding the reference voltage Vref and the potential difference of the first resistor R1 due to the first photocurrent IP1. Here, the constant current source CC connected to the output stage OUT has a current flowing through the feedback resistor R3 when the first photocurrent IP1 and the second photocurrent IP2 have the same current value. Is set not to flow. For this reason, all of the second photocurrent IP2 flows through the second resistor R2. As a result, the base voltage of the transistor Q8 becomes a voltage obtained by adding the reference voltage Vref and the potential difference of the second resistor R2 due to the first photocurrent IP2, and the base voltage of the transistor Q7 and the transistor Q8 It becomes the same as the base voltage. The potential of the error signal VS is the same as that of the transistor Q7 and the transistor Q8.

  Next, a case where a larger amount of light is applied to the second light receiving element 2 than the first light receiving element 1 will be described. In this case, the current value of the first photocurrent IP1 decreases, and the current value of the second photocurrent IP2 increases. Then, the base voltage of the transistor Q8 becomes higher than the base voltage of the transistor Q7. At this time, since the transistor Q7 and the transistor Q8 are differentially connected, the collector current of the transistor Q7 decreases and the collector current of the transistor Q8 increases. Then, the output current of the current mirror circuit composed of the transistors Q5 and Q6 decreases. For this reason, the base current of the transistor Q9 forming the emitter follower circuit is lowered. Since the transistor Q9 amplifies the base current, the emitter current of the transistor Q9 also decreases due to the decrease in the base current. Here, since the current flowing through the constant current source CC is set as described above, a part of the second photocurrent IP2 becomes part of the feedback resistor according to the decrease in the emitter current of the transistor Q9. Shunt to the R3 side. For this reason, the value of the current flowing to the second resistor R2 side of the second photocurrent IP2 becomes small. Accordingly, the potential difference of the second resistor R2 is reduced, and the base voltage of the transistor Q8 is lowered. As a result, the base voltage of the transistor Q7 and the base voltage of the transistor Q8 are the same. Then, the potential of the error signal VS becomes larger than the base voltage of Q7 by the potential difference of the feedback resistor R3 generated by the photocurrent IP2 being shunted to the feedback resistor R3.

  Next, a case where a small amount of light is irradiated to the second light receiving element 2 rather than the first light receiving element 1 will be described. In this case, the current value of the first photocurrent IP1 increases, and the current value of the second photocurrent IP2 decreases. Then, the base voltage of the transistor Q8 is smaller than the base voltage of the transistor Q7. At this time, since the transistor Q7 and the transistor Q8 are differentially connected, the collector current of the transistor Q7 increases and the collector current of the transistor Q8 decreases. Then, the output current of the current mirror circuit composed of the transistors Q5 and Q6 also increases. For this reason, the base current of the transistor Q9 forming the emitter follower circuit increases. Since the transistor Q9 amplifies the base current, the emitter current of the transistor Q9 increases as the base current increases. Here, since the current flowing through the constant current source CC is set as described above, a part of the emitter current is shunted to the feedback resistor R3 side as the emitter current of the Q9 increases. . For this reason, all of the second photocurrent IP2 flows through the second resistor R2, and a part of the emitter current shunted through the feedback resistor R3 also flows. Accordingly, the potential difference of the second resistor R2 is increased, and the base voltage of the transistor Q8 is increased. As a result, the base voltage of the transistor Q7 and the base voltage of the transistor Q8 are the same. The potential of the error signal VS is smaller than the base voltage of Q7 by the potential difference of the feedback resistor R3, which is caused by the emitter current flowing through the feedback resistor R3.

  That is, the gain of the error signal VS is determined according to the potential difference of the feedback resistor R3 caused by the current flowing through the feedback resistor R3. For this reason, the gain of the voltage signal VS can be adjusted by the resistance value of the feedback resistor R3.

  As described above, in the subtraction circuit according to the present invention, one end of the first resistor R1 is connected to the connection point P1 between the non-inverting input terminal + of the operational amplifier 3 and the first light receiving element 1, and the first resistor R1 is connected. The reference voltage Vref was applied to the other end of the first resistor R1. Similarly, one end of the second resistor R2 is connected to a connection point P2 between the inverting input terminal − of the operational amplifier 3 and the second light receiving element 2, and the other end of the second resistor R2 is connected to the other end of the second resistor R2. The reference voltage Vref was applied. As a result, unlike the arithmetic circuit according to the prior art, the first current / voltage converter 7 and the second current / voltage converter 7 for converting the first photocurrent IP1 and the second photocurrent IP2 into voltages, respectively. Even if the current-voltage converter 8 is not provided, the non-inverting input terminal + and the inverting input terminal − have voltages corresponding to the amounts of light received by the first light receiving element 1 and the second light receiving element 2. Was applied.

  In the subtraction circuit according to the present invention, a reference voltage Vref is applied to the first resistor R1 and the second resistor R2. This technical effect will be specifically described by comparing FIG. 1 and FIG. In FIG. 3, the first resistor R1 and the second resistor R2 are grounded. In such a configuration, first, when the first light receiving element 1 and the second light receiving element 2 are irradiated with light, the non-inverting input terminal + has a current flowing through the first resistor R1. The potential difference of the first resistor R1 generated by the above becomes the input potential. Further, the potential difference of the second resistor R2 generated by the current flowing through the second resistor R2 becomes the input potential at the inverting input terminal −. In this case, the subtraction circuit shown in FIG. 3 also functions in the same manner as the subtraction circuit shown in FIG. However, in the subtracting circuit shown in FIG. 3, when the first light receiving element 1 is not irradiated with light, the non-inverting input terminal + has an input potential of 0 V, and the operational amplifier 3 does not function. . In this regard, in the subtraction circuit shown in FIG. 1, since the reference voltage Vref is applied to the non-inverting input terminal + even if no light is irradiated to the first light receiving element 1, the operational amplifier 3 Works.

  The embodiment disclosed this time should be considered as illustrative in all points and not restrictive. The scope of the present invention is shown not by the above description of the embodiments but by the scope of claims for patent, and further includes all modifications within the meaning and scope equivalent to the scope of claims for patent.

  For example, in the embodiment of the present invention, the case where the light spot 4 is incident on the first light receiving element 1 and the second light receiving element 2 is described as a reference. However, the present invention is not limited to this. For example, it may be better to use the case where the light is incident on the first light receiving element 1 and the second light receiving element 2 with a predetermined light receiving ratio as a reference. In this regard, in the arithmetic circuit according to the present invention, the inverting input and the first photocurrent are connected via the first current mirror circuit, and the inverting input and the second photocurrent are connected to the second current. They are connected via a mirror circuit. Therefore, by changing the mirror constant of each current mirror circuit, the ratio of the received light amount between the first light receiving element and the second light receiving element as a reference can be easily set.

  In the embodiment of the present invention, the first light receiving element 1 and the second light receiving element 2 are each connected to the operational amplifier 3 via a current mirror circuit. However, in the present invention, the first current mirror circuit 4 and the second current mirror circuit 5 are not essential. That is, as shown in FIG. 4, the first light receiving element 1 may be directly connected to the connection point P1, and the second light receiving element 2 may be directly connected to the connection point P2. Also in this case, similarly to the subtraction circuit shown in FIG. 1, voltages corresponding to the first photocurrent IP1 and the second photocurrent IP2 are applied to the non-inverting input terminal + and the inverting input terminal −. Can be applied. However, in the subtracting circuit shown in FIG. 4, it is impossible to adjust the irradiation amount or the like of the light receiving element due to the mirror ratio of the current mirror circuit.

  Further, as shown in FIG. 5, even if only one of the first current mirror circuit 4 and the second current mirror circuit 5 is provided, the first current mirror circuit 4 is provided in the same manner as the subtraction circuit shown in FIG. The voltage corresponding to the first photocurrent IP1 and the second photocurrent IP2 is supplied to the non-inverting input terminal without requiring the current-voltage changer 7 and the second current-voltage converter 8. + And the inverting input terminal − can be applied. However, in this case, a difference appears in the transient response characteristics between the first photocurrent IP1 caused by the first light receiving element 1 and the second photocurrent IP2 caused by the second light receiving element 2. That is, in the case of the subtraction circuit shown in FIG. 5, the first photocurrent IP1 is inverted by the first current mirror 4 and then connected between the first resistor R1 and the non-inverting input terminal +. Entered at point. On the other hand, the second photocurrent IP2 is directly input to the connection point between the second resistor R2 and the inverting input terminal −. For this reason, even if the first light receiving element 1 and the second light receiving element 2 are simultaneously irradiated with light, the signal from the first light receiving element 1 is the signal from the second light receiving element 2. It takes more time to reach the operational amplifier 3. For this reason, noise such as overshoot and undershoot occurs in the signal output from the operational amplifier 3.

  In the embodiment of the present invention, the case where the reference voltages applied to the first resistor R1 and the second resistor R2 are equal has been described. In this case, when the amount of received light is the same between the first light receiving element 1 and the second light receiving element 2, the voltage of the error signal VS becomes 0V. However, the present invention is not limited to this, and the reference voltage applied to the first resistor R1 may be different from the reference voltage applied to the second resistor R2. In this case, it can be set in the same manner as in the above configuration by the mirror ratio of the first current mirror circuit 4 and the second current mirror circuit 5, the resistance values of the first resistor R1 and the second resistor R2, etc. It is.

The block diagram of the subtraction circuit which concerns on embodiment of this invention is shown. The circuit diagram of the subtraction circuit which concerns on embodiment of this invention is shown. The circuit diagram for demonstrating the characteristic of the subtraction circuit of this invention is shown. The block diagram of the subtraction circuit which concerns on other embodiment of this invention is shown. The block diagram of the subtraction circuit which concerns on other embodiment of this invention is shown. The top view for demonstrating the use of a subtraction circuit is shown. The block diagram of the subtraction circuit which concerns on a prior art is shown.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 1st light receiving element 2 2nd light receiving element 3 Operational amplifier 4 1st current mirror circuit 5 2nd current mirror circuit 6 Light spot 7 1st current-voltage converter 8 2nd current-voltage converter 9 Calculation Amplifier R3 Feedback resistor IP1 First photocurrent IP2 Second photocurrent VS Error signal

Claims (4)

An operational amplifier to which a first photocurrent output from the first light receiving element and a second photocurrent output from the second light receiving element are input;
A first reference voltage is applied to a non-inverting input terminal of the operational amplifier via a first resistor, and a connection point between the non-inverting input terminal and the first resistor is connected to the first reference voltage. And the non-inverting input terminal voltage changes according to the first photocurrent,
A second reference voltage is applied to the inverting input terminal of the operational amplifier via a second resistor, and the second light is connected to a connection point between the inverting input terminal and the second resistor. A current is input, and the voltage at the non-inverting input terminal changes according to the first photocurrent;
A voltage corresponding to the difference between the first photocurrent and the second photocurrent is output to the output of the operational amplifier,
2. The subtracting circuit according to claim 1, wherein the first and second reference voltages are voltages that allow the operational amplifier to function even without the first and second photocurrents .   The first photocurrent is input to a connection point between the non-inverting input terminal and the first resistor via a first current mirror circuit, and the inverting input terminal and the second resistor are input. 2. The subtraction circuit according to claim 1, wherein the second photocurrent is input to a connection point between the first and second photocurrents via a second current mirror circuit.   The subtraction circuit according to claim 1, wherein the first reference voltage and the second reference voltage are the same voltage.   2. The subtraction circuit according to claim 1, wherein the gain of the operational amplifier is set according to a feedback resistance of the operational amplifier.