JP4729877B2 - Current output type drive circuit - Google Patents

Description

  The present invention relates to a current output type driving circuit for passing a set current to a load such as a light emitting diode.

FIG. 12 is a diagram showing a configuration example of a conventional current output type driving circuit used for driving a light emitting diode (see, for example, FIG. 2 of Patent Document 1).
The current output type drive circuit shown in FIG. 12 includes an n-type MOS transistor Qa, a current sense resistor Ra, a current detection amplification circuit AMPa, an error amplification circuit AMPb, and a digital-analog conversion circuit DAC.

The anode of the light emitting diode LD1 is connected to the power supply line VDD, and the cathode thereof is connected to the drain of the n-type MOS transistor Qa.
The source of the n-type MOS transistor Qa is connected to the reference potential VSS via the current sense resistor Ra.
The current detection amplifier circuit AMPa amplifies a current detection signal generated in the current sense resistor Ra in accordance with the source current of the n-type MOS transistor Qa, and inputs it to the inverting input terminal (−) of the error amplifier circuit AMPb.
The digital-analog conversion circuit DAC generates an analog current setting signal Sset corresponding to the current setting data Dset and inputs it to the non-inverting input terminal (+) of the error amplifier circuit AMPb.
The error amplifier circuit AMPb amplifies the voltage difference between the non-inverting input terminal (+) and the inverting input terminal (−) and inputs the amplified voltage difference to the gate of the n-type MOS transistor Qa.

  According to the above configuration, the drive current of the light emitting diode LD1 flows from the power supply line VDD to the reference potential Vss through the light emitting diode LD1, the n-type MOS transistor Qa, and the current sense resistor Ra. Therefore, a current detection signal having a level corresponding to the drive current of the light emitting diode LD1 is generated in the current sense resistor Ra. The current detection signal is amplified by the current detection amplification circuit AMPa and then input to the error amplification circuit AMPb. In the error amplifier circuit AMPb, an error between the analog current setting signal Sset output from the digital-analog converter circuit DAC and the current detection signal output from the current detection amplifier circuit AMPa is amplified, and this amplified signal is converted into an n-type MOS. Input to the gate of the transistor Qa. If the gain of the error amplifier circuit AMPb is sufficiently high, the drive current of the light emitting diode LD1 corresponds to a value at which the output signal of the current detection amplifier circuit AMPa and the current setting signal Sset are substantially equal, that is, the current setting data Dset. Controlled by value.

JP 2000-6533 A

  In the current output type drive circuit shown in FIG. 12, when the load current is set to a very small value, the offset component in the current detection amplifier circuit AMPa and the error amplifier circuit AMPb cannot be ignored, which causes an error factor in current setting accuracy. May be.

  In addition, when a plurality of light emitting diodes are driven simultaneously using a plurality of current output type driving circuits shown in FIG. 12, the driving current of each light emitting diode varies due to the current setting error caused by the offset component described above. The light emission luminance may vary.

  Further, when the number of light emitting diodes to be driven increases, the current detection amplification circuit AMPa and the error amplification circuit AMPb having a large number of circuit elements increase power consumption and circuit area.

  The present invention has been made in view of such circumstances, and an object thereof is to provide a current output type driving circuit capable of suppressing a decrease in current setting accuracy when a load current is set to a minute value. is there.

A current output type driving circuit according to a first aspect of the present invention includes a first node to which a load is connected and a plurality of transistor portions connected in parallel to the first node, and receives an input control signal. In response, a current control circuit for controlling a load current flowing to the load, a second node, and a plurality of first nodes connected between each of the transistor portions of the plurality of transistor portions and the second node, respectively. Select a drive path for the load current according to an input current setting signal from a plurality of paths in which each path is configured by connecting a resistor circuit including a resistor, the transistor unit, and the first resistor in series. a switching circuit for a sense voltage that appears in a connection point between the transistor portion and the first resistor in the drive path which is selected by the switch circuit, it small difference between the reference voltage input As a control signal generating circuit for generating and controlling the control signal output to the current control circuit, have a, the ratio of the transconductance and the first value of the resistance of the transistor section, a plurality of paths It is possible to arrange between.

The operation of the first invention will be described.
According to the first aspect of the invention, a load current flows through the resistance circuit via the current control circuit. In the control signal generation circuit, a difference between the voltage generated in the resistance circuit by the load current and the reference voltage is detected. In the control signal generation circuit, a control signal adjusted to reduce the voltage difference is generated, and a load current flowing in the current control circuit is controlled in accordance with the control signal.
As a result, even when the load current is set to a very small value, the voltage generated in the resistor circuit is as large as the reference voltage, so that the current setting accuracy due to the influence of the offset error of the control signal generation circuit Can be prevented from decreasing.

  In the first invention, the current control circuit may include a plurality of transistors connected in parallel between the first node and the second node. The resistor circuit includes a plurality of first resistors inserted on a wiring connecting the plurality of transistors and the second node, and a transistor specified by the current setting signal among the plurality of transistors. A switch circuit that commonly connects a connection node with the first resistor may be included. The control signal generation circuit may generate the control signal adjusted so that a difference between a voltage generated at nodes commonly connected in the switch circuit and the reference voltage is small. Further, in the first invention, the control signal generated by the control signal generation circuit is input to the transistor specified by the current setting signal, and the control signal for inputting the control signal for turning off the transistor is input to the other transistors. An input circuit may be included.

According to the above configuration, the load current flows through the transistor specified by the current setting signal among the plurality of transistors. The load current flowing through each transistor passes through the first resistor and is combined at the second node. A connection node between the transistor specified by the current setting signal and the first resistor is commonly connected by the switch circuit. In the control signal generation circuit, the control signal is adjusted so that the difference between the voltage generated at the commonly connected nodes and the reference voltage is small.
Therefore, a predetermined current determined by the resistance value and the magnitude of the reference voltage flows through the first resistor connected to the transistor specified by the current setting signal. Therefore, when the number of transistors specified by the current setting signal increases, the current flowing through the increased number of transistors is added, so that the load current increases. Conversely, when the number of transistors specified by the current setting signal decreases, the amount of current flowing through the transistors decreases, and the load current decreases.
If the current control circuit is realized by a single transistor, the gain for converting the control signal to the load current is maintained substantially constant in the transistor, but the gain for converting the load current to the voltage in the resistor circuit is the resistance. It changes according to the resistance value of the circuit. Therefore, when the load current changes, the resistance value of the resistor circuit changes, and the loop gain of feedback control also changes accordingly. For example, when the load current is increased, the resistance value of the resistor circuit is set to be small, so that the gain for converting the load current into a voltage is decreased. As a result, the loop gain is reduced and the accuracy of current setting is reduced.
On the other hand, according to the above configuration, when the number of transistors that control the load current is changed according to the set value of the load current, the conversion gain of the current conversion circuit changes. For example, when the number of transistors that control the load current is increased, the current flowing through the increased transistor is added to the load current, so that the amount of change in the load current with respect to the amount of change in the control signal increases, and the conversion gain of the current conversion circuit Becomes larger.
As a result, even if the resistance value of the resistor circuit changes according to the set value of the load current and the gain for converting the load current into the voltage changes, the conversion gain of the current control circuit in the direction to cancel this change. Since it changes, the change of the loop gain is suppressed. For example, if the resistance value of the resistor circuit is reduced in order to increase the load current, a transistor for controlling the load current is added and the conversion gain of the current control circuit is increased, so that a decrease in loop gain can be suppressed. As a result, a decrease in current setting accuracy is suppressed.

The first invention may include a second resistor formed on a semiconductor substrate common to the first resistor, and a current source for causing a predetermined current to flow through the second resistor. The control signal generation circuit may input a voltage generated in the second resistor as the reference voltage.
According to the above configuration, the load current has a magnitude corresponding to the ratio between the resistance value of the first resistor connected to the transistor specified by the current setting signal and the resistance value of the second resistor. . When the first resistor and the second resistor are formed on a common semiconductor substrate, the absolute accuracy of the resistance value ratio is increased, so that the setting accuracy of the load current is improved.

In the first invention, the transistor may include one or a plurality of parallel-connected transistor elements formed in an equivalent structure on the semiconductor substrate, and the first resistor includes the first resistor One or a plurality of resistance elements connected in parallel may be included, which are formed on the semiconductor substrate in an equivalent structure. The ratio between the number of the transistor elements included in the transistor and the number of the resistance elements included in the first resistor is constant between the commonly connected transistors and the first resistor. May be set.
According to the above configuration, the transistor elements have characteristics approximate to each other by being formed in an equivalent structure on a common semiconductor substrate, and therefore the gains for converting the control signal into the load current are approximate to each other. In addition, since the resistance elements have resistance values approximated to each other by being formed in an equivalent structure on a common semiconductor substrate, gains for converting load currents to voltages are approximated to each other.
Therefore, for example, when one transistor is designated by the current setting signal and the designated transistor includes L transistor elements, the gain for converting the control signal into a load current is one transistor element. Approximate to L times the conversion gain by. If the first resistor connected in common with the designated transistor includes M resistance elements, the gain for converting the load current into voltage is M of the conversion gain of one resistance element. Approximate to one part. Therefore, the gain for converting the control signal into the voltage of the first resistor in the designated transistor and the first resistor connected to the designated transistor is (L of the conversion gain in one transistor element and the resistor element). / M) times the approximation.
On the other hand, since (L / M) has the constant ratio, it is constant when any transistor is designated in the current setting signal.
Therefore, the gain for converting the control signal into the voltage of the first resistor in the transistor and the first resistor approximates a constant value regardless of which transistor is specified in the current setting signal.
Further, when a plurality of transistors are specified in the current setting signal, the total number of transistor elements included in the whole of the plurality of transistors and the whole of the plurality of first resistors connected to the plurality of transistors are included. The ratio to the total number of resistance elements has the constant ratio as in the case where one transistor is designated. Therefore, the gain for converting the control signal into the voltage of the first resistor in the plurality of designated transistors and the plurality of first resistors connected thereto is the same as that in the case where one transistor is designated. Approximate the value of.
Thus, since the gain for converting the control signal into the voltage of the first resistor approximates a constant value, the change in the loop gain according to the change in the set value of the load current is suppressed.

A current output type drive circuit according to a second aspect of the present invention includes a plurality of drive units for causing a current corresponding to an input current setting signal to flow to a corresponding load, and a selection control circuit, and the drive unit It includes a first node to which a load is connected, and the first comprises a transistor connected portion to the node, the current control circuit for controlling the load current supplied to the load in response to a control signal input, the drive A second node common to the units; a resistor circuit including a first resistor connected between each of the plurality of transistor portions and the second node; the transistor portion; a first terminal between the first resistor, wherein the second terminal for receiving a control signal to be input to the current control circuit, the selection control circuit, among the plurality of drive units Will be entered A first selection circuit that selects the first terminal of the drive unit designated by the unit designation signal and outputs a voltage output from the selected terminal; an input reference voltage; and the first selection circuit A control signal generation circuit for generating a control signal of the current control circuit adjusted so as to reduce a difference from a voltage output from the drive unit, and a drive unit specified by the unit specification signal among the plurality of drive units. select the second terminal, possess a second selection circuit for inputting a control signal generated by said control signal generating circuit to the selected terminal, the transconductance and the first of the transistor section The ratio with the resistance value can be made uniform among the plurality of drive units.

The operation of the second invention will be described.
According to the second invention, the control signal generated in the control signal generation circuit is supplied to the current selection circuit and the second terminal of the drive unit specified by the unit specification signal. Is input through. As a result, a load current corresponding to the input control signal flows through the current control circuit. The load current flows through the resistor circuit and generates a voltage corresponding to the resistance value set by the current setting signal. A voltage generated in the resistance circuit is input from the first terminal to the control signal generation circuit via the first selection circuit, and a difference from the reference voltage is detected. In the control signal generation circuit, a control signal adjusted to reduce the voltage difference is generated, and a load current flowing in the current control circuit is controlled in accordance with the control signal. On the other hand, in the current control circuit of another drive unit not designated by the unit designation signal, a previously inputted control signal is held, and a load current corresponding to the held control signal flows.
As a result, even when the load current is set to a very small value, the voltage generated in the resistor circuit is as large as the reference voltage, so that the current setting accuracy due to the influence of the offset error of the control signal generation circuit Can be prevented from decreasing.
Further, since the control signal generation circuit is shared by a plurality of drive units, the circuit area and power consumption are reduced as compared with the case where the control signal generation circuit is provided in each drive unit.

  In the second invention, the current control circuit may include a plurality of transistors connected in parallel between the first node and the second node. The resistor circuit includes a plurality of first resistors inserted on a wiring connecting the plurality of transistors and the second node, and a transistor specified by the current setting signal among the plurality of transistors. A switching circuit that commonly connects a connection node with the first resistor to the first terminal may be included. Furthermore, the drive unit inputs a control signal input from the second terminal to a transistor specified by the current setting signal among the plurality of transistors, and controls to turn off the transistor to the other transistors. A control signal input circuit for inputting a signal may be included.

According to the above configuration, the load current flows through the transistor specified by the current setting signal among the plurality of transistors. The load current flowing through each transistor passes through the first resistor and is combined at the second node. A connection node between the transistor specified by the current setting signal and the first resistor is commonly connected to the first terminal by the switch circuit. The voltage generated at the first terminal is input to the control signal generation circuit via the first selection circuit, and a difference from the reference voltage is detected. In the control signal generation circuit, the control signal is adjusted so that a difference between the input voltage of the first terminal and the reference voltage becomes small. This control signal is input from the second selection circuit to the current control circuit via the second terminal, and the load current is controlled accordingly.
Therefore, a predetermined current determined by the resistance value and the magnitude of the reference voltage flows through the first resistor connected to the transistor specified by the current setting signal. Therefore, when the number of transistors specified by the current setting signal increases, the current flowing through the increased number of transistors is added, so that the load current increases. Conversely, when the number of transistors specified by the current setting signal decreases, the amount of current flowing through the transistors decreases, and the load current decreases. That is, it is possible to change the conversion gain of the current conversion circuit by changing the number of transistors that control the load current according to the set value of the load current. For example, when the number of transistors that control the load current is increased, the current flowing through the increased transistor is added to the load current, so that the amount of change in the load current with respect to the amount of change in the control signal increases, and the conversion gain of the current conversion circuit Becomes larger.
As a result, even if the gain for converting the load current into voltage changes according to the set value of the load current, the conversion gain of the current control circuit changes in a direction to cancel this change. Is suppressed.

In the second aspect of the invention, the drive unit includes a second resistor formed on a semiconductor substrate common to the first resistor, a current source for causing a predetermined current to flow through the second resistor, And a third terminal that outputs the voltage generated in the second resistor as the reference voltage. Further, the second invention selects the third terminal of the drive unit designated by the unit designation signal among the plurality of drive units, and controls the reference voltage output from the selected terminal. A third selection circuit which inputs to the signal generation circuit may be included.
According to the above configuration, the load current has a magnitude corresponding to the ratio between the resistance value of the first resistor connected to the transistor specified by the current setting signal and the resistance value of the second resistor. Become. When the first resistor and the second resistor are formed on a common semiconductor substrate, the absolute accuracy of the resistance value ratio is increased, so that the setting accuracy of the load current is increased.

In the second invention, the drive unit includes a second resistor formed on the same semiconductor substrate as the first resistor, and a third terminal for inputting a current flowing through the second resistor. May be included. Furthermore, the second invention selects the third terminal of the drive unit designated by the unit designation signal from the current source that outputs a predetermined current and the plurality of drive units, and the selected A fourth selection circuit for inputting a current of the current source to the terminal, and the second resistance of the drive unit designated by the unit designation signal among the plurality of drive units is selected, and the selected resistance is A fifth selection circuit that inputs the generated voltage to the control signal generation circuit as the reference voltage may be provided.
Also in the above configuration, the load current has a magnitude corresponding to the ratio between the resistance value of the first resistor connected to the transistor specified by the current setting signal and the resistance value of the second resistor. Become. For this reason, when the first resistor and the second resistor are formed on a common semiconductor substrate, the absolute accuracy of the resistance value ratio is increased, so that the setting accuracy of the load current is increased.
Further, according to the above configuration, since the current source is shared by the plurality of drive units, the variation in the current setting value between the drive units is reduced.

In the second invention, the transistor may include one or a plurality of parallel-connected transistor elements formed in an equivalent structure on the semiconductor substrate, and the first resistor includes the first resistor One or a plurality of resistance elements connected in parallel may be included, which are formed on the semiconductor substrate in an equivalent structure. The ratio between the number of the transistor elements included in the transistor and the number of the resistance elements included in the first resistor is constant between the commonly connected transistors and the first resistor. May be set.
According to the above configuration, the transistor elements have characteristics approximate to each other by being formed in an equivalent structure on a common semiconductor substrate, and therefore the gains for converting the control signal into the load current are approximate to each other. In addition, since the resistance elements have resistance values approximated to each other by being formed in an equivalent structure on a common semiconductor substrate, gains for converting load currents to voltages are approximated to each other.
Therefore, for example, when one transistor is designated by the current setting signal and the designated transistor includes L transistor elements, the gain for converting the control signal into a load current is one transistor element. Approximate to L times the conversion gain by. If the first resistor connected in common with the designated transistor includes M resistance elements, the gain for converting the load current into voltage is M of the conversion gain of one resistance element. Approximate to one part. Therefore, the gain for converting the control signal into the voltage of the first resistor in the designated transistor and the first resistor connected to the designated transistor is (L of the conversion gain in one transistor element and the resistor element). / M) times the approximation.
On the other hand, since (L / M) has the constant ratio, it is constant when any transistor is designated in the current setting signal.
Therefore, the gain for converting the control signal into the voltage of the first resistor in the transistor and the first resistor approximates a constant value regardless of which transistor is specified in the current setting signal.
Further, when a plurality of transistors are specified in the current setting signal, the total number of transistor elements included in the whole of the plurality of transistors and the whole of the plurality of first resistors connected to the plurality of transistors are included. The ratio to the total number of resistance elements has the constant ratio as in the case where one transistor is designated. Therefore, the gain for converting the control signal into the voltage of the first resistor in the plurality of designated transistors and the plurality of first resistors connected thereto is the same as that in the case where one transistor is designated. Approximate the value of.
Thus, since the gain for converting the control signal into the voltage of the first resistor approximates a constant value, the change in the loop gain according to the change in the set value of the load current is suppressed.

In the second invention, the drive unit includes a third transistor through which a current corresponding to an input control signal flows, one terminal connected to the third transistor, and the other terminal connected to the first transistor. And a third resistor connected to each of the two nodes. The switch circuit may connect a connection node between the third transistor and the third resistor to the first terminal when none of the plurality of transistors is specified in the current setting signal. The control signal input circuit inputs a control signal input from the second terminal to the third transistor when none of the plurality of transistors is specified in the current setting signal. A control signal for turning off the transistor may be input.
According to the above configuration, when none of the plurality of transistors is specified in the current setting signal input to the drive unit specified by the unit specifying signal, the control signal generation circuit includes the third signal. A voltage generated at a connection node between the first transistor and the third resistor is input via the first terminal and the first selection circuit. The control signal generated in the control signal generation circuit is input to the third transistor through the second selection circuit and the second terminal. As a result, the control signal generation circuit performs feedback control for adjusting the control signal so that the difference between the voltage generated in the third resistor and the reference voltage is small, and thus the control signal generation circuit described above is caused by cutting the feedback loop. An indefinite state of the control signal is prevented.

  According to the present invention, it is possible to suppress a decrease in current setting accuracy when the load current is set to a minute value.

  Hereinafter, six embodiments of the present invention will be described with reference to the drawings.

<First Embodiment>
FIG. 1 is a diagram showing an example of a configuration of a current output type driving circuit according to the first embodiment of the present invention.
The current output type driving circuit shown in FIG. 1 drives loads 1-1,..., 1-m (m is an arbitrary integer larger than 1, and so on) driven by a constant current such as an LED. Drive units 2-1,..., 2-m are included.

  In the load 1-k (k is an integer from 1 to m. The same applies hereinafter), one terminal is connected to the power supply line VDD, and the other terminal is connected to the reference potential VSS via the drive unit 2-k. Is done.

  The drive unit 2-k passes a current corresponding to the current setting signal Dk to the load 1-k. The current setting signal Dk is, for example, a digital signal of n bits (n is an arbitrary integer larger than 1; the same shall apply hereinafter) and is supplied for each drive unit.

FIG. 2 is a diagram illustrating an example of the configuration of the drive unit 2-k.
The drive unit 2-k illustrated in FIG. 2 includes a current control circuit 21, a control signal generation circuit 22, a resistance circuit VR, a resistance Rf, and a current source CM1.
The current control circuit 21 is an embodiment of the current control circuit of the present invention.
The resistance circuit VR is an embodiment of the resistance circuit of the present invention.
The control signal generation circuit 22 is an embodiment of the control signal generation circuit of the present invention.

  The current control circuit 21 is connected between the node N1 through which the current of the load 1-k flows and the reference potential VSS, and controls the load current according to the input control signal Sc. The current control circuit 21 is configured using, for example, a transistor such as a MOS transistor.

The resistance circuit VR is inserted on a wiring connecting the current control circuit 21 and the reference potential VSS, and a resistance value is set according to the current setting signal Dk. That is, the resistance circuit VR and the current control circuit 21 are connected in series via the node N3, the other terminal of the current control circuit 21 is connected to the node N1, and the other terminal of the resistance circuit VR is set to the reference potential VSS. Connected.
The resistance circuit VR is composed of, for example, a plurality of resistors and switches, and changes the resistance value by switching on and off of the switches according to the bit value of the current setting signal Dk.

The control signal generation circuit 22 generates a control signal Sc adjusted so that the difference between the voltage generated in the resistance circuit VR and the reference voltage Vref is small, and inputs the control signal Sc to the current control circuit 21.
The control signal generation circuit 22 includes, for example, an operational amplifier, and generates the control signal Sc by amplifying the difference between the voltage generated in the resistance circuit VR and the reference voltage Vref with a high gain.

The current source CM1 causes a constant reference current I to flow through the resistor Rf. In the example of FIG. 2, one terminal of the resistor Rf is connected to the reference potential VSS, and the other terminal is connected to the power supply line VDD via the current source CM1.
When the reference current I flows through the resistor Rf, the reference voltage Vref is generated at the resistor Rf. This reference voltage Vref is input to the control signal generation circuit 22 described above.

According to the configuration described above, the current of the load 1 -k flows through the resistance circuit VR via the current control circuit 21. A difference between the voltage generated in the resistance circuit VR by the load current and the reference voltage Vref is detected by the control signal generation circuit 22. The control signal generation circuit 22 generates a control signal Sc adjusted to reduce this voltage difference, and the load current flowing through the current control circuit is controlled according to the control signal Sc.
As a result, even when the load current is set to a very small value, the voltage generated in the resistor circuit VR is as large as the reference voltage Vref. Therefore, the current setting accuracy due to the influence of the offset error of the control signal generation circuit 22 can be reduced. The decrease can be suppressed.

  Further, since the load current is set by the negative feedback control, the current setting accuracy can be improved by increasing the loop gain.

<Second Embodiment>
Next, a second embodiment of the present invention will be described.

FIG. 3 is a diagram illustrating a configuration example of the drive units 2A-k of the current output type drive circuit according to the second embodiment of the present invention.
3 includes n-channel MOS transistors Q1,..., Qn, current sense resistors R1,..., Rn, resistors Rf, switches SWA1,..., SWAn, and switches SWB1,. , SWBn, switches SWC1,..., SWCn, a control signal generation circuit 22, and a current source CM1.
Transistors Q1,..., Qn are an embodiment of the transistor of the present invention.
Current sense resistors R1,..., Rn are an embodiment of the first resistor of the present invention.
The circuit having switches SWA1,..., SWAn and switches SWB1,..., SWBn is an embodiment of the control signal input circuit of the present invention.
The circuit having the switches SWC1,..., SWCn is an embodiment of the switch circuit of the present invention.
The current source CM1 is an embodiment of the current source of the present invention.
The resistor Rf is an embodiment of the second resistor of the present invention.

  Transistors Q1-Qn are connected in parallel between node N1 through which the current of load 1-k flows and reference potential VSS.

For example, the transistors Q1 to Qn are configured by connecting in parallel a predetermined number of n-channel MOS transistor elements formed in a mutually equivalent structure on a common semiconductor substrate.
In the example of FIG. 3, the transistor Qi (i is an integer from 1 to n; the same applies hereinafter) is configured by connecting 2 ^i-1 transistor elements having an equivalent structure in parallel. In this case, since each transistor element has an approximate characteristic, when the same gate-source voltage is applied to the transistor Q1 and the transistor Qi, the transistor Qi has a current approximate to 2 ^i-1 times the current flowing through the transistor Q1. Flows. Further, when comparing the gain (that is, mutual conductance) for converting the voltage change of the control signal Sc input to the gate into the change of the load current, the transistor Qi is approximately 2 ^i-1 times that of the transistor Q1.

  The current sense resistors R1 to Rn are inserted on a wiring connecting the transistors Q1 to Qn and the reference potential VSS. That is, one terminal of the current sense resistor Ri is connected to the source of the transistor Qi, and the other terminal is connected to the reference potential VSS.

For example, the current sense resistors R1 to Rn are configured by connecting, in parallel, a predetermined number of resistance elements each having a structure equivalent to each other on a common semiconductor substrate.
In the example of FIG. 3, the current sense resistor Ri is configured by connecting 2 ^i-1 equivalent resistance elements in parallel. In this case, since each transistor element has an approximate resistance value, the current sense resistor Ri has a resistance value of about 2 ^{i−1 with} respect to the current sense resistor R1. Comparing the gain for converting the current change into the voltage change, the current sense resistor Ri is approximately 2 ⁱ⁻¹ to the current sense resistor R1.

  The switches SWC1 to SWCn are connection nodes (N3-1 to N3-) between the transistors specified by the current setting signal Dk among the n transistors Q1 to Qn and the current sense resistors (R1 to Rn) connected in series thereto. n) A common switch circuit is connected.

Switch SWCi is connected between a connection node N3-i of transistor Qi and current sense resistor Ri and node N4.
In the n-bit current setting signal Dk, when the first bit is the least significant bit and the nth bit is the most significant bit, the switch SWCi is turned on or off according to the value of the i-th bit of the current setting signal Dk. That is, the switch SWCi is turned on when the value of the i-th bit is “1” and turned off when it is “0”.

The switches SWA1 to SWAn and the switches SWB1 to SWBn constitute a control signal input circuit that inputs a control signal to the gates of the transistors Q1 to Qn.
This control signal input circuit inputs the control signal Sc generated by the control signal generation circuit 22 to the gate of the transistor specified by the current setting signal Dk among the n transistors Q1 to Qn, and outputs the other transistors. A reference potential Vss is input to the gate as a control signal for turning off the transistor.

  One terminal of the switch SWAi is connected to the output terminal of the control signal Sc of the control signal generation circuit 22, and the other terminal is connected to the gate of the transistor Qi. The switch SWAi is turned on when the i-th bit of the current setting signal Dk is “1” and turned off when it is “0”.

  One terminal of the switch SWBi is connected to the gate of the transistor Qi, and the other terminal is connected to the reference potential VSS. The switch SWBi is turned off when the i-th bit of the current setting signal Dk is “1”, and turned on when it is “0”.

  The control signal generation circuit 22 reduces the difference between the voltage generated at the node N4 where the nodes N3-1 to N3-n are commonly connected by the switch circuits (SWC1 to SWCn) and the reference voltage Vref generated at the resistor Rf. The control signal Sc adjusted to is generated.

  The current source CM1 and the resistor Rf are the same components as those in FIG. 2 and generate the reference voltage Vref.

  The overall configuration of the current output type drive circuit having the drive units 2A-1 to 2A-m is the same as the circuit shown in FIG.

  Here, the operation of the current output type driving circuit according to the second embodiment having the above-described configuration will be described.

  The control signal Sc is input to the gates of the transistors specified by the current setting signal Dk via the switches (SWA1 to SWAm), while the switches (SWB1 to SWBm) are connected to the gates of the other transistors not specified. A control signal for turning off the transistor (that is, the reference potential VSS) is input. Therefore, the load current flowing through the load 1-k flows to the transistor specified by the current setting signal Dk among the transistors Q1 to Qn. The load currents flowing through these transistors flow through the resistors (R1 to Rn) connected in series with the transistors to the reference potential VSS.

The connection nodes (N3-1 to N3-n) between the transistors specified by the current setting signal Dk and the series resistors (R1 to Rn) are commonly connected by the switch circuits (SWC1 to SWCn). In the control signal generation circuit 22, the control signal Sc is adjusted so that the difference between the voltage generated at the commonly connected node N4 and the reference voltage Vref becomes small.
Therefore, a predetermined current determined by the resistance value and the magnitude of the reference voltage Vref flows through the resistors (R1 to Rn) connected in series to the transistor specified by the current setting signal Dk. For example, when the i-th bit of the current setting signal Dk is set to '1' and a load current flows through the transistor Qi, the current sense resistor Ri connected in series to the transistor Qi has a voltage of approximately 'Vref / (r / 2 ^{i -1} ) 'current flows.

  Since the total current Iout flowing through the load 1-k is the sum of the currents flowing through the current sense resistors (R1 to Rn), it can be expressed by the following equation.

  In Equation (1), “Dk (i)” indicates the value of the i-th bit of the current setting signal Dk, and “rf” indicates the resistance value of the resistor Rf.

  The overall resistance value rt of the current sense resistors (R1 to Rn) connected in parallel between the node N4 and the reference potential Vss via the switch circuits (SWC1 to SWCn) is expressed as the following equation. .

  In the drive unit shown in FIG. 3, the feedback control works so that the difference between the voltage 'Iout × rt' generated by the load current Iout flowing through the resistance rt and the reference voltage Vref becomes small. Iout × rt = Vref ′ is established. Also from this equation, the relationship of equation (1) is derived.

  As can be seen from equation (2), the overall resistance value rt of the resistor circuit composed of the switch circuits (SWC1 to SWCn) and the current sense resistors (R1 to Rn) depends on the bit value of the current setting signal Dk. Change. That is, the gain of the circuit that converts the load current into a voltage signal and feeds it back to the control signal generation circuit 22 changes according to the set value of the load current.

  In the drive unit shown in FIG. 2, when the current control circuit 21 is composed of one MOS transistor, the gain (that is, the mutual conductance) for converting the voltage change of the control signal Sc into the load current change in this transistor is MOS. Although it depends on the characteristics of the transistor, it is generally kept constant. On the other hand, when the set value of the load current is changed, the resistance value of the resistance circuit VR is changed accordingly, so that the gain for converting the load current into a voltage signal is changed. Therefore, the overall loop gain of feedback control changes according to the set value of the load current. For example, when the load current increases, the resistance value rf is set to be small, so that the gain for converting the load current into voltage decreases. As a result, the loop gain is reduced and the accuracy of current setting is reduced.

On the other hand, in the drive unit shown in FIG. 3, as can be seen from the equation (1), the load current can be changed by increasing or decreasing the number of transistors specified by the current setting signal Dk. That is, when the number of transistors specified by the current setting signal Dk increases, the load current increases because the amount of current flowing through the increased transistors is added. Conversely, when the number of transistors specified by the current setting signal Dk decreases, the amount of current flowing through the transistors decreases, and the load current decreases.
When the number of transistors that control the load current increases or decreases, the mutual conductance of the current control circuit configured by the transistors Q1 to Qn changes. For example, when the number of transistors for controlling the load current is increased, the current flowing through the increased transistors is added to the load current, so that the amount of change in the load current with respect to the amount of change in the control signal Sc increases, and the current control circuit (Q1 to Q1 The overall mutual conductance of Qn) increases.

As described above, in the drive unit shown in FIG. 3, even if the overall resistance value rt changes according to the set value of the load current and the gain for converting the load current into the voltage changes, the current in a direction to cancel this change. Since the mutual conductance of the control circuit (Q1 to Qn) changes, the change of the loop gain can be suppressed.
For example, when the resistance value rt of the resistance circuit (SWC1 to SWCn and R1 to Rn) is decreased in order to increase the load current, a transistor for controlling the load current is added and the mutual conductance of the current control circuit (Q1 to Qn) is increased. Therefore, the decrease in loop gain can be suppressed. As a result, it is possible to suppress a decrease in accuracy of current setting due to a decrease in loop gain.
By suppressing the change of the loop gain, there is an advantage that the stability of the feedback control is increased.

In addition, the transistors Q1, Q2,..., Qn are each composed of one, two,..., 2 ^n-1 transistor elements connected in parallel, and these transistor elements are equivalently structured on a common semiconductor substrate. Since these have characteristics that are approximate to each other, the gains (mutual conductances) for converting the voltage change of the control signal Sc into the change of the load current are close to each other. Similarly, each of the current sense resistors R1, R2,..., Rn is composed of one, two,..., 2 ^n-1 connected resistance elements, and these resistance elements are formed on a common semiconductor substrate. If they are formed with an equivalent structure, they have resistance values approximate to each other, so that the gains for converting the load current into voltage approximate each other.
Therefore, for example, when one transistor Qi is designated by the current setting signal Dk and the designated transistor Qi includes L transistor elements, the gain for converting the control signal Sc into a load current is one. It approximates to L times the conversion gain by the transistor element. If the current sense resistor Ri connected in common with the transistor Qi includes M resistance elements, the gain for converting the load current into voltage is M times the conversion gain of the single resistance element. Approximate to 1. Therefore, the gain for converting the control signal Sc into the voltage of the current sense resistor Ri in the transistor Qi and the current sense resistor Ri connected thereto is (L / M) times the conversion gain of one transistor element and the resistor element. To approximate.
On the other hand, since the ratio (L / M) between the number L of transistor elements included in the transistor Qi and the number M of resistance elements included in the current sense resistor Ri is L = M = 2 ⁱ⁻¹ , (L / M) = 1, which is set to a constant ratio. That is, the ratio (L / M) is constant regardless of which transistor is specified in the current setting signal Dk.
Therefore, the gain for converting the control signal Sc into the voltage of the current sense resistor Ri in the transistor Qi and the current sense resistor Ri approximates a constant value regardless of which transistor is specified in the current setting signal Dk.
In addition, when a plurality of transistors are specified in the current setting signal Dk, the total number of transistor elements included in the whole of the plurality of transistors and the resistance included in the whole of the plurality of current sense resistors connected to the plurality of transistors. The ratio to the total number of elements has a constant ratio (L / M) as in the case where one transistor is designated. Therefore, the gain for converting the control signal Sc into the voltage of the current sense resistor in the plurality of designated transistors and the plurality of current sense resistors connected thereto is the same constant value as when one transistor is designated. Approximate.
Thus, since the gain for converting the control signal Sc into the voltage of the current sense resistor approximates a constant value, the change in the loop gain according to the change in the set value of the load current can be suppressed to a smaller value.
In addition, by forming the transistor element and the resistor element on a common semiconductor substrate, changes in the characteristics of these elements due to temperature become substantially equal, so that variations in current setting accuracy due to temperature changes can be suppressed to a small level.

Further, as shown in FIG. 3, when the reference voltage Vref is generated by the current source CM1 and the resistor Rf, the load current Iout is serially connected to the transistor specified by the current setting signal Dk as shown in the equation (1). It becomes a magnitude according to the ratio between the resistance values of the current sense resistors (R1 to Rn) to be connected and the resistance value rf of the resistor Rf.
Therefore, by forming the current sense resistors (R1 to Rn) and the resistor Rf on a common semiconductor substrate, the ratio of these resistance values can be set to a predetermined ratio with high accuracy. Can be increased.
Further, by forming the current sense resistors (R1 to Rn) and the resistor Rf on a common semiconductor substrate, the temperatures of both are approximated, so that variation in current accuracy due to temperature can be suppressed to a small value.

  In the drive unit shown in FIG. 3, the control signal generation circuit 22 changes the gates of the transistors Q1 to Qn over a wide range so that the difference between the voltage at the node N4 and the reference voltage Vref is reduced. It is possible to operate in the saturation region.

FIG. 4 is a diagram illustrating an example of the voltage Vout at the node N1, the load current Iout, and the gate voltage Vgate (voltage of the control signal Sc) of the transistors Q1 to Qn.
As shown in FIG. 4, when the voltage Vout of the node N1 varies, the load current Iout is kept constant regardless of whether the operation of the transistor is in the saturated region or the non-saturated region by changing the gate voltage Vgate over a wide range. be able to.

In a simple manner, the load current can be controlled using a current mirror circuit. However, when such a method is used, for example, when the voltage Vout varies as shown in FIG. 4A, depending on the constant current characteristics of the MOS transistor, as shown by the dotted line in FIG. The load current Iout varies. In particular, in the current mirror circuit, the transistor cannot be operated in the non-saturation region, and therefore the load current Iout is greatly reduced when the voltage Vout is lowered.
In contrast, in the drive unit shown in FIG. 3, since the transistors Q1 to Qn can be operated even in the non-saturated region, the voltage Vout of the node N1 is set to the reference voltage Vref (= I × rf) as the lower limit value. It is possible to reduce to a voltage close to this. Thereby, a power supply voltage can be set low and power consumption can be reduced.

  Further, in the drive unit shown in FIG. 3, the voltage generated at the node N4 has the same magnitude as the reference voltage Vref generated at the resistor Rf. Therefore, as in the drive unit shown in FIG. It is possible to suppress a decrease in setting accuracy of the minute current due to the influence of the offset error.

<Third Embodiment>
Next, a third embodiment of the present invention will be described.

FIG. 5 is a diagram showing an example of the configuration of a current output type driving circuit according to the third embodiment of the present invention.
The current output type drive circuit shown in FIG. 5 replaces the drive units 2-1 to 2-m in the current output type drive circuit shown in FIG. 1 with drive units 2B-1 to 2B-m, which will be described later, and generates control signals. The circuit 3 and the selection circuits 4, 5, and 6 are added.
The control signal generation circuit 3 is an embodiment of the control signal generation circuit of the present invention.
The selection circuit 5 is an embodiment of the first selection circuit of the present invention.
The selection circuit 6 is an embodiment of the second selection circuit of the present invention.

The selection circuit 4 selects a later-described terminal T1 of the drive unit designated by the unit designation signal Su among the m drive units 2B-1 to 2B-m, and a reference voltage Vref output from the selected terminal. Is output to the control signal generation circuit 3.
The selection circuit 4 includes, for example, m switches SW4 [1] to SW5 [m] that connect the terminal T1 of each drive unit and the input terminal of the control signal generation circuit 3. When the drive unit 2B-k is designated in the unit designation signal Su, the switch SW4 [k] connected to the terminal T1 is turned on, and other switches not designated are turned off.

The selection circuit 5 selects a later-described terminal T2 of the drive unit designated by the unit designation signal Su among the drive units 2B-1 to 2B-m, and outputs a voltage output from the selected terminal to the control signal generation circuit. 3 is output.
The selection circuit 5 includes, for example, m switches SW5 [1] to SW5 [m] that connect the terminal T2 of each drive unit and the input terminal of the control signal generation circuit 3. When the drive unit 2B-k is designated in the unit designation signal Su, the switch SW5 [k] connected to the terminal T2 is turned on, and other switches not designated are turned off.

The control signal generation circuit 3 generates the control signal Sc adjusted so that the difference between the reference voltage Vref output from the selection circuit 4 and the voltage output from the selection circuit 5 becomes small.
The control signal generation circuit 3 is composed of, for example, an operational amplifier, and amplifies the difference between the reference voltage Vref output from the selection circuit 4 and the voltage output from the selection circuit 5 with a high gain to generate the control signal Sc. Generate.

The selection circuit 6 selects a later-described terminal T3 of the drive unit designated by the unit designation signal Su from the drive units 2B-1 to 2B-m, and the control signal generation circuit 3 generates the selected terminal at the selected terminal. A control signal Sc is input.
The selection circuit 5 includes, for example, m switches SW5 [1] to SW5 [m] that connect the terminal T3 of each drive unit and the output terminal of the control signal generation circuit 3. When the drive unit 2B-k is designated in the unit designation signal Su, the switch SW6 [k] connected to the terminal T3 is turned on, and other switches not designated are turned off.

FIG. 6 is a diagram illustrating an example of the configuration of the drive unit 2B-k.
In the drive unit shown in FIG. 6, the control signal generation circuit 22 in the drive unit shown in FIG. 2 is deleted, the current control circuit 21 is replaced with a current control circuit 21B described later, and terminals T1, T2, and T3 are provided. Is.
The current control circuit 21B is an embodiment of the current control circuit of the present invention.
Terminal T2 is an embodiment of the first terminal of the present invention.
Terminal T3 is an embodiment of the second terminal of the present invention.

  The terminal T1 is connected to a connection node between the current source CM1 and the resistor Rf, and outputs a reference voltage Vref generated in the resistor Rf to the selection circuit 4.

  The terminal T2 is connected to a connection node N3 between the current control circuit 21 and the resistance circuit VR, and outputs a voltage generated in the resistance circuit VR to the selection circuit 5.

  The terminal T3 receives the control signal Sc from the control signal generation circuit 3 via the selection circuit 6, and inputs this to the current control circuit 21B.

  The current control circuit 21B holds the control signal Sc input from the terminal T3, and controls the load current flowing between the nodes N1 and N3 according to the held control signal Sc. For example, a parasitic capacitance at the input terminal of the control signal Sc of the current control circuit 21B is used to hold the control signal Sc. If this parasitic capacitance is insufficient, a signal holding capacitor may be added to the input terminal.

  Here, the operation of the current output type driving circuit according to the third embodiment having the above-described configuration will be described.

The control signal Sc generated in the control signal generation circuit 3 is input to the current control circuit 21B of the drive unit 2B-k specified by the unit specification signal Su via the selection circuit 6 and the terminal T3, and this control signal Sc Load current according to the flow.
The load current controlled in the current control circuit 21B flows into the resistance circuit VR and generates a voltage corresponding to the resistance value set by the current setting signal Dk. The voltage of the resistance circuit VR is input to the control signal generation circuit 3 through the selection circuit 5 from the terminal T2.
The reference voltage Vref generated in the drive unit specified by the unit specifying signal Su is input to the control signal generation circuit 3 via the selection circuit 4.
The control signal generation circuit 3 detects a difference between the voltage of the resistance circuit VR output from the selection circuit 5 and the reference voltage Vref output from the selection circuit 4 and adjusts the control signal so that the voltage difference is reduced. Sc is generated.
Therefore, in the drive unit 2B-k designated by the unit designation signal Su, a load current corresponding to the current setting signal Dk is generated by feedback control similar to that of the drive unit 2-k shown in FIG.
On the other hand, in the current control circuit 21B of the other drive unit not designated by the unit designation signal Sc, the previously inputted control signal is held by, for example, a parasitic capacitance or a capacitor, and the current control circuit 21B corresponds to the held control signal. Load current flows.
As described above, according to the current output type drive circuit according to the present embodiment, one control signal generation circuit 3 can be shared by a plurality of drive units. Therefore, when a control signal generation circuit is provided in each drive unit. In comparison, circuit area and power consumption can be reduced.

  Further, when the connection between the control signal generation circuit 3 and the drive unit is switched according to the unit designation signal Su, the selection circuits 4 and 5 are disconnected after the selection circuit 6 disconnects the connection between the terminal T3 and the control signal generation circuit 3. The connection between the terminals T1 and T2 and the control signal generation circuit 3 may be disconnected. When switching the connection of the selection circuits 4 to 6, since the feedback control loop is temporarily broken, noise is generated in the control signal Sc, but by disconnecting the selection circuit 6 connected to the storage capacitor of the current control circuit 21B first, Since erroneous charging of the storage capacitor of the current control circuit 21B due to this noise can be prevented, current setting errors due to noise during switching can be suppressed.

  Further, according to the current output type driving circuit according to the present embodiment, feedback control is performed so that the voltage generated at the terminal T2 and the reference voltage Vref generated at the terminal T1 are equal to each other. Similar to the drive unit shown, it is possible to suppress a decrease in the setting accuracy of the minute current due to the influence of the offset error of the control signal generation circuit 3.

<Fourth Embodiment>
Next, a fourth embodiment of the present invention will be described.

The current output type drive circuit according to the present embodiment is obtained by replacing the drive units 2B-1 to 2B-m in the current output type drive circuit shown in FIG. 5 with drive units 2C-1 to 2C-m described below. The other configuration is the same as that of the current output type driving circuit shown in FIG.
The selection circuit 4 is an embodiment of the third selection circuit of the present invention.

FIG. 7 is a diagram showing a configuration example of the drive unit 2C-k of the current output type drive circuit according to the fourth embodiment of the present invention.
The drive unit 2C-k shown in FIG. 7 is obtained by deleting the control signal generation circuit 22 in the drive unit 2A-k shown in FIG. 3 and adding terminals T1, T2, T3 and a capacitor Ch. Is the same as the drive unit 2A-k shown in FIG.
The current source CM1 is an embodiment of the current source of the present invention.
The resistor Rf is an embodiment of the second resistor of the present invention.
Terminal T1 is an embodiment of the third terminal of the present invention.

  The terminal T1 is connected to a connection node between the current source CM1 and the resistor Rf, and outputs a reference voltage Vref generated in the resistor Rf to the selection circuit 4.

  The terminal T2 is connected to a node N4 commonly connected in the switches SWC1 to SWCn, and outputs a voltage generated at the node N4 to the selection circuit 5.

  The terminal T3 receives the control signal Sc from the control signal generation circuit 3 via the selection circuit 6, and inputs it to the gates of the transistors (Q1 to Qn) via the switches SWA1 to SWAn.

  The capacitor Ch is connected between the terminal T3 and the reference potential VSS, and holds the control signal Sc input to the terminal T3. Note that the capacitor Ch may be omitted when the control signal Sc can be held by the gate capacitances of the transistors Q1 to Qn.

Here, the operation of the current output type driving circuit according to the fourth embodiment having the above-described configuration will be described with reference to FIG.
FIG. 8 shows the waveforms of the load currents Iout (k) and Iout (k + 1) and the control signal Sc generated in the two drive units 2C-k and 2C- (k + 1) and the selections connected to these drive units It is a figure which shows an example of the state of each switch of the circuits 4-6.

In each drive unit, among the transistors Q0 to Qn, the load current flows through the transistors specified by the current setting signals (D1 to Dn), and the other transistors are set to off. The load current flowing through the transistor flows to the reference potential VSS through resistors (R1 to Rn) connected in series with the transistor.
The connection nodes (N3-1 to N3-n) between the transistors specified by the current setting signals (D1 to Dn) and the series resistors (R1 to Rn) are connected to the terminal T2 by the switch circuits (SWC1 to SWCn). Connected in common.

When the drive unit 2C-k is designated by the unit designation signal Sc (period X2), the voltage generated at the terminal T2 is input to the control signal generation circuit 3 via the switch SW5 [k] of the selection circuit 5 and the same. A difference from the reference voltage Vref supplied from the terminal T1 of the drive unit 2C-k is detected. In the control signal generation circuit 3, the control signal Sc is adjusted so that the difference between the voltage at the terminal T2 and the reference voltage Vref at the terminal T1 becomes small. The control signal Sc is input from the switch SW6 [k] of the selection circuit 6 to the drive unit 2C-k via the terminal T3 and input to the gate of the transistor specified by the current setting signal Dk.
As a result, each of the current sense resistors (R1 to Rn) connected in series with the transistor specified by the current setting signal Dk flows a predetermined current determined by the resistance value and the magnitude of the reference voltage Vref. The load current Iout becomes a value represented by the equation (1).

  Thereafter, when the designation target of the unit designation signal Sc moves from the drive unit 2C-k to the drive unit 2C- (k + 1) (period X3), each switch (SW4) between the control signal generation circuit 3 and the drive unit 2C-k. [K], SW5 [k], SW6 [k]) are set to OFF, and the control signal Sc input in the period X2 is held by the capacitor Ch and the gate parasitic capacitance. In the period X3, the gates of the transistors Q1 to Qn are driven according to the held control signal Sc, so that a load current equivalent to that in the period X2 continues to flow.

  Thus, also in the current output type drive circuit according to the present embodiment, since one control signal generation circuit 3 can be shared by a plurality of drive units, compared to the case where a control signal generation circuit is provided in each drive unit. Thus, the circuit area and power consumption can be reduced.

In the current output type driving circuit according to the present embodiment, when the number of transistors that control the load current increases or decreases according to the change in the set value of the load current, the mutual conductance of the current control circuit configured by the transistors Q1 to Qn also increases. The points that change according to this are the same as those of the drive units 2A-k shown in FIG. 3 described above.
That is, even if the resistance value rt of the resistance circuit (SWC1 to SWCn and R1 to Rn) changes according to the set value of the load current, and the gain for converting the load current to the voltage changes, the current in a direction to cancel this change. The mutual conductance of the control circuit (Q1 to Qn) changes.
Therefore, also in the current output type driving circuit according to the present embodiment, it is possible to suppress a change in loop gain.

In addition, the transistors Q1, Q2,..., Qn are each composed of one, two,..., 2 ^n-1 transistor elements connected in parallel, and these transistor elements are equivalent on a common semiconductor substrate. When formed in a structure, they have characteristics close to each other, so that mutual conductances are close to each other. Further, each of the current sense resistors R1, R2,..., Rn is composed of one, two,..., 2 ^n-1 connected resistance elements, and these resistance elements are equivalent on a common semiconductor substrate. If they are formed with a simple structure, they have resistance values approximate to each other, and therefore the gains for converting the load current into voltage approximate each other.
As a result, like the drive unit shown in FIG. 3, the total gain in the current control circuit (Q1 to Qn) and the resistance circuit (SWC1 to SWCn and R1 to Rn) becomes a constant value regardless of the set value of the load current. Since the approximation is performed, the change in the loop gain of the feedback control can be further suppressed.
In addition, by forming the transistor element and the resistance element on a common semiconductor substrate, variation in the current setting accuracy due to a temperature change can be reduced.

  Similarly to the drive unit shown in FIG. 3, the load current flowing through the load 1-k has a magnitude corresponding to the resistance value ratio between the current sense resistors (R1 to Rn) and the resistor Rf. For this reason, by forming these resistors on a common semiconductor substrate, it is possible to increase the setting accuracy of the load current and to suppress the variation in the current accuracy due to temperature.

Furthermore, in the current output type drive circuit according to the present embodiment, when the connection between the control signal generation circuit 3 and the drive unit is switched according to the unit designation signal Su, the selection circuit 6 uses the terminal T3 and the control signal generation circuit 3 After disconnecting, the selection circuits 4 and 5 may disconnect the connection between the terminals T1 and T2 and the control signal generation circuit 3.
For example, as shown in FIGS. 8D to 8G, the switch SW6 [k] is first set between the period X2 and the period X5 in which the drive unit 2C-k is switched to 2C- (k + 1). After the switch is turned off, the switches SW4 [k] and SW5 [k] may be turned off.
When the connection of the selection circuits 4 to 6 is switched, the feedback control loop is temporarily interrupted, and thus noise is generated in the control signal Sc. By disconnecting the selection circuit 6 first in this way, the current control circuit 21B due to noise is generated. In this case, it is possible to prevent erroneous charging of the capacitor Ch and the gate capacitance component, and thus it is possible to suppress current setting errors.

  In addition, according to the current output type driving circuit according to the present embodiment, the load current can be controlled by changing the gates of the transistors Q1 to Qn over a wide range by the control signal Sc of the control signal generating circuit 3, so that the driving shown in FIG. Similar to the unit, the transistors Q1 to Qn can be operated in the non-saturated region.

  Also in the current output type driving circuit according to the present embodiment, the voltage generated at the node N4 is controlled to be equal to the reference voltage Vref generated at the resistor Rf, as in the driving unit shown in FIG. Therefore, it is possible to suppress a decrease in setting accuracy of the minute current due to the influence of the offset error of the control signal generation circuit 3.

<Fifth Embodiment>
Next, a fifth embodiment of the present invention will be described.

  The current output type drive circuit according to the present embodiment is obtained by replacing the drive units 2B-1 to 2B-m in the current output type drive circuit shown in FIG. 5 with drive units 2D-1 to 2D-m described below. The other configuration is the same as that of the current output type driving circuit shown in FIG.

FIG. 9 is a diagram illustrating a configuration example of the drive unit 2D-k of the current output type drive circuit according to the fifth embodiment of the present invention.
The drive unit 2C-k shown in FIG. 9 is obtained by adding an n-channel MOS transistor Q0, a current sense resistor R0, and switches SWA0, SWB0, and SWC0 to the drive unit 2C-k shown in FIG. In other respects, the configuration is the same as that of the drive unit 2C-k shown in FIG.
The transistor Q0 is an embodiment of the third transistor of the present invention.
Current sense resistor R0 is an embodiment of the third resistor of the present invention.
The circuit having the switches SWA0, ..., SWAn and the switches SWB0, ..., SWBn is an embodiment of the control signal input circuit of the present invention.
The circuit having the switches SWC0,..., SWCn is an embodiment of the switch circuit of the present invention.

  The transistor Q0 has a drain connected to the power supply line VDD, a source connected to the reference potential VSS via the current sense resistor R0, and a gate connected to the terminal T3 via the switch SWA0.

Similarly to the drive unit 2C-k shown in FIG. 7, the switches SWC0 to SWCn are the transistors designated by the current setting signal Dk among the n transistors Q1 to Qn and the current sense resistors (R1 to R1) connected in series thereto. Rn) constitutes a switch circuit that commonly connects the connection nodes (N3-1 to N3-n) to the terminal T2.
The difference from the switch circuit (SWC1 to SWCn) of the drive unit 2C-k is that when none of the transistors Q1 to Qn is specified in the current setting signal Dk, the connection node N3-0 between the transistor Q0 and the current sense resistor R0 is set. The point is to connect to the terminal T2.

  The switch SWC0 is connected between the node N3-0 and the terminal T2, and when none of the transistors Q1 to Qn is specified in the current setting signal Dk, that is, all the bits of the current setting signal Dk are “0”. Turns on in case of, and turns off in other cases.

The switches SWA0 to SWAn and the switches SWB0 to SWBn constitute a control signal input circuit for inputting a control signal to the gates of the transistors Q1 to Qn, like the drive unit 2C-k shown in FIG.
That is, the control signal Sc of the terminal T3 is input to the gate of the transistor designated by the current setting signal Dk among the n transistors Q1 to Qn, and the control signal for turning off the transistor is applied to the gates of the other transistors. A reference potential Vss is input.
The difference from the control signal input circuits (SWA1 to SWAn and SWB1 to SWBn) in the drive unit 2C-k is that the control signal Sc input from the terminal T3 when none of the transistors Q1 to Qn is specified in the current setting signal Dk. Is input to the gate of the transistor Q0, and the reference potential VSS is input to the gates of the transistors Q1 to Qn.

The switch SWA0 is connected between the gate of the transistor Q0 and the terminal T3. When none of the transistors Q1 to Qn is specified in the current setting signal Dk, that is, all the bits of the current setting signal Dk are “0”. Turns on in case of, and turns off in other cases.
The switch SWA0 is connected between the gate of the transistor Q0 and the reference potential VSS. When none of the transistors Q1 to Qn is specified in the current setting signal Dk, that is, all the bits of the current setting signal Dk are “0”. Turns off if ', turns on otherwise.

Here, the operation of the current output type driving circuit according to the fifth embodiment having the above-described configuration will be described with reference to FIG.
FIG. 10 is a diagram illustrating an example of waveforms of the load current Iout and the control signal Sc and states of the switches of the selection circuits 4 to 6.

  For example, in the current output type drive circuit according to the fourth embodiment, it is assumed that the current of the drive unit 2C- (k-1) selected before the drive unit 2C-k is set to zero (period X7). In this case, in the drive unit 2C- (k-1), since the transistors Q1 to Qn are not selected at all, the terminals T2 and T3 are not connected to any transistor, and the feedback loop is cut off. For this reason, the control signal Sc generated in the control signal generation circuit 3 is in an indefinite state, and drops to the reference potential VSS, for example, as shown by the dotted line in FIG. In this state, when the control target is switched from the drive unit 2C- (k-1) to the drive unit 2C-k (period X8), the control that has dropped to the reference potential VSS in the drive unit 2C-k at the beginning of the switching. A signal Sc is input. Therefore, the load current Iout [k] controlled according to the control signal Sc temporarily drops to near zero as indicated by the dotted line in FIG.

On the other hand, in the current output type drive circuit according to the present embodiment, the current of the drive unit 2D- (k−1) selected before the drive unit 2D-k is set to zero, as described above. (Period X7). In this case, since the switches SWA0 and SWC0 are turned on and the switch SWB0 is turned off in the drive unit 2D- (k-1), the control signal generation circuit 3 includes a connection node N3- between the transistor Q0 and the current sense resistor R0. A voltage generated at 0 is input via the selection circuit 5. The control signal Sc generated by the control signal generation circuit 3 is input to the gate of the transistor Q0 via the selection circuit 6.
As a result, in the control signal generation circuit 3, feedback control that adjusts the control signal Sc is performed so that the difference between the voltage generated in the current sense resistor R0 and the reference voltage Vref is reduced. As shown by the solid line in FIG. 10B, the control signal Sc can be prevented from entering an indefinite state. Therefore, as shown by the solid line in FIG. 10A, the fluctuation of the load current Iout [k] at the beginning of switching can be suppressed to a small extent.

Note that the transistor Q0 and the current sense resistor R0 prevent the discontinuous change of the control signal Sc as described above, so that the current flowing through the transistor Q0 and the current sense resistor R0 does not necessarily have to be at the same level as the transistors Q1 to Qn. A very small current is sufficient. In other words, the control signal Sc generated when the feedback control is performed by the transistor Q0 and the current sense resistor R0 and the control signal Sc generated when the feedback control is performed in the transistors Q1 and Q2 may not be at a level different from each other. The current value can be arbitrarily set to meet this condition.
For example, when the resistance value of the current sense resistor R0 is set to 100 times the resistance value r of the current sense resistor R1, and the current flowing through the transistor Q0 is set to 1/100 of the current flowing through the transistor Q1, this 100 minutes The driving capability of the transistor Q0 may be set so that the gate-source voltage of the transistor Q0 required to pass the current of 1 is substantially equal to the gate-source voltage of the transistor Q1 during the feedback operation. .
Thus, by setting the current flowing through the transistor Q0 and the current sense resistor R0 to be small, an increase in power consumption can be suppressed.

  In addition, according to the current output type drive circuit according to the present embodiment, the same effect can be obtained by the same configuration and operation as those of the current output type drive circuit according to the fourth embodiment described above.

<Sixth Embodiment>
Next, a sixth embodiment of the present invention will be described.

FIG. 11 is a diagram showing an example of the configuration of a current output type driving circuit according to the sixth embodiment of the present invention.
In the current output type drive circuit shown in FIG. 11, the drive units 2B-1 to 2B-m in the current output type drive circuit shown in FIG. 5 are replaced with the drive units 2E-1 to 2E-m described below. A current source CM2 and a selection circuit 7 are added. Other configurations are the same as those of the current output type driving circuit shown in FIG.
The selection circuit 7 is an embodiment of the fourth selection circuit of the present invention.
The selection circuit 4 is an embodiment of the fifth selection circuit of the present invention.
The current source CM2 is an embodiment of the current source of the present invention.

  The drive unit 2E-k is obtained by deleting the current source CM1 from the drive unit 2C-k (FIG. 7) or the drive unit 2D-k (FIG. 9), and other configurations are the same as those units.

  The current source CM2 outputs a constant current I from the power supply line VDD to the selection circuit 7.

  The selection circuit 7 selects the drive unit terminal T1 designated by the unit designation signal Su among the drive units 2E-1 to 2E-n, and inputs the current I of the current source CM2 to the selected terminal.

The selection circuit 4 selects the resistance Rf of the drive unit designated by the unit designation signal Su among the drive units 2E-1 to 2E-n, and generates a control signal using the voltage generated at the selected resistance as the reference voltage Vref. Input to circuit 3.
That is, the terminal T1 of the drive unit selected by the unit designation signal Su is connected to the input terminal of the control signal generation circuit 3.

According to the above configuration, the constant current I is input from the common current source CM2 to the resistance Rf of the drive unit specified by the unit specifying signal Su. The reference voltage Vref generated in the resistor Rf by this current I is input to the common control signal generation circuit 3 and used for controlling the load current.
Thus, according to the current output type driving circuit according to the present embodiment, since the current source CM2 is shared by a plurality of driving units, it is possible to reduce the variation in the current setting value between the driving units. Thereby, a plurality of load currents can be set with high accuracy.

  As mentioned above, although several embodiment of this invention was described, this invention is not limited only to said form, Various modifications are included.

  For example, in the above-described embodiment, the reference voltage Vref is generated by flowing a constant current through the resistor Rf provided in each drive unit, but the present invention is not limited to this. For example, the load current may be controlled using a reference voltage Vref generated by passing a constant current through a common resistor for each drive unit.

  Moreover, although the n-channel MOS transistor is used in the above-described embodiment, the present invention is not limited to this. For example, a p-channel MOS transistor may be used, and the present invention can be realized by using other types of transistors (for example, bipolar transistors).

It is a figure which shows an example of a structure of the current output type drive circuit which concerns on 1st Embodiment. It is a figure which shows the structural example of the drive unit in the current output type drive circuit which concerns on 1st Embodiment. It is a figure which shows the structural example of the drive unit in the current output type drive circuit which concerns on 2nd Embodiment. The figure which shows an example of the signal waveform of each part in the drive unit shown in FIG. It is a figure which shows an example of a structure of the current output type drive circuit which concerns on 3rd Embodiment. It is a figure which shows the structural example of the drive unit in the current output type drive circuit which concerns on 3rd Embodiment. It is a figure which shows the structural example of the drive unit in the current output type drive circuit which concerns on 4th Embodiment. It is a figure which shows an example of the state of each switch of the load current in the current output type drive circuit shown in FIG. 7, and a control signal, and a selection circuit. It is a figure which shows the structural example of the drive unit in the current output type drive circuit which concerns on 5th Embodiment. It is a figure which shows an example of the state of each switch of the load current and control signal in the current output type drive circuit shown in FIG. 9, and the selection circuit. It is a figure which shows an example of a structure of the current output type drive circuit which concerns on 6th Embodiment. It is a figure which shows the structural example of the conventional current output type drive circuit.

Explanation of symbols

1-1 to 1-m ... load, 2-1 to 2-m, 2A-1 to 2A-m, 2B-1 to 2B-m, 2C-1 to 2C-m, 2D-1 to 2D-m, 2E-1 to 2E-m ... drive unit, 21, 21B ... current control circuit, 22, 3 ... control signal generation circuit, VR ... resistance circuit, CM1, CM2 ... current source, Q0 to Qn ... transistor, R0 to Rn, Rf... Resistor, SWA0 to SWAn, SWB0 to SWBn, SWC0 to SWCn ... switch, 4 to 7 ... selection circuit, T1 to T3 ... terminal

Claims (10)

A first node to which a load is connected;
A current control circuit that includes a plurality of transistor portions connected in parallel to the first node, and that controls a load current that flows to the load in accordance with an input control signal;
A second node;
A resistor circuit including a plurality of first resistors respectively connected between each transistor portion of the plurality of transistor portions and the second node ;
A switch circuit that selects a drive path of the load current according to an input current setting signal from a plurality of paths in which the transistor unit and the first resistor are connected in series to form each path;
In the current control circuit, the difference between the sense voltage appearing at the midpoint of connection between the transistor section and the first resistor in the drive path selected by the switch circuit and the input reference voltage is reduced. A control signal generation circuit for generating and controlling the control signal to be output;
I have a,
The ratio between the mutual conductance of the transistor part and the value of the first resistance can be made uniform among a plurality of paths .
Current output type drive circuit. The plurality of transistor parts include one transistor element or a plurality of transistor elements connected in parallel in each transistor part,
The first resistor includes one resistor element or a plurality of resistor elements connected in parallel in each first resistor,
Transistor elements included in the plurality of transistor portions are formed in a semiconductor substrate with an equivalent structure,
The resistance elements included in the plurality of first resistors are formed in a structure equivalent to each other in the semiconductor substrate,
The ratio of the number of the transistor elements included in the transistor portion to the number of the resistance elements included in the first resistor is a plurality of the transistor portions and the first resistors connected in series to each other. The current output type drive circuit according to claim 1 , wherein the current output type drive circuit is set to a constant ratio between paths . The switch circuit is
A first switch circuit that differentially controls a control node of each transistor unit with respect to an output of the control signal generation circuit from which the control signal is output and the second node ;
When the control signal is applied to the control node by the first switch circuit and the transistor unit is turned on, the connection midpoint which is the node where the sense voltage appears in the path selected as the drive path is set as the control signal generation circuit. A second switch circuit that connects and disconnects the connection midpoint of the non-selected path to the control signal generation circuit;
The current output type drive circuit according to claim 2 , comprising: A second resistor formed on a semiconductor substrate common to the first resistor;
A current source for supplying a predetermined current to the second resistor;
Have
The control signal generation circuit inputs a voltage generated in the second resistor as the reference voltage.
The current output type driving circuit according to claim 3 . A plurality of drive units for supplying a current corresponding to an input current setting signal to a corresponding load ;
A selection control circuit;
Have
The drive unit is
A first node to which a load is connected ;
A current control circuit that includes a transistor portion connected to the first node and controls a load current flowing through the load in accordance with an input control signal ;
A second node common between the drive units;
A resistor circuit including a first resistor connected between each transistor portion of the plurality of transistor portions and the second node ;
A first terminal between the transistor portion and the first resistor;
A second terminal for inputting a control signal for input to the current control circuit;
Including
The selection control circuit is
A first selection circuit that selects the first terminal of the drive unit designated by the input unit designation signal among the plurality of drive units, and outputs a voltage outputted from the selected terminal;
A control signal generation circuit that generates a control signal of the current control circuit adjusted so that a difference between an input reference voltage and a voltage output from the first selection circuit is small;
A second terminal that selects the second terminal of the drive unit designated by the unit designation signal among the plurality of drive units, and inputs the control signal generated by the control signal generation circuit to the selected terminal; A selection circuit;
I have a,
The ratio between the mutual conductance of the transistor part and the value of the first resistance can be made uniform among a plurality of drive units.
Current output type drive circuit. The current control circuit includes a plurality of transistors connected in parallel between the first node and the second node;
The resistor circuit is
A plurality of resistance elements inserted on a wiring connecting the plurality of transistors and the second node;
A switch circuit for commonly connecting a connection node between the transistor designated by the current setting signal and the first resistor among the plurality of transistors to the first terminal;
Including
The drive unit inputs a control signal input from the second terminal to a transistor specified by the current setting signal among the plurality of transistors, and outputs a control signal for turning off the transistor to the other transistors. Including each control signal input circuit to input,
The current output type driving circuit according to claim 5. The drive unit is
A second resistor formed on a semiconductor substrate common to the first resistor;
A current source for supplying a predetermined current to the second resistor;
A third terminal for outputting a voltage generated in the second resistor as the reference voltage;
Each
A third terminal that selects the third terminal of the drive unit designated by the unit designation signal among the plurality of drive units and inputs a reference voltage output from the selected terminal to the control signal generation circuit. Further comprising a selection circuit;
The current output type driving circuit according to claim 6. The drive unit is
A second resistor formed on a semiconductor substrate common to the first resistor;
A third terminal for inputting a current flowing through the second resistor;
Each
The current source that outputs a predetermined current and the third terminal of the drive unit designated by the unit designation signal among the plurality of drive units are selected, and the current of the current source is input to the selected terminal And selecting the second resistor of the drive unit designated by the unit designation signal among the plurality of drive units, and using the voltage generated in the selected resistor as the reference voltage. A fifth selection circuit that inputs to the control signal generation circuit;
The current output type driving circuit according to claim 6. The transistor includes one or a plurality of parallel-connected transistor elements formed in an equivalent structure on the semiconductor substrate,
The first resistor includes one or a plurality of parallel-connected resistance elements formed in an equivalent structure on the semiconductor substrate,
The ratio of the number of transistor elements included in the transistor to the number of resistance elements included in the first resistor is a constant ratio between the commonly connected transistors and the first resistor. Set to
The current output type driving circuit according to claim 8. The drive unit is
A third transistor through which a current corresponding to an input control signal flows;
A third resistor having one terminal connected to the third transistor and the other terminal connected to the second node;
Each
When none of the plurality of transistors is specified in the current setting signal, the switch circuit connects a connection node between the third transistor and the third resistor to the first terminal, and inputs the control signal. When none of the plurality of transistors is specified in the current setting signal, the circuit inputs a control signal input from the second terminal to the third transistor, and turns off the transistor for the plurality of transistors. Input each control signal to be
The current output type driving circuit according to claim 6.

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