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JP4721309B2 - Thermosetting resin composition and semiconductor device - Google Patents

Thermosetting resin composition and semiconductor device Download PDF

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Publication number
JP4721309B2
JP4721309B2 JP2001037726A JP2001037726A JP4721309B2 JP 4721309 B2 JP4721309 B2 JP 4721309B2 JP 2001037726 A JP2001037726 A JP 2001037726A JP 2001037726 A JP2001037726 A JP 2001037726A JP 4721309 B2 JP4721309 B2 JP 4721309B2
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Japan
Prior art keywords
resin composition
thermosetting resin
circuit board
semiconductor device
semiconductor element
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JP2002241472A (en
Inventor
弘司 野呂
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Nitto Denko Corp
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Nitto Denko Corp
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Priority to JP2001037726A priority Critical patent/JP4721309B2/en
Priority to TW91102188A priority patent/TW574739B/en
Priority to SG200200743A priority patent/SG111042A1/en
Priority to MYPI20020441A priority patent/MY122912A/en
Priority to CNB021054312A priority patent/CN1239607C/en
Priority to US10/073,422 priority patent/US6617046B2/en
Priority to KR1020020007960A priority patent/KR100592204B1/en
Priority to DE2002600455 priority patent/DE60200455T2/en
Priority to EP20020003138 priority patent/EP1233446B1/en
Publication of JP2002241472A publication Critical patent/JP2002241472A/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29005Structure
    • H01L2224/29007Layer connector smaller than the underlying bonding area
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • H01L2224/83192Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01027Cobalt [Co]

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  • Sealing Material Composition (AREA)
  • Compositions Of Macromolecular Compounds (AREA)
  • Epoxy Resins (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Wire Bonding (AREA)

Description

【0001】
【発明の属する技術分野】
本発明は、半導体装置における配線回路基板と半導体素子との間の空隙を封止するために用いられる熱硬化性樹脂組成物に関する。さらに、本発明は、かかる熱硬化性樹脂組成物を用いて半導体素子をフェイスダウン構造で配線回路基板上に実装する方式による半導体装置およびその製造方法に関するものである。
【0002】
【従来の技術】
最近の半導体デバイスの性能向上に伴う要求として、半導体素子をフェイスダウン構造で、配線回路基板に実装される方法(フリップチップ、ダイレクトチップアタッチ方式等)がある。フリップチップ方式においては、互いの線膨張係数が異なる半導体素子と配線回路基板をダイレクトに電気接続を行うことから、接続部分の信頼性が問題となっている。この対策としては、半導体素子と配線回路基板との空隙に液状樹脂材料を充填し硬化させて樹脂硬化体を形成し、電気接続部に集中する応力を上記樹脂硬化体にも分散させることにより接続信頼性を向上させる方法が採られている。従来の半田バンプを用いたフリップチップ方式における液状材料の充填方法では、まずフリップチップを配線回路基板に実装し半田溶融工程による金属接合を形成した後、半導体素子と配線回路基板との空隙に毛細管効果により液状樹脂材料を注入している。
【0003】
さらに近年、毛細管現象を利用した液状材料の注入方式よりも、より工程の簡略化を試みたフラックス活性を有する熱硬化性樹脂材料を用いた半導体装置の製造においては、該熱硬化性樹脂材料は半導体素子あるいは配線回路基板上に先塗布されチップ実装とともに界面樹脂封止がなされ、その後半田リフローを行うことにより金属結合が形成されるため、液状樹脂材料を用いた半導体装置の製造と比べフラックスの塗布およびその洗浄、液状樹脂注入などの工程が削減できるため半導体装置の生産性を向上することができる。また、液状樹脂材料による半導体素子と配線回路基板の間の空隙の充填は、液状樹脂材料の毛細管効果によって行うものであるため、液状樹脂材料の粘度を低い値に設定する必要がある。よって、低粘度を得るために、酸無水物系硬化剤が使用されており材料選定の幅が狭まり、耐湿信頼性の高いフェノール樹脂等の使用が困難な状況にあった。
【0004】
【発明が解決しようとする課題】
本発明は、このような事情に鑑みなされたもので、半導体素子と配線回路基板および接続用電極に生ずる応力の緩和効果に優れ、半導体素子と配線回路基板との空隙に容易に封止樹脂層を形成することができかつフラックスの洗浄工程を必要としない、熱硬化性樹脂組成物ならびにそれを用いた半導体装置およびその製造方法を提供することを目的とする。
【0005】
【課題を解決するための手段】
本発明の要旨は、
(1)フェイスダウン構造の半導体パッケージの配線回路基板と半導体素子との間の空隙を封止するために用いる熱硬化性樹脂組成物であって、エポキシ樹脂、フェノール樹脂系硬化剤および下記一般式(1):
1 −(COO−CH(CH3 )−O−R2 n (1)
(式中、nは正の整数であり、R1 は1価以上の有機基であり、R2 は1価の有機基であり、互いに同じであっても異なっていてもよい)
または一般式(2):
−(OCO−R3 −COO−CH(CH3 )−OR4 −O−CH(CH3 ))n − (2)
(式中、nは正の整数であり、R3 およびR4 は2価の有機基であり、互いに同じであっても異なっていてもよい)
により表される化合物を含有することを特徴とする、熱硬化性樹脂組成物、
(2)70℃での溶融粘度が100Pa・s以下であり、かつ25℃で固体であることを特徴とする前記(1)記載の熱硬化性樹脂組成物、
(3)前記(1)又は(2)記載の熱硬化性樹脂組成物をウエハに塗布し、次いで該ウエハを個片チップにダイシングし、チップ実装を行うことを特徴とする半導体装置の製造方法、
(4)前記(1)又は(2)記載の熱硬化性樹脂組成物で封止されてなる半導体装置、
に関する。
【0006】
【発明の実施の形態】
本発明の熱硬化性樹脂組成物は、フェイスダウン構造の半導体素子の封止に好適に用いられるものである。詳細には、配線回路基板上に、複数の接続用電極部を介して半導体素子が搭載される半導体装置において、配線回路基板と半導体素子との間の空隙を封止するのに使用される。即ち、本発明の熱硬化性樹脂組成物を、配線回路基板と半導体素子との間に介在させてフェイスダウン構造の半導体素子の配線回路基板上への圧着による仮固着を行い、その後半田溶解を行うことにより半導体素子と配線回路基板との空隙の封止および金属接合を形成させることができる。
【0007】
本発明の熱硬化性樹脂組成物は、エポキシ樹脂、フェノール樹脂系硬化剤、およびフラックス活性剤として、下記一般式(1):
1 −(COO−CH(CH3 )−O−R2 n (1)
(式中、nは正の整数であり、R1 は1価以上の有機基であり、R2 は1価の有機基であり、互いに同じであっても異なっていてもよい)
または一般式(2):
−(OCO−R3 −COO−CH(CH3 )−OR4 −O−CH(CH3 ))n − (2)
(式中、nは正の整数であり、R3 およびR4 は2価の有機基であり、互いに同じであっても異なっていてもよい)
により表される化合物を含有することを特徴とする。
【0008】
ここで、フラックス活性とは、半田付けの際に、接合すべき金属表面の酸化膜、有機物等を除去し、加熱中の酸化進行を防止し、溶解半田の表面張力を低下させる能力をいい、フラックス活性剤とは、半導体封止用組成物にフラックス活性を付与する化合物または組成物をいう。
【0009】
本発明の熱硬化性樹脂組成物に含有される一般式(1)または(2)で表されるフラックス活性剤は、カルボン酸類とビニルエーテル化合物との反応により得ることができる。カルボン酸類としては、例えば、酢酸、アジピン酸、マレイン酸、フマル酸、イタコン酸、フタル酸、トリメリット酸、ピロメリット酸、アクリル酸、イソシアヌル酸、カルボキシル基含有ポリブタジエンなどが挙げられ、またビニルエーテル化合物としては、例えば、ブチル基、エチル基、プロピル基、イソプロピル、シクロヘキシル基などを有するビニルエーテル類が挙げられる。
【0010】
上記一般式(1)のR1 の具体例としては、炭素数1〜6のアルキル基またはアルキレン基、ビニル基、アリル基、フェニル基、フェニレン基、3価以上の芳香環基、C3 3 (OCOC2 4 3 基が挙げられる。上記一般式(1)のR2 の具体例としては、炭素数1〜10のアルキル基、炭素数3〜6のシクロアルキル基が挙げられる。
【0011】
上記一般式(2)のR3 の具体例としては、式(3)〜(6)で示される構造を有する官能基が挙げられる。
【0012】
【化1】

Figure 0004721309
【0013】
(式中、nは正の整数であり、Xは2価の有機基である)
上記一般式(2)のR4 の具体例としては、式(7)〜(9)で示される構造を有する官能基が挙げられる。
【0014】
【化2】
Figure 0004721309
【0015】
(式中、nは正の整数である)
このような化合物は半導体実装プロセス中においてフラックス活性を発揮した後、エポキシ樹脂と反応しうるためフラックス成分と硬化剤としての機能を兼ね備えた材料として好適に用いられる。
【0016】
本発明の熱硬化性樹脂組成物における一般式(1)又は(2)の化合物の配合割合は、全樹脂量100重量部に対して特に0.1〜20重量部の範囲が好ましく、なかでも0.5〜15重量部、さらには1〜10重量部の範囲が好適に用いられる。
【0017】
本発明の熱硬化性樹脂組成物の主剤となる樹脂は、エポキシ樹脂である。かかるエポキシ樹脂としては、例えば、ビスフェノールA型エポキシ樹脂、ビスフェノールF型エポキシ樹脂、ビフェニル型エポキシ樹脂、o−クレゾールノボラック型エポキシ樹脂、トリフェノールメタン型エポキシ樹脂、ジシクロペンタジエン型エポキシ樹脂、テルペン型エポキシ樹脂など1分子中に2個以上のエポキシ基を有する化合物であれば何ら限定することなく用いる事ができる。特に、フラックス活性の向上、接着性、ボイドの低減という観点から、150℃で0.5Pa・s以下の溶融粘度であるものはより好ましい。これらは単独で使用してもよく、あるいは2種以上併用してもよい。また、エポキシ当量は140〜270g/eqが好ましく、150〜220g/eqがより好ましく、融点は100℃以下が好ましく、80℃以下がより好ましい。
【0018】
本発明の熱硬化性樹脂組成物には、エポキシ樹脂の硬化剤としてフェノールアラルキル系樹脂、フェノールノボラック系樹脂等のフェノール樹脂系硬化剤を配合する。なかでも150℃で0.5Pa・s以下の溶融粘度であるものはより好適に用いられる。また、その他にも硬化剤として、メチルヘキサヒドロ無水フタル酸等の酸無水物系硬化剤、ジシアンアミド等のアミン系硬化剤等を用いることができる。
【0019】
本発明の熱硬化性樹脂組成物におけるフェノール樹脂系硬化剤は水酸基当量が60〜200、好ましくは80〜180のものを用い、その含有量は、硬化反応性の点から、上記エポキシ樹脂に対して0.6〜1.4当量が好ましく、0.7〜1.1当量がより好ましい。
【0020】
本発明の熱硬化性樹脂組成物には、エポキシ樹脂の硬化促進剤を配合することもできる。このような硬化促進剤としては、従来からエポキシ樹脂の硬化促進剤として知られている種々の硬化促進剤が使用可能であり、例えば、アミン系、リン系、ホウ素系、リン−ホウ素系等の硬化促進剤が挙げられる。また、これらをマイクロカプセルに封入したものからなる潜在性硬化触媒はより好適に用いられる。これらは単独で使用してもよく、あるいは2種以上併用してもよい。
【0021】
本発明の熱硬化性樹脂組成物には、必要に応じて他の材料(有機材料、無機材料)を加えることもできる。有機材料としては、シランカップリング剤、チタンカップリング剤、表面調整剤、酸化防止剤、粘着付与剤等が挙げられ、無機材料としては、アルミナ、シリカ、窒化珪素等の各種充填剤、銅、銀、アルミ、ニッケル、半田等の金属粒子、その他、顔料、染料等が挙げられる。無機材料の混合割合は特に限定されるものではないが、半導体素子の電極と配線回路基板の電極との電気的接合の観点から、全組成物中の85%以下が好ましく、80%以下がより好ましい。
【0022】
本発明の熱硬化性樹脂組成物には上記の添加剤以外に、シリコーンオイルおよびシリコーンゴム、合成ゴム反応性希釈剤等の成分を配合して低応力化を図ったり、耐湿信頼性テストにおける信頼性向上を目的としてハイドロタルサイト類、水酸化ビスマス等のイオントラップ剤を配合してもよい。さらに、熱硬化性樹脂組成物の流動性を調整するために、有機溶剤を添加することもできる。かかる有機溶剤としては、例えば、トルエン、キシレン、メチルエチルケトン(MEK)、アセトン、ジアセトンアルコール等が挙げられる。
【0023】
さらに、本発明の熱硬化性樹脂組成物は、作業性や保存安定性の観点から、25℃では固体、もしくは800Pa・s以上の高粘度のものであり、かつ70℃では溶融状態であるのが好ましい。即ち、70℃での溶融粘度は、100Pa・s以下であることが好ましく、50Pa・s以下であることがより好ましく、20Pa・s以下であることが特に好ましい。但し、下限値は0.01Pa・sであるのが好ましい。尚、溶融粘度は、ICI回転粘度計により測定される。
【0024】
本発明の熱硬化性樹脂組成物は、かかる物性を有することにより、またフラックス活性を有することにより、生産性、作業性、耐湿信頼性および保存安定性において効果的である。
【0025】
本発明の熱硬化性樹脂組成物は、例えば、以下のようにして製造することができる。エポキシ樹脂、フェノール樹脂系硬化剤、一般式(1)または(2)で表されるフラックス活性剤の各成分を所定量配合し、これに必要に応じて各種成分、例えば、硬化促進剤、各種充填剤等を所定量配合した組成物を、万能攪拌釜等の混練機にかけ加熱状態で混練して溶融混合する。つぎに、これをフィルターを用いて濾過し、ついで減圧脱泡することにより目的とする熱硬化性樹脂組成物を製造することができる。また、例えば、上記各成分の混練において、エポキシ樹脂、フェノール樹脂系硬化剤を予め加温混合し、固形分をすべて溶解させた後に、一般式(1)または(2)で表されるフラックス活性剤等の残りの成分を、より低温で添加し、混合してもよい。
【0026】
本発明の熱硬化性樹脂組成物を用いて製造される半導体装置は、図1に示すように、配線回路基板1の片面に、複数の接続用電極部2を介して半導体素子3が搭載された構造をとる。さらに、配線回路基板1と半導体素子3との間に封止樹脂層4が形成されている。
【0027】
配線回路基板1の材質としては、特に限定するものではないが、大別してセラミック基板、プラスチック基板があり、プラスチック基板としては、例えばエポキシ基板、ビスマレイミドトリアジン基板、ポリイミド基板等が挙げられる。本発明の熱硬化性樹脂組成物は、プラスチック基板と、低融点半田による接続用電極部等の組み合わせのように耐熱性の問題で接合温度を高温に設定することができないような場合においても特に限定されることなく好適に用いられる。
【0028】
配線回路基板1と半導体素子3とを電気的に接続する複数の接続用電極部2は、予め配線回路基板1面に配設されていてもよいし、半導体素子3面に配設されていてもよい。さらには、予め配線回路基板1面および半導体素子3面の双方にそれぞれ配設されていてもよい。
【0029】
複数の接続用電極部2の材質としては、特に限定するものではないが、例えば、半田による低融点および高融点バンプ、錫バンプ、銀−錫バンプ等が挙げられ、また配線回路基板上の電極部が上記の材質からなるものに対しては金バンプ、銅バンプ等であってもよい。
【0030】
半導体素子3は、特に限定されず、通常使用されるものが使用できる。例えば、シリコン、ゲルマニウム等の元素半導体、ガリウムヒ素、インジウムリン等の化合物半導体等の各種の半導体が使用される。半導体素子3の大きさは、通常、幅2〜20mm×長さ2〜20mm×厚み0.1〜0.6mmに設定される。また、半導体素子3を搭載する配線回路が形成された配線回路基板1の大きさは通常、半導体素子3のサイズに合わせて、幅10〜70mm×長さ10〜70mm×厚み0.05〜3.0mmの範囲に設定される。また、マップタイプの基板(1つの配線回路基板に多くの半導体素子を実装するもの)の場合は、幅及び長さとも40mm以上に設定することができる。そして、溶解した封止樹脂が充填される、半導体素子3と配線回路基板1との間の距離は、通常、5〜100μmである。
【0031】
本発明の熱硬化性樹脂組成物を用いた半導体装置は、先に述べたように、配線回路基板上と半導体素子との間に熱硬化性樹脂組成物を介在させて、封止樹脂層を形成させることにより製造される。ここで、熱硬化性樹脂組成物の塗布は、配線回路基板に行ってもよいし、半導体素子に行ってもよい。半導体素子側に熱硬化性樹脂組成物を塗布する場合、個片チップにダイシングされる前のウエハに行ってもよいし、ダイシングされた後の個片チップに行ってもよい。ウエハに熱硬化性樹脂組成物を塗布し、次いで個片チップにダイシングした後にチップ実装する方法は、ウエハレベルで一括して樹脂塗布できるので生産性向上の点から好ましい。樹脂塗布の方法としては、印刷方式やスピンコート方式のいずれでもよいが、印刷方式において真空差圧を利用した印刷封止法は樹脂封止層に気泡が入りにくいのでより好ましい。本発明の半導体装置の製法の態様の一例を図面に基づき順を追って説明する。
【0032】
配線回路基板に熱硬化性樹脂組成物を塗布する態様では、まず図2に示すように、配線回路基板1上に、70℃に加温した溶融状態の本発明の熱硬化性樹脂組成物5をポッティングする。次いで図3に示すように熱硬化性樹脂組成物の上の所定位置に、複数の球状の接続用電極部(ジョイントボール)2が設けられた半導体素子3を載置し、半導体素子3の接続用電極部2が溶融状態の熱硬化性樹脂組成物5を押しのけ、配線回路基板1と接続用電極部2が接触し、かつ、半導体素子3と配線回路基板1との間の空隙内に溶融状態の樹脂を充填させた後、半田リフローによる金属接合を行い、その後樹脂を硬化させることにより空隙を封止して封止樹脂層4を形成する。この時半田リフロー方式はリフロー炉を用いた接合方式であっても、チップ搭載と同時に半田融点以上にヒーター部分を加熱し半田溶融を行う接合方式であってもよい。このようにして、図1に示す半導体装置を製造する。
【0033】
なお、半導体装置の製法では、複数の球状の接続用電極部(ジョイントボール)2が設けられた半導体素子3を用いた場合について述べたが、これに限定するものではなく、予め配線回路基板1に複数の球状接続用電極部2が配設されたものを用いてもよい。
【0034】
熱硬化性樹脂組成物5の厚みおよび重量は、上記同様、搭載される半導体素子3の大きさおよび半導体素子に設けられた球状の接続用電極の大きさ、すなわち、半導体素子3と配線回路基板1との空隙を充填し封止することにより形成される封止樹脂層4の占める容積により適宜に設定される。
【0035】
半導体装置の製造方法において、熱硬化性樹脂組成物5を加熱溶融して溶融状態とする際の加熱温度としては、半導体素子3および配線回路基板1の耐熱性、接続用電極部2の融点、および熱硬化性樹脂組成物5の軟化点、耐熱性等を考慮して適宜に設定されるものである。
【0036】
【実施例】
実施例および比較例に先立ち、下記に示すエポキシ樹脂、フェノール樹脂系硬化剤、フラックス活性剤、硬化促進剤、無機充填剤を準備した。
【0037】
<エポキシ樹脂(a1)>
ビスフェノールA型エポキシ樹脂(エポキシ当量:185g/eq、液状(室温)粘度:0.1ポイズ以下/150℃)
【0038】
<エポキシ樹脂(a2)>
トリフェノールメタン型エポキシ樹脂(エポキシ当量:170g/eq、軟化点:63℃、粘度:0.8ポイズ/150℃)
【0039】
<フェノール樹脂系硬化剤>
フェノールノボラック樹脂
(水酸基当量:104g/eq、軟化点:60℃、粘度:0.4ポイズ/150℃)
【0040】
<フラックス活性剤(b1)>
アジピン酸−ジ−n−プロピルビニルエーテル
【0041】
<フラックス活性剤(b2)>
トリメリット酸−1,2,4−トリ−2−エチルヘキシルビニルエーテル
【0042】
<フラックス活性剤(b3)>
トリス(2−カルボキシエチル)イソシアヌレート−トリ−n−プロピルビニルエーテル
【0043】
<硬化促進剤>
マイクロカプセル化トリフェニルホスフィン(シェル/触媒比:50/50wt%)
【0044】
<無機充填剤>
球状シリカ(平均粒径:0.5μm、最大粒径:1.0μm)
【0045】
以下に実施例および比較例における半導体装置の評価方法をまとめて示す。
【0046】
(1)初期通電試験および吸湿半田後通電試験
アドバンテスト製デジタルマルチメーター(TR6847)にて、室温および125℃で電気抵抗値を測定し、2バンプ当たりの接続抵抗値が20mmΩ以下の時に、初期通電および吸湿半田後通電を合格と判定し、半導体装置8個当たりの不良品の個数で表した。
【0047】
(2)熱衝撃試験(TST)による導通性
熱衝撃装置を用い、半導体装置を−50℃で5分間維持後、125℃で5分間維持する操作を行った。この操作を1000回行った後の半導体装置の導通性(T∽1000∽後の導通性)、および2000回行った後の半導体装置の導通性(T∽2000∽後の導通性)を測定し、半導体装置8個当たりの不良品の個数で表した。導通性の評価方法は、アドバンテスト製デジタルマルチメーター(TR6847)にて、室温および125℃で電気抵抗値を測定し、2バンプ当たりの接続抵抗値が50mmΩ以上となったものを不良品としてカウントした。
【0048】
実施例1〜5および比較例1
下記の表1に示す各成分を、同表に示す割合で配合し、万能攪拌釜にて混練りして溶融混練した。次にこれを300メッシュのフィルターを用いて80℃で濾過した後、さらに80℃で30分間減圧脱泡し、これを室温にて冷却することにより目的とする熱硬化性樹脂組成物を作製した。得られた熱硬化性樹脂組成物はいずれも25℃で固体であり、70℃での溶融粘度をICI回転粘度計で測定した結果を表1に示す。なお、混練条件は以下のとおりである。
【0049】
〔混練り条件〕
まず、エポキシ樹脂、フェノール樹脂系硬化剤を仕込み100℃で10分間混合し、固形分をすべて溶解させた。次に、70℃の温度に調整した後、一般式(1)または(2)で表されるフラックス活性剤、硬化促進剤を加え5分間混合した。
【0050】
このようにして得られた実施例1〜5および比較例1の熱硬化性樹脂組成物を用い、前述の半導体装置の製法に従って半導体装置を製造した。すなわち、図2に示すように、配線回路基板1(ガラスエポキシ基板厚み:1mm)上に熱硬化性樹脂組成物5を70℃に加温し溶融状態でポッティングする。これを100℃に加熱したステージ上に置き図3に示すように、熱硬化性樹脂組成物5の上の所定の位置に、接続用電極部2(共晶半田:融点183℃、電極高さ:120μm)を設けた半導体素子3(厚み:600μm、大きさ13mm×9mm)を載置した。その後、フリップチップボンダーを用いてチップ実装を行い、配線回路基板1と半導体素子3との空隙内に溶融状態の樹脂を充填し、その後、半田リフロー(JEDECコンディション)、樹脂キュアー(条件150℃×30分)させることにより、図1に示すような、上記空隙が封止樹脂層4で封止された半導体装置を作製した(各実施例、比較例につき8ケずつ作製)。得られた半導体装置について、初期の通電試験を行い、さらに、その半導体装置を30℃60%RHの環境下で168hr吸湿させた後、半田リフロー(Jedecコンディション)を行った後、通電試験を行い、その結果を表1に示した。その後、サーマルショックテスト(TST:−50℃×5分および125℃×5分の繰り返し)1000および2000 サイクルを行った(各例8ケずつ)後に通電試験を行い、その結果を表1に示した。
【0051】
【表1】
Figure 0004721309
【0052】
上記表1から、実施例1〜5は、初期通電試験、吸湿半田試験後通電試験、TST1000サイクル後通電試験、TST2000サイクル後通電試験の各試験の全てにおいて、不良が発生していないことが確認された。これに対して、比較例1は全て、初期通電試験において不良が発生していることが確認された。
【0053】
【発明の効果】
本発明の熱硬化性樹脂組成物は、その樹脂組成物中にフラックス活性剤を含有していることを特徴とするものであり、フェイスダウン構造の半導体装置の半導体素子と配線回路基板間の封止に本発明の熱硬化性樹脂組成物を用いることにより、従来、フラックスを用いて半導体素子バンプと配線回路基板電極とを金属接続した後に、空隙に封止樹脂を注入するという煩雑な工程をとらずして容易に樹脂封止、金属結合形成が可能となる。さらには半導体素子と配線回路基板間との電気的接続が耐半田リフロー後および冷熱サイクル下において安定して得られる半導体装置を提供することが可能となる。
【図面の簡単な説明】
【図1】図1は本発明の半導体装置の一例を示す概略断面図である。
【図2】図2は半導体装置の製造工程を示す説明断面図である。
【図3】図3は半導体装置の製造工程を示す説明断面図である。
【符号の説明】
1 配線回路基板
2 接続用電極部
3 半導体素子
4 封止樹脂層
5 熱硬化性樹脂組成物[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a thermosetting resin composition used for sealing a gap between a printed circuit board and a semiconductor element in a semiconductor device. Furthermore, this invention relates to the semiconductor device by the system which mounts a semiconductor element on a wiring circuit board by this face-down structure using this thermosetting resin composition, and its manufacturing method.
[0002]
[Prior art]
As a recent demand for improving the performance of semiconductor devices, there is a method of mounting a semiconductor element on a printed circuit board with a face-down structure (flip chip, direct chip attach method, etc.). In the flip-chip method, since a semiconductor element and a printed circuit board having different linear expansion coefficients are directly electrically connected, the reliability of the connection portion is a problem. As a countermeasure, fill the gap between the semiconductor element and the printed circuit board with a liquid resin material and cure it to form a cured resin body, and then disperse the stress concentrated on the electrical connection part to the cured resin body. A method for improving reliability is employed. In a conventional method of filling a liquid material in a flip chip method using solder bumps, a flip chip is first mounted on a printed circuit board, a metal bond is formed by a solder melting process, and then a capillary tube is formed in the gap between the semiconductor element and the printed circuit board. Liquid resin material is injected due to the effect.
[0003]
Furthermore, in recent years, in the manufacture of semiconductor devices using thermosetting resin materials having flux activity that have attempted to simplify the process more than the liquid material injection method utilizing capillary action, the thermosetting resin material is Since it is pre-applied on a semiconductor element or printed circuit board and sealed with an interfacial resin together with chip mounting, and then a metal bond is formed by performing solder reflow, the flux is reduced compared to the manufacture of a semiconductor device using a liquid resin material. Since steps such as coating and cleaning, and liquid resin injection can be reduced, the productivity of the semiconductor device can be improved. Further, since the filling of the gap between the semiconductor element and the printed circuit board with the liquid resin material is performed by the capillary effect of the liquid resin material, it is necessary to set the viscosity of the liquid resin material to a low value. Therefore, in order to obtain a low viscosity, an acid anhydride-based curing agent is used, the range of material selection is narrowed, and it is difficult to use a phenol resin having high moisture resistance reliability.
[0004]
[Problems to be solved by the invention]
The present invention has been made in view of such circumstances, and is excellent in the effect of mitigating stress generated in the semiconductor element, the printed circuit board, and the connection electrode, and can be easily sealed in the gap between the semiconductor element and the printed circuit board. It is an object of the present invention to provide a thermosetting resin composition, a semiconductor device using the same, and a method for manufacturing the same, which can form a film and does not require a flux cleaning step.
[0005]
[Means for Solving the Problems]
The gist of the present invention is as follows.
(1) A thermosetting resin composition used for sealing an air gap between a printed circuit board and a semiconductor element of a semiconductor package having a face-down structure, the epoxy resin, a phenol resin-based curing agent, and the following general formula (1):
R 1 — (COO—CH (CH 3 ) —O—R 2 ) n (1)
(In the formula, n is a positive integer, R 1 is a monovalent or higher valent organic group, R 2 is a monovalent organic group, and may be the same or different from each other.)
Or general formula (2):
- (OCO-R 3 -COO- CH (CH 3) -OR 4 -O-CH (CH 3)) n - (2)
(In the formula, n is a positive integer, R 3 and R 4 are divalent organic groups, which may be the same or different from each other).
A thermosetting resin composition comprising a compound represented by:
(2) The thermosetting resin composition according to the above (1), wherein the melt viscosity at 70 ° C. is 100 Pa · s or less and is solid at 25 ° C.
(3) A method of manufacturing a semiconductor device, wherein the thermosetting resin composition according to (1) or (2) is applied to a wafer, then the wafer is diced into individual chips, and chip mounting is performed. ,
(4) A semiconductor device sealed with the thermosetting resin composition according to (1) or (2),
About.
[0006]
DETAILED DESCRIPTION OF THE INVENTION
The thermosetting resin composition of the present invention is suitably used for sealing a semiconductor element having a face-down structure. Specifically, in a semiconductor device in which a semiconductor element is mounted on a wiring circuit board via a plurality of connection electrode portions, it is used to seal a gap between the wiring circuit board and the semiconductor element. That is, the thermosetting resin composition of the present invention is interposed between the printed circuit board and the semiconductor element to temporarily fix the semiconductor element having a face-down structure onto the printed circuit board, and then melt the solder. By doing so, sealing of the gap between the semiconductor element and the printed circuit board and metal bonding can be formed.
[0007]
The thermosetting resin composition of the present invention has the following general formula (1) as an epoxy resin, a phenol resin-based curing agent, and a flux activator:
R 1 — (COO—CH (CH 3 ) —O—R 2 ) n (1)
(In the formula, n is a positive integer, R 1 is a monovalent or higher valent organic group, R 2 is a monovalent organic group, and may be the same or different from each other.)
Or general formula (2):
- (OCO-R 3 -COO- CH (CH 3) -OR 4 -O-CH (CH 3)) n - (2)
(In the formula, n is a positive integer, R 3 and R 4 are divalent organic groups, which may be the same or different from each other).
It contains the compound represented by these, It is characterized by the above-mentioned.
[0008]
Here, the flux activity refers to the ability to remove the oxide film, organic matter, etc. on the metal surfaces to be joined at the time of soldering, prevent the progress of oxidation during heating, and reduce the surface tension of the molten solder. A flux activator means the compound or composition which provides flux activity to the composition for semiconductor sealing.
[0009]
The flux activator represented by the general formula (1) or (2) contained in the thermosetting resin composition of the present invention can be obtained by a reaction between a carboxylic acid and a vinyl ether compound. Examples of the carboxylic acids include acetic acid, adipic acid, maleic acid, fumaric acid, itaconic acid, phthalic acid, trimellitic acid, pyromellitic acid, acrylic acid, isocyanuric acid, carboxyl group-containing polybutadiene, and vinyl ether compounds. Examples thereof include vinyl ethers having a butyl group, an ethyl group, a propyl group, an isopropyl group, a cyclohexyl group, and the like.
[0010]
Specific examples of R 1 in the general formula (1) include alkyl groups having 1 to 6 carbon atoms or alkylene groups, vinyl groups, allyl groups, phenyl groups, phenylene groups, trivalent or higher aromatic ring groups, C 3 N 3 (OCOC 2 H 4 ) 3 groups are mentioned. Specific examples of R 2 in the general formula (1) include an alkyl group having 1 to 10 carbon atoms and a cycloalkyl group having 3 to 6 carbon atoms.
[0011]
Specific examples of R 3 in the general formula (2) include functional groups having structures represented by the formulas (3) to (6).
[0012]
[Chemical 1]
Figure 0004721309
[0013]
(Wherein n is a positive integer and X is a divalent organic group)
Specific examples of R 4 in the general formula (2) include functional groups having structures represented by the formulas (7) to (9).
[0014]
[Chemical 2]
Figure 0004721309
[0015]
(Where n is a positive integer)
Since such a compound can react with an epoxy resin after exhibiting flux activity during a semiconductor mounting process, it is preferably used as a material having a function as a flux component and a curing agent.
[0016]
The compounding ratio of the compound of the general formula (1) or (2) in the thermosetting resin composition of the present invention is particularly preferably in the range of 0.1 to 20 parts by weight with respect to 100 parts by weight of the total resin, A range of 0.5 to 15 parts by weight, and further 1 to 10 parts by weight is preferably used.
[0017]
The resin that is the main component of the thermosetting resin composition of the present invention is an epoxy resin. Examples of the epoxy resin include bisphenol A type epoxy resin, bisphenol F type epoxy resin, biphenyl type epoxy resin, o-cresol novolac type epoxy resin, triphenolmethane type epoxy resin, dicyclopentadiene type epoxy resin, and terpene type epoxy. Any compound having two or more epoxy groups in one molecule such as a resin can be used without any limitation. In particular, those having a melt viscosity of not more than 0.5 Pa · s at 150 ° C. are more preferable from the viewpoints of improving flux activity, adhesiveness, and reducing voids. These may be used alone or in combination of two or more. The epoxy equivalent is preferably 140 to 270 g / eq, more preferably 150 to 220 g / eq, and the melting point is preferably 100 ° C. or lower, more preferably 80 ° C. or lower.
[0018]
In the thermosetting resin composition of the present invention, a phenol resin curing agent such as a phenol aralkyl resin or a phenol novolac resin is blended as a curing agent for the epoxy resin. Among them, those having a melt viscosity of not more than 0.5 Pa · s at 150 ° C. are more preferably used. In addition, as the curing agent, an acid anhydride curing agent such as methylhexahydrophthalic anhydride, an amine curing agent such as dicyanamide, and the like can be used.
[0019]
The phenol resin-based curing agent in the thermosetting resin composition of the present invention has a hydroxyl equivalent of 60 to 200, preferably 80 to 180, and the content thereof is from the point of curing reactivity to the epoxy resin. 0.6 to 1.4 equivalents are preferable, and 0.7 to 1.1 equivalents are more preferable.
[0020]
The thermosetting resin composition of the present invention may contain an epoxy resin curing accelerator. As such a curing accelerator, various curing accelerators conventionally known as epoxy resin curing accelerators can be used, for example, amine-based, phosphorus-based, boron-based, phosphorus-boron-based, etc. A hardening accelerator is mentioned. Moreover, the latent curing catalyst which consists of what enclosed these in the microcapsule is used more suitably. These may be used alone or in combination of two or more.
[0021]
Other materials (organic materials and inorganic materials) can be added to the thermosetting resin composition of the present invention as necessary. Examples of organic materials include silane coupling agents, titanium coupling agents, surface conditioners, antioxidants, tackifiers, etc., and inorganic materials include various fillers such as alumina, silica, silicon nitride, copper, Examples thereof include metal particles such as silver, aluminum, nickel and solder, as well as pigments and dyes. The mixing ratio of the inorganic material is not particularly limited, but from the viewpoint of electrical bonding between the electrode of the semiconductor element and the electrode of the printed circuit board, 85% or less of the total composition is preferable, and 80% or less is more preferable. preferable.
[0022]
In addition to the above-mentioned additives, the thermosetting resin composition of the present invention contains components such as silicone oil, silicone rubber, and synthetic rubber reactive diluent to reduce stress, and reliability in moisture resistance reliability tests. In order to improve the property, ion trapping agents such as hydrotalcites and bismuth hydroxide may be blended. Furthermore, in order to adjust the fluidity | liquidity of a thermosetting resin composition, an organic solvent can also be added. Examples of the organic solvent include toluene, xylene, methyl ethyl ketone (MEK), acetone, diacetone alcohol, and the like.
[0023]
Furthermore, from the viewpoint of workability and storage stability, the thermosetting resin composition of the present invention is solid at 25 ° C. or has a high viscosity of 800 Pa · s or more, and is in a molten state at 70 ° C. Is preferred. That is, the melt viscosity at 70 ° C. is preferably 100 Pa · s or less, more preferably 50 Pa · s or less, and particularly preferably 20 Pa · s or less. However, the lower limit is preferably 0.01 Pa · s. The melt viscosity is measured with an ICI rotational viscometer.
[0024]
The thermosetting resin composition of the present invention is effective in productivity, workability, moisture resistance reliability and storage stability by having such physical properties and having flux activity.
[0025]
The thermosetting resin composition of this invention can be manufactured as follows, for example. A predetermined amount of each component of the epoxy resin, the phenol resin-based curing agent, and the flux activator represented by the general formula (1) or (2) is blended, and various components such as a curing accelerator, A composition containing a predetermined amount of filler or the like is kneaded in a heated state in a kneader such as a universal stirring kettle and melt-mixed. Next, the desired thermosetting resin composition can be produced by filtering this using a filter and then degassing under reduced pressure. Further, for example, in the kneading of the above components, the epoxy resin and the phenol resin-based curing agent are preliminarily heated and mixed to dissolve all the solid content, and then the flux activity represented by the general formula (1) or (2) The remaining components such as the agent may be added at a lower temperature and mixed.
[0026]
As shown in FIG. 1, a semiconductor device manufactured using the thermosetting resin composition of the present invention has a semiconductor element 3 mounted on one side of a printed circuit board 1 via a plurality of connection electrode portions 2. Take the structure. Further, a sealing resin layer 4 is formed between the printed circuit board 1 and the semiconductor element 3.
[0027]
The material of the printed circuit board 1 is not particularly limited, but is roughly classified into a ceramic substrate and a plastic substrate. Examples of the plastic substrate include an epoxy substrate, a bismaleimide triazine substrate, and a polyimide substrate. The thermosetting resin composition of the present invention is particularly suitable even when the bonding temperature cannot be set to a high temperature due to the problem of heat resistance, such as a combination of a plastic substrate and a connecting electrode portion using low melting point solder. It is suitably used without being limited.
[0028]
The plurality of connection electrode portions 2 that electrically connect the printed circuit board 1 and the semiconductor element 3 may be disposed in advance on the surface of the wired circuit board 1 or on the surface of the semiconductor element 3. Also good. Furthermore, it may be previously arranged on both the printed circuit board 1 surface and the semiconductor element 3 surface.
[0029]
The material of the plurality of connection electrode portions 2 is not particularly limited, and examples thereof include low melting point and high melting point bumps by solder, tin bumps, silver-tin bumps, etc., and electrodes on the printed circuit board. Gold bumps, copper bumps, and the like may be used for the parts made of the above materials.
[0030]
The semiconductor element 3 is not specifically limited, What is normally used can be used. For example, various semiconductors such as elemental semiconductors such as silicon and germanium, and compound semiconductors such as gallium arsenide and indium phosphide are used. The size of the semiconductor element 3 is normally set to 2 to 20 mm in width, 2 to 20 mm in length, and 0.1 to 0.6 mm in thickness. The size of the printed circuit board 1 on which the wiring circuit for mounting the semiconductor element 3 is formed is usually 10 to 70 mm in width, 10 to 70 mm in length, and 0.05 to 3 in thickness according to the size of the semiconductor element 3. Set to a range of 0.0 mm. In the case of a map-type substrate (one on which many semiconductor elements are mounted on one wired circuit board), both the width and length can be set to 40 mm or more. And the distance between the semiconductor element 3 and the wiring circuit board 1 with which the melt | dissolving sealing resin is filled is 5-100 micrometers normally.
[0031]
As described above, the semiconductor device using the thermosetting resin composition of the present invention has a sealing resin layer formed by interposing a thermosetting resin composition between the printed circuit board and the semiconductor element. It is manufactured by forming. Here, application | coating of a thermosetting resin composition may be performed to a wiring circuit board, and may be performed to a semiconductor element. When the thermosetting resin composition is applied to the semiconductor element side, the thermosetting resin composition may be applied to a wafer before being diced into individual chips, or may be applied to individual chips after being diced. The method of applying a thermosetting resin composition to a wafer and then dicing into individual chips and then mounting the chips is preferable from the viewpoint of improving productivity because the resin can be applied collectively at the wafer level. As a resin coating method, either a printing method or a spin coating method may be used, but a printing sealing method using a vacuum differential pressure in the printing method is more preferable because air bubbles hardly enter the resin sealing layer. An example of a method for manufacturing a semiconductor device according to the present invention will be described in order with reference to the drawings.
[0032]
In the embodiment in which the thermosetting resin composition is applied to the printed circuit board, first, as shown in FIG. 2, the thermosetting resin composition 5 of the present invention in a molten state heated to 70 ° C. on the printed circuit board 1. Potting. Next, as shown in FIG. 3, a semiconductor element 3 provided with a plurality of spherical connection electrode portions (joint balls) 2 is placed at a predetermined position on the thermosetting resin composition. Electrode part 2 pushes molten thermosetting resin composition 5, wiring circuit board 1 contacts electrode part 2, and melts in the gap between semiconductor element 3 and wiring circuit board 1. After the resin in the state is filled, metal bonding is performed by solder reflow, and then the resin is cured to seal the gap and form the sealing resin layer 4. At this time, the solder reflow method may be a bonding method using a reflow furnace, or may be a bonding method in which the heater portion is heated to a temperature equal to or higher than the solder melting point and the solder is melted simultaneously with chip mounting. In this way, the semiconductor device shown in FIG. 1 is manufactured.
[0033]
In the manufacturing method of the semiconductor device, the case where the semiconductor element 3 provided with a plurality of spherical connection electrode portions (joint balls) 2 is used is described. However, the present invention is not limited to this, and the printed circuit board 1 is previously provided. Alternatively, a plurality of spherical connection electrode portions 2 may be used.
[0034]
Similarly to the above, the thickness and weight of the thermosetting resin composition 5 are the size of the semiconductor element 3 to be mounted and the size of the spherical connecting electrode provided on the semiconductor element, that is, the semiconductor element 3 and the printed circuit board. 1 is appropriately set according to the volume occupied by the sealing resin layer 4 formed by filling the gap with 1 and sealing.
[0035]
In the method for manufacturing a semiconductor device, the heating temperature when the thermosetting resin composition 5 is heated and melted to obtain a molten state includes the heat resistance of the semiconductor element 3 and the printed circuit board 1, the melting point of the connection electrode portion 2, And it sets suitably considering the softening point of the thermosetting resin composition 5, heat resistance, etc.
[0036]
【Example】
Prior to Examples and Comparative Examples, the following epoxy resin, phenol resin-based curing agent, flux activator, curing accelerator, and inorganic filler were prepared.
[0037]
<Epoxy resin (a1)>
Bisphenol A type epoxy resin (epoxy equivalent: 185 g / eq, liquid (room temperature) viscosity: 0.1 poise or less / 150 ° C.)
[0038]
<Epoxy resin (a2)>
Triphenolmethane type epoxy resin (epoxy equivalent: 170 g / eq, softening point: 63 ° C., viscosity: 0.8 poise / 150 ° C.)
[0039]
<Phenolic resin curing agent>
Phenol novolac resin (hydroxyl equivalent: 104 g / eq, softening point: 60 ° C., viscosity: 0.4 poise / 150 ° C.)
[0040]
<Flux activator (b1)>
Adipic acid-di-n-propyl vinyl ether
<Flux activator (b2)>
Trimellitic acid-1,2,4-tri-2-ethylhexyl vinyl ether
<Flux activator (b3)>
Tris (2-carboxyethyl) isocyanurate-tri-n-propyl vinyl ether
<Curing accelerator>
Microencapsulated triphenylphosphine (shell / catalyst ratio: 50/50 wt%)
[0044]
<Inorganic filler>
Spherical silica (average particle size: 0.5 μm, maximum particle size: 1.0 μm)
[0045]
The evaluation methods of semiconductor devices in the examples and comparative examples are collectively shown below.
[0046]
(1) Initial energization test and post-humidity solder energization test Using an ADVANTEST digital multimeter (TR 6847), the electrical resistance value was measured at room temperature and 125 ° C., and the initial energization was performed when the connection resistance value per 2 bumps was 20 mmΩ or less. In addition, it was determined that the energization after moisture-absorbing solder was acceptable, and it was expressed as the number of defective products per 8 semiconductor devices.
[0047]
(2) Using a conductive thermal shock apparatus according to a thermal shock test (TST), the semiconductor device was maintained at −50 ° C. for 5 minutes and then maintained at 125 ° C. for 5 minutes. The continuity of the semiconductor device after 1000 times of this operation (conductivity after T) 1000)) and the continuity of the semiconductor device after 2000 times (conductivity after 2000∽T) are measured. This is expressed as the number of defective products per 8 semiconductor devices. The electrical conductivity was measured at room temperature and at 125 ° C. using an ADVANTEST digital multimeter (TR 6847), and the connection resistance value per 2 bumps was counted as a defective product when it was 50 mmΩ or more. .
[0048]
Examples 1 to 5 and Comparative Example 1
The components shown in Table 1 below were blended in the proportions shown in the same table, kneaded in a universal stirring vessel, and melt-kneaded. Next, after filtering this at 80 ° C. using a 300-mesh filter, it was further degassed under reduced pressure at 80 ° C. for 30 minutes, and this was cooled at room temperature to produce the desired thermosetting resin composition. . All of the obtained thermosetting resin compositions were solid at 25 ° C., and the results obtained by measuring the melt viscosity at 70 ° C. with an ICI rotational viscometer are shown in Table 1. The kneading conditions are as follows.
[0049]
[Kneading conditions]
First, an epoxy resin and a phenol resin curing agent were charged and mixed at 100 ° C. for 10 minutes to dissolve all solid contents. Next, after adjusting to a temperature of 70 ° C., a flux activator represented by the general formula (1) or (2) and a curing accelerator were added and mixed for 5 minutes.
[0050]
Using the thermosetting resin compositions of Examples 1 to 5 and Comparative Example 1 obtained in this manner, a semiconductor device was manufactured according to the method for manufacturing a semiconductor device described above. That is, as shown in FIG. 2, the thermosetting resin composition 5 is heated to 70 ° C. and potted in a molten state on the printed circuit board 1 (glass epoxy board thickness: 1 mm). This is placed on a stage heated to 100 ° C., and as shown in FIG. 3, a connecting electrode portion 2 (eutectic solder: melting point 183 ° C., electrode height) is placed on a predetermined position on the thermosetting resin composition 5. : 120 μm) was placed on the semiconductor element 3 (thickness: 600 μm, size 13 mm × 9 mm). Thereafter, chip mounting is performed using a flip chip bonder, and a molten resin is filled in the gap between the printed circuit board 1 and the semiconductor element 3, and then solder reflow (JEDEC condition), resin cure (condition 150 ° C. × 30 minutes), a semiconductor device in which the voids were sealed with the sealing resin layer 4 as shown in FIG. 1 was manufactured (8 manufactured for each example and comparative example). The obtained semiconductor device was subjected to an initial energization test. Further, the semiconductor device was subjected to moisture absorption in an environment of 30 ° C. and 60% RH for 168 hours, followed by solder reflow (Jedec condition), and then an energization test. The results are shown in Table 1. After that, thermal shock test (TST: -50 ° C. × 5 minutes and 125 ° C. × 5 minutes repeated) 1000 and 2000 cycles (8 for each example) was conducted, and an energization test was conducted. The results are shown in Table 1. It was.
[0051]
[Table 1]
Figure 0004721309
[0052]
From Table 1 above, Examples 1 to 5 confirm that no defects occurred in all of the initial energization test, energization test after hygroscopic solder test, energization test after TST1000 cycle, and energization test after TST2000 cycle. It was done. On the other hand, it was confirmed that all the comparative examples 1 were defective in the initial energization test.
[0053]
【The invention's effect】
The thermosetting resin composition of the present invention is characterized in that the resin composition contains a flux activator, and seals between a semiconductor element of a semiconductor device having a face-down structure and a printed circuit board. By using the thermosetting resin composition of the present invention to stop, conventionally, a complicated process of injecting a sealing resin into the gap after metal connection between the semiconductor element bump and the printed circuit board electrode using a flux is performed. Without this, resin sealing and metal bond formation can be easily performed. Furthermore, it is possible to provide a semiconductor device in which the electrical connection between the semiconductor element and the printed circuit board can be stably obtained after soldering reflow and under a thermal cycle.
[Brief description of the drawings]
FIG. 1 is a schematic cross-sectional view showing an example of a semiconductor device of the present invention.
FIG. 2 is an explanatory cross-sectional view illustrating a manufacturing process of a semiconductor device.
FIG. 3 is an explanatory cross-sectional view showing the manufacturing process of the semiconductor device.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Wiring circuit board 2 Electrode part 3 for connection 3 Semiconductor element 4 Sealing resin layer 5 Thermosetting resin composition

Claims (4)

フェイスダウン構造の半導体パッケージの配線回路基板と半導体素子との間の空隙を封止するために用いる熱硬化性樹脂組成物であって、エポキシ樹脂、フェノール樹脂系硬化剤および下記一般式(1):
1−(COO−CH(CH3)−O−R2n (1)
(式中、nは正の整数であり、R1は1価以上の有機基であり、R2は1価の有機基であり、互いに同じであっても異なっていてもよい)
または一般式(2):
−(OCO−R3−COO−CH(CH3)−OR4−O−CH(CH3))n− (2)
(式中、nは正の整数であり、R3およびR4は2価の有機基であり、互いに同じであっても異なっていてもよい)
により表されるフラックス活性を有する化合物を含有することを特徴とする、熱硬化性樹脂組成物であって、
一般式(1)または(2)で表される化合物がカルボン酸類とビニルエーテル化合物との反応により得られる化合物である、熱硬化性樹脂組成物
A thermosetting resin composition used for sealing a gap between a printed circuit board and a semiconductor element of a semiconductor package having a face-down structure, the epoxy resin, a phenol resin-based curing agent, and the following general formula (1) :
R 1 — (COO—CH (CH 3 ) —O—R 2 ) n (1)
(In the formula, n is a positive integer, R 1 is a monovalent or higher valent organic group, R 2 is a monovalent organic group, and may be the same or different from each other.)
Or general formula (2):
- (OCO-R 3 -COO- CH (CH 3) -OR 4 -O-CH (CH 3)) n - (2)
(In the formula, n is a positive integer, R 3 and R 4 are divalent organic groups, which may be the same or different from each other).
A thermosetting resin composition comprising a compound having a flux activity represented by :
A thermosetting resin composition, wherein the compound represented by the general formula (1) or (2) is a compound obtained by a reaction between a carboxylic acid and a vinyl ether compound .
70℃での溶融粘度が100Pa・s以下であり、かつ25℃で固体であることを特徴とする請求項1記載の熱硬化性樹脂組成物。  The thermosetting resin composition according to claim 1, wherein the melt viscosity at 70 ° C. is 100 Pa · s or less and is solid at 25 ° C. 請求項1又は2記載の熱硬化性樹脂組成物をウエハに塗布し、次いで該ウエハを個片チップにダイシングし、チップ実装を行うことを特徴とする半導体装置の製造方法。  A method for manufacturing a semiconductor device, wherein the thermosetting resin composition according to claim 1 or 2 is applied to a wafer, the wafer is then diced into individual chips, and chip mounting is performed. 請求項1又は2記載の熱硬化性樹脂組成物で封止されてなる半導体装置。  A semiconductor device sealed with the thermosetting resin composition according to claim 1.
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