JP4714026B2 - 電子部品実装装置、電子部品実装方法及び電子部品装置 - Google Patents
電子部品実装装置、電子部品実装方法及び電子部品装置 Download PDFInfo
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Description
この塗布された接着剤上に補強板を搭載することと、前記電子部品及び前記補強板が搭載された前記基板を加熱位置に搬送することと、前記加熱位置に搬送された前記基板上の前記電子部品、及び前記補強板を加熱して接着することとを具備し、前記基板上及び前記電子部品上への接着剤の塗布、さらに、前記電子部品及び前記補強板の搭載を同じ位置で行なう。
請求項5記載の発明は、基板上の複数個所に順次、接着剤を塗布することと、前記塗布された複数個所の接着剤上に順次、電子部品を搭載することと、前記搭載された複数個の電子部品上に順次、接着剤を塗布することと、前記複数個の電子部品上に塗布された接着剤上に順次、補強板を搭載することと、前記複数個の電子部品、及び前記複数個の補強板が搭載された前記基板を加熱位置に搬送することと、前記加熱位置に搬送された前記基板上の前記複数個の電子部品、及び前記複数個の補強板を加熱して接着することとを具備し、前記基板上の複数個所、及び前記複数個の電子部品上への接着剤の塗布、さらに、前記複数個の電子部品、及び前記複数個の補強板の搭載を同一位置で行なう。
請求項6記載の発明は、前記請求項4記載の実装方法によって実装される。
請求項7記載の発明は、前記請求項5記載の実装方法によって実装される。
Claims (7)
- 基板上に接着剤を塗布してこの接着剤上に電子部品を搭載し、この電子部品上に接着剤を塗布してこの接着剤上に補強板を搭載する電子部品実装装置において、
前記基板上及び前記電子部品上への接着剤の塗布を所定位置で行なう塗布手段と、
前記電子部品及び前記補強板の搭載を前記所定位置と同じ位置で行なう搭載手段と、
この搭載手段によって前記電子部品及び補強板が搭載された前記基板を加熱位置に搬送する搬送手段と、
この搬送手段によって加熱位置に搬送された前記基板上の前記電子部品、及び前記補強板を加熱して接着する接着手段と
を具備することを特徴とする電子部品実装装置。 - 基板上の複数個所に順次接着剤を塗布してこれら接着剤上に電子部品を順次搭載し、これら電子部品上に順次接着剤を塗布してこれら接着剤上に補強板を順次搭載する電子部品実装装置において、
前記基板上の複数個所、及び前記複数の電子部品上への接着剤の塗布を所定位置で行なう塗布手段と、
前記複数の電子部品及び前記複数の補強板の搭載を前記所定位置と同じ位置で行なう搭載手段と、
この搭載手段によって前記複数の電子部品及び前記複数の補強板が搭載された前記基板を加熱位置に搬送する搬送手段と、
この搬送手段によって加熱位置に搬送された前記基板上の前記複数の電子部品、及び前記複数の補強板を加熱して接着する接着手段と
を具備することを特徴とする電子部品実装装置。 - 前記基板上の複数個所への接着剤の塗布が全て終了する前に前記搭載手段による前記電子部品の搭載を開始し、前記複数の電子部品への接着剤の塗布が全て終了する前に前記搭載手段による前記補強板の搭載を開始することを特徴とする請求項2記載の電子部品実装装置。
- 基板上に接着剤を塗布することと、
前記塗布された接着剤上に電子部品を搭載することと、
前記搭載された電子部品上に接着剤を塗布することと、
この塗布された接着剤上に補強板を搭載することと、
前記電子部品及び前記補強板が搭載された前記基板を加熱位置に搬送することと、
前記加熱位置に搬送された前記基板上の前記電子部品、及び前記補強板を加熱して接着することとを具備し、
前記基板上及び前記電子部品上への接着剤の塗布、さらに、前記電子部品及び前記補強板の搭載を同じ位置で行なうことを特徴とする電子部品実装方法。 - 基板上の複数個所に順次、接着剤を塗布することと、
前記塗布された複数個所の接着剤上に順次、電子部品を搭載することと、
前記搭載された複数個の電子部品上に順次、接着剤を塗布することと、
前記複数個の電子部品上に塗布された接着剤上に順次、補強板を搭載することと、
前記複数個の電子部品、及び前記複数個の補強板が搭載された前記基板を加熱位置に搬送することと、
前記加熱位置に搬送された前記基板上の前記複数個の電子部品、及び前記複数個の補強板を加熱して接着することとを具備し、
前記基板上の複数個所、及び前記複数個の電子部品上への接着剤の塗布、さらに、前記複数個の電子部品、及び前記複数個の補強板の搭載を同一位置で行なうことを特徴とする電子部品実装方法。 - 前記請求項4記載の実装方法によって実装されたことを特徴とする電子部品装置。
- 前記請求項5記載の実装方法によって実装されたことを特徴とする電子部品装置。
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SG200608999-9A SG134221A1 (en) | 2006-01-10 | 2006-12-26 | Electronic component mounting apparatus and electronic component mounting method |
US11/645,702 US7748113B2 (en) | 2006-01-10 | 2006-12-27 | Electronic component mounting method |
EP07000029A EP1806962B1 (en) | 2006-01-10 | 2007-01-02 | Electronic component mounting apparatus and electronic component mounting method |
CN2007100021120A CN101001519B (zh) | 2006-01-10 | 2007-01-10 | 电子部件安装设备和电子部件安装方法 |
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Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4819602B2 (ja) * | 2006-07-05 | 2011-11-24 | パナソニック株式会社 | Acf貼付装置及びacf貼付方法 |
US8079140B2 (en) * | 2006-07-31 | 2011-12-20 | Panasonic Corporation | Component mounting condition determining method |
US8156642B2 (en) * | 2007-04-03 | 2012-04-17 | Panasonic Corporation | Component mounting method |
US7833572B2 (en) * | 2007-06-01 | 2010-11-16 | Illinois Tool Works, Inc. | Method and apparatus for dispensing a viscous material on a substrate |
US7923056B2 (en) | 2007-06-01 | 2011-04-12 | Illinois Tool Works Inc. | Method and apparatus for dispensing material on a substrate |
CN101842000B (zh) * | 2009-03-19 | 2014-04-30 | 鸿富锦精密工业(深圳)有限公司 | 贴附装置及使用该贴附装置的贴附方法 |
JP5440483B2 (ja) | 2010-12-09 | 2014-03-12 | パナソニック株式会社 | 電子部品実装システムおよび電子部品実装方法 |
US20140093638A1 (en) * | 2012-09-28 | 2014-04-03 | Jonathan Joel Bloom | Method of dispensing material based on angular locate feature |
JP6450923B2 (ja) * | 2013-12-20 | 2019-01-16 | パナソニックIpマネジメント株式会社 | 電子部品実装システムおよび電子部品実装方法ならびに電子部品実装装置 |
US9815081B2 (en) | 2015-02-24 | 2017-11-14 | Illinois Tool Works Inc. | Method of calibrating a dispenser |
CN108019403A (zh) * | 2016-10-31 | 2018-05-11 | 富鼎电子科技(嘉善)有限公司 | 组装装置 |
CN110586386A (zh) * | 2019-09-10 | 2019-12-20 | 浙江诺派建筑系统有限公司 | 一种复合板喷胶工艺 |
CN110831348B (zh) * | 2019-11-24 | 2021-10-08 | 湖南凯通电子有限公司 | 热敏电阻粘接机 |
Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05206342A (ja) * | 1992-01-29 | 1993-08-13 | Matsushita Electric Ind Co Ltd | ヒートシンクのボンディング方法 |
JPH09246325A (ja) * | 1996-03-08 | 1997-09-19 | Nec Corp | 半導体素子の実装構造及びその製造方法 |
JP2000137781A (ja) * | 1998-10-30 | 2000-05-16 | Hitachi Ltd | カード型電子回路基板及びその製造方法 |
JP2000294723A (ja) * | 1999-04-09 | 2000-10-20 | Matsushita Electronics Industry Corp | 積層型半導体装置およびその製造方法 |
JP2001144245A (ja) * | 1999-11-12 | 2001-05-25 | Shinko Electric Ind Co Ltd | 半導体パッケージ及びその製造方法並びに半導体装置 |
WO2002071470A1 (en) * | 2001-03-02 | 2002-09-12 | Toray Engineering Co., Ltd. | Chip mounting method and apparatus therefor |
JP2004193442A (ja) * | 2002-12-13 | 2004-07-08 | Matsushita Electric Ind Co Ltd | 電子部品実装装置 |
JP2005183561A (ja) * | 2003-12-18 | 2005-07-07 | Shinko Electric Ind Co Ltd | 半導体装置の製造方法 |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5602A (en) | 1848-05-30 | James p | ||
US5811317A (en) | 1995-08-25 | 1998-09-22 | Texas Instruments Incorporated | Process for reflow bonding a semiconductor die to a substrate and the product produced by the product |
JP2001028381A (ja) | 1999-07-14 | 2001-01-30 | Sony Corp | 実装方法及び実装装置 |
JP4128319B2 (ja) | 1999-12-24 | 2008-07-30 | 株式会社新川 | マルチチップボンディング方法及び装置 |
FR2803413A1 (fr) | 1999-12-30 | 2001-07-06 | Schlumberger Systems & Service | Element de carte a circuit integre monte en flip-chip |
JP3531586B2 (ja) | 2000-06-12 | 2004-05-31 | 松下電器産業株式会社 | 表示パネルの組立装置および組立方法 |
KR100676353B1 (ko) * | 2000-10-26 | 2007-01-31 | 산요덴키가부시키가이샤 | 혼성 집적 회로 장치의 제조 방법 |
US6874225B2 (en) | 2001-12-18 | 2005-04-05 | Matsushita Electric Industrial Co., Ltd. | Electronic component mounting apparatus |
JP4045838B2 (ja) * | 2002-04-12 | 2008-02-13 | 松下電器産業株式会社 | 部品装着管理方法 |
DE10245398B3 (de) * | 2002-09-28 | 2004-06-03 | Mühlbauer Ag | Vorrichtung und Verfahren zur Aufbringung von Halbleiterchips auf Trägern |
US20070023138A1 (en) | 2003-05-02 | 2007-02-01 | Marconi Communications Gmbh | Gluing method and device |
US7023089B1 (en) * | 2004-03-31 | 2006-04-04 | Intel Corporation | Low temperature packaging apparatus and method |
-
2006
- 2006-01-10 JP JP2006002671A patent/JP4714026B2/ja active Active
- 2006-12-26 SG SG200608999-9A patent/SG134221A1/en unknown
- 2006-12-27 US US11/645,702 patent/US7748113B2/en active Active
-
2007
- 2007-01-02 EP EP07000029A patent/EP1806962B1/en not_active Ceased
- 2007-01-10 CN CN2007100021120A patent/CN101001519B/zh not_active Expired - Fee Related
Patent Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05206342A (ja) * | 1992-01-29 | 1993-08-13 | Matsushita Electric Ind Co Ltd | ヒートシンクのボンディング方法 |
JPH09246325A (ja) * | 1996-03-08 | 1997-09-19 | Nec Corp | 半導体素子の実装構造及びその製造方法 |
JP2000137781A (ja) * | 1998-10-30 | 2000-05-16 | Hitachi Ltd | カード型電子回路基板及びその製造方法 |
JP2000294723A (ja) * | 1999-04-09 | 2000-10-20 | Matsushita Electronics Industry Corp | 積層型半導体装置およびその製造方法 |
JP2001144245A (ja) * | 1999-11-12 | 2001-05-25 | Shinko Electric Ind Co Ltd | 半導体パッケージ及びその製造方法並びに半導体装置 |
WO2002071470A1 (en) * | 2001-03-02 | 2002-09-12 | Toray Engineering Co., Ltd. | Chip mounting method and apparatus therefor |
JP2004193442A (ja) * | 2002-12-13 | 2004-07-08 | Matsushita Electric Ind Co Ltd | 電子部品実装装置 |
JP2005183561A (ja) * | 2003-12-18 | 2005-07-07 | Shinko Electric Ind Co Ltd | 半導体装置の製造方法 |
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EP1806962B1 (en) | 2012-02-22 |
CN101001519A (zh) | 2007-07-18 |
CN101001519B (zh) | 2010-06-16 |
US20070157462A1 (en) | 2007-07-12 |
EP1806962A2 (en) | 2007-07-11 |
SG134221A1 (en) | 2007-08-29 |
JP2007184485A (ja) | 2007-07-19 |
US7748113B2 (en) | 2010-07-06 |
EP1806962A3 (en) | 2008-06-04 |
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