JP4743588B2 - Semiconductor device - Google Patents

Description

  The present invention relates to a technology effective when applied to a semiconductor integrated circuit, and in particular, an electronic tag semiconductor integrated circuit having a wireless communication function generally called a wireless IC tag is formed on the same chip as a circuit having an original function. The present invention relates to a semiconductor integrated circuit, and further to a semiconductor device in which this is mounted in a package.

  Conventionally, a ROM (Read Only Memory) that stores predetermined data such as an identification code, a transmission / reception circuit that performs wireless transmission / reception with an external reader, and data from the ROM in response to an external request or the like For electronic tags with a wireless communication function that incorporates a logic circuit that reads out the data and outputs data to the outside by a transmission / reception circuit and performs predetermined arithmetic processing and a power supply circuit that supplies power to these circuits A semiconductor integrated circuit (hereinafter referred to as a wireless IC tag) is known (Patent Document 1).

Such a wireless IC tag is incorporated in a container or a box as a package of a product to be shipped to a user, and information such as the date of manufacture, the type, specification, and characteristics of the product is stored in a built-in ROM and shipped. It is used for management, and in the distribution process, it is used to manage the distribution of products by additionally writing information such as distribution channels in the built-in ROM, or in the store, the product code etc. is stored in the built-in ROM and attached to the product as a tag. In addition, when passing through inventory management or a cash register, a code in the ROM is read by a predetermined reading device, so that it is used as an alternative to a conventional bar code settlement system.
Japanese Patent Laid-Open No. 07-200749

  Conventionally, the wireless IC tag itself has been manufactured as an independent product. Therefore, for example, in the case of a product in which a large number of products are stored together in a container or box and shipped without being stored in a separate container or box, such as a semiconductor integrated circuit. It was difficult to manage each product with a wireless IC tag. Therefore, a technique for mounting a wireless IC tag chip in a package of a semiconductor integrated circuit chip as a product and using it for product management can be considered.

  However, in such a case, there is a problem that the manufacturing cost increases, and if any one of the chips in the package fails, it becomes a defective product and the yield decreases.

  An object of the present invention is to provide a semiconductor device capable of managing specifications and characteristics of a semiconductor integrated circuit as a product with a wireless IC tag.

  Another object of the present invention is to provide a semiconductor device in which a wireless IC tag is mounted and mounted in a package at a low cost.

  Still another object of the present invention is to provide a technique capable of improving the yield of a semiconductor device in which a wireless IC tag is mounted and mounted on a package.

  Still another object of the present invention is to prevent leakage current between a wireless IC tag portion and an original semiconductor integrated circuit portion when the wireless IC tag is formed on the same chip as the original semiconductor integrated circuit. An object of the present invention is to provide a semiconductor integrated circuit capable of reducing power consumption and reading / writing with weak radio waves and a semiconductor device in which this is mounted in a package.

  The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

Outlines of representative ones of the inventions disclosed in the present application will be described as follows.
That is, a wireless IC tag forming region is provided on a semiconductor chip on which an original semiconductor integrated circuit having a predetermined function is formed, and a wireless IC tag is formed on the same chip and mounted on the semiconductor chip or the semiconductor chip. A conductive pattern serving as an antenna is formed on the package to be formed.

  According to the above-described means, information such as specifications and characteristics of the semiconductor integrated circuit can be given to itself, so that management is facilitated and a wireless IC tag is formed on the semiconductor chip on which the original semiconductor integrated circuit is formed. Therefore, the manufacturing cost can be reduced as compared with the case of forming a separate chip. Further, since only one chip is mounted on the package, the yield can be improved as compared with the case where the chip is formed and mounted on a separate chip.

  Desirably, the power supply line is separated between the wireless IC tag portion and the original semiconductor integrated circuit portion, and an insulating separation region for electrically separating them is provided between the two. As a result, when formed on the same chip, it is possible to prevent leakage current from flowing between the wireless IC tag portion and the original semiconductor integrated circuit portion. A semiconductor integrated circuit can reduce power consumption, and a wireless IC tag can be read and written by weak radio waves.

  Furthermore, another invention of the present application is to mount a semiconductor chip on which an original semiconductor integrated circuit is formed and a semiconductor chip on which a wireless IC tag is formed in one package, A conductive pattern serving as an antenna is formed on a package on which a semiconductor chip is mounted. As a result, the semiconductor device itself can be provided with information such as the specifications and characteristics of the internal semiconductor integrated circuit, which facilitates management.

  Preferably, the wireless IC tag is provided with an electrically writable non-volatile memory circuit, and the memory circuit can write a plurality of times, a read-only area, a writable area once, and so on. And separate areas (rewriteable areas). As a result, data that does not need to be rewritten with respect to the semiconductor integrated circuit is erroneously overwritten and lost, and the data is improved without being feared to be tampered with. Data to be written can be stored, and usability is improved.

The effects obtained by the representative ones of the inventions disclosed in the present application will be briefly described as follows.
In other words, according to the present invention, information such as specifications and characteristics of a semiconductor integrated circuit can be held in the semiconductor device itself mounted on the package, thereby facilitating management, reducing manufacturing costs, and improving yield. Can be made. In addition, there is an effect that leakage current can be prevented from flowing, power consumption can be reduced, and reading / writing can be performed by weak radio waves.

Preferred embodiments of the present invention will be described below with reference to the drawings.
FIG. 1 shows a first embodiment of a semiconductor integrated circuit to which the present invention is applied. In FIG. 1, reference numeral 100 indicates a single semiconductor chip such as single crystal silicon, and 101 indicates a bonding pad formed side by side along the peripheral edge of the chip.

  As shown in FIG. 1, in this embodiment, a wireless IC tag unit 120 is provided on a semiconductor chip 100 in addition to an original semiconductor integrated circuit unit (main body IC) 110, and the semiconductor integrated circuit unit 110 and An insulating isolation region 130 is provided between the wireless IC tag unit 120 to electrically isolate them from each other. Of the bonding pads 101, 101a and 101b are pads for the wireless IC tag unit 120 and are connected to an antenna described later. The insulating isolation region 130 can be configured by an insulator formed by selectively oxidizing the surface of the semiconductor chip or an insulating structure formed by digging a groove in the surface of the semiconductor chip and filling with an insulating material.

  Although not particularly limited, as shown in FIG. 2, the wireless IC tag unit 120 receives predetermined data such as a manufacturer code and a manufacturing number, and a transmission / reception circuit 121 that performs wireless transmission and reception with an external reader. The memory circuit 122 to be stored and the control for writing data to the memory circuit 122 or reading the data and outputting the data to the outside by the transmission / reception circuit 121 in response to an external request or the like, or performing predetermined arithmetic processing, etc. The circuit 123 includes a power supply circuit 124 that generates a power supply voltage to be supplied to each of the circuits 121 to 123.

  An antenna 150 is connected to the transmission / reception circuit 121, and a function for extracting (demodulating) reception information contained in an AC signal received via the antenna and an AC signal in which transmission information is carried on a carrier wave are formed (modulated) to generate an antenna. It is comprised so that it may drive and transmit. The power supply circuit 124 is configured to receive power supply by using an induction phenomenon of the coil and rectify an AC signal generated in the receiving coil by a diode bridge circuit or the like to generate an internal DC power supply voltage. The method of receiving power supply using the inductive phenomenon is a well-known technique that is also used in non-contact type IC cards and the like, and detailed description thereof is omitted. The wireless IC tag unit 120 may transmit and receive with microwaves.

  The memory circuit 122 is a read-only ROM (read-only memory), an EPROM that can be electrically written to, or an electrical write / erase, so that data can be written later in the manufacturing process and distribution process. It is configured by a non-volatile memory such as a possible EEPROM. Table 1 shows an example of a data format, a function of each area, and data to be stored when the memory circuit 122 is formed so as to have a storage capacity of, for example, 256 bytes.

  As shown in Table 1, in this embodiment, the memory circuit 122 is divided into an area that can be read only, an area that can be written only once, and an area that can be written many times.

  Among these, information on the maker side such as a manufacturing number, a manufacturing date, and wafer characteristics is stored in an area where only reading is possible. Since this information is unique to the product and does not need to be rewritten, this area can be configured with non-rewritable memory such as mask ROM or fuse ROM, or it can be written only in the chip state with EPROM. It is possible to adopt a configuration in which writing cannot be performed from an external terminal after mounting.

  In the area that can be written only once, information unique to the IC is stored, such as distribution history, element characteristics, and wiring characteristics, which need not be changed. Since this area only needs to be written once, it can be constituted by an EPROM. In order to be able to write the distribution history, it is preferable to be able to write from an external terminal after being mounted on the package.

  The area that can be written many times is provided as a storage area that is open so that the user can freely store arbitrary information. This area is configured by a flash memory or an EEPROM so that data can be written many times, and can be written from an external terminal after being mounted on a package.

  As described above, instead of configuring the three areas with different hardware memories, the entire area is configured with an electrically erasable nonvolatile memory, and each area is softly controlled by the control circuit 123 using addresses. You may comprise so that the function of this may be managed. Specifically, for example, an area where the upper 2 bits of the address are “00” is read-only, an area where the upper 2 bits are “01” can be written only once, and the upper 2 bits are “10” and “11”. Can be defined and managed as a writable area. In this case, the upper 2 bits can be regarded as a flag.

FIG. 3 shows a second embodiment of a semiconductor integrated circuit to which the present invention is applied.
In the semiconductor integrated circuit of this embodiment, in addition to the pair of pads 101a and 101b for antenna connection, a probe is applied to the wireless IC tag unit 120 before being enclosed in a package on a production line or the like, and data is stored in an internal ROM. Are provided with pads P1 and P2. The pads P1 and P2 are not connected to lead terminals on the package side by bonding wires.

  3A shows that the logic circuit and the memory circuit in the IC tag can be activated by applying a power supply probe to the antenna connection pads 101a and 101b and directly applying a power supply voltage. When a power supply circuit is configured or when power is supplied via an antenna, a conductive pattern 150 serving as an antenna is formed on the semiconductor chip instead of a package as will be described later, and probes are formed on the pads P1 and P2. This is an embodiment that can be applied to the case where data is stored by applying.

  In FIG. 3B, when data is stored by applying probes to the pads P1 and P2 in the wafer state, the power supply voltage can also be supplied from the original power supply voltage terminal of the semiconductor integrated circuit section 110 to the wireless IC tag section 120. This is an example effective when applied to a case where a conductive pattern serving as an antenna is formed on a chip package as will be described later. In this embodiment, the power supply lines L1 and L2 for connecting the antenna connection pads 101a and 101b of the wireless IC tag unit 120 and the power supply pads 101c and 101d of the original semiconductor integrated circuit unit 110 and in the middle thereof Provided switch elements SW1 and SW2 and a register REG for controlling the state of the switch. The register REG is preferably set so that the switch elements SW1 and SW2 are automatically turned on when a power supply voltage is applied to the chip, and can be changed to an off state by the operation of the internal control circuit. .

  FIG. 4 shows a semiconductor device of the first embodiment in which the semiconductor chip 100 is mounted on a package. Among these, (A) is a plane explanatory view, and (B) is a cross-sectional explanatory view. 4, parts that are the same as or correspond to those in FIG. 1 are given the same reference numerals, and redundant descriptions are omitted.

  As shown in FIG. 4A, in this embodiment, a conductive pattern 221 serving as an antenna coil and a power supply line are provided so as to surround the chip 100 on the surface of the insulating substrate 210 on which the semiconductor chip 100 is placed. The ring-shaped conductive patterns 222 and 223 are provided. Among these conductive patterns 221 to 223, a part of the conductive pattern 221 serving as an antenna coil is cut and two ends are bonded to bonding wires 231 and 231 having one end coupled to the pads 101a and 101b for the wireless IC tag. The other end of 232 is coupled.

  Also, one end of bonding wires 233 and 234 that are electrically connected to the power supply pads of the semiconductor integrated circuit portion 110 of the bonding pads 101 of the semiconductor chip 100 are coupled to the conductive patterns 222 and 223 for the power supply lines, respectively. . 4A, lead terminals are provided radially around the semiconductor chip 100, and each lead terminal 201 has a signal input / output pad among the bonding pads 101 of the semiconductor chip 100. One end of a bonding wire 235 that is electrically connected is coupled. 240 is a resin or resin constituting the package.

  In this embodiment, the conductive patterns 222 and 223 for the power supply line are not essential and can be omitted. In this embodiment, the semiconductor chip 100 is mounted on the surface of the insulating substrate 210. However, the inside of the insulating substrate 210 is cut out to form a frame having a window, and the semiconductor chip 100 is formed on the lead frame. It may be placed on the die portion and faced from the window.

FIG. 5 shows a second embodiment of the semiconductor device to which the present invention is applied.
This embodiment does not provide the ring-shaped conductive patterns 222 and 223 serving as power supply lines in the embodiment of FIG. 4, but instead forms a conductive pattern 221 serving as an antenna coil in a spiral shape at the inner and outer ends. The other ends of the bonding wires 231 and 232 coupled to the pads 101a and 101b for the wireless IC tag are coupled. According to this embodiment, if the size of the chip or the package is the same, the antenna coil inductance can be increased compared to the embodiment of FIG. 4, and communication with an external device can be performed with a weak signal. The number of turns of the conductive pattern 221 is determined by the relationship between the pattern processing accuracy and the chip and package size, but it is desirable to increase the number of turns as much as possible within the allowable range.

  In this embodiment, the conductive pattern 221 serving as an antenna coil can be constituted by a lead frame on which lead terminals are formed. That is, at the time of assembly, the conductive pattern 221 serving as an antenna coil is held by leads 201a to 201d integrated with a lead frame main body (not shown), the chip 100 is molded with resin or resin, and the leads 201a to 201d are then connected to other leads. Similarly to the above, by separating from the lead frame body, it is possible to obtain an antenna coil that is floating in potential.

  Furthermore, in the first embodiment, the lead terminal 201 is configured as a lead pin, whereas in the second embodiment, the outer end of the lead terminal 201 is bent so as to be exposed on the lower surface of the package 240. The lead terminals 201 are mounted on the printed circuit board by the solder balls 250. The shape of the lead terminal may be reversed between the first embodiment and the second embodiment. In the first embodiment and the second embodiment, the shape of the lead terminal is not limited to that shown in the figure, and may be other shapes.

  6A and 6B show a modification of the above embodiment. In this modification, two wireless IC tag portions 120a and 120b are provided on the semiconductor chip 100 on which the original semiconductor integrated circuit portion 110 is formed to store the same data. As a result, even if one of the two data is lost when the data is read, the remaining data is made effective, so that the yield can be improved and the two read data are compared to The data reliability can be improved by determining that the data is valid only when they match.

  In this modified example, even if two wireless IC tag portions 120a and 120b are provided on one semiconductor chip 100, the entire device is small, so that data storage and reading via the antenna are exactly the same as in the previous embodiment. It does not have to be performed separately for the two wireless IC tag portions 120a and 120b, and can be performed in one operation.

  The difference between the modified example of FIG. 6A and the modified example of FIG. 6B is that in the modified example of FIG. 6A, the two wireless IC tag portions 120a and 120b are provided at positions separated from each other and become an antenna. While the conductive pattern 221 is provided separately for the two wireless IC tag portions 120a and 120b, in the modified example of (B), the two wireless IC tag portions 120a and 120b are disposed adjacent to each other. The conductive pattern 221 serving as an antenna is provided in common.

  Since defects often occur locally in a semiconductor integrated circuit, the modification of FIG. 6A is effective when applied to a case where priority is given to yield improvement, and the modification of FIG. 6B is more reliable. It is effective when it is applied when priority is given to improving the performance. Further, in the modified example of (B), since the number of windings of the antenna coil can be increased as compared with (A) if the area is the same, there is an advantage that data can be read / written with weaker radio waves. is there.

  FIG. 7 shows a third embodiment of the semiconductor device to which the present invention is applied. FIG. 7A shows a state seen from the side, and FIG. 7B shows a state seen from below. In this embodiment, a spiral conductive pattern 221 serving as an antenna coil is provided on the lower surface of the package 240. Further, wiring patterns 261a and 261b for connecting lead terminals 201a and 201b connected to bonding pads 231a and 231b to wireless IC tag pads 101a and 101b, respectively, at both ends of the spiral conductive pattern 221 are provided on the package 240. The lead terminal is connected to the wiring pattern by the solder balls 250a and 250b.

  FIG. 8 shows a fourth embodiment of the semiconductor device to which the present invention is applied. This embodiment is applied to a BGA (Ball Grid Array) type package. 8A is a side view (cross section taken along line AA ′ in FIG. 8C), FIG. 8B is a state when the BGA substrate 241 is viewed from above, and FIG. 8C is a BGA substrate. 241 is a state seen from below. For the BGA substrate 241 to be a package, an insulating substrate in which wiring patterns 221 and 261 to 263 made of a conductor are formed on both sides is used, and a semiconductor chip 100 on which an IC tag is mounted at the center of the upper surface is bonded using a solder ball 252. In addition, a twin spiral conductive pattern 221 serving as an antenna coil is formed at the center of the lower surface by a printed wiring technique.

  In addition, although not particularly limited to the peripheral edge of the bottom surface of the BGA substrate 241, the solder balls 250 serving as external terminals are arranged in two rows, and the twin spiral conductive patterns 221 of the BGA substrate 241 are arranged. The antenna connection pads (101a, 101b) of the wireless IC tag and the antenna are formed by a structure 271 called a via (via) formed by filling a through hole with a conductive material at positions corresponding to both ends, a solder ball 251 and a wiring pattern 261. It is connected to the end of the conductive pattern 221 as a coil. Further, the pads as the input / output terminals and the power supply terminals of the original semiconductor integrated circuit of the semiconductor chip 100 are formed inside the multilayer substrate constituting the solder balls 252 and the BGA substrate 241 provided corresponding to each pad. The wiring pattern 262 and the via 272 are connected to a solder ball 250 as an external terminal disposed on the bottom surface of the BGA substrate 241.

  FIG. 9 shows a third embodiment of the semiconductor integrated circuit to which the present invention is applied. Of these, the semiconductor integrated circuit of FIG. 9A is provided with a spiral conductive pattern 150 serving as an antenna coil formed by multilayer wiring technology via an interlayer insulating film above a semiconductor chip 100 on which the circuit is formed. It is. Both ends of the spiral conductive pattern 150 are connected to the antenna connection pad of the wireless IC tag 120 by through holes 161 to 163 formed in the interlayer insulating film and the lead wiring 152.

  In FIG. 9B, instead of providing the conductive pattern 150 serving as the antenna coil above the circuit formation region, the conductive pattern 150 serving as the antenna coil is provided outside the pad, that is, at the periphery of the semiconductor chip 110. is there. In this case, it can be formed as a coil of a plurality of windings in which rings are stacked in a direction perpendicular to the substrate using a plurality of wiring layers.

  In the case where the conductive pattern 150 serving as an antenna coil is provided above the circuit formation region as shown in FIG. 9A, if the spiral conductive pattern 150 is formed without increasing the number of wiring layers, the original wiring is not formed. The entire design must be designed while changing the wiring layer to avoid it. Therefore, the pattern design becomes troublesome, but when the conductive pattern 150 serving as an antenna coil is provided outside the circuit formation region as shown in FIG. 9B, it is not necessary to consider interference with other wirings. Therefore, there is an advantage that pattern design becomes easy.

  FIG. 10 shows another embodiment of a semiconductor device mounted in a package to which the present invention is applied. In this embodiment, a semiconductor chip 100B on which a wireless IC tag semiconductor integrated circuit 120 is formed separately from a semiconductor chip 100A on which an original semiconductor integrated circuit 110 is formed is placed on a common insulating substrate 210 to form one package. It is to be implemented in.

  Although not particularly limited, in this embodiment, a ring-shaped conductive pattern 150 serving as an antenna coil to which the pads 101a and 101b of the wireless IC tag semiconductor chip 100B are connected is formed on the insulating substrate 210. The conductive pattern 221 serving as the antenna coil is formed in a spiral shape on the insulating substrate 210 as shown in FIG. 5, or formed on the lower surface of the package 240 as shown in FIG. What is formed in the semiconductor chip 100 as shown in 9 (A) may be used.

  FIG. 11 shows still another embodiment of a packaged semiconductor device to which the present invention is applied. In this embodiment, a semiconductor chip 100B on which a wireless communication semiconductor integrated circuit 120 ′ is formed separately from the semiconductor chip 100A on which the original semiconductor integrated circuit 110 is formed is placed on a common insulating substrate 210 to form one package. It is to be implemented in. Here, the semiconductor integrated circuit 120 ′ for wireless communication refers to a wireless IC tag unit 120 having a configuration as shown in FIG. 2, for example, having a configuration excluding the memory 122. The conductive pattern 221 serving as an antenna coil is the same as in the embodiment of FIG.

  In this embodiment, data such as identification codes, IC specifications, and manufacturing history are stored using a memory 112 formed on the semiconductor chip 100A. In addition, in order to enable data to be read / written by the wireless communication semiconductor integrated circuit 120 ′ in the memory 112 on the semiconductor chip 100A, the wireless communication semiconductor integrated circuit 120 ′ has a pad connected to the antenna (221). Separately from 101a and 101b, pads 101c and 101d for inputting / outputting data to / from the original semiconductor integrated circuit 110 are provided and connected to corresponding pads on the original semiconductor integrated circuit 110 side by bonding wires. Is done.

  In this case, one pad is used for transmitting a synchronizing clock and the other pad is used for transmitting / receiving data. In order to reduce the number of pads, serial communication is effective. In that case, a serial interface circuit is preferably provided in each of the original semiconductor integrated circuit 110 and the wireless communication semiconductor integrated circuit 120 '. If the number of pads may be increased, data can be transmitted and received in parallel between the wireless communication semiconductor integrated circuit 120 'and the memory 112 on the semiconductor chip 100A.

  In that case, the semiconductor integrated circuit 110 can have almost the same configuration as that in the case where the wireless IC tag is not provided. When the original semiconductor integrated circuit 110 is an LSI having a serial interface circuit such as a single-chip microcomputer or system LSI, the existing semiconductor interface circuit 110 is used to communicate with the wireless communication semiconductor integrated circuit 120 ′. It can be configured to transmit and receive data.

  In this embodiment, when data is read / written from / to the memory 112 on the semiconductor chip 100A by the wireless communication semiconductor integrated circuit 120 ′, an AC signal is sent to the wireless communication semiconductor integrated circuit 120 ′ via the antenna. On the other hand, it is necessary to activate the memory circuit 112 in whole or in part by supplying a power supply voltage to the original semiconductor integrated circuit 110 from an external terminal (lead terminal, pad, etc.).

  In addition to using the memory circuit 112 originally provided in the original semiconductor integrated circuit 110, the memory circuit 112 completely separated from the original semiconductor integrated circuit 110 may be formed and used in the semiconductor chip 100A. good. In that case, the power supply voltage of the memory circuit 112 can be applied from the wireless communication semiconductor integrated circuit 120 '. Therefore, a pad for supplying the power supply voltage from the wireless communication semiconductor integrated circuit 120 'to the memory circuit 112 is preferably provided in each chip.

  The invention made by the present inventor has been specifically described based on the embodiments. However, the present invention is not limited to the above embodiments, and various modifications can be made without departing from the scope of the invention. Nor. For example, in the above-described embodiment, the conductive pattern 221 serving as the antenna coil is formed on the upper surface of the insulating substrate 210 on which the semiconductor chip is mounted, the lower surface of the package 240, or the semiconductor chip. However, the present invention is not limited thereto. Alternatively, it may be provided on the lower surface or inside of the insulating substrate 210 or on the upper surface or inside of the package 240, or may be formed by a bonding wire.

  In the above description, the invention made mainly by the present inventor has been described as being applied to a semiconductor device in which a semiconductor integrated circuit, which is a field of use in the background, is mounted on a package. However, the present invention is not limited thereto, and the semiconductor It can also be used for printed wiring boards, IC cards, modules, and the like on which integrated circuits are mounted.

1 is a plan configuration diagram showing a first embodiment of a semiconductor integrated circuit to which the present invention is applied; It is a block diagram which shows the structural example of a radio | wireless IC tag part. It is a plane block diagram which shows the 2nd Example of the semiconductor integrated circuit to which this invention is applied. 4A is an explanatory plan view showing a first embodiment of a semiconductor device in which the semiconductor integrated circuit of the above embodiment is mounted on a package, and FIG. 4B is an explanatory sectional view thereof. FIG. 5A is a plan explanatory view showing a second embodiment of a semiconductor device in which the semiconductor integrated circuit of the above embodiment is mounted in a package, and FIG. 5B is a sectional explanatory view thereof. FIGS. 6A and 6B are explanatory plan views showing a modification of the above embodiment. FIG. 7A is a cross-sectional explanatory view showing a third embodiment of a semiconductor device in which the semiconductor integrated circuit of the above embodiment is mounted in a package, and FIG. 7B is a bottom view thereof. FIG. 8A is a cross-sectional explanatory view showing a fourth embodiment of a semiconductor device in which the semiconductor integrated circuit of the above embodiment is mounted in a package, FIG. 8B is a plan view of a BGA substrate, and FIG. It is a bottom view of a BGA board. FIG. 9A is a plan view showing a third embodiment of the semiconductor integrated circuit to which the present invention is applied, and FIG. 9B is a plane explanatory view showing a modification thereof. It is plane explanatory drawing which shows the other Example of the semiconductor device of the package mounting state to which this invention is applied. It is plane explanatory drawing which shows the further another Example of the semiconductor device of the package mounting state to which this invention is applied.

Explanation of symbols

DESCRIPTION OF SYMBOLS 100 Semiconductor chip 101 Bonding pad 101a, 101b Antenna connection pad 110 Original semiconductor integrated circuit part 120 Wireless IC tag part 130 Insulation isolation region 150 Wiring pattern as antenna coil 161-163 Through-hole 201 Lead terminal 210 Insulating substrate 221 Antenna coil Wiring pattern 231 232 Bonding wire 240 Package 250 Solder ball 261 262 Wiring pattern 271 272 Via (via)

Claims (11)

  An original semiconductor integrated circuit having a predetermined function, a wireless tag circuit that is electrically separated from the semiconductor integrated circuit, stores data related to the semiconductor integrated circuit, and transmits / receives data to / from an external device in a contactless manner; Is formed on one semiconductor chip, and a conductive pattern serving as an antenna is formed on a package on which the semiconductor chip is mounted.   The semiconductor device according to claim 1, wherein the semiconductor chip is mounted on an insulating substrate on which a conductive pattern to be the antenna is formed, and is enclosed in a package together with the insulating substrate and lead terminals. .   The conductive pattern serving as the antenna is formed on the surface of the insulating substrate on which the semiconductor chip is mounted, and between the end of the conductive pattern and the pad connected to the RFID circuit on the semiconductor chip. The semiconductor device according to claim 1, wherein the semiconductor devices are connected by a bonding wire.   The semiconductor chip is enclosed in a package together with a lead terminal, the conductive pattern is formed on the surface of the package, and the other end of the lead terminal is electrically connected to a pad to be connected to the antenna of the RFID circuit. The semiconductor device according to claim 1, wherein a portion is connected to the conductive pattern.   The semiconductor chip is mounted on the surface of a package substrate on which a wiring layer is formed, and the conductive pattern serving as the antenna is formed on the back surface of the package substrate, and the end of the conductive pattern and the antenna of the RFID circuit 2. The semiconductor device according to claim 1, wherein a pad to be connected is connected by a wiring layer formed in the package.   An original semiconductor integrated circuit having a predetermined function, a wireless tag circuit that is electrically separated from the semiconductor integrated circuit, stores data relating to the semiconductor integrated circuit, and transmits / receives data to / from an external device in a contactless manner; Is formed on one semiconductor chip, and a conductive pattern serving as an antenna is formed on the semiconductor chip.   In addition to the pads to be connected to the antenna of the RFID circuit, the semiconductor chip is provided with pads for transmitting and receiving data by a contact method between the RFID circuit and an external device. The semiconductor device according to claim 1.   The semiconductor device according to claim 1, wherein an insulating region is formed between the original semiconductor integrated circuit on the surface of the semiconductor chip and the wireless tag circuit.   Two or more RFID tag circuits and two or more antenna conductive patterns having the same configuration are formed on the semiconductor chip, and a separate antenna conductive pattern is connected to each pad of the two or more RFID tag circuits. The semiconductor device according to claim 6.   Two or more RFID tag circuits having the same configuration and one antenna conductive pattern are formed on the semiconductor chip, and each pad of the two or more RFID tag circuits is commonly connected to the one antenna conductive pattern. The semiconductor device according to claim 6.   In the wireless IC tag circuit, an electrically writable nonvolatile memory circuit is formed. The memory circuit includes a read-only area, an area where data can be written only once, and an area where data can be written a plurality of times. The semiconductor device according to claim 1, wherein the semiconductor device is divided into two types.

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