JP4696180B2 - Display device drive circuit and display device - Google Patents

Description

  The present invention relates to a display device such as a liquid crystal display device and a drive circuit for driving the display device.

  In a display device such as a liquid crystal display device, AC driving is generally performed in which positive and negative driving voltages are applied to a capacitive load with respect to the potential of the counter electrode of the display panel. As a drive circuit that generates such a drive voltage, for example, a circuit shown in FIG.

  As shown in the figure, the drive circuit is provided with output transistors 11 and 12 connected in series between a high-level power supply 8 (VDD) and a middle-level power supply 10 (VDD / 2). Further, output transistors 13 and 14 connected in series between the middle power supply 10 (VDD / 2) and the low power supply 9 (VSS) are provided.

  The output transistors 11 and 12 and the output transistors 13 and 14 are controlled by the differential input stage circuits 2 and 3 switched by the switch means 6 and 7, and alternately supply positive and negative drive voltages to the capacitive load. It is like that.

  As a result, the capacitive load is charged and discharged by the middle power supply 10 regardless of whether the drive voltage is switched between positive and negative, so that power consumption is reduced.

JP 2002-175052 A

  However, when the differential input stage circuits 2 and 3 are switched by the switch means 6 and 7 as described above, the accuracy of the drive voltage tends to be lowered, and the number of required switch circuits increases. Tend to.

  The present invention has been made in view of the above points, and reduces power consumption for AC driving of a display device, and further reduces the accuracy of drive voltage by switching the output of a differential input stage circuit. The purpose is not to invite.

To solve the above problem,
The present invention
A drive circuit of a display device that selectively outputs a positive or negative drive voltage with respect to a predetermined reference voltage in the display device according to an image signal,
An input stage circuit;
According to the pair of output stage control signals output from the input stage circuit,
An output stage circuit for outputting a drive voltage between a predetermined high voltage and a first intermediate voltage, or a drive voltage between a second intermediate voltage and a predetermined low voltage;
Equipped with a,
The second intermediate voltage is higher than the first intermediate voltage;
The output stage circuit is
A high-voltage side transistor and a low-voltage side transistor connected in series with each other;
A high voltage side voltage supply circuit for selectively supplying the high voltage or the first intermediate voltage to the high voltage side transistor;
A low voltage side voltage supply circuit that selectively supplies the second intermediate voltage or low voltage to the low voltage side transistor;
With
The input stage circuit is
A P-channel transistor and an N-channel transistor that are connected in parallel to each other and whose both ends are respectively connected to the control terminals of the high-voltage side transistor or the low-voltage side transistor;
A bias supply circuit that applies a predetermined bias voltage corresponding to selection of a voltage supplied to the high-voltage side transistor and the low-voltage side transistor in the output stage circuit to the control terminals of the P-channel transistor and the N-channel transistor;
It is provided with.
Further, the display device drive circuit selectively outputs a positive or negative drive voltage with respect to a predetermined reference voltage in the display device according to the image signal,
An input stage circuit;
According to the pair of output stage control signals output from the input stage circuit,
A driving voltage between a predetermined high voltage and a first intermediate voltage, or
An output stage circuit for outputting a drive voltage between the second intermediate voltage and a predetermined low voltage;
With
The second intermediate voltage is higher than the first intermediate voltage;
The output stage circuit is
First and second transistors connected in series between the predetermined high voltage and the first intermediate voltage;
Third and fourth transistors connected in series with each other between the second intermediate voltage and the predetermined low voltage;
An output selection switch circuit that selectively outputs a voltage at a connection point between the first and second transistors or a connection point between the third and fourth transistors as a drive voltage;
It is provided with.
The input stage circuit is
A P-channel transistor and an N-channel transistor connected in parallel to each other and having both ends connected to the control terminals of the first and third transistors or the second and fourth transistors,
A bias supply circuit for applying a predetermined bias voltage corresponding to selection of the voltage at the connection point in the output stage circuit to the control terminals of the P-channel transistor and the N-channel transistor;
May be provided.

  As a result, the power supply voltage supplied to the high-voltage side transistor and the low-voltage side transistor, or the voltage supplied to the first and second transistors and the third and fourth transistors can be kept low. Can be easily reduced. In addition, it is possible to easily maintain high accuracy of the drive voltage.

  As a result, it is possible to easily improve the transient response characteristics of the drive signal.

  According to the present invention, it is possible to reduce power consumption for AC driving of a display device and to easily maintain high accuracy of a driving voltage.

3 is a circuit diagram illustrating a configuration of a main part of the display device driving circuit 100 according to Embodiment 1. FIG. 4 is a graph showing power consumption and the like when the drive signal (OUT) is positive. 4 is a graph showing power consumption and the like when the drive signal (OUT) is negative. 6 is a circuit diagram illustrating a configuration of a main part of a display device driving circuit 200 according to Embodiment 2. FIG. 6 is a circuit diagram illustrating a configuration of a main part of a display device driving circuit 300 according to Embodiment 3. FIG. 6 is a plan view illustrating a schematic configuration of a liquid crystal display panel 400 of Embodiment 4. FIG.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In each of the following embodiments, components having functions similar to those of the other embodiments are denoted by the same reference numerals and description thereof is omitted.

Embodiment 1 of the Invention
FIG. 1 is a circuit diagram showing a configuration of a main part of a display device driving circuit 100 of Embodiment 1 for driving a display device such as a liquid crystal display panel. As shown in the figure, the display device driving circuit 100 is provided with an input stage circuit 101 and an output stage circuit 104.

  The input stage circuit 101 includes a differential stage circuit 102 and a cascode stage circuit 103.

  The differential stage circuit 102 outputs a signal corresponding to the difference between the image signal (IN +) and the drive signal (OUT, IN−) output from the display device drive circuit 100.

  The cascode stage circuit 103 includes transistors 13 to 24 and is supplied with bias voltages BN1 to BN3 and BP1 to BP3, and a pair of outputs for controlling the output stage circuit 104 in accordance with an output signal from the differential stage circuit 102. A stage control signal is output.

  The output stage circuit 104 includes transistors 11 and 12 connected in series with each other, and a voltage at these connection points is output as a drive signal (OUT). In view of this, for example, the liquid crystal capacitance CL formed between the pixel electrode and the common electrode 30 is subjected to charge accumulation discharge by charge / discharge current (I) via the source line in the liquid crystal display panel. ing. The charge / discharge current (I) is controlled to a constant current by the cascode stage circuit 103, for example.

  The output stage circuit 104 is further provided with switches 3 to 6 controlled by switch signals SW3 to SW6, and a predetermined high voltage (Vdd) or a first intermediate voltage (Vmh) is selected for the transistor 11. On the other hand, a predetermined low voltage (Vss) or a second intermediate voltage (Vml) is selectively supplied to the transistor 12. Here, the absolute value of the first and second intermediate voltages (Vmh, Vml) is set to a voltage lower than the black level voltage in the drive signal (OUT). A higher setting can reduce power consumption.

  An operation of the display device driving circuit 100 configured as described above will be described. Here, for the sake of simplification of description, it is assumed that the high voltage (Vdd) and the low voltage (Vss) are predetermined voltages equal to the positive or negative white level, the common electrode voltage (Vcom), and the first voltage The first and second intermediate voltages (Vmh, Vml) are predetermined voltages that are equal to each other and at a black level, and these are average voltages of the high voltage (Vdd) and the low voltage (Vss). It is assumed that they are equal. The sign of the voltage does not mean an absolute potential, but means a relative relationship with a predetermined reference voltage such as a common electrode voltage (Vcom).

  First, when a positive drive signal (OUT) is output, the switches 3 and 6 are turned ON, and the transistors 11 and 12 operate between the high voltage (Vdd) and the common electrode voltage (Vcom). . At this time, for example, if the transistor 11 is in a low resistance state and the transistor 12 is in a high resistance state according to the image signal, the drive signal (OUT) is a high voltage (positive white level) as shown in FIG. Vdd).

  Next, assuming that the transistor 11 is in a high resistance state and the transistor 12 is in a low resistance state according to the image signal, the charge accumulated in the liquid crystal capacitor CL is caused by the charge / discharge current (I) flowing through the transistor 12. As a result of the discharge, the drive signal (OUT) linearly drops to the common electrode voltage (Vcom) which is the black level. The power consumed at this time is the product of the difference between the drive signal (OUT) and the common electrode voltage (Vcom) and the charge / discharge current (I). That is, power consumption is reduced as compared with the case where the source of the transistor 12 is connected to a low voltage (Vss). This reduction in power consumption is the same when the liquid crystal capacitance (CL) is discharged, even when the level of the drive signal (OUT) changes in halftone.

  On the other hand, when a negative drive signal (OUT) is output, the switches 4 and 5 are turned ON, and the transistors 11 and 12 operate between the common electrode voltage (Vcom) and the low voltage (Vss). . In this case, for example, as shown in FIG. 3, when the common electrode voltage (Vcom) at the black level changes from the low voltage (Vss) at the negative white level to the common electrode voltage (Vcom) and the drive signal. This is the product of the difference from (OUT) and the charge / discharge current (I), and the power consumption is also reduced compared to the case where the source of the transistor 11 is connected to the high voltage (Vdd).

  As described above, the power supply voltage supplied to the transistors 11 and 12 is switched according to the polarity of the drive signal, and the voltage at both ends of the transistors 11 and 12 is kept low, so that the power consumption can be easily reduced. In addition, since the transistors constituting the switches 3 to 6 for switching between the high voltage (Vdd), the low voltage (Vss), and the intermediate voltage (Vmh, Vml) as described above can easily reduce the impedance relatively, The area of the transistor can be easily reduced. Furthermore, since it is not necessary to switch the output of the differential stage circuit 102 when switching the polarity, it is possible to easily suppress a decrease in accuracy due to such switching.

<< Embodiment 2 of the Invention >>
FIG. 4 is a circuit diagram illustrating a configuration of a main part of the display device driving circuit 200 according to the second embodiment. The display device driving circuit 200 includes a bias supply circuit 205 in addition to the display device driving circuit 100 of the first embodiment. The bias supply circuit 205 includes switches 7 to 10 controlled by switch signals SW7 to SW10, and switches the bias voltages BN3 and BP3 applied to the cascode stage circuit 103 according to the polarity of the drive signal (OUT). It has become.

  Specifically, when the switches 3 and 6 of the output stage circuit 104 are turned on and the positive drive signal (OUT) is output as described above, the switches 7 and 9 of the bias supply circuit 205 are turned on. Thus, the bias voltage BPH or BNH is supplied to the gates (control terminals) of the transistors 14 and 20 (P-channel transistor and N-channel transistor) in the cascode stage circuit 103, respectively. On the other hand, when a negative drive signal (OUT) is output, the switches 8 and 10 are turned ON, and the bias voltage BPL or BNL is supplied to the gates of the transistors 14 and 20, respectively.

  As described above, the bias voltages of the transistors 14 and 20 are switched according to the polarity of the drive voltage (OUT). For example, these bias voltages are set to BNH> BNL and BPH> BPL. It is possible to easily improve the transient response characteristics of the drive signal (OUT) by making the resistance characteristics uniform.

<< Embodiment 3 of the Invention >>
FIG. 5 is a circuit diagram illustrating a configuration of a main part of the display device driving circuit 300 according to the third embodiment. The display device driving circuit 300 is different from the display device driving circuit 100 of the first embodiment in that an output stage circuit 304 is provided instead of the output stage circuit 104.

  The output stage circuit 304 includes output circuits 304a and 304b and switches 1 and 2 controlled by SW1 and SW2.

  The output circuit 304a includes transistors 31 and 32 connected in series with each other, and is driven by a high voltage (Vdd) and a first intermediate voltage (Vml). On the other hand, the output circuit 304b includes transistors 41 and 42, and is driven by the second intermediate voltage (Vmh) and the low voltage (Vss). That is, the output circuit 304a is substantially in the same state as when the switches 3 and 6 are turned on in the output stage circuit 104 of the first embodiment, while the output circuit 304b is that the switches 4 and 5 are turned on. The situation is substantially the same as the case.

  The switch 1 is turned on when a positive drive signal (OUT) is output, while the switch 2 is turned on when a negative drive signal (OUT) is output. As these switches 1 and 2, for example, pass gates in which P and N channel transistors are connected in parallel are used, and it is preferable that the ON resistance is as low as possible.

  Even in the case of the above configuration, the power consumption when the positive drive signal (OUT) is output is the difference between the drive signal (OUT) and the common electrode voltage (Vcom), the charge / discharge current ( On the other hand, the power consumption when the negative drive signal (OUT) is output is the difference between the common electrode voltage (Vcom) and the drive signal (OUT), and the charge / discharge current (I). And product. Therefore, the power consumption can be easily suppressed to a low level without causing a decrease in accuracy due to the switching of the output of the differential stage circuit 102.

  Even in the configuration of the third embodiment, the bias supply circuit 205 is provided as described in the second embodiment, and an appropriate bias is set in the cascode stage circuit 103 according to the polarity of the drive voltage (OUT). You may make it give to a transistor.

<< Embodiment 4 of the Invention >>
The display device driving circuit as described in the first to third embodiments can be used for a liquid crystal display panel 400 as shown in FIG. 6, for example. The liquid crystal display panel 400 is provided with a liquid crystal display unit 401, a source driver 411, a gate driver 412, and a plurality of source lines 421 and gate lines 422 corresponding to the number of pixels, respectively. The source driver 411 includes a plurality of the display device driving circuits 100 and the like, and each driving signal (OUT) is a pixel (not shown) of pixels selected by the gate line 422 via the corresponding source line 421. Given to the electrode.

  The display device driving circuit according to the present invention has an effect of reducing power consumption for AC driving of the display device and easily maintaining high accuracy of the driving voltage. A display device such as a liquid crystal display device And a drive circuit for driving a display device.

1-10 switch
11-24 Transistor
30 Common electrode
31, 32 transistors
41, 42 Transistor 100 Display device drive circuit 101 Input stage circuit 102 Differential stage circuit 103 Cascode stage circuit 104 Output stage circuit 200 Display device drive circuit 205 Bias supply circuit 300 Display device drive circuit 304 Output stage circuit 304a, 304b Output circuit 400 Liquid crystal display panel 401 Liquid crystal display unit 411 Source driver 412 Gate driver 421 Source line 422 Gate line BN1 to BN3, BP1 to BP3 Bias voltage SW1SW10 Switch signal

Claims (4)

A drive circuit of a display device that selectively outputs a positive or negative drive voltage with respect to a predetermined reference voltage in the display device according to an image signal,
An input stage circuit;
According to the pair of output stage control signals output from the input stage circuit,
An output stage circuit for outputting a drive voltage between a predetermined high voltage and a first intermediate voltage, or a drive voltage between a second intermediate voltage and a predetermined low voltage;
With
The second intermediate voltage is rather high than the first intermediate voltage,
The output stage circuit is
A high-voltage side transistor and a low-voltage side transistor connected in series with each other;
A high voltage side voltage supply circuit for selectively supplying the high voltage or the first intermediate voltage to the high voltage side transistor;
A low voltage side voltage supply circuit that selectively supplies the second intermediate voltage or low voltage to the low voltage side transistor;
With
The input stage circuit is
A P-channel transistor and an N-channel transistor that are connected in parallel to each other and whose both ends are respectively connected to the control terminals of the high-voltage side transistor or the low-voltage side transistor;
A bias supply circuit that applies a predetermined bias voltage corresponding to selection of a voltage supplied to the high-voltage side transistor and the low-voltage side transistor in the output stage circuit to the control terminals of the P-channel transistor and the N-channel transistor;
Driving circuit of a display device comprising the. A drive circuit of a display device that selectively outputs a positive or negative drive voltage with respect to a predetermined reference voltage in the display device according to an image signal,
An input stage circuit;
According to the pair of output stage control signals output from the input stage circuit,
A driving voltage between a predetermined high voltage and a first intermediate voltage, or
An output stage circuit for outputting a drive voltage between the second intermediate voltage and a predetermined low voltage;
With
The second intermediate voltage is higher than the first intermediate voltage;
The output stage circuit is
First and second transistors connected in series between the predetermined high voltage and the first intermediate voltage;
Third and fourth transistors connected in series with each other between the second intermediate voltage and the predetermined low voltage;
An output selection switch circuit that selectively outputs a voltage at a connection point between the first and second transistors or a connection point between the third and fourth transistors as a drive voltage;
A drive circuit for a display device, comprising: A drive circuit for a display device according to claim 2 ,
The input stage circuit is
A P-channel transistor and an N-channel transistor connected in parallel to each other and having both ends connected to the control terminals of the first and third transistors or the second and fourth transistors,
A bias supply circuit for applying a predetermined bias voltage corresponding to selection of the voltage at the connection point in the output stage circuit to the control terminals of the P-channel transistor and the N-channel transistor;
A drive circuit for a display device, comprising: A drive circuit according to claim 1;
A display unit that displays an image according to the drive voltage output from the drive circuit and the predetermined reference voltage;
A display device comprising:

Images