JP4336573B2 - High voltage pulse generator - Google Patents

Description

  The present invention provides a high voltage having a very short rise time and a very narrow pulse width by releasing electromagnetic energy accumulated in a primary winding of a transformer from a low voltage DC power supply unit with a simple circuit configuration. The present invention relates to a high voltage pulse generation circuit capable of supplying a pulse.

  Recently, techniques for deodorization, sterilization, decomposition of harmful gases, etc. have been applied by plasma generated by high voltage pulse discharge. To generate this plasma, a very narrow pulse of high voltage is applied. A high voltage pulse generation circuit that can be supplied is required.

  As shown in FIG. 6, the conventional high voltage pulse generation circuit 100 includes a DC power source 102, and one inductor 104 and one switch 106 connected in series between both terminals of the DC power source. A load 108 is connected to both ends of the switch 106, and for example, a discharge gap 110 is used as the load 108.

  Here, the circuit operation of the high voltage pulse generation circuit 100 will be described. First, by turning on the switch 106, a voltage substantially the same as the power supply voltage V of the DC power supply 102 is applied to the inductor 104, and the inductance of the inductor 104 is reduced. Assuming L, the current I of the inductor 104 increases linearly with the passage of time at a gradient (V / L).

  When the switch 106 is turned off when the desired electromagnetic energy is obtained, the path of the switch 106 is opened, so that the current I flowing through the inductor 104 is cut off, and the inductor 104 is reversed by the residual electromagnetic energy. An induced voltage is generated. As a result, current is commutated to the discharge gap 110 via the inductor 104, and at this time, a large pulse voltage is generated at both ends of the discharge gap 110, and a discharge is generated in the discharge gap 110.

  According to the high voltage pulse generation circuit 100, the following effects can be obtained.

(1) A high voltage pulse can be easily generated from the low voltage DC power supply 102.

(2) Since the inductance characteristic is used, a pulse voltage with a steep rise can be generated.

(3) The number of parts can be reduced.

Japanese Patent Laid-Open No. 2002-359979

  However, in the high voltage pulse generation circuit 100 as shown in FIG. 6, the voltage applied to the switch 106 greatly depends on the load 108, and therefore when the load 108 is in an open state, when the switch 106 is turned off, There is a risk of applying a high voltage (overvoltage) that would destroy the switch 106. The causes include destruction of the load 108 (electrically open state), abnormal wiring to the load 108 (disconnection, etc.), wiring mistake to the load 108 (human error), and the like.

  Therefore, it is conceivable to connect a snubber circuit in parallel to the switch 106. In addition, if overvoltage is applied when the number of repetitive pulses is as low as several pps, there is no need to consider the power capacity or the like. However, if overvoltage is applied with the number of pulses being several hundred pps or more, energy is reduced. In order to absorb it, a snubber circuit with a large capacity in terms of power is required.

  As the snubber circuit, for example, the snubber circuit 112 shown in FIG. 7 or the snubber circuit 114 shown in FIG. 8 is used. A snubber circuit 112 shown in FIG. 7 includes a diode 116 connected in parallel to the switch 106 and a series circuit 120 of a capacitor 118, and a resistor 122 connected in parallel to the diode 116 of the series circuit 120. .

  In the snubber circuit 112, the energy charged in the capacitor 118 is discharged when the switch 106 is on, and is normally discharged until it reaches 0V. Therefore, charging of the capacitor 118 is always started from 0V. For this reason, the output voltage waveform becomes distorted, and extra energy is required to charge the capacitor 118. In addition, since the charging energy of the capacitor 118 is consumed by the resistor 122, a resistance value having a large power capacity is required. That is, in the snubber circuit 112, in the case of a pulse power supply that requires a steep rise, there arises a problem that the rise of the pulse voltage is reduced.

  On the other hand, the voltage clamp type snubber circuit 114 shown in FIG. 8 is connected in parallel to the series circuit 120 of the diode 116 and the capacitor 118 connected in parallel to the switch 106 and to the capacitor 118 of the series circuit 120. Zener diode 124. Of course, a constant voltage source may be connected instead of the Zener diode 124.

  In the snubber circuit 114, if the capacitor 118 is charged during normal operation, no current flows through the capacitor 118 until the voltage is reached. That is, it is not necessary to always charge the capacitor 118, and generation of a high dv / dt pulse voltage can be realized. Moreover, there is an advantage that unnecessary energy for charging the capacitor 118 is unnecessary.

  However, during abnormal operation, the voltage applied to the switch 106 is clamped to a predetermined voltage (zener voltage), but a large power capacity is required to receive the energy.

  As described above, it is necessary to use circuit elements having a large power capacity as circuit elements constituting the snubber circuits 112 and 114.

  For example, when the voltage clamp type snubber circuit 114 shown in FIG. 8 is used, the rise of the pulse voltage does not change. However, when a surge absorber such as a Zener diode or arrester is used as a circuit element, the surge absorber having a large power capacity is used. Is required, which increases the size of the circuit.

  That is, when a snubber circuit is connected, a circuit element (circuit element having a large power capacity) that can receive only the energy accumulated in the inductor 104 is required, and the size of the high-voltage pulse generation circuit 100 is increased and the price is high. There is a problem of inviting.

  The present invention has been made in consideration of such a problem, and even when the load is electrically opened due to an abnormal state of the load or a human error, the switch is not destroyed, An object of the present invention is to provide a highly reliable high voltage pulse generation circuit.

  Another object of the present invention is to provide a high voltage pulse generating circuit that is inexpensive and can be reduced in size without considering power capacity or the like as a circuit element constituting a snubber circuit. .

  A high voltage pulse generation circuit according to the present invention is a high voltage pulse generation circuit having a transformer and a switch connected in series at both ends of a DC power supply, and outputs are taken out from both ends of the secondary winding of the transformer, A snubber diode and a snubber capacitor connected in series to both ends of the switch or both ends of the transformer, a voltage clamp type snubber circuit composed of a surge absorber connected in parallel to the snubber capacitor, and both ends of the snubber capacitor or the surge absorber An overvoltage detection circuit that detects an overvoltage is provided, and a control circuit that controls at least an ON operation of the switch based on the detection of the overvoltage is provided. Note that a self-extinguishing type or commutation-extinguishing type device can be used as the switch.

  In this case, the overvoltage detection circuit may output a detection signal based on the detection of the overvoltage, and the control circuit may stop the ON operation of the switch based on the input of the detection signal.

  Thereby, for example, when the load is electrically opened due to an abnormal state of the load or a human error, the energy stored in the inductance is absorbed by the snubber capacitor and the surge absorber. That is, when the current based on the energy stored in the inductance is commutated to the path of the snubber capacitor and the snubber capacitor is excessively charged, the voltage is clamped to a predetermined voltage by the surge absorber. In this case, the surge absorber refers to an element capable of suppressing overvoltage such as a semiconductor type surge absorber such as a Zener diode, a varistor, and an arrester. The overvoltage detection circuit may detect the overvoltage based on the voltage across the capacitor by directly monitoring the voltage across the capacitor to detect the overvoltage. Alternatively, the voltage across the capacitor may be divided by a resistor, for example. An overvoltage may be detected. In addition, a capacitor for latching the voltage across the capacitor for a predetermined time may be connected to the output stage of the overvoltage detection circuit.

  The overvoltage is detected by the overvoltage detection circuit, and the on-operation of the switch is stopped through the control circuit. That is, after the overvoltage is detected, the on-operation of the switch is stopped, so that no overvoltage is applied to the switch thereafter. Therefore, in the present invention, the reliability of the high voltage pulse generation circuit can be improved.

  In addition, when a snubber circuit is connected to the high voltage pulse generation circuit and the overvoltage applied to the snubber circuit is detected in the overvoltage detection circuit, it is not necessary to consider repeated application of the overvoltage to the snubber circuit. A circuit element having a small capacity can be used. This leads to a reduction in size and price of a highly reliable high voltage pulse generation circuit. When a snubber circuit is connected to the high voltage pulse generation circuit, a snubber circuit may be connected in parallel to the switch, or a snubber circuit may be connected in parallel to the primary winding of the transformer. .

  In the present invention, when the switch has a switching control circuit that controls on / off of the switch at a predetermined switching frequency, the overvoltage detection circuit outputs a detection signal based on the detection of the overvoltage, and the control circuit The switching frequency of the switching control circuit may be set low based on the input of the detection signal.

  Thereby, when an overvoltage is applied to the switch, the overvoltage is detected by the overvoltage detection circuit, and the switching frequency of the switching control circuit is set low through the control circuit. In other words, after the overvoltage is detected, the frequency of the on operation of the switch is reduced, and the interval from the on operation to the next on operation is increased, so that the number of times the overvoltage is applied to the switch is reduced. Also in this case, it is possible to improve the reliability and size of the high voltage pulse generation circuit.

  As described above, according to the high voltage pulse generation circuit of the present invention, even when the load is electrically opened due to an abnormal state of the load or due to human error, the switch is destroyed. Therefore, the reliability can be improved. Further, when a snubber circuit is connected, it is not necessary to consider power capacity or the like as a circuit element constituting the snubber circuit, and the size can be reduced and the price can be reduced.

  Embodiments of a high voltage pulse generation circuit according to the present invention will be described below with reference to FIGS.

  As shown in FIG. 1, a high voltage pulse generation circuit 10 according to the present embodiment includes a DC power supply 12 (power supply voltage = V), a transformer 14 connected in series at both ends of the DC power supply 12, and one switch 16 The output is taken out from both ends of the secondary winding 18 of the transformer 14. A load 20 is connected to both ends of the secondary winding 18. As the load, for example, a resistive load or a capacitive load (discharge gap or the like) is used.

  The switch 16 may be a self-extinguishing type or commutation-extinguishing type device. In this embodiment, for example, an n-channel type power metal in which an avalanche type diode 22 is built in reverse parallel is used. An oxide semiconductor field effect transistor (hereinafter referred to as a power MOSFET) 24 is used. A gate drive circuit 26 that controls on and off of the power MOSFET 24 is connected to the gate terminal of the power MOSFET 24 via a resistor 28. As the gate drive circuit 26, various amplifiers and inverters for amplifying an input signal can be used.

  Here, the circuit operation of the high voltage pulse generation circuit 10 according to the present embodiment, particularly the circuit operation when the discharge gap 30 is used as the load 20 connected to both ends of the secondary winding 18 is shown in FIG. This will be described with reference to the circuit diagram and the operation waveform diagrams of FIGS. 2A and 2B.

  First, at time t0, for example, a high level switching control signal Sc (see FIG. 3B) is supplied from the gate drive circuit 26 to the gate and source of the power MOSFET 24, and the power MOSFET 24 is turned on from off.

  When the power MOSFET 24 is turned on at time t0, a voltage substantially the same as the power supply voltage V of the DC power supply 12 is applied to the transformer 14, and when the primary inductance of the transformer 14 is L, as shown in FIG. The current Ii flowing through the next winding 32 increases linearly with the passage of time at a gradient (V / L).

  In the period Ton in which the power MOSFET 24 is on, a constant negative voltage is output to both ends of the secondary winding 18. When the power supply voltage of the DC power supply 12 is V and the turns ratio of the transformer 14 (the number of turns n2 of the secondary winding 18 / the number of turns n1 of the primary winding 22) is n, both ends of the secondary winding 18 The level of the output voltage Vout appearing at is -nV.

Current Ii flowing through the primary winding 32, a current Ip (= ETon / L) becomes at time t1, the desired electromagnetic energy (= LIp ^2/2) is obtained, through the gate drive circuit 26 of the low-level switching A control signal Sc (see FIG. 3B) is supplied, and thereby the power MOSFET 24 is turned off.

  At time t1, when the power MOSFET 24 is turned off, the switch 16 is opened, so that the current Ii flowing in the primary winding 32 of the transformer 14 is cut off, and the output voltage Vout is reduced by the induced electromotive force generated in the transformer 14. A pulse Pout with a narrow pulse width that rises steeply and has a positive voltage value as a peak is output. Therefore, ideally, the peak value Vp of the output voltage Vout, that is, the peak value Vp of the positive pulse Pout, is n for the turns ratio of the transformer 14, L for the primary inductance of the transformer 14, and the primary winding of the transformer 14. NL (di / dt) where the cutoff speed of the current Ii flowing through 32 is (di / dt). In practice, however, the current Ii gradually decays while charging the capacitance of the load 20 and the parasitic capacitance component of the switch 16 after the peak time t1 (when the power MOSFET 24 is turned off). The reference level (0A) is reached at time t2 in the period Toff in which the power MOSFET 24 is off. At this time, the output voltage Vout becomes maximum. When the load 20 is a discharge load, the voltage is lowered or clamped on the secondary side of the transformer when the discharge starts, so that the output voltage Vout becomes lower than when the load 20 is opened.

  If energy that cannot be consumed by the load 20 remains at the time t2 (including energy transfer from the secondary winding 18), the current due to this energy is obtained from the primary winding 32 → the DC power supply 12 → the power MOSFET 24. It flows through the path of the diode 22 → the primary winding 32. This current flow becomes a regenerative operation, and the energy remaining in the primary winding 32 is regenerated, which greatly contributes to the improvement of the operation efficiency.

  As shown in FIG. 1, the high-voltage pulse generation circuit 10 according to the present embodiment includes a snubber circuit 34 connected in parallel to the power MOSFET 24 constituting the switch 16, and the snubber circuit 34 in parallel. It has a connected overvoltage detection circuit 36 and a control circuit 38 connected to the subsequent stage of the overvoltage detection circuit 36.

  The snubber circuit 34 includes a series circuit 44 of a diode 40 and a capacitor 42 connected in parallel to the switch 16, and a surge absorber 46 connected in parallel to the capacitor 42 of the series circuit 44. The diode 40 has an anode connected to the drain of the power MOSFET 24 and a cathode connected to the source of the power MOSFET 24. A resistor may be connected instead of the diode 40. The surge absorber 46 connected in parallel to the capacitor 42 of the series circuit 44 refers to a semiconductor type surge absorber such as a Zener diode, an element capable of suppressing overvoltage such as a varistor and an arrester.

  The overvoltage detection circuit 36 is a circuit that outputs a detection signal Sk when an overvoltage is applied to the capacitor 42. Basically, two resistors (first and second resistors) connected in parallel to the surge absorber 46 are provided. A series circuit 52 of resistors 48 and 50) and an inverter 54 made of, for example, CMOS or the like connected to a subsequent stage of the second resistor 50. Of course, a protection circuit 62 including a diode 56, a Zener diode 58, a resistor 60 and the like may be connected between the series circuit 52 and the inverter 54. Further, a low-pass filter may be configured by connecting a capacitor 64 in parallel to the second resistor 50, so that a circuit configuration resistant to noise may be used. This capacitor connection method can also function as a latch circuit for holding the voltage across the second resistor 50 for a certain period of time. In the following description, the case where the capacitor 64 is connected in parallel to the second resistor 50 will be mainly described. Of course, the capacitor 64 may not be connected.

  The inverter 54 outputs a high level voltage when the voltage Vr across the capacitor 64 is equal to or lower than a preset specified voltage Va (see FIG. 3E), and the voltage Vr across the capacitor 64 exceeds the specified voltage Va. In this case, a low level voltage is output. That is, the inverter 54 outputs a pulse signal Si that changes to a high level or a low level in accordance with the voltage Vr across the capacitor 64. In particular, the output period of the low level corresponds to the output period of the detection signal Sk. To do.

  Here, the setting of the prescribed voltage Va will be described. First, in the circuit operation (normal operation) of the high voltage pulse generation circuit 10 when the load 20 is in a normal state and there is no human error, the snubber circuit 34 The maximum voltage applied to the capacitor 42 is defined as a threshold level Vth (see FIG. 3D). The voltage Vr across the capacitor 64 when the voltage Vc across the capacitor 42 is the threshold level Vth is defined as the specified voltage Va.

  The control circuit 38 receives the pulse signal Si (including the detection signal Sk) from the overvoltage detection circuit 36 and the switching command signal (pulse signal) St for instructing the on / off control of the power MOSFET 24, for example, AND. A circuit 66 is included. The AND circuit 66 can also be configured by combining a NAND circuit and an inverter.

  Next, circuit operations of the overvoltage detection circuit 36 and the control circuit 38 will be described with reference to FIGS. 3A to 4F.

  First, an operation (normal operation) when the load 20 is normally connected to both ends of the secondary winding 18 of the transformer 14 will be described with reference to FIGS. 3A to 3F. When the first turn-off is performed in the power MOSFET 24, the voltage Vs corresponding to the output voltage Vout (see FIG. 2A) applied to the load 20 is applied to the power MOSFET 24 as shown in FIG. 3C. Become. In particular, when the load 20 is a discharge load, the load impedance rapidly decreases, and the output voltage Vout may be lowered or the output voltage Vout may be clamped and the output voltage may be lower than when the load 20 is opened. Many. In this normal operation, the power MOSFET 24 is repeatedly turned on and off several times to charge the capacitor 42. The voltage Vc across the capacitor 42 is finally shown in FIG. 3D. As described above, the voltage is substantially the same as the voltage Vs actually applied to the power MOSFET 24, that is, the maximum voltage (threshold level) Vth in the normal operation. After this stage, the voltage Vc across the capacitor 42 is maintained as it is.

  In this normal operation, since the voltage Vc across the capacitor 42 is held at the threshold level Vth, the voltage Vr across the capacitor 64 in the overvoltage detection circuit 36 becomes equal to or lower than the specified voltage Va (see FIG. 3E). Outputs a high level voltage (see FIG. 3F). Therefore, the control circuit 38 outputs a signal having substantially the same waveform as the waveform of the switching command signal St (see FIG. 3A). As a result, the waveform substantially the same as the switching command signal St is output to the gate of the power MOSFET 24. Switching control signal Sc (see FIG. 3B) is supplied.

  Next, an operation (abnormal operation) when the load 20 is in an electrically open state will be described with reference to FIGS. 4A to 4F. When the load 20 is in an electrically open state, the current due to the energy accumulated in the inductance of the transformer 14 is commutated to the path of the capacitor 42 after the power MOSFET 24 is turned off. Due to the commutation of the current, as shown in FIG. 4D, the voltage Vc across the capacitor 42 rises and exceeds the threshold level Vth. When the capacitor 42 is further excessively charged, the surge absorber 46 clamps the voltage Vs applied to the switch 16 and the voltage Vc across the capacitor 42 to a predetermined voltage (zener voltage) Vb, and the voltage increases thereafter. (See FIGS. 4C and 4D).

  In this abnormal operation, the voltage Vc across the capacitor 42 exceeds the threshold level Vth, so the voltage Vr across the capacitor 64 in the overvoltage detection circuit 36 exceeds the specified voltage Va (see FIG. 4E), and the inverter 54 Outputs a low level voltage, that is, a detection signal Sk (see FIG. 4F). Therefore, a low level signal is output from the control circuit 38 regardless of the waveform of the switching command signal St (see FIG. 4A), and the low level switching control signal Sc is supplied to the gate of the power MOSFET 24 (see FIG. 4A). (See FIG. 4B). That is, the on operation of the power MOSFET 24 is stopped and the off operation is maintained.

  During this stop period Tt, the capacitor 42 is discharged, the voltage Vc across the capacitor 42 falls below the threshold level Vth (see FIG. 4D), and the voltage across the second resistor 50 also falls accordingly. The voltage across the capacitor 64 also gradually decreases (see FIG. 4E).

  When the capacitor 64 is not connected in parallel to the second resistor 50, a voltage in which the decrease in the voltage Vc across the capacitor 42 is reflected as it is is supplied to the subsequent inverter 54. By connecting the capacitor 64 to the second resistor 50 as in the above form, the decrease in the voltage across the second resistor 50 is delayed by a time determined by the capacitance value of the capacitor 64 and the inverter 54 Will be entered. That is, the stop period Tt is determined by the capacitance value of the capacitor 64, and the stop period Tt can be freely set by arbitrarily setting the capacitance value of the capacitor 64.

  Therefore, after the stop period Tt elapses, a high level voltage is output from the inverter 54, and a signal having a waveform substantially the same as the waveform of the switching command signal St is output from the control circuit 38. If the load 20 is normally connected before the stop period Tt elapses, normal operation (see FIGS. 4A to 4F) starts after the stop period Tt elapses.

  On the other hand, if the load 20 is still in an electrically open state even after the stop period Tt has elapsed, the voltage Vc across the capacitor 42 again exceeds the threshold level Vth when the power MOSFET 24 is turned off (FIG. 4D As a result, the voltage Vr across the second resistor 50 also exceeds the specified voltage Va (see FIG. 4E). Accordingly, the stop period Tt is entered again. In other words, the period for the on operation is thinned out by the stop period Tt, and the switching frequency of the on / off control by the switching control signal Sc is suppressed low.

  Of course, an alarm circuit is connected to the subsequent stage of the inverter 54, and when the output becomes low level, that is, when the detection signal Sk is output, an alarm is output through the alarm circuit to notify the user of the load abnormality. You may do it. The alarm includes light and sound. In this case, for example, the process of stopping the supply of the switching command signal St by the user and restarting the supply of the switching command signal St by the user when the load 20 is normally connected may be performed.

  As described above, in the high voltage pulse generation circuit 10 according to the embodiment, the overvoltage detection circuit 36 that detects the overvoltage applied to the snubber circuit 34, and the power MOSFET 24 is turned on based on the detection of the overvoltage by the overvoltage detection circuit 36. Since the control circuit 38 for stopping the operation or reducing the switching frequency is provided, for example, when the load 20 is electrically opened due to an abnormal state of the load 20 or a human error, the switch 16 is temporarily provided. An overvoltage is applied, but at this time, the overvoltage detection circuit 36 detects the overvoltage, and the on operation of the switch 16 is stopped through the control circuit 38. That is, after the overvoltage is detected, the on operation of the switch 16 is stopped, so that no overvoltage is applied to the switch 16 thereafter. Therefore, in this embodiment, the reliability of the high voltage pulse generation circuit 10 can be improved.

  In addition, since it is not necessary to consider the repeated application of overvoltage to the snubber circuit 34, it is possible to use a circuit element having a small power capacity as a circuit element constituting the snubber circuit 34. This leads to miniaturization of the high voltage pulse generation circuit 10 having high reliability.

  Here, the power capacity of the snubber circuit 34 will be described by comparing the case where the overvoltage detection circuit 36 and the control circuit 38 are not provided (comparative example) with the present embodiment.

First, in an abnormal operation, when the power applied to the snubber circuit 34 by one off operation of the power MOSFET 24 is P (J) and the switching frequency is f (Hz), the power capacity W1 required for the snubber circuit 34 of the comparative example. Is
W1 = P × f (W)
It is. Usually, the switching frequency is 10 (Hz) or more.

On the other hand, in this embodiment, when the holding time (= stop period Tt) in the capacitor 42 is 1 second, the switching frequency is 1 (Hz). Therefore, the necessary power of the snubber circuit 34 in this embodiment is Capacity W2 is
W2 = P × 1 (W)
It is.

  Therefore, the power capacity of the snubber circuit 34 of the high voltage pulse generation circuit 10 according to the present embodiment is 1 / f of the power capacity of the comparative example.

  In the above example, the case where the snubber circuit 34 is connected in parallel to the switch 16 is shown. However, the primary winding of the transformer 14 is also provided as in the high voltage pulse generation circuit 10a according to the modified example of FIG. The snubber circuit 34 may be connected in parallel to the circuit 32, and the overvoltage detection circuit 36 and the control circuit 38 may be connected to the subsequent stage of the snubber circuit 34. In this case, since the reference potential levels of the signals of the overvoltage detection circuit 36 and the switch 16 are different, it is necessary to insulate the signal using an insulation amplifier or the like. For example, it is preferable to use an inverter 68 in which an insulation amplifier or the like is interposed in an inverter connected to the subsequent stage of the capacitor 64. Of course, the signal may be insulated by using a transformer or an optical signal between the signals.

  Also in this modified example, since the on-operation of the switch 16 is stopped after the overvoltage is detected as in the above-described embodiment, the overvoltage is not applied to the switch 16 thereafter, and the high voltage The reliability of the pulse generation circuit 10a can be improved.

  In addition, since it is not necessary to consider the repeated application of overvoltage to the snubber circuit 34, it is possible to use a circuit element having a small power capacity, and the high voltage pulse generation circuit 10 can be miniaturized.

  The high-voltage pulse generation circuit according to the present invention is not limited to the above-described embodiment, and can of course have various configurations without departing from the gist of the present invention.

It is a circuit diagram which shows the structure of the high voltage pulse generation circuit which concerns on this Embodiment. 2A and 2B are waveform diagrams showing basic circuit operations of the high voltage pulse generation circuit according to the present embodiment. 3A is a diagram illustrating an output waveform of a switching command signal, FIG. 3B is a diagram illustrating an output waveform of a switching control signal in a normal operation, and FIG. 3C is a diagram illustrating a voltage waveform applied to a switch in a normal operation. 3D is a diagram showing a voltage waveform across the capacitor in normal operation, FIG. 3E is a diagram showing a voltage waveform across the second resistor in normal operation, and FIG. 3F is an output signal waveform of the overvoltage detection circuit in normal operation. FIG. 4A is a diagram illustrating an output waveform of a switching command signal, FIG. 4B is a diagram illustrating an output waveform of a switching control signal in an abnormal operation, and FIG. 4C is a diagram illustrating a voltage waveform applied to a switch in the abnormal operation. 4D is a diagram showing a voltage waveform across the capacitor in an abnormal operation, FIG. 4E is a diagram showing a voltage waveform across the second resistor in the abnormal operation, and FIG. 4F is an output signal waveform of the overvoltage detection circuit in the abnormal operation. FIG. It is a circuit diagram which shows the structure of the high voltage pulse generation circuit which concerns on a modification. It is a circuit diagram which shows the structure of the high voltage pulse generation circuit which concerns on a prior art example. It is a circuit diagram which shows an example of a general snubber circuit. It is a circuit diagram which shows a voltage clamp type snubber circuit.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10, 10a ... High voltage pulse generation circuit 12 ... DC power supply 14 ... Transformer 16 ... Switch 18 ... Secondary winding 20 ... Load 26 ... Gate drive circuit 32 ... Primary winding 34 ... Snubber circuit 36 ... Overvoltage detection circuit 38 ... Control circuit 42, 64 ... Capacitor 46 ... Surge absorber 50 ... Second resistor

Claims (4)

A high-voltage pulse generation circuit having a transformer and a switch connected in series at both ends of a DC power supply, and outputs output from both ends of a secondary winding of the transformer,
A snubber circuit of a voltage clamp type comprising a snubber diode and a snubber capacitor connected in series to both ends of the switch, and a surge absorber connected in parallel to the snubber capacitor;
An overvoltage detection circuit for detecting an overvoltage from both ends of the snubber capacitor or the surge absorber;
A high voltage pulse generation circuit comprising: a control circuit that controls at least an ON operation of the switch based on detection of the overvoltage. A high-voltage pulse generation circuit having a transformer and a switch connected in series at both ends of a DC power supply, and outputs output from both ends of a secondary winding of the transformer,
A voltage clamp type snubber circuit comprising a snubber diode and a snubber capacitor connected in series to both ends of the transformer, and a surge absorber connected in parallel to the snubber capacitor;
An overvoltage detection circuit for detecting an overvoltage from both ends of the snubber capacitor or the surge absorber;
A high-voltage pulse generation circuit comprising: a control circuit that controls at least an ON operation of the switch based on detection of the overvoltage. In the high voltage pulse generation circuit according to claim 1 or 2,
When having a switching control circuit for on / off control of the switch at a predetermined switching frequency,
The overvoltage detection circuit outputs a detection signal based on the detection of the overvoltage,
The control circuit sets the switching frequency of the switching control circuit to be low based on the input of the detection signal. In the high voltage pulse generation circuit according to any one of claims 1 to 3,
The switch includes a self-extinguishing type or a commutation-extinguishing type device.

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