JP4324081B2 - 光学デバイス - Google Patents
光学デバイス Download PDFInfo
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- JP4324081B2 JP4324081B2 JP2004337309A JP2004337309A JP4324081B2 JP 4324081 B2 JP4324081 B2 JP 4324081B2 JP 2004337309 A JP2004337309 A JP 2004337309A JP 2004337309 A JP2004337309 A JP 2004337309A JP 4324081 B2 JP4324081 B2 JP 4324081B2
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- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
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- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
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- H01L2924/1532—Connection portion the connection portion being formed on the die mounting surface of the substrate
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
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- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
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- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Electromagnetism (AREA)
- Manufacturing & Machinery (AREA)
- Solid State Image Pick-Up Elements (AREA)
- Light Receiving Elements (AREA)
- Led Device Packages (AREA)
Description
第1の実施形態では、図1、2、3及び4を用いて、光学デバイス100の構造及び製造方法を示す。なお、図1は光学デバイス100の構造を示す図であり、図2はデバイス基板10の構造を示す図であり、図3は光学デバイス100の製造工程を示す断面図であり、図4は光学デバイス100の製造工程の一部を示す断面図である。また、図1(b)は光学デバイス100の裏面図であり、図1(a)は図1(b)におけるIA−IA線における断面図である。図2(a)は図1(b)におけるIA−IA線における断面図であり、図2(b)はデバイス基板10の第1開口3側の平面図である。
まず、光学デバイス100の構造を示す。
まず、図3(a)に示す工程で、配線パターンが形成されたリードフレーム52を封止テープ21の上に載置する。このとき、リードフレーム52の大部分は、その下部にハーフエッチ又はプレスされてなる凹部が設けられ、内部端子部12a及び外部端子部12bとなる部分だけが凹部の底面から下方に突出した構造となっている。これにより、封止テープ21にリードフレーム52が戴置されてなるリードフレーム材が形成される。なお、このリードフレーム52は、後述の工程において分割されて配線部12となる。
第2の実施形態では、図5を用いてデバイス基板20の構造を示す。なお、図5はデバイス基板20の第1開口側の平面図である。
第3の実施形態では、図6を用いてデバイス基板30の構造を示す。なお、図6は光学デバイスの裏面図である。
第4の実施形態では、図7、8及び図9を用いて、光学デバイス400の構造、光学素子チップの性能を検査する方法、光学デバイス400の製造方法を示す。なお、図7は本実施形態における光学デバイス400の構造を示す図であり、図8は光学基板から光学素子チップを製造する方法を示すフロー図、図9は光学デバイス400の製造工程を示すフロー図である。また、図7(b)は光学デバイス400の裏面図であり、図7(a)は図7(b)におけるVIIA−VIIA線における断面図である。
(complementary metal-oxide semiconductor)等のイメージセンサーに搭載される固体撮像素子が形成される光学素子チップやレーザなどに搭載される受光素子が形成される光学素子チップなどとしても用いることができる。
第5の実施形態では、図10を用いてデバイス基板50の構造を示す。なお、図10はデバイス基板50の裏面図である。
本発明は、上記実施形態1から5について、以下のような構成としてもよい。
3,23 第1開口
3a 頂点が直線状に切り落とされてなる部分
4 第2開口
5,35,45 光学素子チップ
5a 光学素子形成面
6 透光性部材
10,20,30,40,50 デバイス基板
12a 内部端子部(第1端子部)
13 第2端子部
14 導電部
23a 頂点が曲線状に切り落とされてなる部分
35a,45a 方向指示用マーカー部
50b 方向指示用貫通孔部
100,400 光学デバイス
Claims (7)
- 表面に対して実質的に垂直に延びて貫通している開口部が形成されているデバイス基板と、
前記開口部の第1開口を覆う透光性部材と、
前記開口部の第2開口を覆って設けられており、光を放射または受光する光学素子が前記透光性部材と対向する面に形成されている光学素子チップと、
一部が前記デバイス基板内に埋め込まれて設けられており、前記光学素子と電気的に接続されている第1端子部及び配線基板と電気的に接続される第2端子部を備えている導電部と、
前記光学素子と前記第1端子部との電気的接続部を封止している封止材と
を備え、
前記第1開口には、当該第1開口の輪郭形状を当該第1開口の略中心点に対して非点対称とする非点対称部が形成されており、
前記非点対称部は、前記デバイス基板における前記第2端子部の配置方向を示す機能を有している、光学デバイス。 - 請求項1に記載の光学デバイスにおいて、
前記デバイス基板は、前記第1開口の略中心点に対して点対称な外形形状を有しており、
前記第2端子部は、前記第1開口の略中心点に対して点対称となるように前記デバイス基板に配置されており、互いに異なる機能を有しており、
前記非点対称部は、前記第1開口の輪郭のうち特定の機能を有する第2端子部の最も近くに位置する部分に形成されており、
前記特定の機能を有する第2端子部は、電圧を光学素子チップへ入力する入力端子又は電圧を配線基板へ出力する出力端子である、光学デバイス。 - 請求項1または2に記載の光学デバイスにおいて、
前記非点対称部は、矩形の少なくとも1つの頂点が直線状に切り落とされてなる、光学デバイス。 - 請求項1または2に記載の光学デバイスにおいて、
前記非点対称部は、矩形の少なくとも1つの頂点が曲線状に切り落とされてなる、光学デバイス。 - 請求項1に記載の光学デバイスにおいて、
前記光学素子チップは、前記光学素子が形成されている光学素子形成面を備え、
前記光学素子形成面は、前記透光性部材と対向しており、
前記光学素子形成面とは反対側の光学素子チップの面に、前記デバイス基板における前記第2端子部の配置方向を示す方向指示用マーカー部が形成されている光学デバイス。 - 請求項5に記載の光学デバイスにおいて、
前記方向指示用マーカー部は、文字及び記号の少なくとも1つからなる、光学デバイス。 - 請求項1に記載の光学デバイスにおいて、
前記デバイス基板には、該デバイス基板における前記第2端子部の配置方向を示す方向指示用貫通孔部が形成されている光学デバイス。
Priority Applications (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004337309A JP4324081B2 (ja) | 2004-11-22 | 2004-11-22 | 光学デバイス |
US11/244,083 US7166908B2 (en) | 2004-11-22 | 2005-10-06 | Optical device |
KR1020050094273A KR20060056848A (ko) | 2004-11-22 | 2005-10-07 | 광학 디바이스 |
CNB2005101085900A CN100521217C (zh) | 2004-11-22 | 2005-10-10 | 光学装置 |
TW094137015A TW200618266A (en) | 2004-11-22 | 2005-10-21 | Optical device |
US11/633,566 US20070075324A1 (en) | 2004-11-22 | 2006-12-05 | Optical device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004337309A JP4324081B2 (ja) | 2004-11-22 | 2004-11-22 | 光学デバイス |
Publications (2)
Publication Number | Publication Date |
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JP2006147915A JP2006147915A (ja) | 2006-06-08 |
JP4324081B2 true JP4324081B2 (ja) | 2009-09-02 |
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Application Number | Title | Priority Date | Filing Date |
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JP2004337309A Expired - Fee Related JP4324081B2 (ja) | 2004-11-22 | 2004-11-22 | 光学デバイス |
Country Status (5)
Country | Link |
---|---|
US (2) | US7166908B2 (ja) |
JP (1) | JP4324081B2 (ja) |
KR (1) | KR20060056848A (ja) |
CN (1) | CN100521217C (ja) |
TW (1) | TW200618266A (ja) |
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SG106050A1 (en) * | 2000-03-13 | 2004-09-30 | Megic Corp | Method of manufacture and identification of semiconductor chip marked for identification with internal marking indicia and protection thereof by non-black layer and device produced thereby |
US7199439B2 (en) * | 2004-06-14 | 2007-04-03 | Micron Technology, Inc. | Microelectronic imagers and methods of packaging microelectronic imagers |
JP4324081B2 (ja) * | 2004-11-22 | 2009-09-02 | パナソニック株式会社 | 光学デバイス |
JP2007235103A (ja) * | 2006-01-31 | 2007-09-13 | Sanyo Electric Co Ltd | 半導体発光装置 |
US7750279B2 (en) * | 2006-02-23 | 2010-07-06 | Olympus Imaging Corp. | Image pickup apparatus and image pickup unit |
TWI320545B (en) * | 2006-10-05 | 2010-02-11 | Chipmos Technologies Inc | Film type package for fingerprint sensor |
US8422243B2 (en) * | 2006-12-13 | 2013-04-16 | Stats Chippac Ltd. | Integrated circuit package system employing a support structure with a recess |
JP2008312104A (ja) * | 2007-06-18 | 2008-12-25 | Panasonic Corp | 固体撮像装置およびその製造方法 |
JP2008263552A (ja) * | 2007-04-13 | 2008-10-30 | Matsushita Electric Ind Co Ltd | 固体撮像装置およびその製造方法 |
JP2008263550A (ja) * | 2007-04-13 | 2008-10-30 | Matsushita Electric Ind Co Ltd | 固体撮像装置およびその製造方法 |
JP2008263553A (ja) * | 2007-04-13 | 2008-10-30 | Matsushita Electric Ind Co Ltd | 固体撮像装置およびその製造方法 |
WO2008132802A1 (ja) * | 2007-04-13 | 2008-11-06 | Panasonic Corporation | 固体撮像装置およびその製造方法 |
JP2008263551A (ja) * | 2007-04-13 | 2008-10-30 | Matsushita Electric Ind Co Ltd | 固体撮像装置およびその製造方法 |
SG152086A1 (en) * | 2007-10-23 | 2009-05-29 | Micron Technology Inc | Packaged semiconductor assemblies and associated systems and methods |
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CN101960608A (zh) * | 2008-03-11 | 2011-01-26 | 松下电器产业株式会社 | 半导体设备以及半导体设备的制造方法 |
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JP2018125672A (ja) * | 2017-01-31 | 2018-08-09 | ソニーセミコンダクタソリューションズ株式会社 | 電子部品、カメラモジュール及び電子部品の製造方法 |
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US5867368A (en) * | 1997-09-09 | 1999-02-02 | Amkor Technology, Inc. | Mounting for a semiconductor integrated circuit device |
US6278193B1 (en) * | 1998-12-07 | 2001-08-21 | International Business Machines Corporation | Optical sensing method to place flip chips |
FR2800909B1 (fr) * | 1999-11-04 | 2003-08-22 | St Microelectronics Sa | Boitier semi-conducteur optique et procede de fabrication d'un tel boitier |
US6337122B1 (en) * | 2000-01-11 | 2002-01-08 | Micron Technology, Inc. | Stereolithographically marked semiconductors devices and methods |
TW454309B (en) | 2000-07-17 | 2001-09-11 | Orient Semiconductor Elect Ltd | Package structure of CCD image-capturing chip |
JP3738824B2 (ja) * | 2000-12-26 | 2006-01-25 | セイコーエプソン株式会社 | 光学装置及びその製造方法並びに電子機器 |
JP2002305261A (ja) * | 2001-01-10 | 2002-10-18 | Canon Inc | 電子部品及びその製造方法 |
KR100514917B1 (ko) * | 2002-05-07 | 2005-09-14 | 미쓰이 가가쿠 가부시키가이샤 | 고체 촬상소자 장착용 패키지 |
US6885107B2 (en) * | 2002-08-29 | 2005-04-26 | Micron Technology, Inc. | Flip-chip image sensor packages and methods of fabrication |
JP3729817B2 (ja) * | 2003-04-28 | 2005-12-21 | 松下電器産業株式会社 | 固体撮像装置の製造方法 |
JP4324081B2 (ja) * | 2004-11-22 | 2009-09-02 | パナソニック株式会社 | 光学デバイス |
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2005
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- 2005-10-07 KR KR1020050094273A patent/KR20060056848A/ko not_active Application Discontinuation
- 2005-10-10 CN CNB2005101085900A patent/CN100521217C/zh not_active Expired - Fee Related
- 2005-10-21 TW TW094137015A patent/TW200618266A/zh unknown
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US7166908B2 (en) | 2007-01-23 |
KR20060056848A (ko) | 2006-05-25 |
JP2006147915A (ja) | 2006-06-08 |
US20070075324A1 (en) | 2007-04-05 |
TW200618266A (en) | 2006-06-01 |
US20060108656A1 (en) | 2006-05-25 |
CN1779983A (zh) | 2006-05-31 |
CN100521217C (zh) | 2009-07-29 |
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