JP4381785B2 - Liquid crystal display - Google Patents

Description

  The present invention relates to a liquid crystal display device, and more particularly to a liquid crystal display device in which a pixel electrode and a counter electrode are formed in a pixel region on one liquid crystal side surface of each substrate that is opposed to each other with liquid crystal interposed therebetween.

This type of liquid crystal display device generates a so-called wide viewing angle characteristic because an electric field is generated in each electrode arranged in each plane that is parallel to the substrate and close to each other to drive the liquid crystal. Can be achieved.
For this reason, it can be set as the structure which does not need to provide electroconductive layers, such as an electrode for driving a liquid crystal, in the liquid crystal side surface of the other board | substrate among each board | substrate.
However, since the conductive layer as described above is not formed on the other substrate, the charge is likely to be accumulated, and it is inevitable that the charge has an adverse effect on the electric field that drives the liquid crystal.
For this reason, the thing using the material which gave electroconductivity to the black matrix formed in this other board | substrate side is known (refer the following patent document).
Japanese Patent Application No. 9-80415

However, in the liquid crystal display device configured as described above, since the black matrix must have its original function, the minimum value of the width is defined, and as a result, the electric field in the pixel is determined by the black matrix. It was pointed out that it affects the distribution of
In particular, in a liquid crystal display device having a configuration in which a pixel electrode and a counter electrode are provided on one substrate side, since the distance between these electrodes can be reduced, the amount of electric field generated between them can also be reduced. It is less susceptible to the black matrix.
The present invention has been made based on such circumstances, and an object thereof is to provide a liquid crystal display device capable of quickly removing charges accumulated on a substrate without affecting the liquid crystal of the pixel. .

  Of the inventions disclosed in this application, the outline of typical ones will be briefly described as follows.

( 1 ) A liquid crystal display device according to the present invention includes, for example, a pixel electrode and a pixel electrode in a pixel region on the liquid crystal side of the first substrate, out of first and second substrates disposed opposite to each other via a liquid crystal. A counter electrode that generates an electric field between the black matrix and a conductive layer formed on the second substrate side of the black matrix on the second substrate. A width that is narrower than the uppermost electrode or wiring formed on the first substrate in a region facing the layer;
A gate signal line is formed on the first substrate, a counter voltage signal line having a width larger than the width of the gate signal line is formed above the gate signal line through an insulating film, and the counter electrode has the The distance from the black matrix to the counter voltage signal line is formed to be connected to the counter voltage signal line, and is smaller than the distance from the black matrix to the conductive layer.

( 2 ) The liquid crystal display device according to the present invention includes, for example, a pixel electrode and a pixel electrode in a pixel region on the liquid crystal side of the first substrate, out of first and second substrates disposed opposite to each other via liquid crystal. A counter electrode that generates an electric field between the black matrix and a conductive layer formed on the second substrate side of the black matrix on the second substrate. A width that is narrower than the uppermost electrode or wiring formed on the first substrate in a region facing the layer;
The distance from the black matrix to the uppermost electrode or wiring formed on the first substrate is smaller than the distance from the black matrix to the conductive layer.

( 3 ) The liquid crystal display device according to the present invention has, for example, a plurality of gate signal lines and a plurality of drain signal lines in the pixel region on the liquid crystal side of one substrate among the substrates arranged to face each other via the liquid crystal. A pixel region defined as a region surrounded by adjacent gate signal lines and drain signal lines, a pixel electrode, a counter electrode that generates an electric field between the pixel electrode, and a conductive layer on the other substrate The conductive layer is formed in the extending direction of the gate signal line, and the distance between the conductive layers is longer than the distance between the gate signal lines in the extending direction of the drain signal line.

  In addition, this invention is not limited to the above structure, A various change is possible in the range which does not deviate from the technical idea of this invention.

The liquid crystal display device configured as described above is provided with a shield electrode having a function of removing charges accumulated in the substrate, and the width can be arbitrarily set, so that the distribution of the electric field of the pixel is not affected. It can be constituted as follows.
Therefore, the charge accumulated on the substrate can be quickly removed without affecting the liquid crystal of the pixel.

Hereinafter, embodiments of a liquid crystal display device according to the present invention will be described with reference to the drawings.
Example 1.
FIG. 1 is a plan view showing an embodiment of a pixel configuration of a liquid crystal display device according to the present invention. This figure shows a view from the liquid crystal side of one of the substrates that are arranged to face each other via the liquid crystal. 1 is a sectional view taken along line AA ′ in FIG. 1, FIG. 3 is a sectional view taken along line BB ′, and FIG. 4 is a sectional view taken along line CC ′.

  In the pixel of the liquid crystal display device in this embodiment, the video signal from the drain signal line DL is supplied to the pixel electrode PX via the thin film transistor TFT which is turned on by the scanning signal from the gate signal line GL. . The pixel electrode PX generates an electric field between the pixel electrode PX and a counter electrode CT to which a counter voltage signal serving as a reference with respect to the video signal is supplied. The light modulation rate of the liquid crystal to which the electric field is applied depends on the amount of the electric field. To be controlled. In addition, a capacitive element Cstg is formed between the pixel electrode PX and the counter electrode CT. The capacitive element Cstg allows the video signal to be relatively transferred to the pixel electrode PX even when the thin film transistor TFT is turned off. Accumulated for a long time.

In FIG. 1, there is a transparent substrate SUB1, and on this liquid crystal side surface, first, gate signal lines GL extending in the x direction and arranged in parallel in the y direction are formed.
These gate signal lines GL surround a rectangular region together with a drain signal line DL described later, and this region is configured as a pixel region.

  Further, in the pixel region, a counter voltage signal line CL is formed close to and parallel to the upper gate signal line GL (not shown) in the drawing. The counter voltage signal line CL is a signal line that supplies a counter voltage signal to a counter electrode CT, which will be described later, and is formed simultaneously with the formation of the gate signal line GL, for example.

  The counter voltage signal line CL has an extending portion that is close to a drain signal line DL, which will be described later, and extends along the traveling direction of the drain signal line DL in the pixel region. The extended end is formed so as to be connected to the extended end of the corresponding extended portion of the counter voltage signal line CL in another pixel region adjacent to the pixel region in the x direction in the drawing.

  Accordingly, the drain signal line DL is formed so as to be surrounded by the counter voltage signal line CL for each pixel region, and it is possible to avoid terminating the electric lines of force from the drain signal line DL to the pixel electrode PX described later. It is like that. This is because when the electric lines of force are terminated to the pixel electrode PX, it becomes noise.

  Thus, the insulating film GI made of, for example, SiN is formed on the surface of the transparent substrate SUB1 on which the gate signal line GL and the counter voltage signal line CL are formed so as to cover the gate signal line GL and the counter voltage signal line CL. Yes.

  The insulating film GI functions as an interlayer insulating film for the gate signal line GL in a region where a drain signal line DL described later is formed, and functions as a gate insulating film in a region where a thin film transistor TFT described later is formed. It has become. Further, the formation region of the capacitive element Cstg has a function as a dielectric film of the capacitive Cstg.

A semiconductor layer AS made of, for example, amorphous Si is formed on the surface of the insulating film GI so as to overlap a part of the gate signal line GL.
This semiconductor layer AS is that of the thin film transistor TFT, and by forming a drain electrode SD1 and a source electrode SD2 on the upper surface thereof, an MIS type transistor having an inverted stagger structure having a part of the gate signal line GL as a gate electrode is formed. can do.

Here, the drain electrode SD1 and the source electrode SD2 are formed simultaneously with the formation of the drain signal line DL.
That is, a drain signal line DL extending in the y direction and juxtaposed in the x direction is formed, and a part of the drain signal line DL is extended to the upper surface of the semiconductor layer AS to form the drain electrode SD1. A source electrode SD2 is formed by being separated from the electrode SD1 by the channel length of the thin film transistor TFT.

Further, the source electrode SD2 extends into the pixel region, and is further divided into, for example, three branches. Each branch portion extends to a portion superimposed on the counter voltage signal line CL. The counter voltage signal lines CL are formed in parallel along the traveling direction.
Each extending end of the source electrode SD2 is a portion that makes contact with a pixel electrode PX described later.

  As described above, the first protective film PAS1 and the second protective film PAS2 are formed on the upper surface of the transparent electrode SUB1 on which the thin film transistor TFT, the drain signal line DL (drain electrode SD1), and the source electrode SD2 are formed. .

Each of these protective films PAS prevents direct contact of the thin film transistor TFT with the liquid crystal to prevent deterioration of the characteristics of the thin film transistor TFT. The first protective film PAS1 is made of, for example, an inorganic material, and the second protective film PAS1. The film PAS2 is made of an organic material.
This is because the inorganic material improves the reliability of the protective film, and the organic material reduces the dielectric constant of the protective film itself.

A pixel electrode PX and a counter electrode CT are formed on the upper surface of the second protective film. In order to improve the aperture ratio of the pixel, for example, ITO (Indium Tin Oxide), ITZO (Indium Tin Zinc Oxide), IZO (Indium Zinc Oxide), SnO ₂ (tin oxide), In ₂ O ₃ (indium oxide) ) Or the like.

First, the pixel electrode PX is composed of a plurality of strip-like electrodes extending in the y direction and arranged in parallel in the x direction. For example, the pixel region forms a group of six electrodes in the pixel region.
Here, each pixel electrode PX has, for example, a pattern in which two pixel electrodes from the left side in the drawing are connected to each other above the counter voltage signal line CL, and the connection portion is positioned in the lower layer. Each extended end of the electrode SD2 is electrically connected through TH1, TH2, and TH3 through through holes penetrating the second protective film PAS2, the first protective film PAS1, and the insulating film GI. .

  By configuring in this way, even if some trouble occurs in the pixel electrode PX in one section among the pixel electrodes PX in each of the three sections, for example, the other remaining remains. There is an effect that can be displayed in the category of.

  It should be noted that the periphery of the through holes TH1, TH2, TH3 connecting the pixel electrode PX and the extended end of the source electrode SD of the thin film transistor TFT has a sufficient area and an overlapping portion of the pixel electrode PX and the extended end is secured. In this portion, the second protective film PAS2, the first protective film PAS1, and the capacitive element Cstg using the insulating film GI as a dielectric film are formed.

  The counter electrode CT is also composed of a plurality of strip-like electrodes extending in the y direction and arranged in parallel in the x direction, and each electrode is positioned so that each electrode of the pixel electrode PX is located between them. It is arranged on both sides. Therefore, it is composed of a total of seven counter electrodes CT.

  Here, out of the counter electrode CT composed of the electrode group, two positioned at both ends thereof are respectively disposed close to the drain signal line DL, and these are adjacent to the pixel region on the left and right in the drawing. In other pixel regions, the pixel electrode is connected in common with the counter electrode CT disposed in proximity to the drain signal line DL. In other words, the drain signal line DL and the central axis thereof are substantially coincident, and the counter electrode CT having a width wider than the drain signal line DL is formed so as to sufficiently cover the drain signal line DL and protrude from the drain signal line DL. Among the portions, the counter electrode CT of the pixel region is formed in the pixel region on the left side in the drawing, and the counter electrode of the pixel region is formed in the pixel region on the right side in the drawing. Thereby, the effect of terminating the electric lines of force from the drain signal line DL to the counter electrode CT is increased.

  Similarly, in order to bring about such an effect also in the gate signal line GL, a conductive layer sufficiently covered with the gate signal line GL is formed, and this conductive layer is formed in the counter electrode CT when the counter electrode CT is patterned. It is formed as a pattern connected to the electrode CT. Therefore, the conductive layer in this portion can also function as a path for supplying a counter voltage signal to the counter electrode CT, and is referred to as a counter voltage signal line CL 'in this specification.

  Then, an alignment film AL is formed on the upper surface of the transparent substrate SUB1 on which the pixel electrode PX and the counter electrode CT are formed in such a manner as to cover the pixel electrode and the counter electrode CT. This alignment film AL is a film that directly contacts the liquid crystal LC and determines the initial alignment direction of the molecules of the liquid crystal.

As shown in FIGS. 2 to 4, the transparent substrate SUB <b> 1 configured as described above is disposed so as to face the transparent substrate SUB <b> 2 via the liquid crystal LC.
A shield electrode SE as a conductive layer is first formed on the surface of the transparent substrate SUB2 on the liquid crystal LC side. The shield electrode SE is formed of, for example, a metal layer, and is provided to scatter or remove charges accumulated in the transparent substrate SUB2. The shield electrode SE is disposed in correlation with the uppermost layer electrode or wiring in a region facing the shield electrode SE on the SUB 1 as shown in an overlapping manner in FIG. In FIG. 1, the counter voltage signal line CL ′ is disposed on the gate signal line GL and is the uppermost electrode on the SUB 1 in the region facing the shield electrode SE. Is arranged. That is, the shield electrode SE needs to be disposed on the counter voltage signal line CL ′. More preferably, it is formed to be narrower than the counter voltage signal line CL ′. If the central axes are aligned, the distance between the end portion of the counter voltage signal line CL ′ and the end portion of the shield electrode SE can be made equal, so that the effect of the shield electrode SE is realized and the display electric field is reduced. More desirable to avoid impact.

  When the uppermost electrode facing the shield electrode SE is another signal line such as the gate signal line GL or the drain signal line DL, the shield electrode SE is connected to the gate signal line GL or the drain signal line DL. It is desirable to satisfy the same relationship as that described above for the counter voltage signal line CL ′.

  Then, the black matrix BM is formed by sufficiently covering the shield electrode SE. The black matrix BM is formed along the traveling direction of the gate signal line GL as shown in an overlapped manner in FIG. 1, and is opposed to the gate signal line GL and the gate signal line GL. The signal line CL is sufficiently covered, and its width direction extends to cover one end portion of the pixel electrode PX in the pixel region in that direction.

  Then, a color filter CF is formed. The color filter CF is composed of, for example, red (R), green (G), and blue (B) filters, and the pixel regions arranged in parallel in the y direction have the same color. Are formed in common, and for example, red (R) color, green (G) color, blue (B) color, red (R) color,... , And the like.

A planarizing film OC is formed on the surface of the transparent substrate on which the black matrix BM and the color filter CF are formed so as to cover the black matrix BM and the color filter CF. The flattening film OC is made of a resin film that can be formed by coating, and is provided to eliminate a step that becomes obvious due to the formation of the black matrix BM and the color filter CF.
An alignment film AL is formed on the surface of the flattening film OC, and this alignment film AL is a film that is in direct contact with the liquid crystal and determines the initial alignment direction of the molecules of the liquid crystal LC.

  In the liquid crystal display device configured as described above, the shield electrode SE is provided on the surface of the transparent substrate SUB2 on the liquid crystal side, whereby electric charges accumulated in the transparent substrate SUB2 are discharged through the shield electrode SE. Yes.

  Here, FIG. 5 is a pattern in which the shield electrode SE is shown in a plan view in relation to the transparent substrates SUB1 and SUB2, and a plurality of shield electrodes SE extending in the x direction in the drawing are arranged in parallel in the y direction. Each end thereof is connected to each other.

  The shield electrode SE is electrically drawn out to the connection wiring layer JL on the transparent substrate SUB1 side through the connection portion CP in one corner of the display region (region formed by the aggregate of pixel regions). ing. This is because the shield electrode SE is set to the ground potential, for example.

  FIG. 6 is a view showing the connection portion CP and its vicinity in a cross section of the connection portion CP. For example, the connection portion CP is formed by being incorporated in a part of the sealant CL that also supports the transparent substrate SUB2 with respect to the transparent substrate SUB1. Through the conductive beads CB, the shield electrode SE on the transparent substrate SUB2 side is drawn out to the connection wiring JL on the transparent substrate SUB1 side.

  However, in the liquid crystal display device shown in this embodiment, the light modulation rate of the liquid crystal is controlled by a slight amount of electric field between the counter electrode CT and the pixel electrode PX that are arranged very close to each other. It is important to consider not to be affected (disturbed) by the shield electrode SE. For this reason, as shown below, the arrangement is devised.

That is, as shown in FIG.
1) The width of the shield electrode SE is W1, and the counter voltage signal line CL ′ (signal line formed integrally with the counter electrode CT) as the uppermost layer electrode on the transparent substrate SUB1 side facing the shield electrode SE is the same. When the width in the direction is W3, W1 <W3 is established. This is because the influence of the shield electrode SE on the transparent substrate SUB1 side is made smaller than the influence of the electrodes or signal lines formed on the transparent substrate SUB1 side. When the uppermost electrode facing the shield electrode SE is another electrode or wiring, it is desirable that the wiring or electrode be W3 to satisfy the same relationship.

  When the uppermost electrode facing the shield electrode SE is the counter electrode CT or the counter voltage signal line CL ′, the potential is stable as a common potential, and thus the potential stabilization effect of the shield electrode SE is achieved. Further, the shield effect can be further improved. Furthermore, since the display electric field is more likely to be terminated at the counter electrode CT or the counter voltage signal line CL ′ arranged at a different position in the display area, the disturbance of the display electric field of the shield electrode SE can be more reliably suppressed. Further, when the potential of the shield electrode SE is set to the same potential as that of the counter electrode CT or the counter voltage signal line CL ′ by electrical connection or the like outside the display area, further improvement in effect is achieved.

2) Further, when the width of the shield electrode SE is W1 and the width of the black matrix BM covering the shield electrode SE in the same direction is W2, W1 <W2 is established. This is because the black matrix BM and the shield electrode SE are configured separately, so that the charge discharge function and the electric field disturbance avoidance function are provided at a part of the formation region of the black matrix BM and at an optimal position. It is a thing. Therefore, the electrical resistance of the material of the black matrix BM> the electrical resistance of the material of the shield electrode SE, and the material of the black matrix BM is, for example, a resin layer, and the material of the shield electrode SE is, for example, It is desirable to use a metal layer.

3) The above-described arrangement of the shield electrode SE and the counter voltage signal line CL ′ and the arrangement of the shield electrode SE and the black matrix BM may be defined independently by the above-described relationship, but in this case, W1 < By defining the relationship satisfying W3 <W2, the optimum configuration for achieving the above-described effect can be obtained.

4) Further, in this pixel region, the distance from the side parallel to the longitudinal direction of the black matrix BM to the shield electrode SE (the shortest side among the longitudinal sides) is set to L2, the counter voltage signal When the distance to the line (the shortest side among the respective sides in the longitudinal direction) is L1, L2> L1 is established. Thereby, the influence on the transparent substrate SUB1 side by the shield electrode SE can be made smaller than the influence of the electrodes or signal lines formed on the transparent substrate SUB1 side.

In order to sufficiently avoid the electric field disturbance due to the shield electrode SE, it is desirable to satisfy the following relationship.
1) It is set by the relationship of the thickness of the shield electrode SE <the thickness of the black matrix BM. 2) Further, the color filter CF is superimposed on at least the side of the display area side of the black matrix BM.

As a result, the electrical distance between the shield electrode SE and the liquid crystal layer can be increased, and electric field disturbance can be avoided more reliably.
Further, preferably, the color filter CF and the planarization film OC are overlapped on the side of the black matrix BM on the display area side.

  In the above-described embodiment, the color filter CF positioned in the vicinity of the black matrix BM is configured to be superimposed only on the side portion excluding the central portion of the black matrix BM. However, the present invention is not limited to this, and it goes without saying that the central portion may be formed. In this case, the electrical distance of the shield electrode SE to the transparent substrate SUB1 can be increased, and the influence on the pixel electrode PX can be reduced. FIG. 7 is a diagram corresponding to FIG. 4 and shows a configuration in which the color filter CF positioned in the vicinity of the black matrix BM covers the entire black matrix BM.

  In the above-described embodiment, the shield electrode SE is formed along the gate signal line GL so as to face the gate signal line GL. For this reason, the shield electrode SE is formed extending in the x direction in the drawing and arranged in parallel in the y direction. However, it goes without saying that it may be formed along the drain signal line DL so as to face not only the gate signal line GL but also the drain signal line DL.

  FIG. 8 is a view corresponding to FIG. 1 and shows the shield electrode SE superimposed on the liquid crystal side surface of the transparent substrate SUB1. Unlike the case of FIG. 1, the shield electrode SE is formed so as to be opposed to the drain signal line DL, and is formed as a lattice-like pattern in which openings are provided in each pixel region on the transparent substrate SUB2 side.

Example 2
FIG. 9 is a plan view showing another embodiment showing another embodiment of the pixel of the liquid crystal display device according to the present invention. FIG. 10 is a cross-sectional view taken along the line AA ′ in FIG. 9, FIG. 11 is a cross-sectional view taken along the line BB ′, and FIG. 12 is a cross-sectional view taken along the line CC ′.
In the pixel shown in FIG. 9, the semiconductor layer of the thin film transistor TFT is formed of polysilicon (p-Si).

  First, a semiconductor layer LTPS made of a polysilicon layer is formed in the formation region of the thin film transistor TFT on the liquid crystal side surface of the transparent substrate SUB1. This semiconductor layer PS is formed by, for example, polycrystallizing an amorphous Si film formed by a plasma CVD apparatus using an excimer laser.

The semiconductor layer PS is formed to have a meandering pattern so as to cross a gate signal line GL described later, for example, twice.
A first insulating film INS made of, for example, SiO 2 or SiN is formed on the surface of the transparent substrate SUB1 on which the semiconductor layer PS is thus formed so as to cover the semiconductor layer PS.

The first insulating film INS functions as a gate insulating film of the thin film transistor TFT and also functions as one of dielectric films of a capacitive element Cstg described later.
On the upper surface of the first insulating film INS, a gate signal line GL extending in the x direction in the drawing and juxtaposed in the y direction is formed. The gate signal line GL has a rectangular shape together with a drain signal line DL to be described later. The pixel area is drawn. In this case, the gate signal line GL travels twice across the semiconductor layer LTPS, and functions as a gate electrode of the thin film transistor TFT in the overlapping portion.

  The gate signal line GL only needs to be a heat-resistant conductive film. For example, Al, Cr, Ta, TiW or the like is selected. In this embodiment, for example, TiW is used as the gate signal line GL.

  After the formation of the gate signal line GL, impurities are ion-implanted through the first insulating film INS, and the region other than the region immediately below the gate electrode GT in the semiconductor layer LTPS is made conductive, so that the thin film transistor TFT The source region and the drain region are formed.

  Further, a counter voltage signal line CL extending in the x direction in the figure, for example, in the center of the pixel region is formed, and a counter electrode CT is formed integrally with the counter voltage signal line CL. The counter electrode CT is composed of two electrode groups extending in the y direction and arranged in parallel in the x direction in the figure, each close to a drain signal line DL described later disposed on both sides of the pixel region. Are arranged.

  A second insulating film GI is formed on the upper surface of the transparent substrate SUB1 so as to cover the counter voltage signal line CL and the counter electrode CT, and the drain signal line DL is formed on the surface of the second insulating film GI. It extends in the direction and is formed side by side in the x direction. The drain signal line DL surrounds the pixel region together with the gate signal line GL.

  Here, when the drain signal line DL is formed, the drain signal line DL is connected to one end of the semiconductor layer LTPS through a through hole previously provided through the second insulating film GI and the first insulating film INS. ing. Thus, the drain signal line DL is connected to one region (referred to as a drain region for convenience) of the thin film transistor TFT, and the connection portion constitutes a drain electrode of the thin film transistor TFT.

  A protective film PAS is formed on the upper surface of the transparent substrate SUB1 so as to cover the drain signal line DL, and a pixel electrode PX is formed on the surface of the protective film PAS. The pixel electrode PX is composed of one electrode extending in the y direction in the drawing in the center of the pixel region, and examples of the material include ITO (Indium Tin Oxide), ITZO (Indium Tin Zinc Oxide), and IZO (Indium). Zinc Oxide), SnO2 (tin oxide), In2O3 (indium oxide), and other light-transmitting conductive films are used. This is for improving the aperture ratio of the pixel.

  Here, the pixel electrode PX is connected to the other end of the semiconductor layer LTPS through a through hole previously formed through the protective film PAS, the second insulating film GI, and the first insulating film INS when the pixel electrode PX is formed. It has become so. As a result, the pixel electrode PX is connected to the other region (source region) of the thin film transistor TFT, and the connection portion constitutes the source electrode of the thin film transistor TFT.

  Further, the pixel electrode PX has an extended portion formed slightly along the traveling direction of the counter voltage signal line CL in the overlapping portion with the counter voltage signal line CL, and in this portion having a relatively large area. A capacitive element Cstg is formed between the counter voltage signal line CL. The dielectric films are the protective film PAS, the second insulating film GI, and the first insulating film INS.

  An alignment film AL is formed on the upper surface of the transparent substrate SUB1 covering the pixel electrode PX. The alignment film AL is in direct contact with the liquid crystal and defines the initial alignment direction of the liquid crystal molecules.

The transparent substrate SUB1 configured as described above is disposed so as to face the transparent substrate SUB2 via the liquid crystal LC as shown in FIGS.
A shield electrode SE is first formed on the surface of the transparent substrate SUB2 on the liquid crystal LC side. The shield electrode SE is provided to scatter or remove the charges accumulated in the transparent substrate SUB2, and as shown in the overlapped manner in FIG. 9, the gate signal line GL and the central axis substantially coincide with each other. The width is smaller than that of the gate signal line GL.

  Then, the black matrix BM is formed by sufficiently covering the shield electrode SE. The black matrix BM is formed so that the gate signal line GL and the drain signal line DL are sufficiently opposed to each other as shown in FIG. 9, and in other words, the black matrix BM has an opening in the central portion excluding the periphery of the pixel region. Is formed by a pattern provided.

  Then, a color filter CF is formed. The color filter CF is composed of, for example, red (R), green (G), and blue (B) filters, and the pixel regions arranged in parallel in the y direction have the same color. Are formed in common, and for example, red (R) color, green (G) color, blue (B) color, red (R) color,... , And the like.

  A planarizing film OC is formed on the surface of the transparent substrate on which the black matrix BM and the color filter CF are formed so as to cover the black matrix BM and the color filter CF. The flattening film OC is made of a resin film that can be formed by coating, and is provided to eliminate a step that becomes obvious due to the formation of the black matrix BM and the color filter CF.

  An alignment film AL is formed on the surface of the flattening film OC. The alignment film AL is a film that directly contacts the liquid crystal, and the initial alignment direction of the molecules of the liquid crystal LC is determined by rubbing formed on the surface. It has become.

In FIG. 9, the shield electrode SE as a conductive layer is configured such that the distance between adjacent shield electrodes SE is larger than the distance between adjacent gate signal lines GL.
Further, the distance between the adjacent shield electrodes SE is configured to be larger than the distance between the sides of the adjacent black matrix BM.

Even in the case of such a configuration, as in the case of the configuration shown in FIG. 1, charges accumulated in the transparent substrate SUB1 can be quickly removed by the shield electrode SE, and the pixel region can be obtained by the shield electrode SE. The electric field generated inside is not affected.
Here, the positional relationship between the shield electrode SE and another material layer such as a black matrix can be applied as it is.

  FIG. 13 is a diagram corresponding to FIG. 12, and shows a configuration in which the color filter CF positioned in the vicinity of the black matrix BM covers the entire black matrix BM. As described above, the electrical distance of the shield electrode SE to the transparent substrate SUB1 can be increased, and the influence on the pixel electrode PX can be reduced.

Example 3
FIG. 14 is a plan view showing another embodiment of the pixel configuration of the liquid crystal display device according to the present invention and corresponds to FIG. Further, FIG. 15 shows a cross-sectional view taken along line DD ′ of FIG.
9 differs from the case of FIG. 9 in that the shield electrode SE formed on the transparent substrate SUB2 side is formed so as to face the counter voltage signal line CL, not the gate signal line GL.

In the case of this embodiment, the black matrix BM has a pattern in which an opening is provided in the central portion excluding the periphery of the pixel region as in the case of FIG.
Therefore, the shield electrode SE is not covered with the black matrix BM in the pixel region, and the influence (electric field disturbance) of the shield electrode SE on the electric field in the pixel region is larger than that in the case of FIG. Is inevitable.

Therefore, as shown in FIG. 15, the width of the shield electrode SE is W1, the width of the counter voltage signal line CL is W3, and the counter voltage signal is output from one side of the sides parallel to the traveling direction of the shield electrode SE. The distance to the side in the same direction of the line CL is L3, and the thickness of the transparent substrate SUB2 in the region where the black matrix BM is not formed is the thickness of the laminate of the color filter CF, the planarization film OC, and the alignment film AL. If
[Equation 1] W3> W1 and L3> d2 (1)
The positional relationship is defined so as to satisfy the relationship. As a result, the shield electrode SE can be disposed far away electrically, and the influence of the shield electrode SE on the electric field in the pixel region can be suppressed.

Also, if the As another example, the transparent substrate SUB1 side, the second insulating film GI thickness a laminate to the orientation film AL of the liquid crystal surface from of which covers the counter voltage signal line CL set to d 1, [Expression 2] W3> W1 and L3> (d2 + d1) (2)
These positional relationships may be defined so as to satisfy the relationship. This is because, in this case, the shield electrode SE can be positioned far from the signal line with respect to the effective region.

  Further, it is needless to say that the relationship expressed by the above equation (1) or the relationship expressed by the above equation (2) regarding the shield electrode and the lower signal line may be applied to a region having a light shielding layer such as a black matrix. This is because the effect can be further improved.

Example 4
FIG. 16 is a plan view showing another embodiment of the pixel of the liquid crystal display device according to the present invention and corresponds to FIG. Further, a cross-sectional view taken along the line AA ′ in FIG. 16 is shown in FIG. 17, and a cross-sectional view taken along the line BB ′ is shown in FIG.

  In FIG. 16, the shield electrode SE is formed so as to face the gate signal line GL, for example, and the structure of the pixel region is the same except that the structure of the pixel electrode PX and the counter electrode CT is different. .

In this case, each of the pixel electrode PX and the counter electrode CT is formed of a light-transmitting conductive film such as ITO.
In other words, the counter electrode CT is formed between the first insulating film INS and the second insulating film GI, and in the pixel region in the whole area, in this embodiment, another pixel region adjacent in the x direction. The counter electrodes CT are connected to each other.

Further, the pixel electrode PX is formed on the upper surface of the protective film PAS, and is formed by an electrode group formed by arranging a plurality of electrodes extending in the x direction in the drawing in a direction intersecting the extending direction.
In addition, each electrode of the pixel electrode PX shown in the embodiment is formed by slightly tilting each electrode on both sides of a virtual line running in the y direction in the center of the pixel region. It is a pattern. This is because a so-called multi-domain method is adopted.

  The electrodes of the pixel electrode PX are electrically connected to each other by forming a pattern having a frame around the electrode group. In a part of the frame, the protective film PAS, the second insulating film GI, the first It is connected to the source electrode of the thin film transistor TFT through a through hole formed through one insulating film INS.

  A pixel having such a configuration has a counter voltage signal line CL formed of, for example, a metal layer because the counter electrode CT is connected to that of the adjacent pixel region and has the function of the counter voltage signal line CL itself. For this reason, the portion facing the gate signal line GL is selected as the position where the shield electrode SE is disposed. In this case, it may be formed so as to face the drain signal line DL, or may be formed so as to face the gate signal line GL and the drain signal line DL.

  Each of the embodiments described above may be used alone or in combination. This is because the effects of the respective embodiments can be achieved independently or synergistically.

It is a top view which shows one Example of the pixel of the liquid crystal display device by this invention. It is sectional drawing in the A-A 'line of FIG. It is sectional drawing in the B-B 'line of FIG. It is sectional drawing in the C-C 'line of FIG. It is the top view which showed the shield electrode by the relationship with the board | substrate. It is sectional drawing which showed the part which pulls out a shield electrode to another board | substrate different from the board | substrate with which it is formed. It is sectional drawing which shows the other Example of the pixel of the liquid crystal display device by this invention. It is a top view which shows the other Example of the pixel of the liquid crystal display device by this invention. It is a top view which shows the other Example of the pixel of the liquid crystal display device by this invention. FIG. 10 is a cross-sectional view taken along line A-A ′ of FIG. 9. FIG. 10 is a cross-sectional view taken along line B-B ′ of FIG. 9. FIG. 10 is a cross-sectional view taken along line C-C ′ of FIG. 9. It is sectional drawing which shows the other Example of the pixel of the liquid crystal display device by this invention. It is a top view which shows the other Example of the pixel of the liquid crystal display device by this invention. It is sectional drawing in the D-D 'line | wire of FIG. It is a top view which shows the other Example of the pixel of the liquid crystal display device by this invention. It is sectional drawing in the A-A 'line | wire of FIG. It is sectional drawing in the B-B 'line | wire of FIG.

Explanation of symbols

SUB ... Transparent electrode, GL ... Gate signal line, DL ... Drain signal line, CL ... Counter voltage signal line, TFT ... Thin film transistor, PX ... Pixel electrode, CT ... Counter electrode, GI ... Insulating film, PAS ... Protective film, BM ... Black matrix, FIL ... color filter, OC ... flattening film, SE ... shield electrode

Claims (3)

Of the first and second substrates disposed opposite to each other through the liquid crystal, the pixel electrode on the liquid crystal side of the first substrate has a counter electrode that generates an electric field between the pixel electrode and the pixel electrode,
A black matrix on the second substrate, and a conductive layer formed on the second substrate side from the black matrix;
The conductive layer is formed to be narrower than the uppermost electrode or wiring formed on the first substrate in a region facing the conductive layer ,
A gate signal line is formed on the first substrate, a counter voltage signal line having a width larger than the width of the gate signal line is formed above the gate signal line through an insulating film, and the counter electrode has the It is formed and is connected to the counter voltage signal line, the distance from the black matrix to the counter voltage signal line, a liquid crystal display you characterized in that is smaller than the distance from the black matrix to said conductive layer apparatus. Of the first and second substrates disposed opposite to each other through the liquid crystal, the pixel electrode on the liquid crystal side of the first substrate has a counter electrode that generates an electric field between the pixel electrode and the pixel electrode,
A black matrix on the second substrate, and a conductive layer formed on the second substrate side from the black matrix;
The conductive layer is formed to be narrower than the uppermost electrode or wiring formed on the first substrate in a region facing the conductive layer ,
The distance to the electrode or wiring of the uppermost layer formed on the said black matrix first substrate, the liquid you characterized in that is smaller than the distance from the black matrix to said conductive layer crystal display device . Of each substrate arranged opposite to the liquid crystal, the pixel region on the liquid crystal side of one substrate has a plurality of gate signal lines and a plurality of drain signal lines, and is surrounded by adjacent gate signal lines and drain signal lines. A pixel electrode in a pixel region determined as a region, and a counter electrode that generates an electric field between the pixel electrode,
Having a conductive layer on the other substrate;
The conductive layer is formed in the gate signal line extending direction;
The liquid crystal display device, wherein a distance between the conductive layers is larger than a distance between the gate signal lines in the extending direction of the drain signal lines.

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