JP4227149B2 - Information storage method for electronic control unit - Google Patents

Description

  The present invention relates to an information storage method for an electronic control device including an electrically erasable nonvolatile memory provided with a plurality of storage areas and a volatile memory.

  Conventionally, in an electronic control device for an automobile, there are stored information such as a control learning value and a failure self-diagnosis result that should be retained even when the vehicle is turned off, and these are stored in a volatile memory. Therefore, it is necessary to always supply power from the vehicle battery in order to retain the stored contents of the memory even when the power is turned off.

  In response to this, demands for reducing battery capacity from the standpoint of vehicle weight reduction, etc. have led to demands for reduced power consumption during standby after power is turned off, and these stored information can be electrically erased when power is turned off. The information is recorded in a volatile semiconductor memory (EEPROM), and the stored information is read and used when the power is turned on.

  In addition, when a normal EEPROM is used, it is generally necessary to mount a semiconductor element different from the control microcomputer on the control board. By storing in a part of the flash memory used for storage, it is possible to reduce costs and improve reliability.

  However, in general, in the case of a nonvolatile semiconductor memory, there is an upper limit to the number of times data can be rewritten. Since it becomes impossible to store data, it is necessary to limit the number of writes to the same memory cell as much as possible, and even if information cannot be updated normally after a predetermined number of rewrites, past information is completely lost. You must avoid things that break.

  As a countermeasure against these problems, for example, there is an information storage method in which a plurality of storage areas are provided on a memory as described in Patent Document 1, a storage area is selected based on the value of a control counter, and data is sequentially updated. Are known. In this method, data update processing is performed in a time-sharing manner in a plurality of storage areas, so that the total number of updates can be increased while reducing the number of writes to a certain storage area.

Japanese Patent Laid-Open No. 11-144478

  However, in the information storage method of Patent Document 1, it is necessary to provide a control counter separately from the storage area, and when the value of the control counter is destroyed for some reason, it becomes impossible to guarantee reading of all data. Therefore, there is a problem in terms of data retention reliability.

  As a countermeasure against this problem, a technique of increasing the reliability of the control counter by providing redundancy, such as providing a plurality of the control counters, can be considered. However, there may be inconveniences such as a large storage area for the control counter and a complicated algorithm for selecting from a plurality of counters.

  The present invention has been made paying attention to the above problems, and an object thereof is to provide an information storage method of an electronic control device capable of improving the reliability of information retention by a nonvolatile memory.

The present invention comprises an electrically erasable non- volatile memory provided with a plurality of storage areas, and a volatile memory having at least one storage area, the storage area being relative to stored data.
In an information storage method for an electronic control unit, comprising: a counter for storing a value for determining the age of data; a data storage unit for storing data; and a check data unit for storing check data for checking the validity of the stored data ,
a) The following steps for transferring data from the non-volatile memory to the volatile memory:
Selecting the storage area of the nonvolatile memory based on the check data stored in the check data section and the validity check result based on the value of the counter, and data from the storage area related to the nonvolatile memory And storing data in the storage area of the volatile memory
b) The following steps for transferring data from the volatile memory to the nonvolatile memory The storage area of the nonvolatile memory determined to be invalid based on the check data, or there is no area determined to be invalid Selecting the storage area of the non-volatile memory that is determined to be the oldest based on the value of the counter, and
Storing data from the storage area of the volatile memory in a selected storage area of the nonvolatile memory;
Each time information is recorded in the storage area of the non-volatile memory, a value increased from the counter value of the largest storage area of the storage area determined to be valid based on the check data, and the check data Calculating and recording in the storage area
Is included .

  According to the present invention, when a plurality of areas are provided in the nonvolatile memory and information is stored when the power is shut off, the validity is also verified by including the counter for determining whether the information is new or old. It is possible to reliably select the latest one from among the storage areas and use it for control.

  Furthermore, since an attempt is made to update from the invalid storage area or from the area storing the oldest information when there is no invalid area, the storage cell of the nonvolatile memory is physically destroyed and the data cannot be updated. Even if the data storage process is interrupted due to an unexpected situation, the data normally recorded last can always be read out and used for control.

Embodiment 1 FIG.
Embodiment 1 of the present invention will be described below with reference to the drawings. In the present embodiment, the present invention is embodied as a transmission control ECU for performing a shift control of an in-vehicle continuously variable transmission. The configuration and operation of the ECU will be described in detail below.

  FIG. 1 is a diagram showing a schematic configuration of the ECU. As shown in FIG. 1, the ECU 1 includes a microcomputer (microcomputer) 2, and the microcomputer 2 includes a CPU 3, a RAM 4, and a flash ROM 5. The flash ROM 5 stores control programs and control data, and a part of the flash ROM 5 is assigned a plurality of storage areas for storing control learning values and failure self-diagnosis results. The CPU 3 controls the line pressure and the gear ratio of the continuously variable transmission according to the control program stored in the flash ROM 5. Further, the ECU has a power holding circuit 6 and can hold the power until the microcomputer 2 sends a power-off command to the power holding circuit 6 after the CPU 3 receives a power-off signal from the power switch SW. . .

  Next, the configuration of the flash ROM 5 and RAM 4 will be described in detail with reference to FIG. As shown in FIG. 2, the flash ROM 5 is divided into a plurality of areas. These storage areas are, for example, areas A, B, and C. These areas A, B, and C are set to have the same size. Has been. Further, a mirror area having a size equal to one of the areas A, B, and C set in the flash ROM 5 is set in the RAM 4.

  Further, each of the areas A, B, C of the flash ROM 5 and the mirror area of the RAM 4 has the same configuration as shown in FIG. 3, and an area selection counter 7 which is increased every time data is rewritten, and control learning. It comprises a data storage unit 8 such as values and failure self-diagnosis results, and a check data unit 9 that stores check data for validity verification of the entire area consisting of the counter 7 and the data storage unit 8.

  Next, the stored data selection procedure when the power is turned on and the data storage procedure when the power is turned off by these configurations will be described in detail with reference to the flowcharts of FIGS.

  The CPU 3 executes the initialization process procedure of FIG. 4 when the power is turned on. First, in the process 11, the validity verification is performed based on the check data portion 9 of each area for each of the storage areas A, B, C of the flash ROM 5 and the mirror area of the RAM 4. Specifically, the cyclic redundancy check (CRC) value of the part constituted by the counter 7 and the data storage unit 8 is calculated, and is effective when the result value matches the value of the check data unit 9, and when it does not match Is invalid because it is assumed that the storage process has not been completed normally or the stored data is garbled. At this time, the verification result is stored in a variable on the RAM for use in selecting a data storage area when the power is shut off.

  Next, in process 12, among the areas A, B, and C of the flash ROM 5 determined to be valid, the area having the largest value of the counter 7 set in each area is selected. It can be considered that this area stores the latest valid data among the areas A, B, and C stored in the flash ROM 5.

Further, when it is determined that the mirror area data is valid, the counter value of the area selected from the areas A, B, and C of the flash ROM 5 is compared with the counter value of the mirror area to determine whether they are equal. If the counter value of the mirror area is smaller, the area selected from the flash ROM 5 is selected. If the counter value in the mirror area is larger, or if it is not determined that any of the areas A, B, and C is valid, the data stored in the mirror area is correctly stored in the flash ROM at the previous power shutdown. This means that the data in the RAM 4 remains without being destroyed, that is, that the power is turned on again during the storing process after the power is shut off, so the storage data in the mirror area is selected.
When any one of the areas A, B, and C of the flash ROM 5 is selected, the storage data in the selected area is copied to the mirror RAM in processing 13.

  In the validity verification of the process 11, if neither area is determined to be valid, an initialization request flag is set in the process 14 to indicate to the control program that the data in the mirror area is invalid. The control program refers to this flag, and if it is set, sets an appropriate initial value before using the data in the mirror area, and then clears the initialization request flag. Thereby, it is possible to prevent abnormal data from being used for control.

  With the above procedure, the latest valid data is selected from the stored data stored in the flash ROM 5 and RAM 4, and the control program uses the value of the data stored in the mirror area for various controls. You can refer to and update at any time.

  Next, a data storage process that is executed before the power relay is shut off when the CPU 3 accepts the power cutoff signal will be described with reference to the flowchart of FIG.

  First, in process 21, the CPU 3 increases the value of the counter 7 set in the mirror area. After that, in the process 22, a check value for verifying the validity of the entire part composed of the counter 7 and the data storage unit 8 is calculated and stored in the check data unit 9. At this time, the validity of the data in the mirror area is guaranteed, so that it is possible to perform a restart process when power-on is determined.

  After that, in processing 23, an area for storing data in the mirror area is selected from areas A, B, and C of the flash ROM 5. First, if there is a flash ROM area in which data is invalid, it is selected based on the result of the validity verification in the process 11 at the time of power-on stored in a variable on the RAM. If it is invalid, an arbitrary area is selected. Next, when there is no invalid area, an area having the smallest value of the counter 7 set in each area is selected.

  Finally, the process 24 for storing the data in the mirror area in a batch is executed for the selected flash ROM area, and after completion, a shutoff command is sent to the power holding circuit 6 and the program is terminated.

  In the first embodiment, the case where the flash ROM is applied as the nonvolatile memory has been described. However, the present invention is not limited to this. For example, another nonvolatile memory such as an EEPROM or MRAM is used as the storage medium. Needless to say, this is also applicable.

  In the first embodiment, the case where the present invention is applied to the shift control ECU of the in-vehicle continuously variable transmission has been described. However, the present invention is not limited to this. It goes without saying that is applicable.

  Furthermore, in the first embodiment, the case where the calculation result of the cyclic redundancy check is used for the validity verification has been described. However, other verification methods can also be used.

  In the first embodiment, the flash ROM storage area is divided into the three areas A, B, and C. However, depending on the resource situation, two areas can be applied, and more than four areas can be used. When applied, the update frequency per area decreases, so that the lifetime of the nonvolatile memory can be extended.

It is a block diagram which shows the outline | summary of ECU in Embodiment 1 of this invention. FIG. 2 is a diagram showing a configuration of a storage area of a flash ROM and a mirror RAM in the first embodiment. FIG. 3 shows a configuration of each storage area in the first embodiment. 3 is a flowchart showing an initialization processing procedure in the first embodiment. 3 is a flowchart showing a power-off process procedure in the first embodiment.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... ECU (electronic control apparatus), 2 ... Microcomputer, 3 ... CPU, 4 ... RAM, 5 ... Flash ROM, 6 ... Power supply holding circuit, 7 ... Counter, 8 ... Data storage part, 9 ... Check data part.

Claims (3)

An electrically erasable nonvolatile memory provided with a plurality of storage areas, and a volatile memory having at least one storage area,
The storage area is
A counter that stores a value that determines the relative age of the stored data;
A data storage unit for storing data, and
In an information storage method for an electronic control device having a check data section for storing check data for checking the validity of stored data,
a) The following steps for transferring data from the non-volatile memory to the volatile memory:
Selecting the storage area of the nonvolatile memory based on the check data stored in the check data section and the validity check result based on the value of the counter, and data from the storage area related to the nonvolatile memory And storing data in the storage area of the volatile memory
b) The following steps for transferring data from the volatile memory to the nonvolatile memory The storage area of the nonvolatile memory determined to be invalid based on the check data, or there is no area determined to be invalid Selecting the storage area of the non-volatile memory that is determined to be the oldest based on the value of the counter, and
Storing data from the storage area of the volatile memory in a selected storage area of the nonvolatile memory;
Each time information is recorded in the storage area of the non-volatile memory, a value increased from the counter value of the largest storage area of the storage area determined to be valid based on the check data, and the check data Calculating and recording in the storage area
An information storage method for an electronic control device , comprising :   The information storage method of the electronic control device according to claim 1, wherein the check data indicates a calculation result by a cyclic redundancy check.   The information storage method of the electronic control device according to claim 1, wherein the nonvolatile memory is a flash memory.

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