JP4273129B2 - Linear power amplifier and digital predistorter setting method thereof - Google Patents

Description

  The present invention relates to a linear power amplifier for a radio communication transmitter, for example, and a setting method of a digital predistorter thereof.

As one of nonlinear distortion compensation methods for a microwave power amplifier, there is a predistortion method by digital signal processing (hereinafter referred to as a digital predistortion method) (for example, Non-Patent Document 1). A feature of the digital predistortion method is that a complicated analog circuit is not required by enabling a predistorter configuration by digital signal processing. Conventional linear amplifiers are realized mainly by analog circuits such as feedforward amplifiers and negative feedback amplifiers. The predistorter is similarly realized by an analog circuit (for example, Non-Patent Document 2).
However, the linearization circuit technology based on the analog circuit generally requires advanced adjustment technology. Further, in order to enable the transmitter to be reduced in size and economy including the modulation circuit, it is necessary to configure the analog circuit simply and easily. In this respect, a digital predistorter that performs linearization processing by digital signal processing has advantageous features compared with a predistorter that uses a conventional analog circuit. Further, since there is no analog circuit for linearization such as an auxiliary amplifier like a feedforward amplifier, an amplifier using a predistorter may be able to achieve high efficiency amplification.

To date, a configuration using a look-up table having a table for linearizing the nonlinear characteristics of an amplifier in advance has been known for a digital predistorter (for example, Non-Patent Document 3). A digital predistorter having a look-up table feeds back an amplifier output signal and updates a set value of the look-up table so that a distortion component becomes a design value or less. Thus, it is known that distortion compensation can be performed by digital signal processing, and the amount of distortion compensation is about 15 dB or less (Non-Patent Document 4).
In order to perform amplification as efficiently as possible with the power amplifier, it is necessary to increase the distortion compensation amount and compress the output back-off of the amplifier. FIG. 1 shows the relationship between output back-off from 1 dB gain compression point and efficiency. The examination condition was an ideal class B bias. In order to increase efficiency from FIG. 1, it is necessary to increase the amount of distortion compensation that enables output back-off compression.
FIG. 2 shows the relationship between the distortion compensation amount and the amplitude and phase deviation of the third-order distortion component. In order to achieve at least a distortion compensation amount of 30 dB or more, a digital predistorter that achieves an amplitude deviation within ± 0.2 dB and a phase deviation within ± 2 deg is required. As shown in FIG. 2, the digital predistorter is required to achieve predetermined amplitude deviation and phase deviation with respect to aging, temperature change, and the like.

In a conventional look-up table type digital predistorter, in order to achieve a distortion compensation amount (distortion improvement amount) larger than the current value, it is highly accurate to maintain a high distortion improvement amount as understood from FIG. A lookup table needs to be prepared. In addition, when the nonlinear characteristic of the power amplifier slightly changes due to temperature deviation or aging, a control system that monitors the amplifier output signal and corrects the lookup table is required.
However, in a digital predistorter using a look-up table, the relationship between the distortion component and the set look-up table value is unclear, and moreover, a slight change in the nonlinear characteristics of the amplifier due to aging and temperature changes is corrected. The method was not shown.
There is a predistorter based on a power series model as a method that can compensate distortion components with high accuracy. Up to now, it has been realized by an analog circuit, and the distortion improvement amount has reached 30 dB or more (for example, Non-Patent Document 5). It is known that the power series model accurately models the nonlinear characteristics of an amplifier (for example, Non-Patent Document 6). In a distortion compensation method in a digital predistorter using a power series model, it is necessary to extract a signal for correcting each order coefficient from an amplifier output signal. So far, in Patent Document 1, the correction signal is extracted by removing the fundamental wave and each distortion component from the transmission signal. As a method of extracting a power series model correction signal in a simpler manner, there is a method of using a carrier wave of two waves or the like as a pilot signal (see Non-Patent Document 5).

In addition to the above-described temperature dependence of the nonlinear characteristics of the power amplifier and compensation for temperature changes, improvements have also been proposed for the frequency dependence of the nonlinear characteristics. In order to perform good distortion compensation for a wideband signal, in the conventional predistorter, Patent Document 2 reduces the path difference between the main signal path and the distortion signal path, and Patent Document 3 discloses an input signal line. It was supported by putting a phase equalizer on the side. The reason for using the above method is to change the distortion generated by the predistorter with a constant gain and a constant phase over a wide frequency band.
However, as the frequency band to be amplified becomes wider, for example, as shown in FIG. 3, the frequency deviation of the gain characteristic and phase characteristic of the power amplifier increases, and this influence cannot be ignored when a signal is amplified. Therefore, if the amplitude and phase of the distortion generated by the predistorter are changed constantly over the entire frequency band, the distortion can be set to a level and an antiphase that cancels the distortion generated by the power amplifier over the entire frequency band. Can not. Therefore, in order to perform highly accurate distortion compensation, the frequency-to-amplitude and frequency-to-phase characteristics of the distortion generated by the predistorter must be changed so as to cancel out the frequency deviation of the gain and phase characteristics in the power amplifier. I must. As a method for changing the frequency-to-amplitude characteristics and the frequency-to-phase characteristics of distortion generated by a predistorter, Patent Document 4 uses an equalizer.

For example, in the conventional predistorter disclosed in Patent Document 5, the output of the analog distortion generator is divided into a high frequency side and a low frequency side of the fundamental wave output signal, and the amplitude and phase are independently adjusted to compensate for distortion. Gives frequency characteristics. Further, in Patent Document 6, an amplitude frequency characteristic adjusting circuit composed of a band pass filter and a vector adjuster is inserted behind the analog distortion generating circuit to give frequency characteristics to the compensation distortion.
When the intermodulation distortion component of the amplifier output is extracted with a narrowband filter and each order coefficient of the analog predistorter is corrected, the feedback system of the pilot signal in the analog predistorter is sufficiently short for the transmission signal. Correction of the coefficient of the analog predistorter was easily possible. On the other hand, in the look-up table type digital predistorter, it is necessary to digitize the pilot signal monitored from the amplifier output, and there is a problem of delay due to the feedback system as compared with the analog predistorter.

In the analog predistorter, the pilot signal is constituted by an oscillator using an analog circuit. In contrast, a digital predistorter needs to generate a pilot signal in the baseband by digital signal processing. The specific configuration method of how the pilot signal and the transmission signal are converted into a signal by a digital predistorter and converted into a digital signal is not shown.
Thus, the device configuration method in the digital predistorter using the pilot signal is unclear. In a digital predistorter, there has been a demand for a simple configuration method that always achieves a high distortion compensation amount with respect to aging and temperature change while achieving a high distortion compensation amount.
Also, the method of changing the frequency characteristic of distortion of the predistorter with the equalizer shown in Patent Document 7 equalizes the frequency characteristic of the feedback system that controls the predistorter. It does not take into account the frequency deviation of the gain characteristic and the frequency versus phase characteristic. Therefore, a predistorter capable of adjusting the frequency versus amplitude characteristic and the frequency versus phase characteristic of the distortion generated by the predistorter is required so as to cancel the frequency deviation of the gain characteristic and the phase characteristic in the power amplifier.

When the input signal is a signal having a discrete spectrum on the frequency axis, such as two carrier waves of equal amplitude, the distortion component is divided into a high frequency side and a low frequency side to give frequency characteristics as in Patent Document 5. It was effective. However, this method cannot provide a frequency characteristic that continuously changes on the frequency axis to an input signal having a continuous spectrum on the frequency axis, such as a modulated wave signal. In Patent Document 7, it is necessary to prepare a large number of band-pass filters and vector adjusters in order to provide frequency characteristics up to higher-order compensation distortion. Furthermore, it has not been known how to obtain the frequency characteristic of compensation distortion that cancels the frequency characteristic of the distortion component generated in the power amplifier. The predistorters shown in Patent Documents 5 and 7 are predistorters composed of analog elements. In this case, when the frequency characteristic is given to the compensation distortion, the frequency characteristic of the entire transmission system such as the distortion generator and the vector adjuster must be considered in addition to the frequency characteristic of the power amplifier.
JP GB2335812A Japanese Patent Laid-Open No. 11-17462 Japanese Patent Laid-Open No. 7-7333 Japanese Patent Laid-Open No. 10-327209 JP 2002-64340 A Japanese Patent Application No. 2002-57533 JP-A-10-327209 H. Girard, and K. Feher, "A new baseband linearizer for more efficient utilization of earth station amplifiers used for QPSK transmission", IEEE J. Select. Areas Commun. SAC-1, No. 1, 1983 Nojima, Okamoto, Oyama, "Predistortion Nonlinear Compensator for Microwave SSB-AM System", IEICE Transactions '84 / 1 Vol. J67-B No. 1 pp78-85 L. Sundstrom, M. Faulkner, and M. Johansson, "Quantization analysis and design of a digital predistortion linearizer for RF power amplifiers", IEEE Trans.Vech., Tech., Vol. 45, No. 4, pp707-719, 1996.11 Y. Oishi, N. Tozawa, H. Suzuki "Highly Efficient Power Amplifier for IMT-2000 BTS Equipment" FUJITSU Sci.Tech. J., 38,2, p.201-208 (December 2002) T. Nojima, and T. Konno, “Cuber predistortion linearizer for relay equipment in 800MHz band land mobile telephone system”, IEEE Trans.Vech.Tech., Vol.VT-34, No.4, pp.169-177, 1985.11 Tri T. Ha, Solid-State Microwave Amplifeir Design, Chapter 6, Krieger Publishing Company, 1991 JAHiggings and RLKuvans, "Analysis and improvement of intermodulation distortion in GaAs power FET's", IEEE Transaction on Microwave Theory and Techniques, Vol.MTT-28, No. 1, pp. 9-17, Jan. 1980

  An object of the present invention is to provide a linear power amplifier which can achieve a high distortion correction amount with little secular change and temperature change, and a setting method for the digital predistorter.

The linear power amplifier according to the present invention is:
A pilot signal generator for generating a digital pilot signal;
A digital transmission signal and an adder for combining the digital pilot signal;
A digital predistorter that takes the output signal of the adder as input and performs predistortion processing by a power series model to generate a predistortion added signal;
A digital-to-analog converter that converts the predistorted signal output by the digital predistorter into an analog predistorted signal;
A frequency up-conversion unit for up-converting the analog predistorted signal to a transmission frequency band;
A power amplifier for power amplifying the upconverted signal;
A frequency down-conversion unit for down-converting a part of the output of the power amplifier and outputting a down-conversion signal;
From delay means for generating a digital pilot signal delayed from the digital pilot signal, distortion generating means for generating odd-order distortion other than a predetermined odd-order from the digital pilot signal, and a pilot signal in the down-converted signal component Subtracting means for subtracting the delayed digital pilot signal and the odd-order distortion other than the predetermined odd-order to detect the desired odd-order distortion component, and the digital pre-based based on the odd-order distortion component detected by the subtraction. A digital predistorter controller comprising an odd-order distortion characteristic controller that controls the phase and amplitude of the corresponding odd-order distortion component generated by the distorter;
The digital predistorter control unit controls the coefficient of the digital predistorter.

The digital predistorter setting method according to the present invention includes:
(a) generating a digital pilot signal;
(b) Combining the digital pilot signal and the digital transmission signal, generating a predetermined number of odd-order distortion components based on the power series model for the combined signal, and adding it to the combined signal to add predistortion Generating a signal;
(c) converting the predistorted signal to an analog predistorted signal;
(d) Upconverting the analog predistorted signal to a transmission frequency band at a predetermined carrier frequency;
(e) power-amplifying the upconverted signal;
(f) downconverting a part of the power amplified output signal, and (g) delaying the digital pilot signal with a pilot signal component;
(h) generating an odd-order distortion other than the predetermined odd-order from the digital pilot signal;
(i) subtracting the delayed digital pilot signal and the odd-order distortion other than the predetermined odd-order from the down-converted pilot signal;
Output step;
(j) controlling the coefficient of the digital predistorter so that the level of the odd-order distortion component is reduced from the subtracted pilot signal component;
Including.

According to the present invention, the pilot signal component is extracted from the output of the power amplifier 37, and the odd-order distortion of the power series model of the digital predistorter is reduced so that the level of the odd-order distortion component extracted from the pilot signal component is reduced. Since direct feedback control is performed, a linear power amplifier with little secular change and temperature change can be configured.
Further, by compensating the odd-order distortion generated by the odd-order distortion generator with the frequency characteristic opposite to the frequency characteristic of the power amplifier, the distortion of the power amplifier can be removed over a wide band. In particular, by performing feedback control with a predetermined odd-order distortion component, the pilot signal detection sensitivity can be further increased.

Principle Configuration of the Invention FIG. 4 shows the principle configuration of a linear power amplifier according to the present invention. The transmission signal S and the pilot signal PL are generated by the transmission signal generator 11 and the pilot signal generator 12 by separate digital signal processing, added by the adder 15, and given to the digital predistorter 20. The transmission signal S may be a baseband signal or an intermediate frequency signal, but is hereinafter referred to as a baseband signal unless otherwise specified. The digital predistorter 20 based on the power series model performs predistortion digital signal processing using the pilot signal PL and the transmission signal S as an integrated input signal.
The output of the digital predistorter 20 is converted to an analog signal by a digital / analog converter 31 having an operating speed at least twice as high as the band of the signal obtained by integrating the pilot signal PL and the transmission signal S, and frequency up-converted. The frequency is converted into a high-frequency transmission signal in the transmission frequency band by the unit 33 and supplied to the power amplifier 37. The output of the power amplifier 37 is distributed by the distribution unit 38, and a part of the output is supplied to the frequency down-conversion unit 40, and the rest is sent to the antenna, for example, as the output of the linear power amplifier. A part of the distributed power is down-converted by the frequency down-conversion unit 40 and supplied to the digital predistorter control unit 50. The control unit 50 extracts odd-order distortion components of the pilot signal from the downconverted signal, and corrects the coefficient of the digital predistorter 20 using the extracted component.
As described above, the digital predistorter 20 using the pilot signal does not correct the coefficient by the correction data read from the memory, but directly corrects the coefficient so that the distortion component is reduced by the detected distortion component. Because it does, it is not affected by aging and temperature changes. As for the pilot signal feedback time, since the pilot signal band is narrower than the transmission signal, the delay time of the digital predistorter of the present invention is longer than the delay time of the conventional digital predistorter. it can. Therefore, the feedback time does not matter even in the feedback system that downconverts the pilot signal as shown in FIG.

First Related Example FIG. 5 shows a first related example of a linear power amplifier using the digital predistortion method according to the present invention. Tone signals PL ₁ and PL ₂ with two equal levels are used as pilot signals. This first related example is a pilot signal generator 12 composed of tone signal generators 12A, 12B by digital signal processing and a digital adder 14, a digital predistorter 20, a digital / analog converter 31, a local oscillator. 33A, a frequency up-conversion unit 33 including a mixer 33B and a band-pass filter 33C, a power amplifier 37, a directional coupler 38A constituting a distribution unit 38, a band-pass filter 38B for extracting a pilot signal, and a mixer 41, a band-pass filter 42, an amplifier 43, and a frequency down-converter 40 comprising an analog / digital converter 44, and a digital predistorter controller 50. The digital predistorter 20 is a configuration example up to the seventh order, but the order may be different depending on the configuration. Practically, a low-pass filter for aliasing cut is inserted on the output side of the digital-analog converter 31, but this is not shown because it is not related to the essence of the present invention.

The digital predistorter 20 using the power series model is configured by adding a delay path that passes the fundamental wave component of the transmission signal and an output signal of each odd-order distortion generation path by the power series. That is, the fundamental wave component passes through the delay memory 21 that matches the delay time of the distortion generation path. Each odd-order distortion component is obtained by the distortion generators 22A, 22B, and 22C, the gain adjusters 24A, 24B, and 24C for amplitude adjustment, and the phase adjusters 23A, 23B, and 23C for phase adjustment. Each odd-order distortion generator 22A, 22B, 22C performs each odd-order power calculation process on the combined signal of the input transmission signal S and pilot signals PL ₁ , PL ₂ . For example, if the sum of the transmission signal S and the pilot signals PL ₁ and PL ₂ is X, the third-order distortion generator executes the calculation process of X ³ . The odd-order distortion components whose phase and amplitude have been adjusted are added by adders 26 and 27, and further added by the adder 25 with the delayed fundamental wave component from the delay memory 21, and digitally added as a predistortion added signal Y. It is output from the predistorter 20 and given to the digital / analog converter 31.

Predistortion additional signal Y before being converted into an analog signal by a digital-to-analog converter 31 is fed to the mixer 33B, it is mixed with the local signal of the frequency f _c from the local oscillator 33A (carrier signal). A signal in the transmission frequency band is selected from the mixed output by the band-pass filter 33 </ b> C and supplied to the power amplifier 37. The high frequency signal output from the power amplifier 37 is transmitted via the directional coupler 38A.
A part of the transmission output of the high-frequency transmission signal is extracted by the directional coupler 38A, and a pilot signal component (pilot signal and its higher-order distortion component) is extracted by the band-pass filter 38B for pilot signal extraction. The extracted pilot signal component is supplied to the mixer 41, mixed with the carrier signal from the local oscillator 33A, and the pilot signal component down-converted by the band-pass filter 42 is detected from the mixed output. The obtained pilot signal component is amplified by the amplifier 43. The signal is converted into a digital signal by the analog / digital converter 44 and supplied to the digital predistorter control unit 50.

The digital predistorter control unit 50 includes a distortion component detection unit 51 and an odd-order distortion characteristic control unit 52. The distortion component detection unit 51 includes third-order, fifth-order, and seventh-order odd-order distortion component extractors 51A, 51B, and 51C. The odd-order distortion characteristic control unit 52 includes third-order, fifth-order, and seventh-order odd-numbers. The second distortion controllers 52A, 52B, and 52C are included. Each odd-order distortion component extractor 51A, 51B, 51C can be constituted by a band pass filter, for example, and extracts a third-order distortion component, a fifth-order distortion component, and a seventh-order distortion component, respectively. The odd-order distortion controllers 52A, 52B, and 52C are variable with phase adjusters 23A, 23B, and 23C that adjust the phase and amplitude of the distortion component generators 22A, 22B, and 22C corresponding to the digital predistorter 20, respectively. The gain adjusters 24A, 24B, and 24C are controlled.
Since equi-level two-wave tone signals (CW signals) are used as the pilot signals PL ₁ and PL ₂ , odd-order distortion components that appear in the vicinity of the tone signal at the output of the power amplifier 37 are extracted from the odd-order distortion components. Extracted by 51A, 51B, 51C. The digital predist overnight controller 50 of the first related example is configured by digital signal processing, but the same configuration may be configured by an analog circuit.

FIG. 6 shows a method for injecting and extracting pilot signals PL ₁ and PL ₂ related to the first related example using a spectrum. The input signal X of the digital predistorter 20 includes a baseband transmission signal S and pilot signals PL ₁ and PL ₂ which are tone signals of two equal levels. Pilot signals PL ₁ and PL ₂ of frequencies f ₁ and f ₂ are injected into the adjacent band of the transmission signal S as shown in row A of FIG. The two pilot signals PL ₁ and PL ₂ are set to a sufficiently narrow frequency interval Δf = f ₂ −f ₁ compared to the modulation signal bandwidth of the transmission signal S. As shown in row B, the output signal Y of the digital predistorter 20 includes predistortion components S _D , P _D3L , and P _D3H generated by _performing predistortion processing on the transmission signal S and the pilot signals PL ₁ and PL _2. Yes. Here, an example of the third-order distortion component is shown. For example, as the fifth-order distortion component of the pilot signals PL ₁ and PL _2, a component higher by Δf than P _D3H and a component lower by Δf than P _D3L are generated. Not shown. The seventh-order distortion is generated outside Δf of the fifth-order distortion component, but is not shown here.

Input signal of the power amplifier 37 is a carrier frequency f _c by signals up-converts the output signal Y of the digital predistorter 20 in the frequency up-converting unit 33 as shown on line C of Figure 6. At this time, the predistortion component generated by the digital predistorter 20 is set so as to perform distortion compensation for the entire transmission system. Therefore, there may be a difference between the predistortion component of the input signal of the power amplifier 37 and the predistortion component of the output signal of the digital predistorter 20. However, most of the intermodulation distortion of the transmission system is caused by the power amplifier 37 at the final stage, and the difference is slight. As shown in row D, the output signal of the power amplifier 37 is a signal in which distortion is suppressed, that is, compensated by predistortion processing by the digital predistorter 20.

The pilot signal component including the distortion component is extracted by the directional coupler 38A and the band pass filter 38B, mixed with the local oscillation signal from the local oscillator 33A by the mixer 41, and down-converted. The input signal of the control unit 50 shown in row E of FIG. 6 is a signal obtained by digitizing the down-converted signal by the analog / digital converter 44. For example, when the distortion compensation of the third-order distortion component is insufficient at the output of the power amplifier 37, the third-order distortion components P _D3H and P _{D3L of the} tone signal remain to a degree that cannot be ignored. In the control unit 50, the third-order distortion component extractor 51A extracts one third-order distortion component, here _PD3H . The third-order distortion controller 52A uses the extracted tone signal until the distortion compensation amount reaches a predetermined adjacent channel leakage power ratio (that is, a level ratio of distortion components to the transmission signal) or less at the output of the power amplifier 37. The phase and amplitude of the output of the third-order distortion signal generator 22A are controlled by the phase adjuster 23A and the variable gain adjuster 24A. Algorithms of various optimization methods can be applied to the control method.

FIG. 7 shows a linear power amplification processing procedure including processing for controlling the coefficients set in the digital predistorter 20, that is, the phases of the phase adjusters 23A, 23B, and 23C and the gains of the variable gain adjusters 24A, 24B, and 24C. Show.
Step S1: Digital pilot signals PL ₁ and PL ₂ are generated and added to the digital transmission signal S to obtain a combined signal.
Step S2: Generate odd-order distortion components for the digital composite signal.
Step S3: Set the phase and amplitude of the odd-order distortion component.
Step S4: A distortion component and a delayed fundamental wave component are added to generate a predistortion added signal.
Step S5: The predistortion added signal is converted into an analog signal.
Step S6: Upconvert the analog predistortion signal to a high frequency signal.
Step S7: The high frequency predistorted signal is amplified by a power amplifier.
Step S8: A pilot signal component is extracted from the amplified high-frequency signal and down-converted.
Step S9: Convert the down-converted pilot signal component into a digital signal.
Step S10: A distortion component is extracted from the digital pilot signal component.
Step S11: It is determined whether the ratio of the distortion component level to the transmission signal level is equal to or smaller than a predetermined value. If the ratio is equal to or smaller than the predetermined value, the process ends.

Second Related Example FIG. 8 shows a second related example of the present invention. This embodiment uses one modulation wave signal instead of using two tone signals as pilot signals in the first related example of FIG. 5, and the configuration other than the pilot signal generator 12 of the second related example. Is the same as the first related example. The operation is the same as in the first related example.
FIG. 9 shows a method for injecting and extracting the pilot signal PL related to the second related example using a spectrum. Rows A and B are the spectrum of the input signal X and output signal Y to the digital predistorter 20, rows C and D are the spectrum of the input signal and output signal of the power amplifier 37, and row E is the input signal to the control unit 50. Each spectrum is schematically shown. Except that the pilot signal PL of the second related example is a modulated signal, it is the same as the spectrum of FIG. 6 described in the first related example. The pilot signal PL is a modulation signal having a bandwidth, and spread spectrum on either side as indicated by P _D undergoing distortion by the digital predistorter 20. Compared to the pilot signals PL ₁ and PL _{2 of the} tone signal, the detection sensitivity of the pilot signal PL of the second related example can be increased by a decoding circuit such as error correction processing in the receiver. If a spreading code is applied to the pilot signal, there is an advantage that a pilot signal less than the minimum receiving sensitivity of the receiver can be extracted.

Third Related Example FIG. 10 shows a third related example. The third related example is different from the first and second related examples in that predistorters 20 ₁ and 20 ₂ and digital / analog converters 31 ₁ and 31 ₂ are used separately for the pilot signal and the transmission signal, respectively. The configuration of each digital predistorter 20 ₁ , 20 ₂ and the digital predistorter control unit 50 corresponding thereto is the same as in the first and second related examples.
In the third related embodiment, to the frequency converting the second output of the digital predistorter 20 ₂ to a band different from the transmission signal S, a frequency up-conversion unit 34 consisting of a local oscillator 34A and the mixer 34B and the band pass filter 34C Newly prepared. The third related example is intended to widen the transmission signal. The first and second related examples have a feature that the calculation amount of predistortion processing, pilot signal generation / injection processing, and digital signal processing can be reduced, but the capability of the digital / analog converter 31 can be increased by widening the transmission signal. May be insufficient. Further, since the pilot signal is injected into a band different from that of the transmission signal S, the digital / analog converter 31 is required to have a capability of performing digital / analog conversion of a signal bandwidth equal to or larger than the bandwidth of the transmission signal. In this regard, the third related example uses digital predistorters 20 ₁ and 20 ₂ and digital / analog converters 31 ₁ and 31 ₂ , which are different from each other in transmission signals and pilot signals. As described above, the independent digital-to-analog conversion system can more flexibly perform signal conversion such as widening the transmission signal or increasing the number of oversampling. The first and second digital predistorters 20 ₁ and 20 ₂ correct each odd-order coefficient in synchronization with the digital predistorter control unit 50.

Fourth Related Example FIG. 11 shows a fourth related example. In the fourth related example, the pilot signal generator 12 in the third related example shown in FIG. 10 is configured in the same manner as the pilot signal generator 12 that generates the same modulation signal as in the embodiment of FIG. . The operation is also the same as in the third related example. Compared with the pilot signal of the tone signal, the detection sensitivity of the pilot signal of the fourth related example is enhanced by a decoding circuit such as error correction processing in the receiver. By applying a spreading code to the pilot signal, it is possible to extract a pilot signal less than the minimum receiving sensitivity of the receiver.
In the third and fourth related examples shown in FIGS. 10 and 11, the number of the first and second digital predistorters 20 ₁ and 20 ₂ may be one. In that case, a band separator 30 that performs signal processing for separating the transmission signal and the pilot signal at the output of the digital predistorter 20 as shown in FIG. The transmission signal S and the pilot signal PL which are provided and separated thereby are processed in the respective systems in the same manner as in FIGS.

In each of the embodiments of FIGS. 10, 11 and 12, the transmission signal and the pilot signal are separately subjected to predistortion processing, digital analog conversion processing is performed separately, and the predistortion-added pilot signal is upconverted to add predistortion. Although the case of combining with a transmission signal has been shown, FIG. 13 shows a modified embodiment corresponding to the embodiment of FIG. In this embodiment, upconverted at different carrier frequencies f _c 'is the frequency f _c by predistortion additional transmission signal and the frequency up-conversion unit 34 before being up-converted by a carrier frequency f _c by a frequency up-converting unit 33 The predistorted pilot signal is synthesized by the adder 35 and the synthesized signal is input to the amplifier 37. Further, the carrier signal of the carrier frequency f _c ′ from the local oscillator 34A of the pilot signal frequency up-conversion unit 34 is supplied to the mixer 41 of the pilot signal component detection unit 40 to detect the pilot signal component. Other configurations and operations are the same as those in FIG.
It is obvious that the same modifications as in FIG. 13 can be applied to the embodiments of FIGS. For example, when applied to the embodiment of FIG. 11, instead of the pilot signal generator 12 that generates the two-wave tone signal in FIG. 13, a pilot signal generator that generates a modulation signal having a narrower band than the transmission signal may be used. . When applied to the embodiment of FIG. 12, the configuration after the band separator may be configured in the same manner as in FIG. 13 as shown in FIG.

FIG. 15 shows a first embodiment of the present invention in which the pilot signal detection sensitivity of the digital predistorter control unit 50 in the fourth related example and modifications thereof is further increased. However, a pilot signal generator 12 that synthesizes the two tone signals shown in FIG. 5 and outputs them as a pilot signal is used. FIG. 15 shows an example relating to the third-order distortion component only.
The digital predistorter controller 50 includes a third-order distortion component extractor 50A and a third-order distortion controller 52A. The third-order distortion component extractor 50A includes a delay memory 1A11 that forms a fundamental wave generation path, a phase adjuster 1A12, a variable gain adjuster 1A13, a fifth-order distortion generator 1A21 that forms a fifth-order distortion generation path, and a phase adjuster. 1A22, a variable gain adjuster 1A23, a seventh order distortion generator 1A31 forming a seventh order distortion generation path, a phase adjuster 1A32, a variable gain adjuster 1A33, and subtractors 1A14, 1A24, 1A34.

Delayed fundamental wave components, fifth-order distortion components, and seventh-order distortion components are generated from the pilot signal components supplied from the pilot signal generator 12 in the fundamental wave path, the fifth-order distortion generation path, and the seventh-order distortion generation path, respectively. To do. The subtractor 1A14, 1A24, 1A34 sequentially subtracts the delayed fundamental wave component, the fifth-order distortion component, and the seventh-order distortion component of the pilot signal from the pilot signal component detected by the frequency down-conversion unit 40. The second order distortion component remains, and this third order distortion component is given to the third order distortion controller 52A. The third-order distortion controller 52A controls the phase adjuster 23A and the variable gain adjuster 24A of the digital predistorter 20 in the same manner as the third-order distortion controller 52A in FIG. 5 based on the given third-order distortion component.
In order to reduce the residual components of the delayed fundamental wave component, the fifth-order distortion component, and the seventh-order distortion component after the subtraction process, the control unit 50 in FIG. 15 uses the phase adjusters 1A12, 1A22, 1A32 and the variable gain adjusters 1A13, 1A23. , 1A33 adjusts the phase and amplitude of each component. These adjustments are performed at the time of initial setting of the apparatus because the configuration of the digital predistorter control unit 50 in FIG. 15 is realized by digital signal processing so that there is no change in electrical characteristics due to aging or temperature change. Just do it. Each odd-order component such as the fifth order or the seventh order can be extracted by the same configuration as the digital predistorter control unit 50 of FIG. The same applies when the pilot signal is a modulated signal.

Fifth Related Example An equivalent circuit in the intrinsic region of a general FET (field effect transistor) used in a power amplifier can be expressed as shown in FIG. 16A, for example. The gate-source capacitance is represented as C _gs , the gate resistance is represented as R _g , the mutual conductance is represented as G _m , and the drain conductance is represented as G _d . The intermodulation distortion in the FET is modeled in the power series form of C _gs , G _m , and G _d from the equivalent circuit in the intrinsic region of FIG. 16A (see, for example, Non-Patent Document 7). If instantaneous gate voltage V _g and instantaneous drain voltage V _d are
G _m (V _g ) = G _m1 + G _m2 V _g + G _m3 V _g ² + G _m4 V _g ³ + G _m5 V _g ⁴ + ... (1)
G _d (V _d ) = G _d1 + G _d2 V _d + G _d3 V _d ² + G _d4 V _d ³ + G _d5 V _d ⁴ + ... (2)
C _gs (V _g ) = C _g1 + C _g2 V _g + C _g3 V _g ² + C _g4 V _g ³ + C _g5 V _g ⁴ + ... (3)
It becomes. Thus, it can be seen that the intermodulation distortion of the FET occurs at the gate and the drain, respectively.
The amplifier can be represented as a network as shown in FIG. 16B using the equivalent circuit of the FET of FIG. 16A. The gate side matching circuit 37A, the FET, and the drain side matching circuit 37B are configured. Here, the matching circuits 37A and 37B have different frequency characteristics. Thus, the intermodulation distortion of the amplifier is affected by both the frequency characteristics of the gate side matching circuit 37A and the drain side matching circuit 37B. However, the frequency characteristics here are not wide enough to discuss the operating frequency of the FET, but limited to the bandwidth amplified by the amplifier.

So far, power series predistorters using digital signal processing have not taken into consideration the frequency characteristics of FET intermodulation distortion (see, for example, Patent Document 1 mentioned above).
In the fifth related example, in order to achieve a wider band and a higher distortion suppression amount, compensation is made for intermodulation distortion by separately considering the frequency characteristics of the gate side matching circuit 37A and the frequency characteristics of the drain side matching circuit. In FIG. 16B, attention is paid to the fact that the signal given to the input side of the amplifier is given to the equivalent circuit of the FET after being influenced by the frequency characteristic of the gate side matching circuit 37A, where intermodulation distortion is generated. That is. That is, the input signal that causes the generation of intermodulation distortion is affected by the frequency characteristics of the gate-side matching circuit 37A. Similarly, the frequency characteristics of the drain side matching circuit 37B in FIG. 16B will affect the distortion generated by the FET.
Therefore, in order to compensate the frequency characteristics of the distortion generated by the FET in this way, by providing a frequency characteristic compensator on the input side of each odd-order distortion generator in the power series predistorter, the gate of the amplifier is provided. It is possible to compensate for the frequency characteristic suitable for the side frequency characteristic. That is, by providing a frequency characteristic compensator on the input side of each odd-order distortion generator, a frequency characteristic that compensates the frequency characteristic of the gate side matching circuit with the power amplifier output is realized.
Similarly, by providing a frequency characteristic compensator on the output side of each odd-order distortion generator in the digital predistorter, it is possible to compensate for the frequency characteristic suitable for the drain side frequency characteristic of the amplifier. That is, by providing a frequency characteristic compensator on the output side of each odd-order distortion generator, a frequency characteristic that compensates the frequency characteristic of the drain side matching circuit with the power amplifier output is realized.

For example, the frequency characteristic T (f) of the intermodulation distortion caused by the gate side matching circuit is expressed as follows using equation (3).
T (f) C _g (V _g ) = T ₁ (f) C _g1 + T ₂ (f) C _g2 V _g + T ₃ (f) C _g3 V _g ² + T ₄ (f) C _g4 V _g ³ + T ₅ (f) C _g5 V _g ⁴ … (4)
It can be seen from Equation (4) that the digital signal processing type predistorter needs to compensate the frequency characteristic for each odd-order distortion generator. The same applies to the drain side. Further, the intermodulation distortion of the FET is generated simultaneously on the gate and drain sides, and the configuration of the series type predistorter that can be realized differs depending on the magnitude of each of the intermodulation distortions of the equations (1) to (3). . The frequency characteristic of the intermodulation distortion by the amplifier described in FIG. 3 can be considered as a combined characteristic of the gate side frequency characteristic and the drain side frequency characteristic. A frequency characteristic compensator is provided so as to give a frequency characteristic that is opposite to the synthesized frequency characteristic to the output of each odd-order distortion generator. The installation location is on the terminal side or both terminal sides of the FET which has the dominant intermodulation distortion. In addition, when the frequency characteristic compensator for compensating the synthesized frequency characteristic of the intermodulation distortion is provided only on the output side of the odd-order distortion generator, or provided only on the output side, the compensation is always satisfactory. Is not always achieved, and may be improved by providing both on the output side and the input side.

In the fifth related example, by providing a frequency characteristic compensator that compensates only the frequency characteristic of the gate side matching circuit 37A and / or a frequency characteristic compensator that compensates the frequency characteristic of the gate side matching circuit 37A and the drain side matching circuit 37B. The frequency dependency of the distortion suppression amount of the digital signal processing type predistorter is improved.
FIG. 17 shows the basic configuration of a fifth related example according to the present invention. This configuration includes a digital predistorter 20 that applies predistortion processing to the transmission signal S from the transmission signal generator 11, a digital / analog converter 31 that converts the output into an analog transmission signal, and the analog transmission signal. A frequency up-conversion unit 33 that up-converts the high-frequency transmission signal, a power amplifier 37 that amplifies the up-converted transmission signal, a distribution unit 38 that distributes the amplified output into two, and down-converts one of the distributed signals. The frequency down-conversion unit 40, the distortion component detection unit 51 that detects odd-order distortion components from the down-converted signal, and the phase adjuster 23 and the variable gain adjuster 24 are controlled based on the detected odd-order distortion components. It has a controller 5. The distortion component detector 51 and the controller 5 constitute a digital predistorter controller 50.

Further, in the digital predistorter 20, a frequency characteristic compensator 28 is provided in the distortion generator 22, which gives the inverse characteristic of the frequency characteristic shown in FIG. 3 of the power amplifier 37 to the distortion generated by the distortion generator 22. The frequency characteristic with respect to distortion is controlled by the controller 5.
The input signal S from the transmission signal generator 11 is distributed to the linear transmission path 2L and the distortion generation path 2D of the predistorter 20. The power series model distortion generator 22 generates an odd-order distortion signal D using the input signal distributed to the distortion generation path 2D. The frequency characteristic compensator 28 adjusts the frequency-to-amplitude characteristic and the frequency-to-phase characteristic of the distortion signal D so as to be opposite to the frequency characteristic of the amplifier 37. The output of the frequency characteristic compensator 28 is adjusted in phase and gain by the phase adjuster 23 and the variable gain adjuster 24 to obtain an adjusted distortion signal D ′, which is supplied to the combiner 25. For the signal distributed to the linear transmission path 2L, the delay amount of the signal with respect to the distortion generation path 2D is corrected by the delay memory 21. The synthesizer 25 synthesizes the signals S and D ′ that have passed through the linear transmission path 2L and the distortion generation path 2D.

  Also in this configuration, the output of the power amplifier 37 is always output by the distortion component detection unit 51 via the distributor 38 in order to maintain a highly accurate distortion compensation amount with respect to a change in characteristics of the power amplifier 37 due to a temperature change or a secular change. When the distortion component detection unit 51 is monitored and senses the deterioration of the distortion compensation effect, the controller 5 changes the parameters of the phase adjuster 23, the variable gain adjuster 24, and the frequency characteristic compensator 28, respectively. Thereby, a high distortion compensation effect can always be maintained. 16A and 16B, the frequency characteristic compensator 28 may be provided on the input side of the distortion generator 22 as indicated by a broken line in FIG. You may provide in both.

Referring to FIG. 18, the principle that high-precision distortion compensation can be performed by the frequency characteristic compensator 28 in FIG. 17 will be described. The power amplifier 37 having a frequency characteristic shown in row A of FIG. 18 with respect to the input signal S shown in row B, and the distortion D _S as shown on line C is generated. To counteract such distortion D _S, the frequency characteristic of the frequency characteristic compensator 28 as line E, as the frequency characteristic and the reverse characteristic of the power amplifier 37 as shown in row A, shown on line D The distortion D ′ shown in the row F is obtained by adjusting the frequency versus amplitude characteristic and the frequency versus phase characteristic of the distortion D of the distortion generator 22. In the variable gain regulator 24 to adjust the gain in the level that can cancel the distortion D _S generated by the power amplifier 37, adjusted to be opposite phase phase adjuster 23. D ′ indicates the characteristic after adjustment. As a result, the output S + D ′ of the synthesizer 25 is a combination of the distortion D ′ and the signal S, whose frequency characteristics are compensated, as shown in row G. This signal S + D ′ is applied to the power amplifier 37 through the digital-to-analog converter 31 so that the frequency characteristic of the power amplifier 37 can be canceled out. Therefore, as shown in the row H at the output S _A of the power amplifier 37. The distortion has been offset.

  FIG. 19 shows a specific embodiment based on the principle configuration of the fifth related example shown in FIG. In this embodiment, a digital predistorter 20, a digital-analog converter 31, a frequency oscillator 33A including a local oscillator 33A, a mixer 33B, and a band pass filter 33C, a power amplifier 37, and a signal extraction unit 38 are formed. And a mixer 41 and a band-pass filter 42 constituting a frequency down-conversion unit 40, and a digital predistorter controller 50. The frequency down-conversion unit 40 includes an analog / digital converter that converts the down-converted extracted signal into a digital signal. The digital predistorter 20 has a configuration up to the seventh order, but the order may be different from the configuration.

The predistorter 20 using a power series model has a configuration in which a linear transmission path through which a fundamental component of a transmission signal passes and an odd-order distortion generation path by a power series are added. Each odd-order distortion generator 22A, 22B, 22C performs an odd-order power calculation process on the input transmission signal. For example, if the transmission signal is x, the third-order distortion generator executes x ³ arithmetic processing. As each frequency characteristic compensator 28A, 28B, 28C, an FIR (finite impulse response) filter is used, and filter coefficients are set and controlled by coefficient controllers 53A, 53B, 53C. The frequency characteristic of the filter is determined by a coefficient given to the filter. By inputting the output distortion signals of the distortion generators 22A, 22B, and 22C to the filters 28A, 28B, and 28C, the frequency-to-amplitude characteristics and the frequency-to-phase characteristics of the distortion signals can be changed.

  The output signal of the power amplifier 37 is extracted by the directional coupler 38A and the band pass filter 38B, and is down-converted by the frequency down-conversion unit 40. The input signal of the digital predistorter control unit 50 is a signal obtained by digitizing the downconverted signal by the analog / digital converter 44. The digital predistorter control unit 50 includes distortion component extraction band-pass filters as the odd-order distortion component extractors 51A, 51B, and 51C, and distortion controllers 52A, 52B, and 52C corresponding to the odd-order distortion components. The coefficient controllers 53A, 53B and 53C for controlling the coefficients of the FIR filters 28A, 28B and 28C of the respective orders. The odd-order distortion controllers 52A, 52B, and 52C are variable gain adjusters 24A, 24B, and 24C and phase adjusters 23A, 23B, and 23C that output distortion generators 22A, 22B, and 22C corresponding to the digital predistorter 20, respectively. To control. Each order distortion controller 52A, 52B, 52C and coefficient controller 53A, 53B, 53C constitute the distortion characteristic controller 5 in FIG.

  Each odd-order FIR coefficient controller 53A, 53B, 53C controls the coefficient of the corresponding FIR filter. Each odd-order distortion component extractor 51A, 51B, 51C extracts a signal that is an odd-order distortion component by a band pass filter or the like. A variable gain adjuster 24A based on the outputs of the odd-order distortion generators 22A, 22B, and 22C up to a distortion compensation amount that achieves a predetermined adjacent channel leakage power ratio or less at the output of the power amplifier 37 using the extracted signal. , 24B, 24C and phase adjusters 23A, 23B, 23C are controlled by odd-order distortion controllers 52A, 52B, 52C. At the same time, the frequency characteristics of the power amplifier 37 are extracted, and the coefficients of the odd-order FIR filters 28A, 28B, and 28C are controlled. Algorithms of various optimization methods can be applied to the parameter control method. Also in the embodiment of FIG. 19, the FIR filters 28A, 28B, and 28C as frequency characteristic compensators may be provided on the input side of the third-order, fifth-order, and seventh-order distortion generators 22A, 22B, and 22C as indicated by broken lines. Alternatively, it may be provided on both the input side and the output side.

FIG. 20 shows an embodiment of a linear power amplifier using FFT for each frequency characteristic compensator 28A, 28B, 28C of the sixth related example digital predistorter 20. This embodiment is different from the embodiment shown in FIG. 19 in that each frequency characteristic compensator 28A, 28B, 28C (represented in the case of 28A as a representative) is replaced with an FFT unit (first Fourier transform unit) 28A1 instead of an FIR filter, This is configured to use a set of a multiplier 28A2 and an IFFT unit (inverse fast Fourier transform unit) 28A3, and the same applies to the frequency characteristic compensators 28B and 28C. The other parts are the same as in the embodiment of FIG. Accordingly, the frequency characteristic control unit 53 includes coefficient controllers 53A, 53B, and 53C corresponding to the third-order distortion, the fifth-order distortion, and the seventh-order distortion as in the frequency characteristic control unit 53 in FIG. Absent. The same applies to the embodiments of FIGS. 21, 30, and 31 described later.

  For example, the distortion signal from the third-order distortion generator 22A is converted into frequency domain samples by Fourier transform for each of a plurality of samples in the FFT unit 28A1, and the amplitude of the sample at each frequency point is converted from the coefficient controller 53A by the coefficient multiplier 28A2. And the inverse Fourier transform by the IFFT unit 28A3 to obtain time domain samples. The same applies to the other frequency characteristic compensators 28B and 28C. Thus, frequency characteristic control by FFT is possible by controlling each multiplication coefficient of FFT. The controller 50 for the digital predistorter controls the level of the distortion component transmission signal generated by the power amplifier 37 to be equal to or lower than a predetermined value by multiplying the variable gain adjusters, phase adjusters, and FFT coefficients of the respective distortion orders. To do. Also in the embodiment of FIG. 20, the frequency characteristic compensators 28A, 28B, and 28C may be provided on the input side of the third-order, fifth-order, and seventh-order distortion generators 22A, 22B, and 22C as indicated by broken lines, or You may provide in both the input side and the output side.

Seventh Related Example FIG. 21 shows a seventh related example of the present invention. In this embodiment, the digital predistorter 20 is adjusted using the two pilot signals shown in FIG. 5 with respect to the embodiment of FIG.
Each odd-order distortion generator 22A, 22B, 22C of the digital predistorter 20 using a power series model performs arithmetic processing of each odd-order power on the input transmission signal and pilot signal.
The configuration of the digital predistorter controller 50 is the same as the configuration of the digital predistorter controller 50 in the embodiment of FIGS. The odd-order distortion controllers 52A, 52B, and 52C are variable gain adjusters 24A, 24B, and 24C and phase adjusters 23A, 23B, and 23C of the distortion component generators 22A, 22B, and 22C corresponding to the digital predistorter 20, respectively. The coefficient controllers 53A, 53B, 53C (not shown) of the frequency characteristic control unit 53 control the coefficients of the frequency characteristic compensators 28A, 28B, 28C. Since an equal level two-wave tone signal is used for the pilot signal, odd-order distortion components appearing in the vicinity of the tone signal at the output of the power amplifier 37 are odd numbers as the odd-order distortion component extractors 51A, 51B, 51C. Extracted by a bandpass filter for extracting the next distortion component. The digital predistorter controller 50 of the seventh related example is configured by digital signal processing, but the same configuration may be configured by an analog circuit. For the frequency characteristic compensation, distortion components P _D3L and P _D3H appearing in the lower and upper bands of the pilot signal described in FIG. 6 are used.

The frequency characteristic compensators 28A, 28B, and 28C may be configured with FIR filters as in the embodiment of FIG. 19, or may be configured with an FFT section, a coefficient multiplier, and an IFFT section as in the embodiment of FIG. May be. In the frequency characteristic compensation, the frequency characteristic is corrected using the upper and lower distortion signals P _D3H and P _D3L in FIG. For example, the coefficient controllers 53A, 53B and 53C monitor the frequency characteristics by interpolating the detected values of the upper and lower distortion components P _D3H and P _D3L from the odd-order distortion component extractors 51A, 51B and 51C. Estimate from the value. The FIR filters or FFTs constituting the frequency characteristic compensators 28A, 28B, 28C set the interpolated numerical values as the multiplication coefficients. Thereafter, the coefficient multiplied by the filter or the FFT is adjusted until a predetermined distortion suppression amount vs. frequency characteristic is achieved. Algorithms of various optimization methods can be applied to these control methods.

Even if a modulated wave is used as a pilot signal instead of a tone signal, the same effect as described above can be obtained. The same effect can be obtained by dividing the pilot predistorter overnight and the transmission signal predistorter. Also in the embodiment of FIG. 21, the frequency characteristic compensators 28A, 28B, and 28C may be provided on the input side of the third-order, fifth-order, and seventh-order distortion generators 22A, 22B, and 22C, respectively, as indicated by broken lines. Or you may provide in both the input side and the output side.
FIG. 22 shows a modification of the embodiment of FIG. 21 in which a modulation signal is generated as the pilot signal generator 12 in the same manner as the embodiment of FIG. Other parts are the same as those in FIG. Further, each of the digital predistorter in the embodiment of FIG. 12 and the digital predistorters 20 ₁ and 20 ₂ in the embodiment of FIGS. 13 and 14 is the same as the digital predistorter 20 shown in FIG. The digital predistorter control unit 50 shown in FIGS. 12, 13, and 14 may have the same configuration as that shown in FIG.

Eighth Related Example FIG. 23 shows a basic configuration of an example in which the digital predistorter 20 is adjusted using the two pilot signals shown in FIG. To the configuration of FIG. 17, further the two pilot signal generator 12 for generating a pilot signal PL _1, PL _2, and their pilot signals PL _1, PL ₂ and the adder 15 for adding the transmission signal S is added The controller 5 controls the pilot signal generator 12 to change the frequency interval between the pilot signals PL ₁ and PL _{2 having} the same amplitude. The digital predistorter control unit 50 is provided with a storage unit 55 that stores the gain and phase obtained from the frequency characteristics of the detected distortion component.
As described above, the transmission signal S may be a baseband signal or an intermediate frequency signal. In the latter case, the frequencies of the pilot signals PL ₁ and PL ₂ may be selected so as to be f _IF −f _i / 2, f _IF + f _i / 2 with respect to a predetermined intermediate frequency f _IF . When the transmission signal S is a baseband signal, the amplitude A
The frequency up-conversion unit 33 performs quadrature modulation on the signal Acosπf _i t of the frequency f _i / 2 with the carrier signal of frequency f _c , that is, cosπf _i t is multiplied by (cos2πf _c t + jsin2πf _c t). By obtaining the real part of the multiplication result, two pilot signals PL ₁ and PL ₂ of frequencies f _c −f _i / 2 and f _c + f _i / ₂ are generated in the transmission frequency band. Therefore, the pilot signal generator 12 may actually generate a tone signal having the frequency f _i / 2. The signal represented by cosπf _i t is
cosπf _i t = (expjπf _i t + exp-jπf _i t) / 2 (5)
Therefore, in the following description, the frequencies of the two baseband pilot signals PL ₁ and PL ₂ are expressed as -f _i / 2, It will be described as + f _i / 2.

The intermodulation distortion generated when the pilot signal up-converted by the frequency up-conversion unit 33 is amplified by the power amplifier 37 is detected by the digital predistorter control unit 50 through the distribution unit 38 and the frequency down-conversion unit 40. This is detected by the unit 51. The controller 5 adjusts the parameters of the gain adjuster 24, the parameters of the phase adjuster 23, and the parameters of the frequency characteristic compensator 28 so that the intermodulation distortion becomes equal to or less than a predetermined adjacent channel leakage power ratio. By using two pilot signals, it is easy to extract odd-order distortion components modeled by a power series, and the frequency characteristic compensator 28, the gain adjuster 24, and the phase adjuster 23 of the digital predistorter 20 are extracted. Make adjustments easier.
By changing the frequencies -f _i / 2, + f _i / 2 of the two pilot signals by the controller 5, the frequency interval f _{i of} the two corresponding up-converted pilot signals in the transmission frequency band is changed, The frequency of occurrence of intermodulation distortion changes on the frequency axis. Gain and phase of compensation distortion that achieves a predetermined adjacent channel leakage power ratio for each generated intermodulation distortion frequency by changing pilot signal frequencies -f _i / 2, + f _i / 2 at regular intervals. Can be decided.
By interpolating gains and phases obtained discretely on the frequency axis by this method, it is possible to obtain a continuous frequency characteristic applied to compensation distortion. The obtained frequency characteristic is realized by the frequency characteristic compensator 28, and the frequency characteristic is given to the compensation distortion.

FIG. 24 shows a flowchart of a procedure for obtaining the characteristics of the frequency characteristic compensator 28, which will be described below with reference to the frequency diagram of FIG.
Step S1: First, the value of the variable i is initialized to 1.
Step S2: Generate _two digital tone signals of frequency −f _i / 2, + f _i / 2 (and therefore frequency interval f _i ) and equal amplitude in the baseband as pilot signals PL ₁ and PL ₂ (FIG. 25). Line A). These signals are synthesized and the input to the power amplifier 37 and up-converted to a center frequency f _c at a frequency up-converting unit 33, for example, the following equation to the output of the power amplifier 37
B _3H cos2π (f _c + f _i / 2 + f _i ) t = B _3H cos2π (f _c + 3f _i / 2) t (6)
B _3L cos2π (f _c -f _i / 2-f _i ) t = B _3L cos2π (f _c -3f _i / 2) t (7)
Intermodulation distortions P _D3H and P _{D3L of} frequencies f _c + 3f _i / 2 and f _c −3f _i / 2 expressed by B _3H
And B _3L shall represent the amplitude of the distortion of the upper and lower carrier frequency f _c.

In order to cancel the intermodulation distortions P _D3H and P _D3L , signals obtained by adding the compensation distortions D _L ′ and D _H ′ to the pilot signals PL ₁ and PL ₂ in the predistorter 20 become the predistorter output signals (rows). C). This signal is up-converted by the frequency up-conversion unit 33 and input to the power amplifier 37. The output signal of the power amplifier 37 is a signal compensated by the digital predistorter 20 (row D). The gain adjuster 24, the phase adjuster 23, and the frequency characteristic compensator 28 are adjusted so as to cancel the generated intermodulation distortions P _D3H and P _D3L . The gain adjuster 24 gives a constant gain G with respect to the frequency, and the phase adjuster 23 gives a constant phase change P with respect to the frequency.
Step S3: The gain adjuster 24 is set to gain G, and the phase adjuster 23 is set to phase P. These values may be set arbitrarily, but are desirably set so that the adjacent channel leakage power ratio becomes relatively small.
Step S4: The third-order intermodulation distortion in the output of the power amplifier 37 is extracted by the distortion component detection unit 51, and whether or not the upper and lower intermodulation distortions P _D3H and P _D3L satisfy a predetermined adjacent channel leakage power ratio or less. If the distortion on only the upper side or both upper and lower sides does not satisfy the predetermined adjacent channel leakage power ratio or less, the process proceeds to step S5. If only the lower side distortion is not satisfied, the process proceeds to step S7. If both are satisfied, the process proceeds to step S9.

Step S5: When the distortions P _D3H and P _D3L on the upper side or the upper and lower sides do not satisfy the predetermined adjacent channel leakage power ratio, the gain G _i and the phase corresponding to the frequency f _c + 3f _i / 2 of the frequency characteristic compensator 28 changing the P _i by a predetermined amount.
Step S6: It is determined _{whether the} upper distortion P _D3H satisfies a predetermined adjacent channel leakage power ratio or less. If not, the process returns to Step S5 and the same processing is repeated. When the predetermined adjacent channel leakage power ratio is satisfied or less, the process returns to step S4 and the determination is repeated again.
Step S7: When only the lower distortion does not satisfy the predetermined adjacent channel leakage power ratio or less, the gain G _i ′ and the phase P _i ′ corresponding to the frequency f _c −3f _i / 2 of the frequency characteristic compensator 28 Is changed by a predetermined amount.
Here, the gains G ₁ and G ₁ ′ of the frequency characteristic compensator 28 are differences from the gain G of the gain adjuster 24, and the phases P ₁ and P ₁ ′ are differences from the phase change P of the phase adjuster 23. Shall.
Step S8: It is determined whether the lower distortion P _D3L satisfies a predetermined adjacent channel leakage power ratio or less. If not, the process returns to Step S7 and the same processing is performed. If satisfied, it is confirmed in step S4 that the upper and lower distortions satisfy a predetermined adjacent channel leakage power ratio or less, and the process proceeds to step S9. Alternatively, the confirmation may be omitted and the process may go directly to step S9.
Step S9: When the adjacent channel leakage power ratio of the upper and lower distortions P _D3H and P _D3L satisfies a predetermined value or less, the gain G ₁ , G ₁ ′ and the phases P ₁ , P ₁ ′ at that time are stored in the storage unit 55. And determine whether i = N.

Step S10: If not N, i is increased by 1 and the process returns to Step S2, and the frequency interval of the pilot signal is set to f ₂ (in the examples of FIGS. 26A, 26B, 27A, and 27B described later, the frequency i increases with the increase of the variable i). as it has) narrowing a distance f _i, the gain and phase G _2, G ₂ of the frequency characteristic compensator 28 to achieve the following predetermined ACLR optionally similarly to step S3~S8 frequency interval f ₁ ' , P ₂ , P ₂ ′ are obtained and stored in the storage unit 55. At this time, the values of the gain adjuster 24 and the phase adjuster 23 are fixed at G and P.
In this way, G _{1 to} G _N , G ₁ ′ to G _N ′, P are performed by repeating the N times by changing the frequency interval between the _two pilot signals PL ₁ and PL ₂ from i = 1 to i = N. _{1 to} P _N and P ₁ ′ to P _N ′ are obtained in the storage unit 55.

Step S11: Using these values G _{1 to} G _N , G ₁ 'to G _N ', P _{1 to} P _N , and P ₁ 'to P _N ', frequency characteristics to be applied to the compensation distortion are obtained. As shown in FIGS. 26A and 26B or FIGS. 27A and 27B, the gains G _{1 to} G _N , G ₁ ′ to G _N ′, and the phases P _{1 to} P _N and P ₁ ′ to P _N ′ are obtained. Use to interpolate between points. 26A and 26B show a case of linear interpolation, and an example of the polynomial interpolation of FIGS. 27A and 27B is shown. As an interpolation method, in addition to linear interpolation and polynomial interpolation, spline interpolation and Lagrange interpolation are used. You can also
The frequency characteristics of the distortion component are realized by the frequency characteristic compensator 28 by interpolating the gains and phases obtained discretely in this way. The frequency characteristic finally given to the compensation distortion is a characteristic obtained by synthesizing the frequency characteristics of the gain adjuster 24, the phase adjuster 23, and the frequency characteristic compensator 28 as shown in FIGS. 28A and 28B or FIGS. 29A and 29B. When performing more accurate distortion compensation, the frequency interval of the pilot signal is set more finely. In the above description, only the third-order distortion has been described, but the same method can be applied when compensation after the fifth-order distortion is necessary.

Ninth Related Example FIG. 30 shows an example in which the embodiment of FIG. 23 is configured more specifically. Similar to the embodiment of FIG. 19, each frequency characteristic compensator 28A, 28B, 28C is a digital pre-disposition configured by FIR filters. A tota 20 is used. In this example, the pilot signal generation unit 12 generates digital tone signals PL ₁ and PL ₂ having variable frequencies represented by −f _i / 2 and + f _i / 2. In addition, the digital predistorter control unit 50, frequency controller 54 for controlling the oscillation frequency f _i of the pilot signal generator 12 is provided to further correspond to the control by the frequency characteristic controller 53. Other configurations are the same as those in FIG.
Two-tone signal of equal amplitude at the frequency interval f _i is input to the digital predistorter 20 as the pilot signal PL _1, PL _2, and its output signal is a signal obtained by adding the compensation distortion on a pilot signal. This signal is converted into an analog signal by the DA converter 31, given to the frequency up-converting unit 33, is up-converted to a radio frequency transmission signal of the center frequency f _c. The high frequency transmission signal is power amplified by the power amplifier 37. At this time, the compensation distortion generated by the digital predistorter 20 is set so as to perform distortion compensation in the entire transmission system. Therefore, there may be a difference between the compensation distortion of the input signal of the power amplifier 37 and the compensation distortion in the output signal of the digital predistorter 20. That is, an arbitrary device that changes the phase and amplitude of the signal may be inserted between the output of the digital predistorter 20 and the input of the power amplifier 37.

Similarly to the case of FIG. 19, the intermodulation distortion component is extracted by the directional coupler 38A and the band pass filter 38B, and is down-converted by the frequency down-conversion unit 40. The input signal of the digital predistorter control unit 50 is a signal obtained by digitizing the down-converted signal. Hereinafter, compensation of third-order distortion will be described as an example. The third-order distortion component extractor 51A of the digital predistorter control unit 50 extracts the upper and lower intermodulation distortion signals, which are third-order distortion components, using the upper band-pass filter and the lower band-pass filter. A gain adjuster 24A and a phase adjuster adjust the amplitude and phase of the output of the third-order distortion signal generator up to a distortion compensation amount that makes the adjacent channel leakage power ratio of the output of the power amplifier 37 equal to or less than a predetermined value using the extracted signal. 23A and frequency characteristic compensator 28A.
In order to obtain these compensation parameters, first, the gain G of the gain adjuster 24A and the phase P of the phase adjuster 23A are set as described with reference to FIG. These values may be set arbitrarily, but are desirably set so that the adjacent channel leakage power ratio becomes relatively small.

Next, as equal to or less than a predetermined adjacent channel leakage power ratio, the gain G ₁ and the phase P ₁ of the upper frequency of the frequency characteristic compensator _{28A (f c + 3f 1/} 2), the lower frequency (f _c -3f _1/2) 'and the phase P _1' gain G ₁ in the adjusting. For these control methods, algorithms of various optimization methods such as a least square estimation method and a steepest descent method can be applied. Next, G ₂ , G ₂ ′, P ₂ , and P ₂ ′ are similarly obtained by changing the frequency interval of two pilot signals of equal amplitude to f ₂ . This is repeated up to N times, and the gain and phase G _{2 to} G _N , G ₂ ′ to G _N ′, P for the frequencies f ₁ ,..., F _N of the frequency characteristic compensator 28A that achieves a predetermined adjacent channel leakage power ratio. _{2 to} P _N , P ₂ 'to P _N ' are obtained. As a method of interpolating the obtained gain and phase values, linear interpolation, polynomial interpolation, Lagrange interpolation, spline interpolation, or the like can be used. The tap coefficient of the FIR filter is set by the controller so as to realize the gain characteristic and frequency characteristic obtained by the interpolation.

In the above description, only the third-order distortion has been described, but the same method is applied when compensation after the fifth-order is required. At that time, the intermodulation distortion corresponding to the odd-order distortion to be compensated is extracted. The FIR filters 28A, 28B, and 28C of this embodiment may be disposed on the input side of the odd-order distortion generators 22A, 22B, and 22C.
The amplitude and phase of the distortion component of the power amplifier 37 change due to temperature change or aging change. Therefore, in order to always maintain a high distortion compensation amount, it is necessary to adaptively control the settings of the gain adjusters 24A, 24B, 24C, the phase adjusters 23A, 23B, 23C, and the frequency characteristic compensators 28A, 28B, 28C. There is. In the ninth related example, using two pilot signals enables adaptive control thereof.

Each frequency characteristic compensator 28A in the embodiment of the tenth related embodiment Figure 31 Figure 30, 28B, and 28C instead of configuring the FIR filter, FFT section like the embodiment of FIG. 20 and the coefficient multiplier and the IFFT portion of the An embodiment realized using three sets 28A1, 28A2, 28A3; 28B1, 28B2, 28B3; 28C1, 28C2, 28C3 is shown. As described with reference to FIG. 20, the output signals of the distortion generators 22A, 22B, and 22C are converted into the frequency domain by the Fourier transform processing in the FFT units 28A1, 28B1, and 28C1, and the frequency domain signals are converted into coefficient multipliers 28A2 and 28B2. , 28C2 and the frequency compensation characteristic, and then IFFT sections 28A3, 28B3, and 28C3 perform inverse transform to time domain signals. The digital predistorter control unit 50 adjusts the distortion components in the output of the power amplifier 37 so as to achieve a predetermined adjacent channel leakage power ratio, and gain adjusters 24A, 24B, 24C and phase adjusters 23A, The multiplication coefficients of 23B and 23C and frequency characteristic compensators 28A, 28B and 28C are controlled. The setting method of the coefficients of the frequency characteristic compensators 28A, 28B, and 28C using the pilot signal is the same as the setting method described in the embodiment of FIG.

The configuration of the digital predistorter 20 and the configuration of the digital predistorter controller 50 shown in FIGS. 19 and 20 (or FIGS. 30 and 31) described above are the same as the two digital predistorters in the embodiments of FIGS. The present invention may be applied to the distorters 20 ₁ and 20 ₂ and the digital predistorter control unit 50. Similarly, the configuration of the digital predistorter 20 shown in FIGS. 19 and 20 (or FIGS. 30 and 31) and the configuration of the digital predistorter control unit 50 are the same as the digital predistorter 20 and the digital predistorter 20 shown in FIGS. You may apply to the distorter control part 50. FIG.
In the above-described embodiment, the example in which the FIR filter is used as the frequency characteristic compensator has been shown. However, an IIR (infinite impulse response) filter may be used.

Eleventh Related Example In the above-described embodiment of FIG. 23 and each of the embodiments of FIGS. 30 and 31, the frequency characteristic compensator is obtained by sequentially changing the frequency interval Δf between the generated pilot signals PL ₁ and PL _{2 of} two equal amplitude waves. 28 (29A, 28B, 28C) is determined so as to be determined as shown in FIGS. 26A, 26B (or 27A, 27B), but in the following embodiments, the frequency of the pilot signal is fixed and up-converted. By sequentially changing the frequency, the frequency of the high frequency pilot signal is sequentially changed by Δf within the operating band of the power amplifier, and the intermodulation distortion at each frequency is detected to determine the characteristics of the frequency characteristic compensator 28.
An eleventh related example of the present invention will be described with reference to FIG.
The eleventh related example is similar to the embodiment of FIG. 30 in that the pilot signal generator 12, the adder 15, the digital predistorter 20, the digital / analog converter (DAC) 31, the frequency up-conversion unit 33, , A power amplifier 37, a distributor 38, a frequency down-conversion unit 40, and a digital predistorter control unit 50.

30 differs from the embodiment of FIG. 30 in that the frequency of the pilot signal is not changed in FIG. 32, and the pilot signal is changed within the operating band of the power amplifier 37 by changing the local oscillation frequency of the up-converter 33 by the frequency controller 54. Are controlled so as to be sequentially changed, and the oscillation frequency of the local oscillator 45 of the frequency down-conversion unit 40 is changed correspondingly to reduce the distortion component of the pilot signal to the baseband. In the example of FIG. 32, the up-conversion unit 33 is configured to perform two-stage up-conversion. That is, the local oscillator 33A1, the mixer 33B1, and the band pass filter 33C1 of the variable frequency f _IF perform the first-stage up-conversion, and convert the output of the digital / analog converter 31 into an intermediate frequency signal. A local oscillator 33A2, a mixer 33B2, and a band-pass filter 33C2 having a fixed frequency f _c ′ perform second-stage up-conversion to convert the intermediate frequency signal into a high-frequency signal.
Since the local oscillation frequency f _IF for conversion to an intermediate frequency signal is sufficiently lower than the local oscillation frequency (carrier frequency) f _c for up-conversion in the case of FIG. 30, it is more digital to perform up-conversion in two stages in this way. The up-conversion frequency can be set with higher accuracy for the baseband signal that is the output of the analog converter 31. However, in principle, the up-conversion unit 33 may have a single-stage configuration as in FIG.

In the embodiment of FIG. 32, the serial connection of the phase adjuster 23A and the gain adjuster 24A in the digital predistorter 20 represents the vector adjuster 234A, and the serial connection of other phase adjuster gain adjusters is also possible. Similarly, vector adjusters 234B and 234C are shown. The same applies to other embodiments.
32, the frequency characteristic compensators 28A, 28B, and 28C may be provided on the input side of the third-order, fifth-order, and seventh-order distortion generators 22A, 22B, and 22C as indicated by broken lines, or You may provide in both the input side and the output side.
FIG. 33 shows a control flowchart for setting the characteristics of the frequency characteristic compensators 28A, 28B, and 28C in the embodiment of FIG. This setting is performed during a period in which no signal is transmitted.

Step S1: The frequency characteristic control unit 53 sets the frequency f _IF for converting the pilot signal into an intermediate frequency signal in the local oscillator 33A1 of the frequency up-conversion unit 33.
Step S2: The pilot signals PL1 and PL2 are input to the digital predistorter 20. The pilot signal is converted into an analog signal by the digital-analog converter 31 via the digital predistorter 20, and then subjected to two-stage frequency up-conversion by the up-conversion unit 33, and input to the power amplifier 37 as an RF signal. .
Step S3: The output RF signal of the power amplifier 37 is distributed, and the frequency down-conversion unit 40 generates a pilot signal component including a distortion component in the baseband.
Step S4: As for the pilot signal component, each odd-order distortion component is extracted by each distortion component extractor 52A, 52B, 52C. At this time, each odd-order distortion component is detected above and below the fundamental wave. Step S5: Each odd-order distortion controller 52A, 52B, 52C causes the phase of each odd-order distortion by the vector adjusters 234A, 234B, 234C of the digital predistorter 20 so as to minimize each detected odd-order distortion component. And control the gain. Further, the set values of the frequency characteristic compensators 28A, 28B, and 28C that minimize the odd-order distortion components are stored in the storage unit 55 in correspondence with the odd-order distortion components. Here, each odd-order distortion component may be adjusted to be equal to or less than a certain set value. The set value may be set by an external setting means such as a keyboard.
Step S6: Next, the frequency characteristic control unit 53 determines whether or not the number of repetitions of the series of processes in steps S1 to S5 has reached a predetermined number, that is, whether or not the frequency sweep is completed. Finish setting the characteristics.
Step S7: If it is determined in step S6 that the frequency sweep has not ended, the set frequency f _IF is increased to f _IF + Δf, the process returns to step S1, and a series of processing steps S1 to S5 is repeated.

Also in the embodiment of FIG. 32, the frequency characteristic compensators 28A, 28B, and 28C may be provided on the input side of the odd-order distortion generators 22A, 22B, and 22C as indicated by broken lines, or It may be provided on both the output side. When the frequency characteristic compensators 28A, 28B, and 28C are provided on both the input side and the output side of the odd-order distortion generators 22A, 22B, and 22C, the frequency characteristic compensators on the input side and the output side are separately shown in FIG. The frequency characteristic compensator characteristic may be set by executing the above process.
As described with reference to FIGS. 16A and 16B, the nonlinearity of the power amplifier is determined by the dependency relationship between the nonlinearities on the input side and the output side. If there is a difference in the influence of the gate side (input side) and the drain side (output side) on the frequency characteristics of the intermodulation distortion caused by the power amplifier, the frequency characteristic compensator only on the input side or only on the output side of the odd-order distortion generator In some cases, it is difficult to make the frequency characteristic of the frequency characteristic compensator obtained by the processing of FIG. 33 sufficiently opposite to the frequency characteristic of the intermodulation distortion caused by the power amplifier. However, the frequency characteristic compensator is provided on both the input side and output side of the odd-order distortion generator, and the frequency characteristics are flattened with respect to the frequency characteristics on the input side and output side of the power amplifier by controlling each independently, that is, It becomes possible to obtain frequency characteristics that are inverse characteristics.

FIG. 34 shows a modification of the embodiment of FIG. In FIG. 34, as in the embodiment of FIG. 10, the predistortion processing is performed on the pilot signal and the transmission signal by the independent digital predistorters 20 ₁ and 20 ₂ , respectively. The configuration of each digital predistorter 20 ₁ , 20 ₂ is the same as that of the digital predistorter 20 in the embodiment shown in FIG. The output of the digital predistorter 20 ₂ on the pilot signal side is converted to an analog signal by the digital / analog converter 31 _2, and the frequency is converted to a frequency band different from that of the transmission signal by the first frequency up-converter 34. The set frequency of the local oscillator 34A of the frequency up-conversion unit 34 is swept by the digital predistorter control unit 50, so that the pilot signal frequency within the operating band of the power amplifier 37 is swept. The two digital predistorters 20 ₁ and 20 ₂ perform parameter synchronization control in the digital predistorter control unit 50.
In this way, a digital predistorter can be configured in consideration of the frequency characteristics of the power amplifier.

  As described above, according to the present invention, (1) a high amount of distortion compensation can be achieved, (2) a simple configuration is possible, (3) a small transmitter can be provided, and (4) temperature change Alternatively, since the distortion compensation amount can be optimally maintained with respect to secular change, it can be applied to, for example, a linear power amplifier, an amplification method, and a digital predistorter setting method of a microwave radio communication transmitter.

The graph which shows the relationship of the output back-off from efficiency vs 1dB gain compression point. The graph which shows the relationship between the amplitude deviation regarding a 3rd-order distortion component, and a phase deviation. The graph which shows the example of the amplitude versus frequency and phase versus frequency characteristic of a power amplifier. The block diagram which shows the fundamental structure of the linear power amplifier by this invention. The block diagram which shows the 1st related example of the linear power amplifier by related invention. The figure which shows typically the spectrum of the signal of each part of FIG. The flowchart which shows the process sequence which implements the linear power amplification method by related invention. The block diagram which shows the 2nd related example of the linear power amplifier by related invention. The figure which shows the spectrum of each part in FIG. 8 typically. The block diagram which shows the 3rd related example of the linear power amplifier by related invention. The block diagram which shows the 4th related example of the linear power amplifier by related invention. The block diagram which shows the modification of a 3rd and 4th related example. The block diagram which shows the modification of FIG. The block diagram which shows the modification of FIG. 1 is a block diagram showing a first embodiment of the present invention of a control unit for a digital predistorter. FIG. A is a diagram showing an equivalent circuit of an FET, and B is a diagram showing an equivalent circuit of an amplifier constituted by the FET. The block diagram which shows the principle structure of the 5th related example of the linear power amplifier by related invention. The graph for demonstrating operation | movement of a 5th related example. The block diagram which shows the specific structural example of a 5th related example. The block diagram which shows the structural example of the 6th related example of related invention. The block diagram which shows the structure of the 7th related example of related invention. The block diagram which shows the modification in case the pilot signal generator 12 in FIG. 21 produces | generates a modulation signal as a pilot signal. The block diagram which shows the structure of the 8th related example of related invention. The flowchart which shows the process sequence which calculates | requires the characteristic of a frequency characteristic compensator. The frequency chart explaining the production | generation of the compensation distortion with respect to a tertiary distortion. A is a diagram showing the gain frequency characteristic of the frequency characteristic compensator obtained by linear interpolation, and B is a diagram showing the phase frequency characteristic of the frequency characteristic compensator. A is a diagram showing gain frequency characteristics of a frequency characteristic compensator obtained by polynomial interpolation, and B is a diagram showing phase frequency characteristics determined by the frequency characteristic compensator. A is a diagram showing a gain frequency characteristic including a frequency characteristic compensator and a gain adjuster obtained by linear interpolation, and B is a diagram showing a phase frequency characteristic including a frequency characteristic compensator and a phase adjuster. A is a diagram showing a gain frequency characteristic including a frequency characteristic compensator and a gain adjuster obtained by polynomial interpolation, and B is a diagram showing a phase frequency characteristic including a frequency characteristic compensator and a phase adjuster. The block diagram which shows the structure of the 9th related example of related invention. The block diagram which shows the structure of the 10th related example of related invention. The block diagram which shows the structure of the 11th related example of related invention. The flowchart which shows the process sequence which sets the characteristic of the frequency characteristic compensation period in the Example of FIG. The block diagram which shows the modification of the Example of FIG.

Claims (2)

A pilot signal generator for generating a digital pilot signal;
A digital transmission signal and an adder for combining the digital pilot signal;
A digital predistorter that takes the output signal of the adder as input and performs predistortion processing by a power series model to generate a predistortion added signal;
A digital-to-analog converter that converts the predistorted signal output by the digital predistorter into an analog predistorted signal;
A frequency up-conversion unit for up-converting the analog predistorted signal to a transmission frequency band;
A power amplifier for power amplifying the upconverted signal;
A frequency down-conversion unit for down-converting a part of the output of the power amplifier and outputting a down-conversion signal;
From delay means for generating a digital pilot signal delayed from the digital pilot signal, distortion generating means for generating odd-order distortion other than a predetermined odd-order from the digital pilot signal, and a pilot signal in the down-converted signal component Subtracting means for subtracting the delayed digital pilot signal and the odd-order distortion other than the predetermined odd-order to detect the desired odd-order distortion component, and the digital pre-based based on the odd-order distortion component detected by the subtraction. A digital predistorter controller comprising an odd-order distortion characteristic controller that controls the phase and amplitude of the corresponding odd-order distortion component generated by the distorter;
A linear power amplifier, wherein the digital predistorter control unit controls a coefficient of the digital predistorter. A digital predistorter setting method in the linear power amplifier according to claim 1,
(a) generating a digital pilot signal;
(b) Combining the digital pilot signal and the digital transmission signal, generating a predetermined number of odd-order distortion components based on a power series model for the combined signal, and adding it to the combined signal to add predistortion Generating a signal;
(c) converting the predistorted signal to an analog predistorted signal;
(d) Upconverting the analog predistorted signal to a transmission frequency band at a predetermined carrier frequency;
(e) power amplifying the upconverted signal;
(f) downconverting a part of the power amplified output signal and outputting a pilot signal component;
(g) delaying the digital pilot signal;
(h) generating an odd-order distortion other than the predetermined odd-order from the digital pilot signal;
(i) subtracting the delayed digital pilot signal and the odd-order distortion other than the predetermined odd-order from the down-converted pilot signal;
(j) controlling the coefficient of the digital predistorter so that the level of the odd-order distortion component is reduced from the subtracted pilot signal component;
And a digital predistorter setting method.

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