JP4269431B2

JP4269431B2 - Solid-state imaging device, driving method thereof, and image input device

Info

Publication number: JP4269431B2
Application number: JP26993099A
Authority: JP
Inventors: 勝則野口
Original assignee: Sony Corp
Current assignee: Sony Corp
Priority date: 1999-09-24
Filing date: 1999-09-24
Publication date: 2009-05-27
Anticipated expiration: 2019-09-24
Also published as: JP2001094740A

Description

【０００１】
【発明の属する技術分野】
本発明は、複数列で取り込んだ電荷を交互に転送して出力したり、単列の電荷のみを転送して出力する固体撮像装置およびその駆動方法並びに画像入力装置に関する。
【０００２】
【従来の技術】
スキャナや複写機などに適用される画像入力装置においては、リニアセンサーから成る固体撮像装置が用いられており、この固体撮像装置による読取位置を走査することで画像の入力を行っている。
【０００３】
近年では、読取解像度の向上や読取速度の短縮が強く要求されてきており、リニアセンサーにおいても複数のセンサ列を用いて対応するものが開発されている。図５は、従来の固体撮像装置を説明する模式図で、センサ列が複数設けられたものである。
【０００４】
すなわち、この固体撮像装置は、画素Ｄ１、Ｄ２、…を備える第１の受光画素列１０と、画素Ｄ１’、Ｄ２’、…を備える第２の受光画素列２０と、第１の受光画素列１０で取り込んだ電荷を転送する第１の電荷転送列１２と、第２の受光画素列２０で取り込んだ電荷を転送する第２の電荷転送列２２と、第１の電荷転送列１２および第２の電荷転送列２２で転送された電荷を交互に転送するマルチプレクサ部３０とを備えている。また、マルチプレクサ部３０の後段には、出力ゲート３１、フローティングディフュージョンアンプ３２、リセットゲート３３およびリセットドレイン３４が設けられている。
【０００５】
このうち、第１の受光画素列１０を構成する画素Ｄ１、Ｄ２、…と、第２の受光画素列２０を構成する画素Ｄ１’、Ｄ２’、…とは、各々半ピッチずれた状態（千鳥状）で配置されており、単列で取り込む場合に比べて解像度の向上を図るようにしている。
【０００６】
図６は、従来の固体撮像装置における動作タイミングチャートである。このうち、φ１、φ２は、図５に示す第１の電荷転送列１２および第２の電荷転送列２２に交互に印加される。また、φ３、φ４はマルチプレクス部３０に印加される。このφ１、φ２によって、第１の電荷転送列１２および第２の電荷転送列２２で各々の電荷が順次交互に転送され、各々の転送列の最終段からマルチプレクス部３０へ交互に電荷が送られる。マルチプレクス部３０に送られた電荷は、φ１、φ２の２倍の周波数から成るφ３、φ４によって順次出力ゲート３１を介してフローティングディフュージョンアンプ３２へ送られ、出力信号Ｖ_outとなる。また、φ３の立ち下がり、およびφ４の立ち上がりに同期してリセットパルスφＲＳがリセットゲート３３に印加され、フローティングディフュージョンアンプ３２に転送された電荷をリセットドレイン３４に排出することになる。
【０００７】
このような動作によって、出力回路へは第１の受光画素列１０で取り込んだ電荷と第２の受光画素列２０で取り込んだ電荷とが所定の電圧となって交互に出力されることになる。
【０００８】
【発明が解決しようとする課題】
しかしながら、このような固体撮像装置では次のような問題がある。つまり、複数の受光画素列で取り込んだ画素を各々交互に読み出すことで解像度の向上を図ることはできるものの、単列の受光画素列で取り込んだ画素を読み出す場合に比べて読み出す画素数が多くなるため、読み出し時間が長くなって高速読み出しの用途には向かないという問題がある。また、１列の受光画素列の場合と同じスピードで信号出力を行おうとすると、電荷の転送周波数を高くする必要があり、信号のデータ領域が短くなって、外部での信号処理の扱いが困難となってしまう。
【０００９】
【課題を解決するための手段】
本発明は、このような課題を解決するために成された固体撮像装置およびその駆動方法および画像入力装置である。すなわち、本発明の固体撮像装置は、第１の受光画素列で取り込んだ電荷を順次転送する第１の電荷転送列と、第２の受光画素列で取り込んだ電荷を順次転送する第２の電荷転送列と、第１の電荷転送列の最終段および第２の電荷転送列の最終段と電荷電圧変換手段との間に設けられ、交互出力モードの場合、第１の電荷転送列および第２の電荷転送列で転送された各々の電荷を交互に転送し、単列出力モードの場合、第１の電荷転送列で転送された電荷を転送するマルチプレクス部と、交互出力モードの場合、第１の電荷転送列の最終段および第２の電荷転送列の最終段に各々逆相となる転送電位を与え、単列出力モードの場合、第１の電荷転送列の最終段に転送電位を与えるとともに第２の電荷転送列の最終段に一定の電位を与える転送電位発生手段とを備えている。
【００１０】
このような本発明では、交互出力モードの場合、第１の電荷転送列および第２の電荷転送列で転送された各々の電荷をマルチプレクス部で交互に転送し、各々の電荷に対応した信号出力を順次得ることができる。また、単列出力モードの場合、第２の電荷転送列で転送された電荷をその最終段で止めることになり、マルチプレクス部には転送されない。つまり、第１の電荷転送列で転送された電荷だけをマルチプレクス部で転送でき、第１の電荷転送列で転送された電荷に応じた出力のみを得ることができる。
【００１１】
また、本発明の固体撮像装置は、第１の受光画素列で取り込んだ電荷を順次転送する第１の電荷転送列と、第２の受光画素列で取り込んだ電荷を順次転送する第２の電荷転送列と、第１の電荷転送列の最終段および第２の電荷転送列の最終段と隣接して接続され、第１の電荷転送列および第２の電荷転送列で転送された各々の電荷を交互に転送するマルチプレクス部と、マルチプレクス部の後段に出力ゲートを介して接続される電荷電圧変換手段と、電荷電圧変換手段にリセットゲートを介して接続されるリセットドレインと、交互出力モードの場合、マルチプレクス部で交互に転送され、電荷電圧変換手段で各々電圧に変換された後の各電荷をリセットドレインへ排出する信号をリセットゲートへ与え、単列出力モードの場合、マルチプレクス部で交互に転送される電荷のうち、第２の電荷転送列で転送されてきた電荷が電荷電圧変換手段に転送されるタイミングと同期してその電荷をリセットドレインへ排出する信号をリセットゲートへ与える電位発生手段とを備えているものでもある。
【００１２】
このような本発明では、交互出力モードの場合、第１の電荷転送列および第２の電荷転送列で転送された各々の電荷をマルチプレクス部で交互に転送し、電荷電圧変換手段によって各々の電荷に対応した信号出力を順次得ることができる。また、単列出力モードの場合、第１の電荷転送列および第２の電荷転送列で転送された各々の電荷をマルチプレクス部で交互に転送し、順次電荷電圧変換手段に転送されるが、第２の電荷転送列で転送された電荷が電荷電圧変換手段に転送されるタイミングと同期してリセットゲートに信号が与えられ、その電荷をリセットドレインに排出している。これにより、電荷電圧変換手段では、第２の電荷転送列で転送されてきた電荷の電圧への変換を行わず、第１の電荷転送列で転送されてきた電荷のみ電圧への変換を行うようになる。つまり、第１の電荷転送列で転送されてきた電荷に対する出力のみを得ることができる。
【００１３】
また、本発明の固体撮像装置の駆動方法は、第１の受光画素列で取り込んだ電荷を順次転送する第１の電荷転送列と、第２の受光画素列で取り込んだ電荷を順次転送する第２の電荷転送列と、第１の電荷転送列の最終段および第２の電荷転送列の最終段と電荷電圧変換手段との間に設けられるマルチプレクス部とを備える固体撮像装置の駆動方法において、交互出力モードの場合、第１の電荷転送列の最終段および第２の電荷転送列の最終段に各々逆相となる転送電位を与え、単列出力モードの場合、第１の電荷転送列で転送された各々の電荷をマルチプレクス部で転送するため、第１の電荷転送列の最終段に転送電位を与えるとともに第２の電荷転送列の最終段に一定の電位を与えるものである。
【００１４】
このような本発明では、交互出力モードの場合、第１の電荷転送列および第２の電荷転送列で転送された各々の電荷をマルチプレクス部で交互に転送し、各々の電荷に対応した信号出力を順次得ることができる。また、単列出力モードの場合、第２の電荷転送列の最終段に一定の電位を与えることで、第２の電荷転送列で転送された電荷をその最終段で止めることになり、マルチプレクス部には転送されない。つまり、第１の電荷転送列で転送された電荷だけをマルチプレクス部で転送でき、第１の電荷転送列で転送された電荷に応じた出力のみを得ることができる。
【００１５】
また、本発明の固体撮像装置の駆動方法は、第１の受光画素列で取り込んだ電荷を順次転送する第１の電荷転送列と、第２の受光画素列で取り込んだ電荷を順次転送する第２の電荷転送列と、第１の電荷転送列の最終段および第２の電荷転送列の最終段と隣接して接続され、第１の電荷転送列および第２の電荷転送列で転送された各々の電荷を交互に転送するマルチプレクス部と、マルチプレクス部の後段に出力ゲートを介して接続される電荷電圧変換手段と、電荷電圧変換手段にリセットゲートを介して接続されるリセットドレインとを備える固体撮像装置の駆動方法において、交互出力モードの場合、マルチプレクス部で交互に転送され、電荷電圧変換手段で各々電圧に変換された後の各電荷をリセットドレインへ排出する信号を前記リセットゲートへ与え、単列出力モードの場合、マルチプレクス部で交互に転送される電荷のうち、第２の電荷転送列で転送されてきた電荷が電荷電圧変換手段に転送されるタイミングと同期してその電荷をリセットドレインへ排出する信号をリセットゲートへ与えるものでもある。
【００１６】
このような本発明では、交互出力モードの場合、第１の電荷転送列および第２の電荷転送列で転送された各々の電荷をマルチプレクス部で交互に転送し、電荷電圧変換手段によって各々の電荷に対応した信号出力を順次得ることができる。また、単列出力モードの場合、第１の電荷転送列および第２の電荷転送列で転送された各々の電荷をマルチプレクス部で交互に転送し、順次電荷電圧変換手段に転送されるが、第２の電荷転送列で転送された電荷が電荷電圧変換手段に転送されるタイミングと同期してリセットゲートに信号が与えられ、その電荷をリセットドレインに排出している。これにより、電荷電圧変換手段では、第２の電荷転送列で転送されてきた電荷の電圧への変換を行わず、第１の電荷転送列で転送されてきた電荷のみ電圧への変換を行うようになる。つまり、第１の電荷転送列で転送されてきた電荷に対する出力のみを得ることができる。
【００１７】
また、本発明の画像入力装置は、第１の受光画素列で取り込んだ電荷を順次転送する第１の電荷転送列と、第２の受光画素列で取り込んだ電荷を順次転送する第２の電荷転送列と、第１の電荷転送列の最終段および第２の電荷転送列の最終段と電荷電圧変換手段との間に設けられ、交互出力モードの場合、第１の電荷転送列および第２の電荷転送列で転送された各々の電荷を交互に転送し、単列出力モードの場合、第１の電荷転送列で転送された電荷を転送するマルチプレクス部と、交互出力モードの場合、第１の電荷転送列の最終段および第２の電荷転送列の最終段に各々逆相となる転送電位を与え、単列出力モードの場合、第１の電荷転送列の最終段に転送電位を与えるとともに第２の電荷転送列の最終段に一定の電位を与える電位発生手段とを備えている固体撮像装置を用いたものである。
【００１８】
このような本発明では、交互出力モードの場合、第１の電荷転送列および第２の電荷転送列で転送された各々の電荷をマルチプレクス部で交互に転送し、各々の電荷に対応した高解像度の信号出力を順次得ることができる。また、単列出力モードの場合、第２の電荷転送列で転送された電荷をその最終段で止めることになり、マルチプレクス部には転送されない。つまり、第１の電荷転送列で転送された電荷だけをマルチプレクス部で転送でき、第１の電荷転送列で転送された電荷に応じた出力のみを高速で得ることができる。
【００１９】
また、本発明の画像入力装置は、第１の受光画素列で取り込んだ電荷を順次転送する第１の電荷転送列と、第２の受光画素列で取り込んだ電荷を順次転送する第２の電荷転送列と、第１の電荷転送列の最終段および第２の電荷転送列の最終段と隣接して接続され、第１の電荷転送列および第２の電荷転送列で転送された各々の電荷を交互に転送するマルチプレクス部と、マルチプレクス部の後段に出力ゲートを介して接続される電荷電圧変換手段と、電荷電圧変換手段にリセットゲートを介して接続されるリセットドレインと、交互出力モードの場合、マルチプレクス部で交互に転送され、電荷電圧変換手段で各々電圧に変換された後の各電荷をリセットドレインへ排出する信号をリセットゲートへ与え、単列出力モードの場合、マルチプレクス部で交互に転送される電荷のうち、第２の電荷転送列で転送されてきた電荷が電荷電圧変換手段に転送されるタイミングと同期してその電荷をリセットドレインへ排出する信号をリセットゲートへ与える電位発生手段とを備えている固体撮像装置を用いたものでもある。
【００２０】
このような本発明では、交互出力モードの場合、第１の電荷転送列および第２の電荷転送列で転送された各々の電荷をマルチプレクス部で交互に転送し、電荷電圧変換手段によって各々の電荷に対応した高解像度の信号出力を順次得ることができる。また、単列出力モードの場合、第１の電荷転送列および第２の電荷転送列で転送された各々の電荷をマルチプレクス部で交互に転送し、順次電荷電圧変換手段に転送されるが、第２の電荷転送列で転送された電荷が電荷電圧変換手段に転送されるタイミングと同期してリセットゲートに信号が与えられ、その電荷をリセットドレインに排出している。これにより、電荷電圧変換手段では、第２の電荷転送列で転送されてきた電荷の電圧への変換を行わず、第１の電荷転送列で転送されてきた電荷のみ電圧への変換を行うようになる。つまり、第１の電荷転送列で転送されてきた電荷に対する出力のみを高速で得ることができる。
【００２１】
【発明の実施の形態】
以下、本発明の固体撮像装置およびその駆動方法並びに画像入力装置における実施の形態を図に基づいて説明する。図１は、本実施形態の固体撮像装置を説明する模式図である。すなわち、この固体撮像装置は、第１センサー列１０（画素Ｄ₁、…、Ｄ_n、Ｓ₁、Ｓ₂…Ｓ_n、Ｄ_n+1、…、Ｄ_m）と第２センサー列２０の２列の受光画素列（画素Ｄ₁’、…、Ｄ_n’、Ｓ₁’、Ｓ₂’…Ｓ_n’、Ｄ_n+1’、…、Ｄ_m’）で取り込んだ電荷を転送するもので、第１センサー列１０に平行したリードアウトゲート１１を介して第１ＣＣＤレジスタ１２と、第２センサー列２０に平行したリードアウトゲート２１を介して第２ＣＣレジスタ２２とを備えている。この第１センサー列１０と第２センサー列２０とは、各画素のピッチＰに対して半ピッチ（１／２Ｐ）ずれた状態（千鳥状）に配置され、高解像度の信号出力を得ることができるようになっている。
【００２２】
また、第１ＣＣＤレジスタ１２および第２ＣＣＤレジスタ２２で転送された各々の電荷を出力モードに応じて転送するマルチプレクス部３０と、マルチプレクス部３０の後段に接続される出力ゲート３１、電荷電圧変換手段であるフローティングディフュージョンアンプ３２、リセットゲート３３およびリセットドレイン３４とを備えている。さらに、第１ＣＣＤレジスタ１２および第２ＣＣＤレジスタ２２、マルチプレクス部３０、出力ゲート３１、リセットゲート３３に各々与えるパルスを発生する電位発生部（図示せず）も備えている。
【００２３】
ここで、出力モードとしては、交互出力モードと単列出力モードとがある。交互出力モードでは、第１センサー列１０および第２センサー列２０の各画素で取り込んだ電荷に対応する出力信号をフローティングディフュージョンアンプ３２から順次交互に出力し、単列モードでは、第１センサー列１０の各画素で取り込んだ電荷に対応する出力信号のみをフローティングディフュージョンアンプ３２から順次出力する。
【００２４】
例えば、精細な画像取り込みを行う場合など、高解像度な出力信号を得たい場合には交互出力モードで動作させ、画像取り込みのプリスキャン（画像サイズ等の判定を行う読み取り）を行う場合など、高速信号処理を行いたい場合には単列出力モードで動作させる。
【００２５】
図２は、本実施形態の固体撮像装置におけるマルチプレクス部付近を説明する模式図である。この第１センサー列１０に対応する第１ＣＣＤレジスタ１２には、φ１、φ２の転送パルスが交互に印加され、第１センサー列１０で取り込んだ電荷を順次マルチプレクス部３０の方向へ転送している。また、第２センサー列２０に対応する第２ＣＣＤレジスタ２２には、第１ＣＣＤレジスタ１２に印加されるφ１、φ２とは逆相となるφ２、φ１が交互に印加され、第２センサー列２０で取り込んだ電荷を順次マルチプレクス部３０の方向へ転送している。
【００２６】
次に、この固体撮像装置の駆動方法について説明する。先ず、交互出力モードの場合を説明する。交互出力モードでは、第１ＣＣＤレジスタ１２に転送パルスφ１、φ２を印加し、第２ＣＣＤレジスタ２２に転送パルスφ２、φ１を印加する。また、第１ＣＣＤレジスタ１２の最終段１２ａに印加するパルスφ２’として、上記φ２と同じパルスを印加し、第２ＣＣＤレジスタ２２の最終段２２ａに印加するパルスφ１’として、上記φ１と同じパルスを印加する。これにより、第１ＣＣＤレジスタ１２および第２ＣＣＤレジスタ２２によって第１センサー列１０で取り込んだ電荷および第２センサー列２０で取り込んだ電荷を交互に転送し、各最終段からマルチプレクス部３０へ交互に電荷を転送する。
【００２７】
マルチプレクス部３０には、φ１、φ２の２倍の周波数のクロックφ３、φ４を交互に印加する。これにより、マルチプレクス部３０の初段に交互に転送されてきた第１センサー列１０の電荷および第２センサー列２０の電荷を順に出力ゲート３１方向へ転送していく。そして、出力ゲート３１へ印加するパルスのタイミングに応じて各電荷がフローティングディフュージョンアンプ３２へ送られ、電荷量に応じた電圧となって出力回路へ送られることになる。また、次の電荷がフローティングディフュージョンアンプ３２へ送られる前にリセットゲート３３にリセットパルスφＲＳを印加し、フローティングディフュージョンアンプ３２に残っている電荷をリセットドレイン３４へ排出する。これによって、第１センサー列１０および第２センサー列２０で取り込んだ各電荷に対応する信号が交互に出力されることになる。
【００２８】
次に、単列出力モードの場合を説明する。単列出力モードでは、第１センサー列１０で取り込んだ電荷に対応する信号のみを出力する。本実施形態では、この単列出力モードに対応した駆動方法として、２つの方法がある。先ず、第１の駆動方法を説明する。図３は第１の駆動方法を説明するタイミングチャートである。
【００２９】
すなわち、この駆動方法では、第１ＣＣＤレジスタ１２にφ１、φ２を印加し、第２ＣＣＤレジスタ２２にφ２、φ１を印加する。また、第１ＣＣＤレジスタ１２の最終段１２ａに印加するパルスφ２’としては上記φ２と同じパルスを印加する。一方、第２ＣＣＤレジスタ２２の最終段２２ａに印加するパルスφ１’としては、例えばＬｏｗレベル一定の電圧を印加する。
【００３０】
このようなパルス印加によって、第１ＣＣＤレジスタ１２では、第１センサー列１０で取り込んだ各画素の電荷を順次マルチプレクス部３０へ転送することになるが、第２ＣＣＤレジスタ２２では、第２センサー列２０で取り込んだ各画素の電荷を最終段２２ａの手前まで転送し、その先へは転送しない状態となる。
【００３１】
そして、第１ＣＣＤレジスタ１２によって転送された第１センサー列１０の電荷はマルチプレクス部３０に印加されるφ３、φ４によって順次出力ゲート３１方向へ転送され、フローティングディフュージョンアンプ３２で電圧に変換されて出力されることになる。
【００３２】
一方、第２センサー列２０で取り込んだ電荷は第２ＣＣＤレジスタ２２によって最終段２２ａ手前まで転送されるが、その先へは転送されない。これによって、フローティングディフュージョンアンプ３２からは第１センサー列１０で取り込んだ電荷に対応する信号（図３に示すＳ１、Ｓ２、Ｓ３、…）のみが出力されることになる。
【００３３】
なお、第２ＣＣＤレジスタ２２で最終段２２ａ手前まで転送された電荷はここに蓄積されるため、所定のタイミングで排出するようにする。例えば、第２ＣＣＤレジスタ２２の最終段２２ａの手前の電荷転送領域に隣接して排出ドレインを設けておき、１列分の電荷が転送されるたびに第２ＣＣＤレジスタ２２の最終段２２ａ手前から電荷を排出するようにする。これにより、電荷の蓄積によるオーバーフローを防止できる。
【００３４】
次に、第２の駆動方法を説明する。図４は第１の駆動方法を説明するタイミングチャートである。すなわち、この駆動方法では、第１ＣＣＤレジスタ１２にφ１、φ２を印加し、第２ＣＣＤレジスタ２２にφ２、φ１を印加する。また、第１ＣＣＤレジスタ１２の最終段１２ａに印加するパルスφ２’として、上記φ２と同じパルスを印加し、第２ＣＣＤレジスタ２２の最終段２２ａに印加するパルスφ１’として、上記φ１と同じパルスを印加する。つまり、第１ＣＣＤレジスタ１２および第２ＣＣＤレジスタ２２によって、各々第１センサー列１０および第２センサー列２０で取り込んだ電荷を順次交互にマルチプレクス部３０の方向へ転送することになる。
【００３５】
次に、マルチプレクス部３０には、φ１、φ２の２倍の周波数のクロックφ３、φ４を交互に印加する。これにより、マルチプレクス部３０の初段に交互に転送されてきた第１センサー列１０の電荷および第２センサー列２０の電荷を順に出力ゲート３１方向へ転送していく。そして、出力ゲート３１へ印加するパルスのタイミングに応じて各電荷がフローティングディフュージョンアンプ３２へ送られることになるが、ここで、第２センサー列２０で取り込んだ電荷の転送タイミングに同期して、リセットゲート３３へ印加するリセットパルスφＲＳを印加する。これにより、第２センサー列２０で取り込んだ電荷がフローティングディフュージョンアンプ３２へ転送されると同時にその電荷がリセットドレイン３４へ排出され、出力しない状態となる。
【００３６】
一方、第１センサー列１０で取り込んだ電荷がフローティングディフュージョンアンプ３２へ転送される際にはリセットゲート３３へリセットパルスφＲＳが印加されず、フローティングディフュージョンアンプ３２から電荷量に応じた電圧が出力されることになる。つまり、このような駆動によって、リセットパルスφＲＳの印加されていない間、第１センサー列１０で取り込んだ電荷に対応する出力信号が得られることになる。
【００３７】
第２の駆動方法では、φ３、φ４の１周期分、出力信号が得られることから、後段の出力回路での信号処理に時間的な余裕が生じて確実な信号処理を行うことができるようになる。
【００３８】
上記説明した固体撮像装置およびその駆動方法は、主としてスキャナーや複写機などの画像入力装置に適用される。この場合、精細な画像取り込みを行う場合など、高解像度が要求される場合には、先に説明した交互出力モードによって第１センサー列１０および第２センサー列２０で取り込んだ各画素の出力を得るようにし、画像取り込み時のプリスキャン（画像サイズや領域判定等を行う読み取り）の場合など、限られた時間内で高速に信号処理を行う必要がある場合には、先に説明した単列出力モードによって第１センサー列１０の各画素の出力のみを得るようにする。これによって、一つの固体撮像装置で高解像度および高速処理の両方の要求に対応することができるようになる。
【００３９】
なお、上記説明した実施形態では、複数の画素が列状に並ぶラインセンサーの場合を説明したが、複数の画素がエリア状（マトリクス状）に並ぶエリアセンサーの場合であっても適用可能である。
【００４０】
【発明の効果】
以上説明したように、本発明の固体撮像装置およびその駆動方法並びに画像入力装置によれば次のような効果がある。すなわち、一つの固体撮像装置で高解像度および高速信号処理の両方に対応でき、多様なニーズに答えることが可能となる。また、出力モードに切り替えが、一つのパルス変更のみで行えることから、回路配線などの複雑化を招くことなく、モード切り替えに対応することが可能となる。これによって、高解像度および高速信号処理の両方に対応できる固体撮像装置の製造コストを低減させることが可能となる。
【図面の簡単な説明】
【図１】本実施形態の固体撮像装置を説明する模式図である。
【図２】本実施形態の固体撮像装置におけるマルチプレクス部周辺を説明する模式図である。
【図３】本実施形態の第１の駆動方法を説明するタイミングチャートである。
【図４】本実施形態の第２の駆動方法を説明するタイミングチャートである。
【図５】従来の固体撮像装置のマルチプレクス部周辺を説明する模式図である。
【図６】従来の駆動方法を説明するタイミングチャートである。
【符号の説明】
１０…第１センサー列、１１…リードアウトゲート、１２…第１ＣＣＤレジスタ、２０…第２センサー列、２１…リードアウトゲート、２２…第２ＣＣＤレジスタ、３０…マルチプレクス部、３１…出力ゲート、３２…フローティングディフュージョンアンプ、３３…リセットゲート、３４…リセットドレイン[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a solid-state imaging device, a driving method thereof, and an image input device that alternately transfer and output charges taken in a plurality of columns or transfer and output only a single column of charges.
[0002]
[Prior art]
In an image input device applied to a scanner, a copying machine, and the like, a solid-state imaging device including a linear sensor is used, and an image is input by scanning a reading position by the solid-state imaging device.
[0003]
In recent years, there has been a strong demand for improvement in reading resolution and reduction in reading speed, and a linear sensor that uses a plurality of sensor arrays has been developed. FIG. 5 is a schematic diagram for explaining a conventional solid-state imaging device, in which a plurality of sensor arrays are provided.
[0004]
That is, this solid-state imaging device includes a first light receiving pixel column 10 including pixels D1, D2,..., A second light receiving pixel column 20 including pixels D1 ′, D2 ′,. 10, the first charge transfer column 12 that transfers the charge captured by the second light receiving pixel column 20, the second charge transfer column 22 that transfers the charge captured by the second light receiving pixel column 20, the first charge transfer column 12 and the second charge transfer column 12. And a multiplexer unit 30 for alternately transferring the charges transferred by the charge transfer train 22. Further, an output gate 31, a floating diffusion amplifier 32, a reset gate 33 and a reset drain 34 are provided at the subsequent stage of the multiplexer unit 30.
[0005]
Among these, the pixels D1, D2,... Constituting the first light receiving pixel column 10 and the pixels D1 ′, D2 ′,. The resolution is improved as compared with the case of capturing in a single row.
[0006]
FIG. 6 is an operation timing chart in the conventional solid-state imaging device. Among these, φ1 and φ2 are alternately applied to the first charge transfer train 12 and the second charge transfer train 22 shown in FIG. Φ3 and φ4 are applied to the multiplex unit 30. Due to these φ 1 and φ 2, the charges are sequentially transferred alternately in the first charge transfer train 12 and the second charge transfer train 22, and the charges are alternately sent from the final stage of each transfer train to the multiplex unit 30. It is done. The charges sent to the multiplex unit 30 are sequentially sent to the floating diffusion amplifier 32 via the output gate 31 by φ3 and φ4 each having a frequency twice that of φ1 and φ2. _out It becomes. The reset pulse φRS is applied to the reset gate 33 in synchronization with the falling of φ3 and the rising of φ4, and the charge transferred to the floating diffusion amplifier 32 is discharged to the reset drain 34.
[0007]
By such an operation, the electric charge taken in by the first light receiving pixel column 10 and the electric charge taken in by the second light receiving pixel column 20 are alternately outputted to the output circuit as a predetermined voltage.
[0008]
[Problems to be solved by the invention]
However, such a solid-state imaging device has the following problems. In other words, although it is possible to improve the resolution by alternately reading the pixels captured by the plurality of light receiving pixel columns, the number of pixels to be read increases compared to the case of reading the pixels captured by the single light receiving pixel column. For this reason, there is a problem that the reading time becomes long and is not suitable for high-speed reading. In addition, if signal output is performed at the same speed as in the case of one light receiving pixel column, it is necessary to increase the charge transfer frequency, and the signal data area is shortened, making it difficult to handle external signal processing. End up.
[0009]
[Means for Solving the Problems]
The present invention is a solid-state imaging device, a driving method thereof, and an image input device, which have been made to solve such problems. That is, in the solid-state imaging device of the present invention, the first charge transfer column that sequentially transfers the charges captured by the first light receiving pixel column and the second charge that sequentially transfers the charges captured by the second light receiving pixel column. A transfer sequence, a final stage of the first charge transfer sequence, and a final stage of the second charge transfer sequence, In the case of the alternate output mode, each charge transferred in the first charge transfer column and the second charge transfer column is alternately transferred in the case of the single column output mode. Transfer the charges transferred in the first charge transfer train Multiplex and alternate output mode , Transfer potentials having opposite phases are applied to the final stage of the first charge transfer train and the final stage of the second charge transfer train, respectively, and in the single-column output mode, the transfer potential is applied to the final stage of the first charge transfer train. And a transfer potential generating means for supplying a constant potential to the final stage of the second charge transfer train.
[0010]
In the present invention, in the alternate output mode, the respective charges transferred in the first charge transfer train and the second charge transfer train are alternately transferred in the multiplex unit, and signals corresponding to the respective charges are transferred. Outputs can be obtained sequentially. In the single column output mode, the charges transferred in the second charge transfer column are stopped at the final stage, and are not transferred to the multiplex unit. That is, only the charges transferred by the first charge transfer train can be transferred by the multiplex unit, and only the output corresponding to the charges transferred by the first charge transfer train can be obtained.
[0011]
In the solid-state imaging device of the present invention, a first charge transfer column that sequentially transfers charges taken in by the first light receiving pixel row and a second charge that sequentially transfers charges taken in by the second light receiving pixel row. Each charge transferred adjacent to the transfer column and the last stage of the first charge transfer column and the last stage of the second charge transfer column and transferred in the first charge transfer column and the second charge transfer column A multiplex unit that alternately transfers, a charge-voltage conversion unit that is connected to the subsequent stage of the multiplex unit via an output gate, a reset drain that is connected to the charge-voltage conversion unit via a reset gate, and an alternate output mode In the case of the single column output mode, a signal for discharging each charge, which is alternately transferred in the multiplex part and converted into a voltage by the charge voltage conversion means, to the reset drain is given to the reset gate. The reset gate outputs a signal for discharging the charge transferred to the reset voltage drain in synchronization with the timing at which the charge transferred in the second charge transfer column is transferred to the charge-voltage conversion means. It is also provided with a potential generating means for applying to the voltage.
[0012]
In the present invention, in the alternate output mode, the respective charges transferred in the first charge transfer train and the second charge transfer train are alternately transferred in the multiplex section, and each charge voltage conversion means transfers each charge. Signal outputs corresponding to the charges can be obtained sequentially. In the single-column output mode, the charges transferred in the first charge transfer string and the second charge transfer string are alternately transferred in the multiplex unit and sequentially transferred to the charge voltage conversion unit. A signal is given to the reset gate in synchronization with the timing at which the charge transferred in the second charge transfer train is transferred to the charge voltage conversion means, and the charge is discharged to the reset drain. As a result, the charge voltage conversion means does not convert the charge transferred in the second charge transfer string into a voltage, but converts only the charge transferred in the first charge transfer string into a voltage. become. That is, it is possible to obtain only an output for the charges transferred by the first charge transfer train.
[0013]
In the solid-state imaging device driving method according to the present invention, the first charge transfer column that sequentially transfers charges taken in by the first light receiving pixel row and the first charge transfer that sequentially transfers charges taken in by the second light receiving pixel row. Two charge transfer columns, a final stage of the first charge transfer column, and a final stage of the second charge transfer column, Provided between charge voltage conversion means In a driving method of a solid-state imaging device including a multiplex unit, in an alternate output mode , In the case of single column output mode, transfer potentials having opposite phases are applied to the final stage of the first charge transfer string and the final stage of the second charge transfer string, In order to transfer each charge transferred in the first charge transfer train in the multiplex part, A transfer potential is applied to the final stage of the first charge transfer train and a constant potential is applied to the final stage of the second charge transfer train.
[0014]
In the present invention, in the alternate output mode, the respective charges transferred in the first charge transfer train and the second charge transfer train are alternately transferred in the multiplex unit, and signals corresponding to the respective charges are transferred. Outputs can be obtained sequentially. In the single column output mode, by applying a constant potential to the final stage of the second charge transfer column, the charges transferred in the second charge transfer column are stopped at the final stage. It is not transferred to the department. That is, only the charges transferred by the first charge transfer train can be transferred by the multiplex unit, and only the output corresponding to the charges transferred by the first charge transfer train can be obtained.
[0015]
In the solid-state imaging device driving method according to the present invention, the first charge transfer column that sequentially transfers charges taken in by the first light receiving pixel row and the first charge transfer that sequentially transfers charges taken in by the second light receiving pixel row. 2 charge transfer columns are connected adjacent to the last stage of the first charge transfer string and the last stage of the second charge transfer string, and transferred by the first charge transfer string and the second charge transfer string. A multiplex unit that alternately transfers each charge, a charge-voltage conversion unit connected to the subsequent stage of the multiplex unit via an output gate, and a reset drain connected to the charge-voltage conversion unit via a reset gate In the driving method of the solid-state imaging device provided, in the alternate output mode, a signal for transferring each charge after being alternately transferred by the multiplex unit and converted to a voltage by the charge voltage conversion means to the reset drain is sent to the reset drain. In the single-column output mode, in synchronization with the timing at which the charges transferred in the second charge transfer column among the charges transferred alternately in the multiplex unit are transferred to the charge voltage conversion means A signal for discharging the electric charge to the reset drain is also given to the reset gate.
[0016]
In the present invention, in the alternate output mode, the respective charges transferred in the first charge transfer train and the second charge transfer train are alternately transferred in the multiplex section, and each charge voltage conversion means transfers each charge. Signal outputs corresponding to the charges can be obtained sequentially. In the single-column output mode, the charges transferred in the first charge transfer string and the second charge transfer string are alternately transferred in the multiplex unit and sequentially transferred to the charge voltage conversion unit. A signal is given to the reset gate in synchronization with the timing at which the charge transferred in the second charge transfer train is transferred to the charge voltage conversion means, and the charge is discharged to the reset drain. As a result, the charge voltage conversion means does not convert the charge transferred in the second charge transfer string into a voltage, but converts only the charge transferred in the first charge transfer string into a voltage. become. That is, it is possible to obtain only an output for the charges transferred by the first charge transfer train.
[0017]
In the image input device of the present invention, a first charge transfer column that sequentially transfers charges taken in by the first light receiving pixel row and a second charge that sequentially transfers charges taken in by the second light receiving pixel row. A transfer sequence, a final stage of the first charge transfer sequence, and a final stage of the second charge transfer sequence, In the case of the alternate output mode, each charge transferred in the first charge transfer column and the second charge transfer column is alternately transferred in the case of the single column output mode. Transfer the charges transferred in the first charge transfer train Multiplex and alternate output mode , Transfer potentials having opposite phases are applied to the final stage of the first charge transfer train and the final stage of the second charge transfer train, respectively, and in the single-column output mode, the transfer potential is applied to the final stage of the first charge transfer train. And a solid-state imaging device that includes a potential generating means for applying a constant potential to the final stage of the second charge transfer train.
[0018]
In the present invention, in the alternate output mode, the respective charges transferred in the first charge transfer train and the second charge transfer train are alternately transferred in the multiplex unit, and the high charges corresponding to the respective charges are transferred. The resolution signal output can be obtained sequentially. In the single column output mode, the charges transferred in the second charge transfer column are stopped at the final stage, and are not transferred to the multiplex unit. That is, only the charges transferred by the first charge transfer train can be transferred by the multiplex unit, and only the output corresponding to the charges transferred by the first charge transfer train can be obtained at high speed.
[0019]
In the image input device of the present invention, a first charge transfer column that sequentially transfers charges taken in by the first light receiving pixel row and a second charge that sequentially transfers charges taken in by the second light receiving pixel row. Each charge transferred adjacent to the transfer column and the last stage of the first charge transfer column and the last stage of the second charge transfer column and transferred in the first charge transfer column and the second charge transfer column A multiplex unit that alternately transfers, a charge-voltage conversion unit that is connected to the subsequent stage of the multiplex unit via an output gate, a reset drain that is connected to the charge-voltage conversion unit via a reset gate, and an alternate output mode In the case of the single column output mode, a signal for discharging each charge, which is alternately transferred in the multiplex part and converted into a voltage by the charge voltage conversion means, to the reset drain is given to the reset gate. The reset gate outputs a signal for discharging the charge transferred to the reset voltage drain in synchronization with the timing at which the charge transferred in the second charge transfer column is transferred to the charge-voltage conversion means. In addition, a solid-state imaging device including a potential generating means for applying to the device is used.
[0020]
In the present invention, in the alternate output mode, the respective charges transferred in the first charge transfer train and the second charge transfer train are alternately transferred in the multiplex section, and each charge voltage conversion means transfers each charge. A high-resolution signal output corresponding to the charge can be sequentially obtained. In the single-column output mode, the charges transferred in the first charge transfer string and the second charge transfer string are alternately transferred in the multiplex unit and sequentially transferred to the charge voltage conversion unit. A signal is given to the reset gate in synchronization with the timing at which the charge transferred in the second charge transfer train is transferred to the charge voltage conversion means, and the charge is discharged to the reset drain. As a result, the charge voltage conversion means does not convert the charge transferred in the second charge transfer string into a voltage, but converts only the charge transferred in the first charge transfer string into a voltage. become. That is, only the output for the charges transferred in the first charge transfer train can be obtained at high speed.
[0021]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of the solid-state imaging device, the driving method thereof, and the image input device of the present invention will be described below with reference to the drawings. FIG. 1 is a schematic diagram for explaining the solid-state imaging device of the present embodiment. That is, the solid-state imaging device includes the first sensor array 10 (pixel D ₁ ... D _n , S ₁ , S ₂ ... S _n , D _{n + 1} ... D _m ) And the second sensor row 20 and the two light receiving pixel rows (pixel D). ₁ ', ..., D _n ', S ₁ ', S ₂ '... S _n ', D _{n + 1} ', ..., D _m ') Is used to transfer the electric charge, and the first CC register 12 via the readout gate 11 parallel to the first sensor row 10 and the second CC via the readout gate 21 parallel to the second sensor row 20 are transferred. And a register 22. The first sensor array 10 and the second sensor array 20 are arranged in a state (staggered) that is shifted by a half pitch (1 / 2P) with respect to the pitch P of each pixel to obtain a high-resolution signal output. It can be done.
[0022]
Also, a multiplex unit 30 for transferring the respective charges transferred by the first CCD register 12 and the second CCD register 22 in accordance with the output mode, an output gate 31 connected to the subsequent stage of the multiplex unit 30, and a charge voltage conversion means A floating diffusion amplifier 32, a reset gate 33, and a reset drain 34. Further, a potential generator (not shown) for generating pulses to be supplied to the first CCD register 12 and the second CCD register 22, the multiplex unit 30, the output gate 31, and the reset gate 33 is also provided.
[0023]
Here, the output mode includes an alternate output mode and a single column output mode. In the alternate output mode, output signals corresponding to the charges taken in by the pixels of the first sensor array 10 and the second sensor array 20 are sequentially output from the floating diffusion amplifier 32 alternately. In the single array mode, the first sensor array 10 Only the output signal corresponding to the electric charge taken in each pixel is sequentially output from the floating diffusion amplifier 32.
[0024]
For example, when you want to obtain a high-resolution output signal, such as when capturing a fine image, operate in the alternate output mode, and when performing a pre-scan of image capture (reading that determines the image size, etc.) If you want to perform signal processing, operate in single-row output mode.
[0025]
FIG. 2 is a schematic diagram for explaining the vicinity of the multiplex unit in the solid-state imaging device of the present embodiment. Transfer pulses of φ1 and φ2 are alternately applied to the first CCD register 12 corresponding to the first sensor array 10, and the charges taken in by the first sensor array 10 are sequentially transferred in the direction of the multiplexing unit 30. . In addition, φ2 and φ1 that are opposite in phase to φ1 and φ2 applied to the first CCD register 12 are alternately applied to the second CCD register 22 corresponding to the second sensor row 20 and are captured by the second sensor row 20. The charges are sequentially transferred in the direction of the multiplex unit 30.
[0026]
Next, a method for driving the solid-state imaging device will be described. First, the case of the alternate output mode will be described. In the alternate output mode, transfer pulses φ 1 and φ 2 are applied to the first CCD register 12, and transfer pulses φ 2 and φ 1 are applied to the second CCD register 22. The same pulse as φ2 is applied as the pulse φ2 ′ applied to the final stage 12a of the first CCD register 12, and the same pulse as φ1 is applied as the pulse φ1 ′ applied to the final stage 22a of the second CCD register 22. To do. As a result, the charge taken in by the first sensor row 10 and the charge taken in by the second sensor row 20 by the first CCD register 12 and the second CCD register 22 are alternately transferred, and the charge is alternately transferred from each final stage to the multiplex unit 30. Forward.
[0027]
Clocks φ3 and φ4 having a frequency twice that of φ1 and φ2 are alternately applied to the multiplex unit 30. As a result, the charge of the first sensor array 10 and the charge of the second sensor array 20 that are alternately transferred to the first stage of the multiplex unit 30 are sequentially transferred toward the output gate 31. Then, each charge is sent to the floating diffusion amplifier 32 according to the timing of the pulse applied to the output gate 31, and is sent to the output circuit as a voltage corresponding to the amount of charge. Further, before the next charge is sent to the floating diffusion amplifier 32, a reset pulse φRS is applied to the reset gate 33, and the charge remaining in the floating diffusion amplifier 32 is discharged to the reset drain 34. As a result, signals corresponding to the charges taken in by the first sensor array 10 and the second sensor array 20 are alternately output.
[0028]
Next, the case of the single column output mode will be described. In the single column output mode, only a signal corresponding to the electric charge taken in by the first sensor column 10 is output. In the present embodiment, there are two driving methods corresponding to this single column output mode. First, the first driving method will be described. FIG. 3 is a timing chart for explaining the first driving method.
[0029]
That is, in this driving method, φ1 and φ2 are applied to the first CCD register 12, and φ2 and φ1 are applied to the second CCD register 22. The same pulse as φ2 is applied as the pulse φ2 ′ applied to the final stage 12a of the first CCD register 12. On the other hand, as the pulse φ1 ′ applied to the final stage 22a of the second CCD register 22, for example, a voltage having a low level is applied.
[0030]
By applying such a pulse, the first CCD register 12 sequentially transfers the charge of each pixel taken in by the first sensor array 10 to the multiplexing unit 30, but in the second CCD register 22, the second sensor array 20 The charge of each pixel taken in is transferred up to the front of the final stage 22a and is not transferred beyond that.
[0031]
Then, the charges of the first sensor array 10 transferred by the first CCD register 12 are sequentially transferred toward the output gate 31 by φ3 and φ4 applied to the multiplex unit 30, converted into a voltage by the floating diffusion amplifier 32, and output. Will be.
[0032]
On the other hand, the electric charge taken in by the second sensor array 20 is transferred by the second CCD register 22 up to the last stage 22a, but is not transferred beyond that. As a result, only the signals (S1, S2, S3,... Shown in FIG. 3) corresponding to the charges taken in by the first sensor array 10 are output from the floating diffusion amplifier 32.
[0033]
Since the charges transferred up to the last stage 22a before the second CCD register 22 are accumulated here, they are discharged at a predetermined timing. For example, a discharge drain is provided adjacent to the charge transfer region before the final stage 22a of the second CCD register 22, and charge is transferred from the front of the final stage 22a of the second CCD register 22 each time the charge for one column is transferred. Try to drain. Thereby, overflow due to charge accumulation can be prevented.
[0034]
Next, the second driving method will be described. FIG. 4 is a timing chart for explaining the first driving method. That is, in this driving method, φ1 and φ2 are applied to the first CCD register 12, and φ2 and φ1 are applied to the second CCD register 22. The same pulse as φ2 is applied as the pulse φ2 ′ applied to the final stage 12a of the first CCD register 12, and the same pulse as φ1 is applied as the pulse φ1 ′ applied to the final stage 22a of the second CCD register 22. To do. That is, the first CCD register 12 and the second CCD register 22 transfer the charges taken in by the first sensor array 10 and the second sensor array 20, respectively, in the direction of the multiplex unit 30 alternately.
[0035]
Next, clocks φ3 and φ4 having a frequency twice that of φ1 and φ2 are alternately applied to the multiplex unit 30. As a result, the charge of the first sensor array 10 and the charge of the second sensor array 20 that are alternately transferred to the first stage of the multiplex unit 30 are sequentially transferred toward the output gate 31. Then, each charge is sent to the floating diffusion amplifier 32 in accordance with the timing of the pulse applied to the output gate 31. Here, the reset is performed in synchronization with the transfer timing of the charge taken in by the second sensor array 20. A reset pulse φRS to be applied to the gate 33 is applied. As a result, the charge taken in by the second sensor array 20 is transferred to the floating diffusion amplifier 32, and at the same time, the charge is discharged to the reset drain 34 and is not output.
[0036]
On the other hand, when the charge taken in by the first sensor array 10 is transferred to the floating diffusion amplifier 32, the reset pulse φRS is not applied to the reset gate 33, and a voltage corresponding to the amount of charge is output from the floating diffusion amplifier 32. It will be. That is, by such driving, an output signal corresponding to the charge taken in by the first sensor array 10 is obtained while the reset pulse φRS is not applied.
[0037]
In the second driving method, an output signal is obtained for one cycle of φ3 and φ4, so that there is a time margin in signal processing in the output circuit in the subsequent stage so that reliable signal processing can be performed. Become.
[0038]
The above-described solid-state imaging device and the driving method thereof are mainly applied to an image input device such as a scanner or a copying machine. In this case, when high resolution is required, such as when capturing a fine image, the output of each pixel captured by the first sensor array 10 and the second sensor array 20 is obtained by the alternate output mode described above. If you need to perform high-speed signal processing within a limited amount of time, such as pre-scanning when scanning images (reading that determines image size, area, etc.) Only the output of each pixel of the first sensor array 10 is obtained depending on the mode. This makes it possible to meet the demands for both high resolution and high speed processing with a single solid-state imaging device.
[0039]
In the above-described embodiment, the case of a line sensor in which a plurality of pixels are arranged in a row has been described. However, the present invention is also applicable to an area sensor in which a plurality of pixels are arranged in an area (matrix). .
[0040]
【The invention's effect】
As described above, the solid-state imaging device, the driving method thereof, and the image input device of the present invention have the following effects. That is, a single solid-state imaging device can cope with both high resolution and high-speed signal processing, and can respond to various needs. Further, since switching to the output mode can be performed only by changing one pulse, it is possible to cope with mode switching without causing complication of circuit wiring or the like. As a result, it is possible to reduce the manufacturing cost of a solid-state imaging device that can support both high resolution and high-speed signal processing.
[Brief description of the drawings]
FIG. 1 is a schematic diagram illustrating a solid-state imaging device according to an embodiment.
FIG. 2 is a schematic diagram illustrating the vicinity of a multiplex unit in the solid-state imaging device according to the present embodiment.
FIG. 3 is a timing chart illustrating a first driving method according to the present embodiment.
FIG. 4 is a timing chart illustrating a second driving method according to the present embodiment.
FIG. 5 is a schematic diagram illustrating the periphery of a multiplex unit of a conventional solid-state imaging device.
FIG. 6 is a timing chart illustrating a conventional driving method.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 10 ... 1st sensor row | line | column, 11 ... Lead-out gate, 12 ... 1st CCD register, 20 ... 2nd sensor row | line | column, 21 ... Lead-out gate, 22 ... 2nd CCD register, 30 ... Multiplex part, 31 ... Output gate, 32 ... Floating diffusion amplifier, 33 ... Reset gate, 34 ... Reset drain

Claims

A first charge transfer column that sequentially transfers charges taken in by the first light receiving pixel column;
A second charge transfer column for sequentially transferring charges taken in by the second light receiving pixel column;
Provided between the last stage of the first charge transfer string and the last stage of the second charge transfer string and the charge voltage conversion means, and in the alternate output mode, the first charge transfer string and the second charge transfer string. Each of the charges transferred in the first charge transfer sequence is alternately transferred, and in the single-column output mode, a multiplex unit that transfers the charges transferred in the first charge transfer sequence ;
If the alternate output mode, giving each transfer potential opposite phases at the final stage and the final stage of the second charge transfer row of said first charge transfer column, the case of the single column output mode, the first And a potential generating means for applying a transfer potential to the last stage of the second charge transfer train and applying a constant potential to the last stage of the second charge transfer train.

The solid-state imaging device according to claim 1, wherein a charge discharging unit is provided adjacent to a final stage of the second charge transfer train.

A first charge transfer column that sequentially transfers charges taken in by the first light receiving pixel column;
A second charge transfer column for sequentially transferring charges taken in by the second light receiving pixel column;
Each charge transferred adjacent to the last stage of the first charge transfer string and the last stage of the second charge transfer string and transferred by the first charge transfer string and the second charge transfer string A multiplex part that alternately transfers
Charge voltage conversion means connected to the subsequent stage of the multiplex part via an output gate;
A reset drain connected to the charge-voltage conversion means via a reset gate;
In the case of the alternate output mode, a signal for discharging each charge after being alternately transferred by the multiplex unit and converted into a voltage by the charge voltage conversion means to the reset drain is given to the reset gate, and the single column output mode In this case, among the charges transferred alternately in the multiplex unit, the charges transferred in the second charge transfer train are reset in synchronism with the timing at which the charges are transferred to the charge voltage conversion means. A solid-state imaging device comprising: potential generating means for supplying a signal to be discharged to the drain to the reset gate.

A first charge transfer column for sequentially transferring charges taken in by the first light receiving pixel row; a second charge transfer row for sequentially transferring charges taken by the second light receiving pixel row; and the first charge transfer. In a method for driving a solid-state imaging device, comprising: a final stage of a column; and a multiplex unit provided between the final stage of the second charge transfer column and the charge-voltage conversion unit ;
In the alternate output mode, since the respective charges transferred in the first charge transfer sequence and the second charge transfer sequence are alternately transferred in the multiplex unit, the last stage of the first charge transfer sequence And applying a transfer potential having an opposite phase to the final stage of the second charge transfer train,
In the single-column output mode, in order to transfer each charge transferred in the first charge transfer sequence by the multiplex unit, a transfer potential is applied to the final stage of the first charge transfer sequence and the second A method for driving a solid-state imaging device, wherein a constant potential is applied to the last stage of the charge transfer train.

5. The method of driving a solid-state imaging device according to claim 4, wherein in the single column output mode, the charges transferred up to the last stage of the second charge transfer column are discharged at a predetermined timing.

A first charge transfer column for sequentially transferring charges taken in by the first light receiving pixel row; a second charge transfer row for sequentially transferring charges taken by the second light receiving pixel row; and the first charge transfer. A multi-channel that is connected adjacent to the final stage of the column and the final stage of the second charge transfer column and alternately transfers the charges transferred in the first charge transfer column and the second charge transfer column. Solid-state imaging device driving method comprising: a plexer; a charge-voltage converter connected to a subsequent stage of the multiplex part via an output gate; and a reset drain connected to the charge-voltage converter via a reset gate In
In the case of the alternate output mode, a signal for discharging each charge after being alternately transferred by the multiplex unit and converted into a voltage by the charge voltage conversion means to the reset drain is given to the reset gate,
In the single column output mode, out of the charges transferred alternately in the multiplex unit, the charges transferred in the second charge transfer column are synchronized with the timing of transfer to the charge voltage conversion means. A driving method of a solid-state imaging device, wherein a signal for discharging electric charge to the reset drain is given to the reset gate.

A first charge transfer column for sequentially transferring charges taken in by the first light receiving pixel row; a second charge transfer row for sequentially transferring charges taken by the second light receiving pixel row; and the first charge transfer. Provided between the final stage of the column and the final stage of the second charge transfer column and the charge-voltage conversion means, and in the alternate output mode, transfer is performed in the first charge transfer column and the second charge transfer column. was transferred to each of the charge alternately, for a single row output mode, a multiplexing unit for transferring the charges transferred by said first charge transfer column, the case of the alternate output mode, the first charge giving each transfer potential opposite phases at the final stage and the final stage of the second charge transfer row transfer column, the case of the single column output mode, giving a transfer potential to the final stage of the first charge transfer row In addition, a constant potential is applied to the final stage of the second charge transfer train. An image input apparatus characterized by using a solid-state imaging device and a potential generating means for obtaining.

The image input device according to claim 7, wherein a charge discharging unit is provided adjacent to a final stage of the second charge transfer train in the solid-state imaging device.

A first charge transfer column for sequentially transferring charges taken in by the first light receiving pixel row; a second charge transfer row for sequentially transferring charges taken by the second light receiving pixel row; and the first charge transfer. A multi-channel that is connected adjacent to the final stage of the column and the final stage of the second charge transfer column and alternately transfers the charges transferred in the first charge transfer column and the second charge transfer column. In the case of an alternating output mode, a plex part, a charge voltage conversion means connected to the subsequent stage of the multiplex part via an output gate, a reset drain connected to the charge voltage conversion means via a reset gate, A signal that discharges each charge after being alternately transferred in the multiplex part and converted into a voltage by the charge voltage conversion means to the reset drain is supplied to the reset gate. A signal that discharges the charges transferred to the second charge transfer train to the reset drain in synchronism with the timing at which the charges transferred in the second charge transfer sequence are transferred to the charge voltage conversion means among the charges transferred alternately in the multiplex unit An image input device comprising: a solid-state imaging device including a potential generating means for applying a voltage to the reset gate.