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JP4264091B2 - Wiring board manufacturing method - Google Patents

Wiring board manufacturing method Download PDF

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JP4264091B2
JP4264091B2 JP2006050956A JP2006050956A JP4264091B2 JP 4264091 B2 JP4264091 B2 JP 4264091B2 JP 2006050956 A JP2006050956 A JP 2006050956A JP 2006050956 A JP2006050956 A JP 2006050956A JP 4264091 B2 JP4264091 B2 JP 4264091B2
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layer
copper
melting point
wiring
tin
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JP2006203230A (en
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康雄 福田
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Kyocera Corp
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Kyocera Corp
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/0132Binary Alloys
    • H01L2924/01322Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1517Multilayer substrate
    • H01L2924/15192Resurf arrangement of the internal vias
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA

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  • Parts Printed On Printed Circuit Boards (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Wire Bonding (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To prevent the deterioration in strength due to diffusion of a component of copper of wiring layer into a brazing material of a low meting point by the heat generated in connecting an electronic component via the brazing material of a low melting point when forming a non-defect film on the wiring layer of the surface of the wiring board using a plating film of tin etc. which melts at a low temperature. <P>SOLUTION: In the wiring board 4, the electrode of the electronic component 3 is connected to an insulating substrate 1 composed of a glass ceramic via a brazing material 5 of a low melting point and the wiring layer 2 which contains copper as a main component is formed on it. In the wiring substrate 4, a heat-treated copper/tin alloy layer 6 and a heat-treated silver or gold/tin alloy layer 7 are formed on the surface of area where the electrode is connected via the brazing material 5 of a low melting point in the wiring layer 2. Thereby, the component of the copper in the wiring layer 2 can be effectively prevented from diffusing into the brazing material 5 of a low melting point when connecting the brazing material 5 of a low melting point to the wiring layer 2. <P>COPYRIGHT: (C)2006,JPO&amp;NCIPI

Description

本発明は、半導体素子や容量素子,抵抗器等の電子部品が半田等の低融点ロウ材を介して搭載される配線基板であって、その表面の配線層にめっき層が被着されている配線基板の製造方法に関するものである。 The present invention is a wiring board on which electronic components such as a semiconductor element, a capacitor element, and a resistor are mounted via a low-melting-point brazing material such as solder, and a plating layer is deposited on the wiring layer on the surface thereof The present invention relates to a method for manufacturing a wiring board.

従来、半導体素子や容量素子,抵抗器等の電子部品が搭載される配線基板は、一般に、酸化アルミニウム質焼結体から成る絶縁基体と、この絶縁基体の上面から下面にかけて形成されたタングステン,モリブデン等の高融点金属材料から成る複数個の配線層とから構成されており、絶縁基体の上面に半導体素子や容量素子,抵抗器等の電子部品を搭載するとともにこのような電子部品の各電極を配線層に半田等の低融点ロウ材を介して電気的に接続するようになっている。   Conventionally, a wiring board on which electronic components such as a semiconductor element, a capacitor element, and a resistor are mounted generally includes an insulating base made of an aluminum oxide sintered body, and tungsten and molybdenum formed from the upper surface to the lower surface of the insulating base. And a plurality of wiring layers made of a refractory metal material such as a semiconductor element, a capacitor element, a resistor, and other electronic components are mounted on the upper surface of the insulating base and each electrode of such an electronic component is mounted It is electrically connected to the wiring layer through a low melting point solder such as solder.

このような配線基板は、配線層の絶縁基体の下面に導出されている部位を外部電気回路基板の配線導体に半田等の低融点ロウ材を介し接続することによって外部電気回路基板上に実装され、同時に配線基板に搭載されている電子部品の各電極が所定の外部電気回路に電気的に接続されることとなる。   Such a wiring board is mounted on the external electric circuit board by connecting a portion led to the lower surface of the insulating base of the wiring layer to the wiring conductor of the external electric circuit board via a low melting point solder such as solder. At the same time, each electrode of the electronic component mounted on the wiring board is electrically connected to a predetermined external electric circuit.

また、上述の配線基板は、配線層のうち少なくとも電子部品が半田等の低融点ロウ材を介して接続される領域に、ニッケル−リン合金またはニッケル−ホウ素合金から成るニッケルめっき層と金めっき層とが順次被着されており、このニッケルめっき層によってタングステン等の高融点金属材料から成る配線層に対する半田等の接合を良好とし、金めっき層によってニッケルめっき層の表面にニッケルの酸化物が形成されて半田接合性等が劣化するのを防止している。   The above-mentioned wiring board includes a nickel plating layer and a gold plating layer made of a nickel-phosphorus alloy or a nickel-boron alloy in a region where at least an electronic component is connected via a low melting point solder such as solder. This nickel plating layer makes it possible to improve the bonding of solder etc. to the wiring layer made of a refractory metal material such as tungsten, and the gold plating layer forms nickel oxide on the surface of the nickel plating layer This prevents the solderability and the like from deteriorating.

また、これらニッケルめっき層および金めっき層を被着させる方法としては、配線基板の小型化に伴う配線層の高密度化によって配線層に対するめっき電力供給用の引き出し線の形成が困難なことから、無電解法が多用されつつある。   In addition, as a method of depositing these nickel plating layer and gold plating layer, it is difficult to form a lead wire for supplying plating power to the wiring layer due to the high density of the wiring layer accompanying the miniaturization of the wiring board, Electroless methods are being used frequently.

一方、金めっき層の下地めっき層となるニッケルめっき層には、タングステン,モリブデン等の高融点金属材料から成る配線層に強固に被着させるとともに、ニッケルめっき層に内在する応力によるクラックやピンホール等のめっき皮膜欠陥をニッケルの結晶成長により抑制する目的のために、例えば800℃乃至1000℃の熱処理が加えられる。それにより、めっき液が残留しやすいクラックやピンホールがニッケルめっき層において極めて少なくなるため、電子部品を配線層に半田等を介して接続させる際の熱によって残留していためっき液が金めっき層上にしみ出し、それが斑点状のしみを形成して外観不良を生じるという問題が発生しにくいものとなる。
特開平10−102266号公報 特開2001−131774号公報
On the other hand, the nickel plating layer, which is the base plating layer of the gold plating layer, is firmly attached to the wiring layer made of a refractory metal material such as tungsten or molybdenum, and cracks and pinholes due to the stress inherent in the nickel plating layer. For example, a heat treatment at 800 ° C. to 1000 ° C. is performed for the purpose of suppressing plating film defects such as nickel crystal growth. As a result, the number of cracks and pinholes in which the plating solution tends to remain is extremely small in the nickel plating layer, so that the plating solution that remains due to heat when the electronic component is connected to the wiring layer via solder or the like is removed from the gold plating layer. It exudes to the top, and it becomes difficult for the problem that it forms a spot-like blotch to cause poor appearance.
Japanese Patent Laid-Open No. 10-102266 JP 2001-131774 A

近年の高度情報化時代を迎え、信号に使用される周波数帯域はますます高周波帯に移行しつつある。このような高周波の信号の伝送を行なう高周波用の配線基板においては、高周波信号を高速で伝送する上で、配線層を形成する導体の抵抗が小さいことが要求され、絶縁基体にもより低い誘電率が要求される。   In the recent advanced information age, the frequency band used for signals is increasingly shifting to the high frequency band. In a high-frequency wiring board that transmits such a high-frequency signal, the resistance of the conductor forming the wiring layer is required to be low in order to transmit the high-frequency signal at high speed, and the insulating substrate has a lower dielectric constant. A rate is required.

しかし、従来の配線層に用いられているタングステン,モリブデン等の高融点金属は、導体抵抗が大きいため、信号の伝播速度が遅く、また30GHz以上の高周波領域の信号伝播も困難であることから、このようなタングステン,モリブデン等の金属に代えて銅,銀,金等の低抵抗金属を使用することが必要である。   However, refractory metals such as tungsten and molybdenum used in conventional wiring layers have a large conductor resistance, so the signal propagation speed is slow, and signal propagation in a high frequency region of 30 GHz or more is difficult. It is necessary to use a low resistance metal such as copper, silver or gold in place of such a metal such as tungsten or molybdenum.

このため、最近では、ガラスとセラミックス(無機質フィラー)との混合物を焼成して得られるガラスセラミックスを絶縁基体として用いることが注目されている。ガラスセラミックスは、誘電率が低いため高周波用絶縁基体として好適であり、また800℃乃至1000℃の低温で焼成することができることから、銅,銀,金等の低抵抗金属を配線層として使用できるという利点がある。   For this reason, recently, the use of glass ceramics obtained by firing a mixture of glass and ceramics (inorganic filler) as an insulating substrate has attracted attention. Glass ceramics are suitable for high-frequency insulating substrates because of their low dielectric constant, and can be fired at a low temperature of 800 ° C. to 1000 ° C., so that low resistance metals such as copper, silver, and gold can be used as wiring layers. There is an advantage.

なお、配線層として使用される低抵抗金属としては、高周波特性に優れた銅を主成分とした導体を用いることが主流となっている。   In addition, as a low resistance metal used as a wiring layer, it has become mainstream to use the conductor which has copper which was excellent in the high frequency characteristic as a main component.

しかしながら、これらガラスセラミックスに使用される銅を主成分とする導体は、めっき層が被着形成されにくいガラス成分を多量に含有し、そのガラス成分が表面に多数露出して表面が粗面となっており、かつ、焼成の際に絶縁基体の上面に設置され絶縁基体に反りが生ずることを防ぐ役目を果たすセッターの成分が配線層の表面に付着していることが多く、そのため配線層の表面全体にニッケルめっき層を均一に被着させることができないという問題点があった。   However, the copper-based conductors used in these glass ceramics contain a large amount of glass components in which the plating layer is difficult to be deposited, and many of the glass components are exposed on the surface, resulting in a rough surface. In addition, a setter component that is installed on the upper surface of the insulating base during firing and serves to prevent warping of the insulating base is often attached to the surface of the wiring layer. There was a problem that the nickel plating layer could not be uniformly applied to the whole.

そこで、配線層の表面のガラスおよび付着物を、フッ化物を主成分としたガラスエッチング液に浸漬して化学的に除去したり、ブラスト装置等で物理的に除去したりすることが行なわれ、外観的には配線層の表面の全面にニッケルめっき層を均一に被着させることが行なわれている。   Therefore, the glass and deposits on the surface of the wiring layer are chemically removed by immersing them in a glass etching solution containing fluoride as a main component, or physically removed with a blasting device or the like. In appearance, a nickel plating layer is uniformly applied over the entire surface of the wiring layer.

ところが、これらの化学的や物理的なガラスおよび付着物の除去においても、その処理条件には絶縁基体や配線層の強度低下を避ける必要性があるため制限があることから、ガラスおよび付着物を完全に除去することができなかった。そのため、配線層の表面には微量のガラスや付着物が残留することになり、この微量の残留したガラスや付着物は、特に初期のめっき析出を阻害することから、ニッケルめっき層に応力の高い部分を形成してしまい、そのため、走査型電子顕微鏡でニッケルめっき層の表面を観察すると斑点状に微細なクラック状の異常析出部を形成してしまうという問題点があった。   However, even in the removal of these chemical and physical glasses and deposits, the processing conditions are limited because it is necessary to avoid a decrease in the strength of the insulating substrate and wiring layer. It could not be removed completely. Therefore, a trace amount of glass and deposits remain on the surface of the wiring layer, and this trace amount of remaining glass and deposits inhibits the initial plating deposition, so the nickel plating layer has high stress. Therefore, when the surface of the nickel plating layer is observed with a scanning electron microscope, there is a problem that fine crack-like abnormal precipitates are formed in spots.

この微細なクラック状の異常析出部には、めっき液が残留し易く、ここに残留しためっき液が電子部品を配線層に半田等を介して接続させる際の熱によってニッケルめっき層上の金めっき層の表面にしみ出し、斑点状のしみを形成して外観不良を生じるという問題点があった。   The plating solution tends to remain in the fine crack-like abnormal deposits, and the plating solution remaining here is gold plated on the nickel plating layer by heat when the electronic component is connected to the wiring layer via solder or the like. There is a problem that the surface of the layer oozes out and a spot-like blot is formed, resulting in poor appearance.

この異常析出部を抑制するためには、例えば熱処理を加えることが考えられるが、ニッケルめっき層の結晶成長に必要な800℃乃至1000℃の熱処理を加えると、銅から成る配線層にフクレ等の問題が誘発されるという問題点があった。
このため、低い融点で結晶成長させることのできる錫めっきや半田めっきもしくは鉛代替半田等を施した後、熱処理することで欠陥の無い皮膜を形成し、しみ出しや斑点状のしみの発生を防止するといった手法が一般的にとられるが、半田等の低融点ロウ材実装時の熱や、再実装(リペア)時の熱により、銅を主成分とする配線層中の銅成分が半田等の低融点ロウ材中に拡散し接合性を劣化させるという不具合があった。
In order to suppress this abnormal precipitation portion, for example, heat treatment may be applied. However, if heat treatment at 800 ° C. to 1000 ° C. necessary for crystal growth of the nickel plating layer is applied, the wiring layer made of copper may have a blistering or the like. There was a problem that the problem was triggered.
For this reason, after performing tin plating, solder plating, or lead substitute solder that can grow crystals with a low melting point, heat treatment is performed to form a defect-free film, preventing exudation and spotted spots from occurring In general, the copper component in the wiring layer mainly composed of copper, such as solder, is caused by the heat at the time of mounting a low melting point soldering material such as solder or the heat at the time of remounting (repair). There was a problem that it diffused into the low melting point brazing material and deteriorated the bondability.

本発明は以上のような従来の技術における問題点に鑑みて案出されたものであり、その目的は、配線層が半田等の低融点ロウ材を介して接続される領域以外の表面にしみ出しや斑点状のしみを形成して外観不良を生じることを防止するため、配線層の表面にニッケルよりも低い温度で粒成長する皮膜を形成した場合においても、電子部品を配線層に半田等の低融点ロウ材を介して接続させる際の熱によって銅を主成分とする配線層中の銅成分が半田等の低融点ロウ材中に拡散することを防止できる配線基板の製造方法を提供することにある。   The present invention has been devised in view of the above-described problems in the prior art, and its purpose is to blot the surface other than the region where the wiring layer is connected via a low-melting-point brazing material such as solder. Even when a film that grows at a temperature lower than that of nickel is formed on the surface of the wiring layer in order to prevent appearance defects due to protrusions and spotted spots, electronic components are soldered to the wiring layer. Provided is a method of manufacturing a wiring board capable of preventing the copper component in a wiring layer mainly composed of copper from diffusing into a low melting point brazing material such as solder due to heat at the time of connection via the low melting point brazing material. There is.

本発明の配線基板の製造方法は、電子部品が搭載されるガラスセラミックからなる絶縁基体と、該絶縁基体に形成された銅を主成分とした配線層と、前記の配線層上に形成さた銅錫合金層および銀錫合金とを有する配線基板の製造方法であって、前記の電子部品の電極が電気的に接続される前記の配線層の領域の表面に、0.5〜5μmの厚みを有する錫めっき層、および0.13〜1.3μmの厚みを有する銀めっき層を順次形成し、かつ熱処理することにより、前記の配線層上に銅錫合金層および銀錫合金層を順次形成する。The method for manufacturing a wiring board according to the present invention includes an insulating base made of glass ceramic on which an electronic component is mounted, a wiring layer mainly composed of copper formed on the insulating base, and the wiring layer formed on the wiring layer. A method of manufacturing a wiring board having a copper-tin alloy layer and a silver-tin alloy, wherein a thickness of 0.5 to 5 μm is formed on the surface of the region of the wiring layer to which the electrodes of the electronic component are electrically connected. A copper-plated alloy layer and a silver-tin alloy layer are sequentially formed on the wiring layer by sequentially forming a tin-plated layer having a thickness of 0.13 and a silver-plated layer having a thickness of 0.13 to 1.3 μm and heat-treating it. To do.

好ましくは、前記の配線基板の製造方法において、前記の錫めっき層の厚みに対する前記の銀めっき層の厚みの比は、1/4である。Preferably, in the method for manufacturing a wiring board, a ratio of the thickness of the silver plating layer to the thickness of the tin plating layer is 1/4.

本発明の配線基板の製造方法は、電子部品が搭載されるガラスセラミックからなる絶縁基体と、該絶縁基体に形成された銅を主成分とした配線層と、前記の配線層上に形成された銅錫合金層および金錫合金とを有する配線基板の製造方法であって、前記の電子部品の電極が電気的に接続される前記の配線層の領域の表面に、0.5〜5μmの厚みを有する錫めっき層、および0.4〜4.1μmの厚みを有する金めっき層を順次形成し、かつ熱処理することにより、前記の配線層上に銅錫合金層および金錫合金層を順次形成する。The method of manufacturing a wiring board according to the present invention includes an insulating base made of glass ceramic on which electronic components are mounted, a wiring layer mainly composed of copper formed on the insulating base, and the wiring layer formed on the wiring layer. A method of manufacturing a wiring board having a copper-tin alloy layer and a gold-tin alloy, wherein a thickness of 0.5 to 5 μm is formed on a surface of the wiring layer region to which the electrodes of the electronic component are electrically connected. A copper-plated alloy layer and a gold-tin alloy layer are sequentially formed on the wiring layer by sequentially forming a tin-plated layer having a thickness of 0.4 to 4.1 μm and a heat treatment. To do.

以上により、本発明の配線基板およびその製造方法によれば、配線層が半田等の低融点ロウ材を介して接続される領域以外の表面にしみ出しや斑点状のしみを形成して外観不良を生じることを防止するため、配線層の表面にニッケルよりも低い温度で粒成長する皮膜を形成した場合においても、電子部品を配線層に半田等の低融点ロウ材を介して接続させる際の熱によって銅を主成分とする配線層中の銅成分が半田等の低融点ロウ材中に拡散することを防止できる配線基板およびその製造方法を提供することができた。   As described above, according to the wiring board and the manufacturing method thereof of the present invention, the wiring layer forms a bleed or spotted stain on the surface other than the region where the wiring layer is connected via the low melting point brazing material such as solder. In order to prevent the occurrence of the above, even when a film that grows at a temperature lower than that of nickel is formed on the surface of the wiring layer, the electronic component is connected to the wiring layer via a low melting point solder such as solder. It was possible to provide a wiring board capable of preventing the copper component in the wiring layer containing copper as a main component from being diffused into a low melting point solder such as solder and a method for manufacturing the same.

次に、本発明の配線基板およびその製造方法の実施の形態を添付図面に基づき詳細に説明する。 Next, a description of an embodiment of a wiring board and a manufacturing method thereof accompanying with reference to the drawings in detail the present invention.

図1は、本発明の実施の形態による配線基板を半導体素子を収容する半導体素子収納用パッケージに適用した場合の実施の形態の一例を示し、1は絶縁基体、2は配線層、3は電子部品、4は絶縁基体1と配線層2とで構成された、半導体素子等の電子部品3を搭載するための配線基板、5は低融点ロウ材、8は蓋体である。 FIG. 1 shows an example of an embodiment in which a wiring board according to an embodiment of the present invention is applied to a package for housing a semiconductor element for housing a semiconductor element. 1 is an insulating substrate, 2 is a wiring layer, 3 is an electron Components 4 are a wiring board for mounting an electronic component 3 such as a semiconductor element, which is composed of an insulating substrate 1 and a wiring layer 2, 5 is a low melting point brazing material, and 8 is a lid.

絶縁基体1は、ガラス粉末,フィラー粉末(セラミック粉末)、さらに有機バインダ,可塑剤,有機溶剤等を混合したガラスセラミックグリーンシートを焼結することで形成される。   The insulating substrate 1 is formed by sintering a glass ceramic green sheet in which glass powder, filler powder (ceramic powder), and an organic binder, plasticizer, organic solvent and the like are mixed.

ガラス成分としては、例えばSiO2−B2O3系,SiO2−B2O3−Al2O3系,SiO2−B2O3−Al2O3−MO系(但し、MはCa,Sr,Mg,BaまたはZnを示す),SiO2−Al2O3−M1O−M2O系(但し、M1およびM2は同一または異なってCa,Sr,Mg,BaまたはZnを示す),SiO2−B2O3−Al2O3−M1O−M2O系(但し、M1およびM2は前記と同じである),SiO2−B2O3−M32O系(但し、M3はLi,NaまたはKを示す),SiO2−B2O3−Al2O3−M32O系(但し、M3は前記と同じである),Pb系ガラス,Bi系ガラス等が挙げられる。   Examples of the glass component include SiO 2 —B 2 O 3, SiO 2 —B 2 O 3 —Al 2 O 3, SiO 2 —B 2 O 3 —Al 2 O 3 —MO (where M represents Ca, Sr, Mg, Ba or Zn), SiO 2 —Al 2 O 3 —M 1 O— M2O system (provided that M1 and M2 are the same or different and represent Ca, Sr, Mg, Ba or Zn), SiO2-B2O3-Al2O3-M1O-M2O system (where M1 and M2 are the same as above), SiO2-B2O3-M32O system (where M3 represents Li, Na or K), SiO2-B2O3-Al2O3-M32O system (where M3 is the same as above), Pb glass, Bi glass, etc. It is done.

また、フィラーとしては、例えばAl2O3,SiO2,ZrO2とアルカリ土類金属酸化物との複合酸化物,TiO2とアルカリ土類金属酸化物との複合酸化物,Al2O3およびSiO2から選ばれる少なくとも1種を含む複合酸化物(例えばスピネル,ムライト,コージェライト)等が挙げられる。   Examples of the filler include at least one selected from Al2O3, SiO2, ZrO2 and an alkaline earth metal oxide, TiO2 and an alkaline earth metal oxide, Al2O3 and SiO2. Examples thereof include complex oxides (for example, spinel, mullite, cordierite) and the like.

これらガラスとフィラーとの混合割合は質量比で40:60〜99:1であるのが好ましい。   The mixing ratio of these glass and filler is preferably 40:60 to 99: 1 by mass ratio.

ガラスセラミックグリーンシートに配合される有機バインダとしては、従来からセラミックグリーンシートに使用されているものが使用可能であり、例えばアクリル系(アクリル酸,メタクリル酸またはそれらのエステルの単独重合体または共重合体、具体的にはアクリル酸エステル共重合体,メタクリル酸エステル共重合体,アクリル酸エステル−メタクリル酸エステル共重合体等),ポリビニルブチラール系,ポリビニルアルコール系,アクリル−スチレン系,ポリプロピレンカーボネート系,セルロース系等の単独重合体または共重合体が挙げられる。   As the organic binder blended in the glass ceramic green sheet, those conventionally used for ceramic green sheets can be used. For example, acrylic (acrylic acid, methacrylic acid or ester homopolymer or copolymer) A polymer, specifically an acrylic ester copolymer, a methacrylic ester copolymer, an acrylic ester-methacrylic ester copolymer, etc.), polyvinyl butyral, polyvinyl alcohol, acrylic-styrene, polypropylene carbonate, Examples include cellulose-based homopolymers or copolymers.

ガラスセラミックグリーンシートは、上記ガラス粉末,フィラー粉末,有機バインダに必要に応じて所定量の可塑剤,溶剤(有機溶剤,水等)を加えてスラリーを得て、これをドクターブレード,圧延,カレンダーロール,金型プレス等により厚さ約50μm乃至500μmに成形することによって得られる。   The glass ceramic green sheet is obtained by adding a predetermined amount of plasticizer and solvent (organic solvent, water, etc.) to the glass powder, filler powder, and organic binder as necessary to obtain a slurry, which is then used as a doctor blade, rolled, calender. It can be obtained by molding to a thickness of about 50 μm to 500 μm by a roll, a die press or the like.

このようにして得られたガラスセラミックグリーンシートに切断加工や打ち抜き加工等を施して適当な形状にするとともに、これを複数枚積層した後、有機成分の除去および焼成を行なう。有機成分の除去は、100℃乃至800℃の温度範囲でこの積層体を加熱することによって行ない、有機成分を分解,揮散させる。また、焼成温度はガラスセラミック組成により異なるが、通常は約800℃乃至1100℃の範囲内である。焼成は通常、大気中で行なうが、導体材料に銅を使用する場合には100℃乃至700℃の水蒸気を含む窒素雰囲気中で有機成分の除去を行なった後、窒素雰囲気中で焼成を行なう。   The glass ceramic green sheet thus obtained is subjected to cutting, punching, or the like to obtain an appropriate shape, and after stacking a plurality of these, the organic components are removed and fired. The organic component is removed by heating the laminate in a temperature range of 100 ° C. to 800 ° C. to decompose and volatilize the organic component. The firing temperature varies depending on the glass ceramic composition, but is usually in the range of about 800 ° C to 1100 ° C. Firing is usually performed in the air, but when copper is used as the conductor material, organic components are removed in a nitrogen atmosphere containing water vapor at 100 ° C. to 700 ° C., and then the firing is performed in a nitrogen atmosphere.

また、絶縁基体1は、上面の搭載部から下面にかけて多数の配線層2が被着形成されており、配線層2の搭載部に露出した部位には電子部品3の電極が半田等の低融点ロウ材5を介して電気的に接続され、下面に導出された部位は外部電気回路と半田等の低融点ロウ材を介して電気的に接続される。   The insulating substrate 1 has a large number of wiring layers 2 deposited from the mounting portion on the upper surface to the lower surface, and the electrode of the electronic component 3 has a low melting point such as solder on the portion exposed to the mounting portion of the wiring layer 2. The part electrically connected through the brazing material 5 and led to the lower surface is electrically connected to the external electric circuit through a low melting point brazing material such as solder.

配線層2は、例えば銅粉末および1重量%以下のガラスから成り、これに適当な有機バインダや溶剤を添加混合して得た金属ペーストを絶縁基体1となるセラミックグリーンシートに予め従来周知のスクリーン印刷法により所定パターンに印刷塗布しておくことによって、絶縁基体1の上面から下面にかけて被着される。   The wiring layer 2 is made of, for example, copper powder and 1% by weight or less of glass, and a metal paste obtained by adding and mixing an appropriate organic binder and solvent to the ceramic green sheet serving as the insulating substrate 1 is previously known in advance. The insulating substrate 1 is applied from the upper surface to the lower surface by printing and applying a predetermined pattern by a printing method.

なお、配線層2は焼成の際に絶縁基体1から配線層2へ移動拡散したガラスを含有しており、配線層2の表面には、このようにして移動拡散したガラスが多く存在している。さらに、配線層2の表面には、焼成の際に付着したセッター等の焼成付着物が微量に存在する。   The wiring layer 2 contains glass that has moved and diffused from the insulating substrate 1 to the wiring layer 2 during firing, and the surface of the wiring layer 2 has a lot of glass that has moved and diffused in this way. . Furthermore, a small amount of fired deposits such as setters adhered during firing are present on the surface of the wiring layer 2.

また、配線層2には、図2に要部拡大断面図で示すように、その表面のうち少なくとも電子部品3の電極が低融点ロウ材5を介して接続される領域の表面に、熱処理された銅錫合金層6および熱処理された銀または金と錫との合金層7が順次被着形成されている。   In addition, as shown in the enlarged cross-sectional view of the main part in FIG. 2, the wiring layer 2 is heat-treated at least on the surface of the region where the electrode of the electronic component 3 is connected via the low melting point brazing material 5. A copper-tin alloy layer 6 and a heat-treated silver or gold-tin alloy layer 7 are successively deposited.

なお、ここで低融点ロウ材5とは、配線層2と、電子部品3および外部電気回路とを電気的,機械的に接続する役割を有する200℃乃至300℃程度の温度で溶融する共晶合金をいう。   Here, the low melting point brazing material 5 is a eutectic that melts at a temperature of about 200 ° C. to 300 ° C., which serves to electrically and mechanically connect the wiring layer 2 to the electronic component 3 and the external electric circuit. An alloy.

本実施の形態による配線基板4によれば、ガラスセラミックスから成る絶縁基体1に、電子部品3の電極が低融点ロウ材5を介して接続される、銅を主成分とした配線層2を形成して成る配線基板4において、配線層2のうち電極が低融点ロウ材5を介して接続される領域の表面に、熱処理された銅錫合金層6および熱処理された銀または金と錫との合金層7が順次形成されていることが重要である。 According to the wiring board 4 according to the present embodiment, the wiring layer 2 mainly composed of copper, in which the electrodes of the electronic component 3 are connected to the insulating base 1 made of glass ceramics through the low melting point brazing material 5 is formed. In the wiring substrate 4 thus formed, the surface of a region of the wiring layer 2 where the electrodes are connected via the low melting point brazing material 5 is subjected to heat-treated copper-tin alloy layer 6 and heat-treated silver or gold and tin. It is important that the alloy layers 7 are formed sequentially.

これは、熱処理された銅錫合金層6を形成するのは、低融点ロウ材5を配線層2に接続する際の熱により銅を主成分とする配線層2中の銅成分が低融点ロウ材5中に拡散することを効果的に防止することが可能となることから、半田等の低融点ロウ材実装時の熱や、再実装(リペア)時の熱により、銅を主成分とする配線層2中の銅成分が半田等の低融点ロウ材5中に拡散し接合性を劣化させることを効果的に防止することができ、電子部品3を配線層2に半田等を介して接続させることが可能となるからである。   This is because the heat treated copper tin alloy layer 6 is formed by the copper component in the wiring layer 2 containing copper as a main component by the heat generated when the low melting point brazing material 5 is connected to the wiring layer 2. Since it is possible to effectively prevent diffusion into the material 5, the main component is copper due to heat at the time of mounting a low melting point soldering material such as solder or heat at the time of remounting (repair). It is possible to effectively prevent the copper component in the wiring layer 2 from diffusing into the low-melting-point brazing material 5 such as solder and deteriorating the bondability, and connect the electronic component 3 to the wiring layer 2 via solder or the like. It is because it becomes possible to make it.

また、熱処理された銅錫合金層6の表面に熱処理された銀または金と錫との合金層7を形成するのは、低融点ロウ材で実装するのに対して、低融点ロウ材,銀または金と錫との合金層,銅錫合金層,配線層中の銅と順次融点が高くなる構成とすることができ、その結果、銅を主成分とする配線層中の銅成分の拡散を効果的に抑えることが可能となるからである。
上記の配線基板によれば、配線層のうち電極が低融点ロウ材を介して接続される領域の表面に、熱処理された銅錫合金層および熱処理された銀または金と錫との合金層が順次形成されていることから、銅錫合金層と銀または金と錫との合金層の融点が実装温度より高いことにより、実装温度では銅錫合金層および銀または金と錫との合金層が熱による化学変化を伴わないため、低融点ロウ材を配線層に接続する際、銅を主成分とする配線層中の銅成分が低融点ロウ材中に拡散することを効果的に防止することが可能となる。その結果、半田等の低融点ロウ材実装時の熱や、再実装(リペア)時の熱により、銅を主成分とする配線層中の銅成分が半田等の低融点ロウ材中に拡散し接合性を劣化させることを効果的に防止することが可能となる。また、銅錫合金層の上に銀または金と錫との合金層が形成されていることから、低融点ロウ材で実装するのに対して、低融点ロウ材,銀または金と錫との合金層,銅錫合金層,配線層中の銅と順次融点が高くなる構成とすることができる。
その結果、銅を主成分とする配線層中の銅成分の拡散をより効果的に抑えることが可能となる。
ここで実装温度とは、銅を主成分とする配線層上に電極が低融点ロウ材を介して接続される領域の表面に、順次熱処理された銅錫合金層と熱処理された銀または金と錫との合金層が形成された配線基板に、電子部品を配線層に半田等の低融点ロウ材を介して実装する際の配線基板の温度のことである。
Further, the heat-treated silver or gold-tin alloy layer 7 is formed on the surface of the heat-treated copper-tin alloy layer 6 while the low-melting-point brazing material, silver Alternatively, the melting point of the alloy layer of gold and tin, the copper tin alloy layer, and the copper in the wiring layer can be sequentially increased, and as a result, the copper component in the wiring layer mainly composed of copper can be diffused. This is because it can be effectively suppressed.
According to the above wiring board, the heat treated copper tin alloy layer and the heat treated silver or gold and tin alloy layer are formed on the surface of the region of the wiring layer where the electrodes are connected via the low melting point brazing material. Because the melting point of the copper tin alloy layer and the silver or gold and tin alloy layer is higher than the mounting temperature, the copper tin alloy layer and the silver or gold and tin alloy layer are formed at the mounting temperature. Effectively prevent copper components in the copper-based wiring layer from diffusing into the low-melting-point brazing material when connecting low-melting-point brazing material to the wiring layer because there is no chemical change due to heat. Is possible. As a result, the copper component in the wiring layer mainly composed of copper diffuses into the low-melting-point brazing material such as solder due to the heat at the time of mounting the low-melting-point brazing material such as solder or the heat at the time of remounting (repair). It is possible to effectively prevent deterioration of the bondability. In addition, since an alloy layer of silver or gold and tin is formed on the copper tin alloy layer, the low melting point brazing material, silver or gold and tin The alloy layer, the copper-tin alloy layer, and the copper in the wiring layer can be configured so that the melting point becomes higher in order.
As a result, it is possible to more effectively suppress the diffusion of the copper component in the wiring layer mainly composed of copper.
Here, the mounting temperature refers to the surface of the region where the electrodes are connected via the low melting point brazing material on the wiring layer mainly composed of copper, and the heat-treated copper tin alloy layer and the heat-treated silver or gold This is the temperature of the wiring board when an electronic component is mounted on the wiring layer via a low melting point solder such as solder on the wiring board on which an alloy layer with tin is formed.

さらに、本実施の形態による配線基板4においては、銅錫合金層6は、配線層2の表面に被着された錫めっき層に配線層2の銅が熱処理によって拡散して形成され、銀または金と錫との合金層7は、錫めっき層の表面に被着された銀めっき層または金めっき層に錫めっき層の錫が熱処理によって拡散して形成されたものであることが望ましい。
本実施の形態による配線基板によれば、銅錫合金層は、配線層の表面に被着された錫めっき層に配線層の銅が熱処理によって拡散して形成され、銀または金と錫との合金層は、錫めっき層の表面に被着された銀めっき層または金めっき層に錫めっき層の錫が熱処理によって拡散して形成されたものであるときには、低融点ロウ材で実装するのに対して、低融点ロウ材,銀または金と錫との合金層,銅錫合金層,配線層中の銅と順次融点が高くなる構成とすることが可能となり、銅を主成分とする配線層中の銅成分の拡散を効果的に抑えることが可能となる。その結果、半田等の低融点ロウ材実装時の熱や、再実装(リペア)時の熱により、銅を主成分とする配線層中の銅成分が半田等の低融点ロウ材中に拡散し接合性を劣化させることを効果的に防止することが可能となる。
Furthermore, in the wiring substrate 4 according to the present embodiment, the copper tin alloy layer 6 is formed by diffusing copper of the wiring layer 2 by a heat treatment in a tin plating layer deposited on the surface of the wiring layer 2, and silver or The alloy layer 7 of gold and tin is desirably formed by diffusing tin of the tin plating layer by heat treatment on the silver plating layer or the gold plating layer deposited on the surface of the tin plating layer.
According to the wiring board according to the present embodiment, the copper-tin alloy layer is formed by diffusing copper of the wiring layer by heat treatment in the tin plating layer deposited on the surface of the wiring layer, and is formed of silver or gold and tin. When the alloy layer is formed by diffusing tin of the tin plating layer by heat treatment on the silver plating layer or gold plating layer deposited on the surface of the tin plating layer, the alloy layer is mounted with a low melting point brazing material. On the other hand, a low melting point brazing material, an alloy layer of silver or gold and tin, a copper-tin alloy layer, and a copper layer in the wiring layer can be configured so that the melting point becomes higher, and the wiring layer mainly composed of copper. It becomes possible to effectively suppress the diffusion of the copper component therein. As a result, the copper component in the wiring layer mainly composed of copper diffuses into the low-melting-point brazing material such as solder due to the heat at the time of mounting the low-melting-point brazing material such as solder or the heat at the time of remounting (repair). It is possible to effectively prevent deterioration of the bondability.

これは、低融点ロウ材で実装するのに対して、低融点ロウ材,銀または金と錫との合金層,銅錫合金層,配線層中の銅と順次融点が高くなる構成とすることができ、その結果、銅を主成分とする配線層中の銅成分の拡散を効果的に抑えることが可能となることにより、低融点ロウ材5を配線層2に接続する際に、銅を主成分とする配線層2中の銅成分が低融点ロウ材5中に拡散することを効果的に防止することが可能となり、その結果、半田等の低融点ロウ材実装時の熱や、再実装(リペア)時の熱により、銅を主成分とする配線層中の銅成分が半田等の低融点ロウ材中に拡散し接合性を劣化させることを効果的に防止することが可能となるからである。   In this case, the low melting point brazing material, the silver / gold / tin alloy layer, the copper tin alloy layer, and the copper in the wiring layer have a higher melting point in order than the low melting point brazing material. As a result, it becomes possible to effectively suppress the diffusion of the copper component in the wiring layer mainly composed of copper, so that when the low melting point brazing material 5 is connected to the wiring layer 2, the copper is removed. It becomes possible to effectively prevent the copper component in the wiring layer 2 as a main component from diffusing into the low melting point brazing material 5, and as a result, heat at the time of mounting a low melting point brazing material such as solder, It becomes possible to effectively prevent the copper component in the wiring layer containing copper as a main component from diffusing into a low melting point solder such as solder and deteriorating the bonding property due to heat during mounting (repair). Because.

なお、銀または金と錫との合金層7のうち、錫銀合金層によれば、銀の融点が高いため、比較的少量の銀で効果的に、銅を主成分とする配線層2中の銅成分が低融点ロウ材5中に拡散することを防止するバリヤ層を形成することができる。   Of the alloy layer 7 of silver or gold and tin, the tin-silver alloy layer has a high melting point of silver, so that a relatively small amount of silver can be effectively used in the wiring layer 2 mainly composed of copper. A barrier layer that prevents the copper component from diffusing into the low melting point brazing material 5 can be formed.

また、錫金合金層によれば、金の半田性および耐食性が極めて優れているため、合金化した後も半田性および耐食性に優れたものとなる。   Further, according to the tin-gold alloy layer, since the solderability and corrosion resistance of gold are extremely excellent, the solderability and corrosion resistance are excellent even after alloying.

また、本実施の形態による配線基板の製造方法によれば、ガラスセラミックスから成る絶縁基体1に銅を主成分とした配線層2を形成する工程と、配線層2のうち電子部品3の電極が低融点ロウ材5を介して接続される領域の表面に、錫めっき層と銀めっき層または金めっき層とを順次被着する工程と、しかる後、低融点ロウ材5の融点より50℃乃至100℃高い温度で錫めっき層と銀めっき層または金めっき層とに熱処理を施す工程とを具備することが重要である。
上記配線基板の製造方法によれば、ガラスセラミックスから成る絶縁基体に銅を主成分とした配線層を形成する工程と、前記配線層のうち電子部品の電極が低融点ロウ材を介して接続される領域の表面に、錫めっき層と銀めっき層または金めっき層とを順次被着する工程と、しかる後、前記低融点ロウ材の融点より50℃乃至100℃高い温度で錫めっき層と銀めっき層または金めっき層とに熱処理を施す工程とを具備することから、銀めっき層または金めっき層が錫と合金化する過程において、ピンホール等の欠陥の発生を抑えたより一層緻密な金属層が形成されることによって、また銀または金と錫との合金層よりもより一層融点の高い銅錫合金層が形成されることによって、配線層の電極が半田等の低融点ロウ材を介して接合される領域以外の表面にしみ出しや斑点状のしみを形成して外観不良を生じることを効果的に防止することが可能となるうえ、電子部品を配線層に低融点ロウ材を介して接合する際に、銅を主成分とする配線層中の銅成分が半田等の低融点ロウ材中に熱拡散することを効果的に防止することが可能となる。
In addition, according to the method of manufacturing the wiring board according to the present embodiment, the step of forming the wiring layer 2 mainly composed of copper on the insulating substrate 1 made of glass ceramics, and the electrode of the electronic component 3 in the wiring layer 2 are provided. A step of sequentially depositing a tin plating layer and a silver plating layer or a gold plating layer on the surface of the region connected via the low melting point brazing material 5, and then 50 ° C. or more from the melting point of the low melting point brazing material 5 It is important to include a step of heat-treating the tin plating layer and the silver plating layer or the gold plating layer at a temperature higher by 100 ° C.
According to the above method for manufacturing a wiring board, a wiring layer mainly composed of copper is formed on an insulating base made of glass ceramics, and electrodes of electronic components in the wiring layer are connected via a low melting point brazing material. A step of sequentially depositing a tin plating layer and a silver plating layer or a gold plating layer on the surface of the region to be coated, and then the tin plating layer and the silver at a temperature 50 to 100 ° C. higher than the melting point of the low melting point brazing material. A plating layer or a gold plating layer is subjected to a heat treatment step, so that a finer metal layer that suppresses the occurrence of defects such as pinholes in the process of alloying the silver plating layer or the gold plating layer with tin And the formation of a copper-tin alloy layer having a higher melting point than that of an alloy layer of silver or gold and tin, so that the electrodes of the wiring layer can be connected via a low-melting-point brazing material such as solder. Outside the region to be joined It is possible to effectively prevent appearance defects due to the formation of spots or spotted spots on the surface, and also when copper is bonded to the wiring layer via a low melting point brazing material. Thus, it is possible to effectively prevent the copper component in the wiring layer mainly composed of the heat diffusion into the low melting point brazing material such as solder.

これは、銅錫合金層6および銀または金と錫との合金層7は、図3に要部拡大断面図で示すように、配線層2の表面のうち少なくとも電子部品3の電極が低融点ロウ材5を介して接続される領域の表面に、錫めっき層9と銀めっき層または金めっき層10を順次被着形成した後、例えば窒素雰囲気中で低融点ロウ材5の融点より50℃乃至100℃高い温度でめっき皮膜を合金化することにより、配線層2の銅が錫めっき層9に拡散して形成された銅錫合金層6と、錫めっき層9の錫が銀めっき層または金めっき層10に拡散して形成された銀または金と錫との合金層7とが得られる。その際、錫めっき層9と銀めっき層または金めっき層10の膜厚比率は、銅錫合金層6および銀または金と錫との合金層7を形成する温度(以下合金化温度と呼ぶ)に応じて種々選択することができる。この合金化温度は、配線基板4に電子部品3を低融点ロウ材5を介して搭載する際の低融点ロウ材5の融点より50℃乃至100℃高い温度として選択される。   This is because the copper-tin alloy layer 6 and the alloy layer 7 of silver or gold and tin have at least the electrodes of the electronic component 3 having a low melting point on the surface of the wiring layer 2 as shown in the enlarged sectional view of the main part in FIG. After sequentially depositing a tin plating layer 9 and a silver plating layer or a gold plating layer 10 on the surface of the region connected via the brazing material 5, for example, 50 ° C. from the melting point of the low melting point brazing material 5 in a nitrogen atmosphere. The copper-tin alloy layer 6 formed by diffusing the copper of the wiring layer 2 into the tin-plated layer 9 and the tin of the tin-plated layer 9 are silver-plated or Silver or gold and tin alloy layer 7 formed by diffusing into gold plating layer 10 is obtained. At that time, the film thickness ratio of the tin plating layer 9 and the silver plating layer or the gold plating layer 10 is the temperature at which the copper tin alloy layer 6 and the alloy layer 7 of silver or gold and tin are formed (hereinafter referred to as the alloying temperature). Various selections can be made according to the above. This alloying temperature is selected as a temperature that is 50 ° C. to 100 ° C. higher than the melting point of the low melting point brazing material 5 when the electronic component 3 is mounted on the wiring board 4 via the low melting point brazing material 5.

例えば、低融点ロウ材5の融点が250℃の場合であれば、合金化温度を融点より50℃以上乃至100℃高い温度である300℃乃至350℃に設定すると良い。このことから300℃乃至350℃で形成された銅錫合金層6および銀または金と錫との合金層7の融点は、低融点ロウ材5よりも高くなるため、熱処理された銅錫合金層6および熱処理された銀または金と錫との合金層7が配線層2中の銅に対してバリヤ層として効果的に機能することとなり、この銀または金と錫との合金層7の表面に250℃の温度で実装される低融点ロウ材5中に銅を主成分とする配線層2中の銅成分が拡散することを効果的に防止することが可能となるからである。   For example, if the melting point of the low melting point brazing material 5 is 250 ° C., the alloying temperature may be set to 300 ° C. to 350 ° C., which is 50 ° C. to 100 ° C. higher than the melting point. Therefore, since the melting point of the copper tin alloy layer 6 and the alloy layer 7 of silver or gold and tin formed at 300 ° C. to 350 ° C. is higher than that of the low melting point brazing material 5, the heat treated copper tin alloy layer 6 and the heat-treated alloy layer 7 of silver or gold and tin effectively function as a barrier layer with respect to the copper in the wiring layer 2, and on the surface of the alloy layer 7 of silver or gold and tin. This is because it is possible to effectively prevent the copper component in the wiring layer 2 mainly composed of copper from diffusing into the low melting point brazing material 5 mounted at a temperature of 250 ° C.

また、同様の作用により、低融点ロウ材5の成分が配線層2中へ拡散することも効果的に防止することが可能となる。   In addition, it is possible to effectively prevent the components of the low melting point brazing material 5 from diffusing into the wiring layer 2 by the same action.

これに対して、合金化温度を低融点ロウ材5の融点より50℃未満で高い温度とした場合は、熱処理された銅錫合金層6および熱処理された銀または金と錫との合金層7と低融点ロウ材5との融点の差が小さくなるため、電子部品3の実装時に低融点ロウ材5中へ銅を主成分とする配線層2中の銅成分の拡散を効果的に防止することができないという不具合を生じる。また、合金化温度を低融点ロウ材5の融点より100℃を超えて高い温度とした場合は、絶縁基体1に熱負荷をかけることにより、配線層2中の銅成分と銅錫合金層6となるはずの錫めっき層9中の錫が絶縁基体1に拡散することによる絶縁基体1の絶縁性を劣化させてしまうという不具合を生じる。   On the other hand, when the alloying temperature is lower than the melting point of the low melting point brazing material 5 by less than 50 ° C., the heat-treated copper-tin alloy layer 6 and the heat-treated alloy layer 7 of silver or gold and tin 7 Since the difference in melting point between the low melting point brazing material 5 and the low melting point brazing material 5 is small, the diffusion of the copper component in the wiring layer 2 mainly composed of copper into the low melting point brazing material 5 is effectively prevented when the electronic component 3 is mounted. It causes a problem that it cannot be done. When the alloying temperature is higher than the melting point of the low melting point brazing material 5 by 100 ° C., a thermal load is applied to the insulating substrate 1 to thereby apply the copper component in the wiring layer 2 and the copper tin alloy layer 6. As a result, the insulative property of the insulating base 1 is deteriorated due to diffusion of tin in the tin plating layer 9, which should become, into the insulating base 1.

さらに、合金化温度を決定した後、錫めっき層9と銀めっき層または金めっき層10の膜厚を決定する。この膜厚比率は、選択した合金化温度で錫めっき層9と銀めっき層または金めっき層10がそれぞれ銅錫合金層6および銀または金と錫との合金層7へと完全に合金化するために、例えば錫めっき層9と銀めっき層10とから錫銀合金層7を形成する場合を例にとると、合金化温度が350℃の場合であれば、錫めっき層9および銀めっき層10の膜厚をそれぞれ4:1の比率にすることで、銅錫合金層6および錫銀合金層7を連続的に形成することができる。   Furthermore, after determining the alloying temperature, the film thicknesses of the tin plating layer 9 and the silver plating layer or the gold plating layer 10 are determined. This thickness ratio is such that the tin-plated layer 9 and the silver-plated layer or gold-plated layer 10 are fully alloyed into the copper-tin alloy layer 6 and the silver- or gold-tin alloy layer 7 at the selected alloying temperature. Therefore, for example, when the tin-silver alloy layer 7 is formed from the tin-plated layer 9 and the silver-plated layer 10, the tin-plated layer 9 and the silver-plated layer are formed if the alloying temperature is 350 ° C. The copper tin alloy layer 6 and the tin silver alloy layer 7 can be continuously formed by setting the film thickness of 10 to a ratio of 4: 1.

なお、錫めっき層9は、その厚みが0.5μm未満であると、銅を主成分とする配線層2中の銅成分が低融点ロウ材5中に拡散することを防止する効果が得られなくなり、他方、5μmを超えて析出させようとした場合はめっきに長時間を要してしまうこととなる。そのため、錫めっき層9の厚みは0.5μm乃至5μm、好ましくは1μm乃至2μmが良い。また銀めっき層または金めっき層10の厚みは、めっき皮膜が合金化する温度に応じて、錫めっき層9の厚みとの比率で決定することができる。例えば錫めっき層9と銀めっき層10とから錫銀合金層7を形成する場合を例にとると、合金化温度が350℃の場合であれば、錫めっき層9および銀めっき層10の膜厚をそれぞれ4:1の比率にすることで、銅錫合金層6および錫銀合金層7を連続的に形成することができる。   If the thickness of the tin plating layer 9 is less than 0.5 μm, the effect of preventing the copper component in the wiring layer 2 containing copper as a main component from diffusing into the low melting point brazing material 5 cannot be obtained. On the other hand, if it is attempted to deposit more than 5 μm, the plating takes a long time. Therefore, the thickness of the tin plating layer 9 is 0.5 μm to 5 μm, preferably 1 μm to 2 μm. The thickness of the silver plating layer or the gold plating layer 10 can be determined by the ratio with the thickness of the tin plating layer 9 according to the temperature at which the plating film is alloyed. For example, taking the case where the tin-silver alloy layer 7 is formed from the tin plating layer 9 and the silver plating layer 10 as an example, if the alloying temperature is 350 ° C., the film of the tin plating layer 9 and the silver plating layer 10 By setting the thickness to a ratio of 4: 1, the copper tin alloy layer 6 and the tin silver alloy layer 7 can be continuously formed.

本実施の形態による配線基板の製造方法においては、錫めっき層6は無電解法によって配線層2の表面に被着される。無電解法により錫めっき層6を被着させる無電解錫めっき液としては、特に限定はなく、種々のものが使用できる。具体的には、錫イオン濃度が1g/L乃至50g/Lであるシアンを用いた置換錫めっき液や不均化反応を利用した無電解錫めっき液等を使用することができる。また、銀めっき層または金めっき層7は無電解法によって錫めっき層6の表面に被着される。無電解法により銀めっき層または金めっき層7を被着させる無電解銀めっき液または無電解金めっき液としても、特に限定はなく、種々のものが使用できる。具体的には、銀イオン濃度が5g/L乃至50g/Lであるシアン浴やチオ硫酸浴等または金イオン濃度が1g/L乃至10g/Lであるシアン浴等を使用することができる。 In the method for manufacturing a wiring board according to the present embodiment , the tin plating layer 6 is deposited on the surface of the wiring layer 2 by an electroless method. The electroless tin plating solution for depositing the tin plating layer 6 by an electroless method is not particularly limited, and various types can be used. Specifically, a substituted tin plating solution using cyan having a tin ion concentration of 1 g / L to 50 g / L, an electroless tin plating solution using a disproportionation reaction, or the like can be used. The silver plating layer or the gold plating layer 7 is deposited on the surface of the tin plating layer 6 by an electroless method. The electroless silver plating solution or the electroless gold plating solution for depositing the silver plating layer or the gold plating layer 7 by an electroless method is not particularly limited, and various types can be used. Specifically, a cyan bath or a thiosulfate bath having a silver ion concentration of 5 g / L to 50 g / L or a cyan bath having a gold ion concentration of 1 g / L to 10 g / L can be used.

かくして、本実施の形態による配線基板4によれば、絶縁基体1の上面に形成した配線層2に電子部品3の電極を低融点ロウ材5を介して電気的および機械的に接続し、しかる後、絶縁基体1の上面に金属やセラミックスから成る蓋体8をガラスや樹脂,ロウ材等の封止材を介して接合させ、絶縁基体1と蓋体8とから成る容器内部に電子部品3を気密に収容することによって、半導体装置となる。 Thus, according to the wiring board 4 according to the present embodiment, the electrodes of the electronic component 3 are electrically and mechanically connected to the wiring layer 2 formed on the upper surface of the insulating base 1 via the low melting point brazing material 5. Thereafter, a lid 8 made of metal or ceramic is joined to the upper surface of the insulating base 1 via a sealing material such as glass, resin, or brazing material, and the electronic component 3 is placed inside the container made of the insulating base 1 and the lid 8. Is hermetically accommodated to form a semiconductor device.

なお、本発明は上述の実施の形態の例に限定されるものではなく、本発明の要旨を逸脱しない範囲であれば種々の変更は可能である。例えば、上述の例では本発明の配線基板を半導体素子を収容する半導体素子収納用パッケージに適用したが、混成集積回路基板等の他の用途に適用してもよい。   Note that the present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the scope of the present invention. For example, in the above-described example, the wiring board of the present invention is applied to a semiconductor element housing package for housing semiconductor elements, but may be applied to other uses such as a hybrid integrated circuit board.

以下、本発明を具体例によって詳細に説明するが、本発明は以下の具体例に限定されるものではない。   Hereinafter, the present invention will be described in detail by way of specific examples, but the present invention is not limited to the following specific examples.

ガラスセラミックスから成る絶縁基体上に形成された銅を主成分とした配線層から成る電極にシアンを用いた置換錫めっき液を用いて錫の薄層を形成した後、不均化反応を利用した無電解錫めっき液を用いて錫めっき層を2μmの膜厚で形成し、次いで、シアン浴を用いて銀めっき層を0.5μmの膜厚で形成した後、合金化温度とこの電極に接続される低融点ロウ材の融点との差が表1に示すように0〜150℃である各合金化温度で、それぞれ30秒間熱処理を施した。このようにして作製した試作番号1〜7の配線基板に、融点が245℃の90%Sn−7.5%Bi−2%Ag−0.5%Cuはんだボールを低融点ロウ材として用いて電子部品である半導体素子を実装し、この半導体素子を引き剥がした際の強度および剥がれ面のモードから接合性を判定した。また、リペア性として、一度実装した半導体素子をリペア(再実装)した場合のはんだ性も評価した。   After forming a thin tin layer using a substitution tin plating solution using cyan on the electrode composed of a copper-based wiring layer formed on an insulating substrate made of glass ceramics, a disproportionation reaction was used. After forming a tin plating layer with a thickness of 2 μm using an electroless tin plating solution, and then forming a silver plating layer with a thickness of 0.5 μm using a cyan bath, the alloying temperature and this electrode are connected. As shown in Table 1, heat treatment was performed for 30 seconds at each alloying temperature of 0 to 150 ° C. as shown in Table 1. An electronic component using the 90% Sn-7.5% Bi-2% Ag-0.5% Cu solder ball having a melting point of 245 [deg.] C. as the low melting point solder material on the wiring boards of prototype numbers 1 to 7 produced in this manner. A semiconductor element was mounted, and the bondability was determined from the strength when the semiconductor element was peeled off and the mode of the peeled surface. Moreover, as the repairability, the solderability when a semiconductor element once mounted was repaired (re-mounted) was also evaluated.

さらに、配線基板上の配線層から成る独立した配線パターン間に電圧を印加し、配線基板の絶縁性も評価した。その結果を表1に示す。

Figure 0004264091
Further, a voltage was applied between independent wiring patterns composed of wiring layers on the wiring board, and the insulating properties of the wiring board were also evaluated. The results are shown in Table 1.
Figure 0004264091

表1における接合性について「○」は、半田ボールシェア試験において破壊界面が半田内部にあって半田内部で100%破断していることから、半田/めっき界面が非常に強固で半田接合性に優れていることを示す。また、「△」は、半田ボールシェア試験において破壊界面に下地の銅錫合金層の一部が露出するものの強度的に問題はなく、実用上問題の無いレベルであることを示す。また、「×」は、半田ボールシェア試験において破壊界面に銅錫合金層が露出し、かつ強度的にも弱いことから、実用上使用できないレベルにあることを示す。   Regarding the bondability in Table 1, “○” indicates that the fracture interface is inside the solder and 100% fracture inside the solder in the solder ball shear test, so the solder / plating interface is very strong and excellent in solder jointability. Indicates that Further, “Δ” indicates that although a part of the underlying copper-tin alloy layer is exposed at the fracture interface in the solder ball shear test, there is no problem in strength, and there is no practical problem. In addition, “x” indicates that the copper tin alloy layer is exposed at the fracture interface in the solder ball shear test and the strength is weak, so that it cannot be used practically.

また、リペア性については、再実装を3回繰り返した後に半田ボールシェア試験の評価を実施し、初期の接合状態に対しての比較をするとともに破断モードを確認した。
この破断モードの評価基準は接合性と同様とした。
As for repairability, the solder ball shear test was evaluated after repeating re-mounting three times, and the fracture mode was confirmed while comparing the initial bonding state.
The evaluation criteria for this break mode was the same as the bondability.

また、絶縁性については、配線基板上の独立したL/S(L:線幅,S:線幅間の間隔)が100μm/100μmの配線層から成る配線パターン間に10Vの電圧を印加し、パターン間の絶縁性を絶縁抵抗器を用いて測定し、実測値で106Ω以上の実用上問題ないレベルにあるものを「○」、106Ω未満のレベルにあるものを「×」とした。   For insulation, a voltage of 10 V is applied between wiring patterns composed of wiring layers having independent L / S (L: line width, S: spacing between line widths) of 100 μm / 100 μm on the wiring board, The insulation between patterns was measured using an insulation resistor, and “○” indicates that the measured value was 106Ω or higher and there was no practical problem, and “X” indicates that the level was less than 106Ω.

表1の結果から明らかなように、合金化温度と低融点ロウ材の融点との差が0℃の試料No.1は、接合性およびリペア性に問題があった(表中の接合性およびリペア性の欄に×で示す)。また、合金化温度と低融点ロウ材の融点との差が25℃の試料No.2は、接合性およびリペア性に問題があった。(表中の接合性およびリペア性の欄に△で示す)。また、合金化温度と低融点ロウ材の融点との差が150℃の試料No.7は、接合性およびリペア性は良かったが、絶縁性が劣化し問題があった(表中の接合性およびリペア性の欄に△で、絶縁性の欄に×で示す)。
また、合金化温度と低融点ロウ材の融点との差が125℃の試料No.6は、接合性およびリペア性は良好であったが、絶縁性が劣化していた(表中の絶縁性の欄に△で示す)。
As is apparent from the results in Table 1, the difference between the alloying temperature and the melting point of the low melting point brazing material is 0 ° C. No. 1 had a problem in bondability and repairability (indicated by x in the column of bondability and repairability in the table). In addition, the difference between the alloying temperature and the melting point of the low melting point brazing material is 25 ° C. No. 2 had a problem in bondability and repairability. (Indicated by Δ in the column of bondability and repairability in the table). In addition, the difference between the alloying temperature and the melting point of the low melting point brazing material is 150 ° C. No. 7 had good bondability and repairability, but had problems due to deterioration of insulation properties (indicated by Δ in the column of bondability and repairability in the table, and x in the column of insulation).
Further, the difference between the alloying temperature and the melting point of the low melting point brazing material is 125 ° C. In No. 6, the bondability and repairability were good, but the insulation was deteriorated (indicated by Δ in the column of insulation in the table).

これに対して、本発明の配線基板の製造方法によって作製された配線基板である、合金化温度と低融点ロウ材の融点との差が50℃,75℃および100℃の試料No.3,4および5は、接合性および絶縁性ともに良好な優れたものであった。   On the other hand, the sample Nos. 5 and 75 ° C. and 100 ° C. in which the difference between the alloying temperature and the melting point of the low-melting-point brazing material is a wiring board manufactured by the method for manufacturing a wiring board of the present invention. 3, 4 and 5 were excellent in both bonding and insulating properties.

また、リペア性については、破断モードも優れたものであり、接合状態も初期と変化がなく優れたものであった(表中の接合性,リペア性および絶縁性の欄に○で示す)。   Further, the repairability was excellent in the fracture mode, and the joining state was excellent with no change from the initial state (indicated in the columns of joining property, repairing property, and insulating property in the table).

次に、試作番号8〜17の配線基板として、ガラスセラミックスから成る絶縁基体上に形成された銅を主成分とする配線層から成る電極にメタンスルホン酸浴を用いて錫めっき層を0.1〜6μmの膜厚で形成し、次いで、シアン浴を用いて銀めっき層を0.025〜1.5μmの膜厚で形成した後、合金化温度と低融点ロウ材の融点との差が75℃となる温度で、30秒間熱処理を施した。このようにして作製した配線基板に、試作番号1〜7の配線基板と同様の評価を行なった。その結果を表2に示す。

Figure 0004264091
Next, as a wiring board of trial production numbers 8 to 17, a tin plating layer is formed to 0.1 to 6 μm using a methanesulfonic acid bath on an electrode composed of a wiring layer mainly composed of copper formed on an insulating base made of glass ceramics. Next, after forming a silver plating layer with a film thickness of 0.025 to 1.5 μm using a cyan bath, the difference between the alloying temperature and the melting point of the low melting point brazing material is 75 ° C. And heat treatment for 30 seconds. Evaluation similar to the wiring board of trial production numbers 1-7 was performed to the wiring board produced in this way. The results are shown in Table 2.
Figure 0004264091

表2の結果から分かるように、錫めっき層の膜厚が0.1μmの試料No.8は、接合性およびリペア性に問題が見られた(表中の接合性およびリペア性の欄に△〜×で示す)。
また、錫めっき層の膜厚が0.3μmの試料No.9は、破壊界面に下地の銅錫合金層の一部が露出するものの強度的に問題はなく、実用上問題の無いレベルであった(表中の接合性およびリペア性の欄に△で示す)。また、錫めっき層の膜厚が5.5,6.0μmの試料No.16,17は、接合性およびリペア性ともに良好なものであったが、錫めっき層の形成に3乃至4時間と多くの時間が必要であった。
As can be seen from the results in Table 2, the sample No. In No. 8, problems were observed in the bondability and repairability (indicated by Δ to x in the column of bondability and repairability in the table).
Further, Sample No. with a tin plating layer thickness of 0.3 μm was used. No. 9 was a level where there was no problem in strength although a part of the underlying copper-tin alloy layer was exposed at the fracture interface, and there was no problem in practical use (indicated by Δ in the column of bondability and repairability in the table) ). In addition, Sample No. with a tin plating layer thickness of 5.5, 6.0 μm. Nos. 16 and 17 had good bondability and repairability, but a long time of 3 to 4 hours was required for forming the tin plating layer.

これに対して、錫めっき層の膜厚が0.5,1,2,3,4および5μmの試料No.10,11,12,13,14および15は、接合性およびリペア性ともに問題なく優れたものであった(表中の接合性およびリペア性の欄に○で示す)。   In contrast, Sample Nos. With the tin plating layer thicknesses of 0.5, 1, 2, 3, 4 and 5 μm were used. Nos. 10, 11, 12, 13, 14, and 15 were excellent both in terms of bondability and repairability (indicated by a circle in the column of bondability and repairability in the table).

なお、以上の実施例および比較例の配線基板の全てについて、低融点ロウ材として融点が245℃の90%Sn−7.5%Bi−2%Ag−0.5%Cuはんだを用いて、ディッピングにより濡れ性を評価した結果、何れの配線基板も半田濡れ性は良好であった。さらに、何れの配線基板もウイスカの発生は無かった。   For all of the wiring boards of the above examples and comparative examples, 90% Sn-7.5% Bi-2% Ag-0.5% Cu solder having a melting point of 245 [deg.] C. is used as a low melting point brazing material, and wettability is achieved by dipping. As a result, the solder wettability of all the wiring boards was good. Furthermore, no whisker was generated on any of the wiring boards.

次に、ガラスセラミックスから成る絶縁基体上に形成された銅を主成分とした配線層から成る電極にシアンを用いた置換錫めっき液を用いて錫の薄層を形成した後、不均化反応を利用した無電解錫めっき液を用いて錫めっき層を2μmの膜厚で形成し、次いで、シアン浴を用いて金めっき層を1.6μmの膜厚で形成した後、合金化温度とこの電極に接続される低融点ロウ材の融点との差が表3に示すように0〜150℃である各合金化温度で、それぞれ30秒間熱処理を施した。このようにして作製した試作番号18〜24の配線基板に、試作番号1〜7の配線基板と同様の評価を行なった。その結果を表3に示す。

Figure 0004264091
Next, a thin layer of tin is formed on the electrode composed of a copper-based wiring layer formed on an insulating substrate made of glass ceramics using a substitution tin plating solution using cyanide, and then a disproportionation reaction is performed. After forming a tin plating layer with a film thickness of 2 μm using an electroless tin plating solution using, and then forming a gold plating layer with a thickness of 1.6 μm using a cyan bath, the alloying temperature and this electrode As shown in Table 3, a heat treatment was performed for 30 seconds at each alloying temperature where the difference from the melting point of the low melting point brazing material connected to was 0 to 150 ° C. Evaluations similar to the wiring boards of prototype numbers 1 to 7 were performed on the wiring boards of prototype numbers 18 to 24 thus fabricated. The results are shown in Table 3.
Figure 0004264091

表3の結果から明らかなように、合金化温度と低融点ロウ材の融点との差が0℃の試料No.18は、接合性およびリペア性に問題があった(表中の接合性およびリペア性の欄に×で示す)。また、合金化温度と低融点ロウ材の融点との差が25℃の試料No.19は、接合性およびリペア性に問題があった。(表中の接合性およびリペア性の欄に△で示す)。また、合金化温度と低融点ロウ材の融点との差が150℃の試料No.24は、接合性およびリペア性は良かったが、絶縁性が劣化し問題があった(表中の接合性およびリペア性の欄に△で、絶縁性の欄に×で示す)。また、合金化温度と低融点ロウ材の融点との差が125℃の試料No.23は、接合性およびリペア性は良好であったが、絶縁性が劣化していた(表中の絶縁性の欄に△で示す)。   As is apparent from the results in Table 3, the difference between the alloying temperature and the melting point of the low melting point brazing material is 0 ° C. No. 18 had problems in bondability and repairability (indicated by x in the column of bondability and repairability in the table). In addition, the difference between the alloying temperature and the melting point of the low melting point brazing material is 25 ° C. No. 19 had problems in bondability and repairability. (Indicated by Δ in the column of bondability and repairability in the table). In addition, the difference between the alloying temperature and the melting point of the low melting point brazing material is 150 ° C. In No. 24, the bondability and repairability were good, but there was a problem due to the deterioration of the insulation (indicated by Δ in the column of bondability and repairability in the table and x in the column of insulation). Further, the difference between the alloying temperature and the melting point of the low melting point brazing material is 125 ° C. In No. 23, the bondability and repairability were good, but the insulation was deteriorated (indicated by Δ in the column of insulation in the table).

これに対して、本発明の配線基板の製造方法によって作製された配線基板である、合金化温度と低融点ロウ材の融点との差が50℃,75℃および100℃の試料No.20,21および22は、接合性および絶縁性ともに良好な優れたものであった。   On the other hand, the sample Nos. 5 and 75 ° C. and 100 ° C. in which the difference between the alloying temperature and the melting point of the low-melting-point brazing material is a wiring board manufactured by the method for manufacturing a wiring board of the present invention. Nos. 20, 21 and 22 were excellent both in terms of bondability and insulation.

また、リペア性については、破断モードも優れたものであり、接合状態も初期と変化がなく優れたものであった(表中の接合性,リペア性および絶縁性の欄に○で示す)。 Further, the repairability was excellent in the fracture mode, and the joining state was excellent with no change from the initial state (indicated in the columns of joining property, repairing property, and insulating property in the table).

また、試作番号25〜34の配線基板として、ガラスセラミックスから成る絶縁基体上に形成された銅を主成分とする配線層から成る電極にシアンを用いた置換錫めっき液を用いて錫の薄層を形成した後、不均化反応を利用した無電解錫めっき液を用いて錫めっき層を0.1〜6μmの膜厚で形成し、次いで、シアン浴を用いて金めっき層を0.08〜4.9μmの膜厚で形成した後、合金化温度と低融点ロウ材の融点との差が75℃となる温度で、30秒間熱処理を施した。このようにして作製した配線基板に、試作番号1〜7の配線基板と同様の評価を行なった。その結果を表4に示す。

Figure 0004264091
In addition, as a wiring board of prototype numbers 25 to 34, a thin tin layer using a substitution tin plating solution using cyan for an electrode comprising a wiring layer mainly composed of copper formed on an insulating base made of glass ceramics. Then, a tin plating layer is formed to a thickness of 0.1 to 6 μm using an electroless tin plating solution utilizing a disproportionation reaction, and then a gold plating layer is formed to a thickness of 0.08 to 4.9 μm using a cyan bath. After forming with a film thickness, heat treatment was performed for 30 seconds at a temperature at which the difference between the alloying temperature and the melting point of the low melting point brazing material was 75 ° C. Evaluation similar to the wiring board of trial production numbers 1-7 was performed to the wiring board produced in this way. The results are shown in Table 4.
Figure 0004264091

表4の結果から分かるように、錫めっき層の膜厚が0.1μmの試料No.25は、接合性およびリペア性に問題が見られた(表中の接合性およびリペア性の欄に△〜×で示す)。また、錫めっき層の膜厚が0.3μmの試料No.26は、破壊界面に下地の銅錫合金層の一部が露出するものの強度的に問題はなく、実用上問題の無いレベルであった(表中の接合性およびリペア性の欄に△で示す)。また、錫めっき層の膜厚が5.5,6μmの試料No.33,34は、接合性およびリペア性ともに良好なものであったが、錫めっき層の形成に3乃至4時間と多くの時間が必要であった。   As can be seen from the results in Table 4, the sample No. No. 25 had problems in the bondability and repairability (indicated by Δ to x in the column of bondability and repairability in the table). Further, Sample No. with a tin plating layer thickness of 0.3 μm was used. No. 26 was a level where there was no problem in strength, although a part of the underlying copper-tin alloy layer was exposed at the fracture interface, and there was no problem in practical use (indicated by Δ in the column of bondability and repairability in the table) ). In addition, Sample No. with a tin plating layer thickness of 5.5, 6 μm. Although 33 and 34 were both good in bondability and repairability, it took 3 to 4 hours to form a tin plating layer.

これに対して、錫めっき層の膜厚が0.5,1,2,3,4および5μmの試料No.27,28,29,30,31および32は、接合性およびリペア性ともに問題なく優れたものであった(表中の接合性およびリペア性の欄に○で示す)。   In contrast, Sample Nos. With the tin plating layer thicknesses of 0.5, 1, 2, 3, 4 and 5 μm were used. Nos. 27, 28, 29, 30, 31, and 32 were excellent in terms of both bondability and repairability (indicated by a circle in the column of bondability and repairability in the table).

なお、以上の実施例および比較例の配線基板の全てについて、低融点ロウ材として融点が245℃の90%Sn−7.5%Bi−2%Ag−0.5%Cuはんだを用いて、ディッピングにより濡れ性を評価した結果、何れの配線基板も半田濡れ性は良好であった。
さらに、何れの配線基板もウイスカの発生は無かった。
For all of the wiring boards of the above examples and comparative examples, 90% Sn-7.5% Bi-2% Ag-0.5% Cu solder having a melting point of 245 [deg.] C. is used as a low melting point brazing material, and wettability by dipping. As a result, the solder wettability of all the wiring boards was good.
Furthermore, no whisker was generated on any of the wiring boards.

本発明の配線基板の実施の形態の一例を示す断面図である。It is sectional drawing which shows an example of embodiment of the wiring board of this invention. 図1に示す配線基板の要部拡大断面図である。It is a principal part expanded sectional view of the wiring board shown in FIG. 本発明の配線基板の製造方法を説明するための配線基板の要部拡大断面図である。It is a principal part expanded sectional view of the wiring board for demonstrating the manufacturing method of the wiring board of this invention.

符号の説明Explanation of symbols

1・・・・絶縁基体
2・・・・配線層
3・・・・電子部品
4・・・・配線基板
5・・・・低融点ロウ材
6・・・・銅錫合金層
7・・・・銀または金と錫との合金層
8・・・・蓋体
9・・・・錫めっき層
10・・・・銀めっき層または金めっき層
DESCRIPTION OF SYMBOLS 1 ... Insulation base | substrate 2 ... Wiring layer 3 ... Electronic component 4 ... Wiring board 5 ... Low melting point brazing material 6 ... Copper tin alloy layer 7 ... · Silver or gold and tin alloy layer 8 ··· Lid 9 ··· Tin plating layer
10 ... Silver plating layer or gold plating layer

Claims (3)

電子部品が搭載されるガラスセラミックからなる絶縁基体と、該絶縁基体に形成された銅を主成分とした配線層と、前記配線層上に形成された銅錫合金層および銀錫合金とを有する配線基板の製造方法であって、前記電子部品の電極が電気的に接続される前記配線層の領域の表面に、0.5〜5μmの厚みを有する錫めっき層、および0.13〜1.3μmの厚みを有する銀めっき層を順次形成し、かつ熱処理することにより、前記配線層上に銅錫合金層および銀錫合金層を順次形成する配線基板の製造方法 An insulating substrate made of glass ceramic on which electronic parts are mounted, a wiring layer mainly composed of copper formed on the insulating substrate, and a copper tin alloy layer and a silver tin alloy formed on the wiring layer A method for manufacturing a wiring board, comprising: a tin plating layer having a thickness of 0.5 to 5 μm on a surface of a region of the wiring layer to which an electrode of the electronic component is electrically connected; A method for manufacturing a wiring board, wherein a silver-plated layer having a thickness of 3 μm is sequentially formed and heat-treated to thereby sequentially form a copper-tin alloy layer and a silver-tin alloy layer on the wiring layer . 前記錫めっき層の厚みに対する前記銀めっき層の厚みの比は、1/4である請求項1に記載の配線基板の製造方法。The method of manufacturing a wiring board according to claim 1, wherein a ratio of the thickness of the silver plating layer to the thickness of the tin plating layer is ¼. 電子部品が搭載されるガラスセラミックからなる絶縁基体と、該絶縁基体に形成された銅を主成分とした配線層と、前記配線層上に形成された銅錫合金層および金錫合金とを有する配線基板の製造方法であって、前記電子部品の電極が電気的に接続される前記配線層の領域の表面に、0.5〜5μmの厚みを有する錫めっき層、および0.4〜4.1μmの厚みを有する金めっき層を順次形成し、かつ熱処理することにより、前記配線層上に銅錫合金層および金錫合金層を順次形成する配線基板の製造方法。An insulating substrate made of glass ceramic on which electronic parts are mounted, a wiring layer mainly composed of copper formed on the insulating substrate, and a copper-tin alloy layer and a gold-tin alloy formed on the wiring layer A method for manufacturing a wiring board, comprising: a tin plating layer having a thickness of 0.5 to 5 μm on a surface of a region of the wiring layer to which an electrode of the electronic component is electrically connected; and 0.4 to 4. A method for manufacturing a wiring board, in which a gold-plated layer having a thickness of 1 μm is sequentially formed and heat-treated to sequentially form a copper-tin alloy layer and a gold-tin alloy layer on the wiring layer.
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