JP4196828B2 - Image forming apparatus - Google Patents

Description

  The present invention relates to an image forming apparatus, and more particularly to an image forming apparatus capable of duplex printing.

  In an electrophotographic image forming apparatus such as a laser printer, the printing operation is performed through processes of exposure, development, transfer, and fixing. Specifically, first, an electrostatic latent image of an image to be printed is formed on the surface of the photosensitive drum by irradiation with a light beam (laser beam) modulated based on the image data. The toner image is developed by the developing device. This toner image is transferred onto a transfer material (recording paper) by a transfer roller, and an image is formed on the transfer material by fixing the toner image on the transfer material by fixing heat in the fixing device.

When the toner image is fixed on the transfer material, a phenomenon occurs in which the transfer material absorbs moisture by the fixing heat and the transfer material contracts. In particular, when performing double-sided printing, there is a problem that the registration of the front and back surfaces (front and back resist) is shifted. In order to solve this problem, there has been proposed a method of performing a scaling process by predicting the shrinkage of the paper during image formation on the back side (see, for example, Patent Document 1). In addition, an image forming apparatus capable of forming front and back resists by adjusting a process speed (photosensitive linear velocity) for correction in the sub-scanning direction has been proposed (for example, see Patent Document 2). In addition, a method for realizing front and back resist by changing the rotational speed of the polygon mirror and changing the surface phase has been proposed (see, for example, Patent Document 3 and Patent Document 4).
JP 2002-314800 A JP 2003-202789 A JP 2003-262991 A Japanese Patent Application Laid-Open No. 09-222837

  However, in the methods of Patent Document 1 and Patent Document 2, there is a limit to alignment with higher accuracy. Further, in the methods of Patent Document 3 and Patent Document 4, since the polygon rotation speed is released from the PLL (Phase Locked Loop) locked state due to the change in the polygon rotation speed, the stable rotation speed at which the PLL locked state is obtained again is obtained. Time lag occurs, and printing productivity decreases. In addition, in a color tandem machine as an example of a color image forming apparatus, when changing the sub-scan magnification on the back side for front and back registration, the setting value for correcting the timing of each image forming interval differs between the front side and the back side. When the sub-scanning color misregistration correction is performed by this surface phase control, it is necessary to perform the surface phase adjustment operation again when the back surface image is formed. In this case, as shown in the timing chart of FIG. 10, the polygon rotation speed deviates from the stable rotation speed by changing the polygon rotation speed and the surface phase during the transition from the front surface image formation to the back surface image formation. Therefore, a waiting time for PLL lock occurs. Therefore, the waiting time until the stable rotational speed is reached again is a cause of reducing the printing productivity.

  SUMMARY OF THE INVENTION An object of the present invention is to adjust the front and back image sizes with high accuracy without reducing printing productivity in an image forming apparatus capable of double-sided printing.

The invention according to claim 1 has an image forming unit for image formation, enables images formed via the polygon mirror of the image forming unit to be printed on both sides of the recording paper, and one side of the recording paper In the image forming apparatus provided with a PLL type rotational speed adjusting means for adjusting the rotational speed of the polygon mirror at the time of transition of image formation from one surface to the other surface,
The rotational speed adjusting means finely adjusts the rotational speed of the polygon mirror to a target rotational speed within a range that does not deviate from the stable speed range of the PLL during the transition of image formation from one side of the recording paper to the other side. It is characterized by making adjustments while changing.

According to a second aspect of the present invention, in the image forming apparatus according to the first aspect,
The image forming unit is an image forming unit provided corresponding to each of a plurality of colors.

The invention of claim 3 is the image forming apparatus according to claim 1 or 2,
The rotational speed adjusting means is characterized in that the frequency of a polygon clock signal for driving the polygon mirror is changed stepwise to a target rotational speed within a range that does not deviate from the stable speed range of the PLL.

The invention of claim 4 is the image forming apparatus according to claim 2 or 3,
Detecting means for detecting a light beam scanned by a polygon mirror of each color image forming unit and outputting a main scanning reference signal;
The color shift in the sub-scanning direction of the image formed via the polygon mirror is corrected by controlling the phase difference of the main scanning reference signal of each color output by the detecting means by controlling the phase of the polygon clock signal. Phase control means for correcting
Is further provided.

The invention of claim 5 is the image forming apparatus according to claim 4,
The phase control means is configured to make the rotation speed of the polygon mirror higher or lower than the target rotation speed in a range that does not deviate from the stable speed range of the PLL until the phase of the polygon clock signal reaches the target. The phase of the polygon clock signal is controlled.

The invention of claim 6 is the image forming apparatus according to claim 4 or 5,
The phase control unit performs the phase control after the polygon mirror reaches a target rotation speed by the rotation speed adjustment unit.

The invention of claim 7 is the image forming apparatus according to any one of claims 4 to 6,
Each polygon clock signal corresponding to the image forming unit of each color is generated from a different clock signal source,
In the phase control of the polygon clock signal, the phase control means uses a main scanning reference signal as a reference for the phase control as a main scanning reference signal of an image forming unit corresponding to the most upstream position of the image forming process. It is characterized by.

  According to the first aspect of the present invention, when shifting from the image formation on one side of the recording paper to the image formation on the other side, the rotation speed of the polygon mirror is reduced to the target rotation speed within a range where the PLL loop does not leave. By making adjustments while making changes, it is possible to avoid getting out of the PLL lock state, and the time to reach the target speed can be shortened, thus improving print productivity during duplex printing. Can do.

  According to the second aspect of the present invention, in a color image forming apparatus having an image forming unit provided corresponding to each of a plurality of colors, it is possible to improve printing productivity at the time of duplex printing.

  According to the invention of claim 3, when shifting from the image formation on one side of the recording paper to the image formation on the other side, the PLL loop does not leave the frequency of the polygon clock signal for driving the polygon mirror. By changing stepwise up to the target rotational speed within the range, it is possible to avoid getting out of the PLL locked state, and the time to reach the target speed can be shortened, so printing productivity during duplex printing Can be improved.

  According to the invention of claim 4, by controlling the phase of the polygon clock signal and correcting the phase difference between the main scanning reference signals of each color, the color shift in the sub-scanning direction when the polygon rotational speed is changed can be reduced. Can be prevented.

  According to the fifth aspect of the present invention, the polygon mirror rotation speed is set higher or lower than the target rotation speed within a range not deviating from the PLL stable speed range until the phase of the polygon clock signal reaches the target. By controlling the phase of the polygon clock signal, it is possible to prevent color shift in the sub-scanning direction when changing the polygon rotation speed and to avoid escaping from the PLL lock state, so it is possible to shorten the time to reach the target phase. Thus, it is possible to improve printing productivity at the time of duplex printing.

  According to the sixth aspect of the present invention, the polygon rotation speed is changed by changing the polygon clock signal frequency stepwise within a range in which the PLL loop of the polygon motor does not leave and then controlling the phase of the polygon clock signal. It is possible to prevent color misregistration in the sub-scanning direction at the same time and to avoid being out of the PLL lock state, so that it is possible to shorten the time required to reach the target speed, and to improve printing productivity during duplex printing. it can.

According to the seventh aspect of the present invention, the main scanning reference signal of the image forming unit corresponding to the most upstream position of the image forming process is generated from the polygon clock signal signal source for each color image forming unit as the phase control reference. By doing so, it is possible to control the phase every time image formation for each color is completed, so that it is possible to further improve printing productivity at the time of duplex printing.

Hereinafter, the best mode for carrying out the present invention will be described in detail with reference to the drawings.
First, the configuration will be described.
FIG. 1 is a cross-sectional view of an image forming apparatus GH such as a color image forming apparatus to which the present invention is applied. As shown in FIG. 1, the image forming apparatus GH includes a plurality of sets of image forming units 10Y, 10M, 10C, and 10K, a transfer unit 20, a fixing device 30 as a fixing unit, and a refeed mechanism (ADU mechanism). The paper transport unit 40 (40A, 40B, 40C) is provided.

  The image forming unit 10Y that forms a yellow (Y) image includes an exposure unit 1Y, a photosensitive drum 2Y as an image forming body, a developing device 3Y, an image forming body cleaning unit 4Y, and the like. The exposure unit 1Y scans the photosensitive drum 2Y with a light beam (laser beam) by a polygon mirror (not shown) according to the control described later (see FIGS. 2 to 9) to which the present invention is applied. The photosensitive drum 2Y forms an electrostatic latent image on the surface of the photosensitive drum 2Y by the laser light projected from the exposure unit 1Y. The developing device 3Y develops the electrostatic latent image formed on the photosensitive drum 2Y with Y-color toner. The image forming body cleaning unit 4Y cleans the transfer residual toner remaining on the peripheral surface of the photosensitive drum 2Y.

  The image forming unit 10M that forms a magenta (M) color image includes an exposure unit 1M, a photosensitive drum 2M, a developing device 3M, an image forming body cleaning unit 4M, and the like. The image forming unit 10C that forms a cyan (C) color image includes an exposure unit 1C, a photosensitive drum 2C, a developing device 3C, an image forming body cleaning unit 4C, and the like. The image forming unit 10K that forms a black (K) color image includes an exposure unit 1K, a photosensitive drum 2K, a developing device 3K, an image forming body cleaning unit 4K, and the like. The image forming units 10M, 10C, and 10K also perform image formation in the same process as the image forming unit 10Y.

  The transfer unit 20 rotates the intermediate transfer belt 20B, and sequentially transfers the images formed by the image forming unit 10 onto the rotating intermediate transfer belt 20B by the primary transfer rollers 20Y, 20M, 20C, and 20K (primary transfer). And a color image (color toner image) obtained by combining the colors is formed. When the recording paper P is conveyed to the secondary transfer roller 20S, the transfer unit 20 causes the secondary transfer roller 20S to transfer the color toner image formed on the intermediate transfer belt 20B to one side (on the recording paper P) ( Transfer (secondary transfer) at once to the surface.

  The fixing device 30 fixes the color toner image onto the recording paper P by performing a thermal fixing process on the recording paper P onto which the color toner image has been transferred.

  The paper feeding / conveying section 40 is composed of a circulating paper passing path 40A, a reverse conveying path 40B, and a refeeding conveying section 40C, and the recording paper P discharged from the fixing device 30 is fed to the circulating paper passing path 40A when the back side image is formed. When the recording paper P reaches the reverse conveyance path 40B, the rotation direction of the rotation roller of the reverse conveyance path 40B is reversed and the recording paper P is conveyed to the refeed conveyance section 40C. When the recording paper P passes through the refeed conveyance section 40C, the fixed surface (front surface) is on the upper side. The recording paper P that has passed through the re-feed conveyance section 40C is inverted by the paper feed roller 50 and conveyed again to the secondary transfer roller 20S, and a color image is formed on the other surface (back surface) of the recording paper P. It will be batch transferred.

  Next, the configuration of the control system of the exposure units 1Y, 1M, 1C, and 1K to which the present invention is applied will be described with reference to FIGS. In FIG. 2, for simplicity of explanation, a control system of one exposure unit 1 will be described as an example. However, the description here is applied to the control system of each color exposure unit 1Y, 1M, 1C, 1K. Is done.

  FIG. 2 is a block diagram showing the configuration of the control circuit of the exposure unit 1. As shown in FIG. 2, the control circuit of the exposure unit 1 includes a CPU 101, crystal oscillators 102 and 104, a pixel CLK generation circuit 103, a polygon drive CLK generation circuit 105, a horizontal synchronization circuit 106, and a PWM (Pulse Width Modulation) signal generation circuit. The exposure unit 1 includes an index sensor 11, an LD (Laser Diode) driving unit 12, and a polygon M (motor) 13.

  The CPU 101 performs various control operations according to a control program for an image forming apparatus stored in a memory (not shown).

  Specifically, the CPU 101 adjusts the magnification in the paper feed direction (sub-scanning direction) during back side image formation based on the degree of shrinkage (shrinkage rate) of the recording paper P caused by the fixing process during front surface printing. Then, the setting of the value of the polygon drive CLK signal frequency (hereinafter referred to as the polygon drive CLK frequency) at the time of back side image formation is changed. At this time, the CPU 101 individually changes the polygon drive CLK frequency of each color, but the change rate of the polygon drive CLK frequency of each color is the same. Then, the CPU 101 outputs a control signal instructing generation of a polygon drive CLK signal having a polygon drive CLK frequency as a rotation speed adjusting means.

  If the value of the polygon drive CLK frequency increases due to the change of the polygon drive CLK frequency, the rotation speed of the polygon mirror increases. Therefore, the speed at which the laser beam is scanned on the photosensitive drum by the polygon mirror (main scan speed) Becomes larger. That is, when the process speed is constant, if the main scanning speed increases, the formed image shrinks, and if the main scanning speed decreases, the formed image expands. Apparent process speed).

  When the main scanning speed is changed by changing the polygon driving CLK frequency, the magnification in the main scanning direction also changes. Therefore, the CPU 101 further adjusts the magnification in the main scanning direction so that the frequency of the pixel CLK signal at the time of image formation on the back surface is changed. The setting of the value (hereinafter referred to as the pixel CLK frequency) is changed. Since the shrinkage of the transfer material (recording paper) due to the fixing also occurs in the main scanning direction, the CPU 101 changes the setting of the pixel CLK frequency including the magnification adjustment in the main scanning direction due to the shrinkage of the transfer material in the main scanning direction. Is going. At this time, the CPU 101 individually changes the pixel CLK frequency of each color, but the change rate of the pixel CLK frequency of each color is the same. The CPU 101 outputs a control signal for instructing the pixel CLK generation circuit 103 to generate the changed pixel CLK frequency.

  For example, as shown in FIG. 3, the recording paper P before fixing is Lmm in the vertical (sub-scanning direction) length and Wmm in the horizontal (main scanning direction) (FIG. 3A). It is assumed that the recording sheet P is fixed to the front surface and contracted to L ′ mm in the vertical direction and W ′ mm in the horizontal direction (FIG. 3B). At this time, if the polygon drive CLK frequency at the time of front surface creation is F0 and the polygon drive CLK frequency at the back side image formation is F, then F = (L / L ′) F0. Further, when the pixel CLK frequency at the time of rear surface image formation is f0 and the pixel CLK frequency at the time of rear surface image formation is f, f = (L / L ′) · (W / W ′) f0.

  The CPU 101 individually sets and changes the value of the polygon drive CLK frequency for each color, but the change rate (L / L ′) of the polygon drive CLK frequency for each color is the same. Similarly, the CPU 101 individually sets and changes the value of the pixel CLK frequency of each color, but the rate of change (L / L ′) · (W / W ′) of the pixel CLK frequency of each color is the same.

  When the polygon drive CLK frequency value is changed from F0 to F, assuming that the actual process speed at the time of surface image formation is V0 and the apparent process speed at the time of polygon drive CLK frequency change is V, V = ( F0 / F) V0 = (L '/ L) V0. Further, assuming that the interprocess gap at the time of front surface image formation is G0 and the interprocess gap at the time of back surface image formation is G, G = (V0 / V) G0 = (L / L ′) G0.

  This is because the process speed apparently changes by adjusting the magnification in the paper feed direction (sub-scanning direction) while the process speed is constant, and the number of lines corresponding to the interprocess gap changes. Therefore, the CPU 101 changes the timing relationship of image formation for each color by changing the color misregistration adjustment value corresponding to the adjustment value of the interprocess gap according to the change of the polygon drive CLK frequency. If the color misregistration adjustment value corresponding to the adjustment value of the interprocess gap is not changed, color misregistration occurs. Therefore, when switching between the front and back sides, surface phase control is performed to change the timing of image formation for each color.

  In FIG. 2, the crystal oscillator 102 generates a reference clock signal having a predetermined frequency and outputs the reference clock signal to the pixel CLK generation circuit 103.

  The pixel CLK generation circuit 103 generates a pixel CLK signal for driving the laser light in the exposure unit 1 from the reference clock signal output from the crystal oscillator 102 in accordance with the control signal output from the CPU 101.

  The crystal oscillator 104 generates a reference clock signal having a predetermined frequency and outputs the reference clock signal to the polygon drive CLK generation circuit 105.

  The polygon drive CLK generation circuit 105 generates a polygon drive CLK signal for driving a polygon mirror for irradiating the photosensitive drum with laser light from a reference clock signal output from the crystal oscillator 104 in accordance with a control signal input from the CPU 101. Generate. Details of the polygon drive CLK generation circuit 105 will be described later with reference to FIGS.

  The horizontal synchronization circuit 106 outputs the pixel CLK signal generated by the pixel CLK generation circuit 103 to the PWM signal generation circuit 107 in synchronization with an index signal (described later) output from the index sensor 11.

  The PWM signal generation circuit 107 generates a PWM signal corresponding to the pixel data based on the pixel CLK signal output from the horizontal synchronization circuit 106, and generates a drive signal for controlling the LD.

  The index sensor 11 in the exposure unit 1 detects laser light emitted from the polygon mirror by an index mirror (not shown) as detection means, and outputs a main scanning reference signal (index signal) to the horizontal synchronization circuit 106.

  The LD drive unit 12 generates a drive signal for controlling the LD based on the PWM signal output from the PWM signal generation circuit 107.

  The polygon M (motor) 13 is a DC brushless motor, and rotates the polygon mirror in accordance with the polygon CLK signal output from the polygon drive CLK generation circuit 105.

Next, the polygon drive CLK generation circuit 105 in FIG. 2 will be described in detail.
FIG. 4 shows an internal structure of the polygon drive CLK generation circuit 105 to which the present invention is applied.

  As shown in FIG. 4, the polygon drive CLK generation circuit 105 includes a crystal oscillator 104, a frequency divider circuit 110, and a phase control circuit 120.

  In FIG. 4, the CPU 101 performs frequency division in the frequency divider circuit 110 to change the polygon drive CLK frequency of each color in order to adjust the magnification in the paper feed direction at the time of back side image formation when the back side image is formed by double-sided printing. The setting of the ratio is changed, and a control signal for instructing frequency division at the set frequency dividing ratio is output to these frequency dividing circuits. Further, the CPU 101 outputs a control signal that instructs the phase control circuit to control the phase of the clock signal divided by the frequency dividing circuit 110.

  The frequency dividing circuit 110 divides the reference clock signal output from the crystal oscillator 104 by a predetermined frequency dividing ratio according to the control signal output from the CPU 101, and outputs it to the phase control circuit 115. Details of the frequency dividing circuit 110 will be described later with reference to FIGS.

  The phase control circuit 120 includes a rising edge of the index signal output from the index sensor 11 as phase control means, and a rising edge of a master index (Black Index in FIG. 4) that is an index signal of a reference color unit for color misregistration correction. A phase difference is detected, phase control of the divided CLK signal is performed based on the phase difference, and the divided CLK signal subjected to phase control is output as a corresponding polygon CLK signal (such as a yellow polygon CLK). In this example, yellow index (slave) phase control is performed on the index signal Black Index (master), and a yellow polygon CLK is output. It is assumed that phase control is similarly performed for each color (M, C). Details of the phase control circuit 120 will be described later with reference to FIGS.

  In this embodiment, the configuration includes one crystal oscillator. However, the present invention is not limited to this configuration, and the configuration may include two crystal oscillators for the front surface and the back surface, and a PLL whose frequency can be arbitrarily changed. It is good also as a structure provided with a circuit.

Next, the frequency dividing circuit 110 in FIG. 4 will be described in detail.
FIG. 5 shows an internal structure of the frequency divider circuit 110 to which the present invention is applied.

  As shown in FIG. 5, the frequency dividing circuit 110 includes a crystal oscillator 104, a speed shift frequency dividing data table 111, and a PLL (Phase Locked Loop) 112.

  The frequency shift frequency division data table 111 stores frequency division data TBL0 to TBLN (N is a natural number) that indicates a frequency division ratio at the time of speed shift and a holding time at the frequency division ratio, and is not illustrated. It is stored in a LUT (Look Up Table) stored in the storage unit. At the time of speed transition, according to the control signal output from the CPU 101, the divided data is instructed to the PLL 112 in ascending or descending order, and the divided CLK is changed stepwise. It is assumed that the frequency division ratio stored in the frequency division data and the holding time at the frequency division ratio are set stepwise within a range in which the PLL lock is not released.

  The PLL 112 determines the frequency of the reference clock signal output from the crystal oscillator 104 based on the frequency-divided data based on the frequency-divided data stored in the speed shift frequency-divided data table 111 according to the control signal output from the CPU 101. The converted clock signal (frequency-divided CLK) is output.

.
FIG. 6 is a graph showing the speed change when the rotation speed of the polygon mirror is changed based on the speed shift frequency division data stored in the speed shift frequency division data table 111. The vertical axis indicates the rotation speed of the polygon mirror, and the horizontal axis indicates time. When shifting from the front surface rotation speed to the back surface rotation speed, the CPU 101 instructs the PLL 112 to input the frequency division data stored in the speed transfer frequency division data table in ascending order to change the polygon mirror rotation speed step by step. Therefore, the speed increases to the right. Similarly, when shifting from the reverse rotation speed to the front rotation speed, the frequency division data is instructed to the PLL 112 in descending order, and the polygon mirror rotation speed decreases to the right.

  In this way, at the time of surface transition, the rotation speed of the polygon mirror is changed step by step within the range that does not release the PLL lock, so that the PLL lock standby time does not occur, so double-sided printing can be performed without reducing print productivity. Can be done. In this embodiment, the frequency division data is set so that the rate of change in the speed of the polygon mirror at the time of surface transition is equal. However, the present invention is not limited to this, and a sigmoid type speed change is performed. Frequency division data may be set. In this embodiment, the rotation speed of the polygon mirror is changed based on the frequency division data stored in the speed transition frequency division data table 111. However, the present invention is not limited to this, and the range in which the PLL lock is not released. The frequency division CLK at may be calculated by calculation and changed stepwise.

Next, the phase control circuit 120 of FIG. 4 will be described in detail with reference to FIG.
The phase control circuit 120 includes a drive CLK generation unit and a frequency division unit (not shown).
The frequency divider detects the phase difference between the rising edge of the index signal output from the index sensor 11 and the master index (Black Index in FIG. 4) that is the index signal of the reference color unit for color misregistration correction. In order to shift the phase difference to the phase difference corresponding to the color misregistration correction amount, the state of the frequency division ratio increased by α from the frequency division ratio N for obtaining the original speed is maintained for a period corresponding to the phase shift amount. Be controlled. The frequency-divided CLK signal whose phase is thus controlled is output as a polygon CLK signal of a corresponding color.

The phase control will be described with reference to the time chart of FIG.
When there is a phase change instruction from the CPU 101, the frequency division unit divides the frequency into the phase shift frequency division ratio N + α obtained by adding the phase correction amount α to the normal frequency division ratio N. Next, control is performed at the phase transition frequency division ratio N + α until the phases match, and when the phase change is completed, the frequency division unit again performs frequency division to the normal frequency division ratio N. FIG. 8 shows an example of shifting to the phase inversion state. Based on the phase control, the phase difference between the rising edge of the index signal of each color and the rising edge of the master index that is the index signal of the reference color unit for color misregistration correction is detected and the phase is controlled.

  The phase control when the Yellow polygon CLK shown in FIG. 4 is output will be described with reference to FIG. Here, an example is shown in which the phase of the slave rotor drive CLK is controlled so that the index signal (slave YINDEX) to be controlled is synchronized with the rising edge of the index signal (master KINDEX) that serves as a reference for output control. ing. Note that the black index (master) in FIG. 4 corresponds to the master KINDEX, and the yellow index (slave) corresponds to the slave YINDEX.

  First, the CPU 101 compares the rising edge of the master KINDEX and the rising edge of the slave YINDEX based on CLK as a reference for phase control, and derives the difference. FIG. 9 shows an example in which a delay of 2 CLK occurs.

  Next, the above-described phase control is performed on the slave rotor drive CLK so that the rising edge of the slave YINDEX is synchronized with the rising edge of the reference master KINDEX based on the difference value. Here, an example is shown in which the phase of the drive CLK is advanced by 2 CLK, and the master KINDEX and the slave YINDEX are synchronized as shown in the lower part of the figure. In FIG. 9, the period of the INDEX signal and the rotating body drive CLK is shown as a 1: 1 relationship, but the present invention is not limited to this, and the relationship between the INDEX signal and the rotating body drive is N: 1 (N is an integer). Since the phase relationship of CLK is uniquely determined, the same control is possible.

  The phase control described above is performed after the frequency dividing CLK is changed by the frequency dividing circuit 110 and the speed transition is completed.

Next, the operation of the present embodiment will be described.
In the following description of the operation, a case will be described in which the recording paper P is contracted as shown in FIG.

  When double-sided printing of the document g placed on the document table of the automatic document feeder 201 is designated by a key operation or touch panel operation on the image forming apparatus GH, the document g is transported by a transport unit, and the document Images on both sides of the original g are scanned and exposed by the optical system of the image scanning exposure apparatus 202 and read into the line image sensor CCD.

  This read image is photoelectrically converted by the CCD. The analog signal photoelectrically converted by the CCD is decomposed into Y, M, C, and K color components by an image processing unit (not shown) and stored in an image memory (not shown) as image data.

  First, the PWM signal generation circuit 107 generates a PWM signal for driving the LD based on the Y-color image data stored in the image memory, based on the pixel CLK signal output from the horizontal synchronization circuit. .

  The LD drive unit 12 in the exposure unit 1Y generates a drive signal for emitting laser light based on the PWM signal generated by the PWM signal generation circuit 107. In the polygon M13, the polygon mirror is rotated based on the Y-color polygon CLK signal generated by the polygon drive CLK generation circuit 105, and the laser beam driven by the drive signal is scanned toward the photosensitive drum 2Y.

  An electrostatic latent image for Y color is formed on the photosensitive drum 2Y by scanning laser light with a polygon mirror. The electrostatic latent image on the photosensitive drum 2Y is developed with Y-color toner supplied from the developing device 3Y.

  Similar processing is performed in the exposure units 1M, 1C, and 1K, and electrostatic latent images for M, C, and K colors are formed on the photosensitive drums 2M, 2C, and 2K, respectively. The electrostatic latent images on the photosensitive drums 2M, 2C, and 2K are developed with M, C, and K toners supplied from the developing devices 3M, 3C, and 3K, respectively.

  The Y-color toner image formed by the image forming unit 10Y is transferred (primary transfer) to the rotating intermediate transfer belt 20B. The transfer residual toner remaining on the peripheral surface of the photosensitive drum 2Y is cleaned by the image forming body cleaning unit 4Y, and the next image forming cycle (back surface image forming cycle) is started.

  Next, the M toner image formed by the image forming unit 10M is transferred onto the rotating intermediate transfer belt 20B so as to be superimposed on the transferred Y toner image. When the transfer of the M color is completed, the transfer residual toner remaining on the peripheral surface of the photosensitive drum 2M is cleaned by the image forming body cleaning unit 4M, and the next image forming cycle (image forming cycle on the back surface) is started. .

  Next, the C toner image formed by the image forming unit 10C is transferred onto the rotating intermediate transfer belt 20B so as to overlap the transferred Y and M toner images. When the C color transfer is completed, the transfer residual toner remaining on the peripheral surface of the photosensitive drum 2C is cleaned by the image forming body cleaning unit 4C. The next image forming cycle (back side image forming cycle) is started.

  Next, the K toner image formed by the image forming unit 10K is transferred onto the rotating intermediate transfer belt 20B so as to overlap the transferred Y, M, and C toner images. When the primary transfer of the K color is completed, the transfer residual toner remaining on the peripheral surface of the photosensitive drum 2K is cleaned by the image forming body cleaning unit 4K. The next image forming cycle (back side image forming cycle) is started. Similarly, the surface work is performed on the image forming units 10M, 10C, and 10K.

  When the CPU 101 determines that the surface work by each image forming unit (10Y, 10M, 10C, 10K) has been completed, a value obtained by multiplying the polygon drive CLK frequency at the time of surface image formation by L / L ′ is obtained. The polygon drive CLK at the time of image is set for each color, and a frequency control signal is output to the polygon drive CLK generation circuit 105. In the polygon drive CLK generation circuit 105, a polygon CLK signal for back side image formation is generated according to the frequency control signal output from the CPU 101 and output to the polygon M 13 in the exposure unit 1.

  Further, in addition to the setting change of the polygon drive CLK frequency, a value obtained by multiplying the color pixel CLK frequency at the time of front surface image formation by (L / L ′) · (W / W ′) is the pixel CLK frequency at the time of back surface image formation. The frequency control signal is output to the pixel CLK generation circuit 103.

  The PWM signal generation circuit 107 generates a PWM signal corresponding to the back side image data stored in the image memory based on the pixel CLK signal whose frequency has been changed. In the LD drive unit 12 in the exposure unit 1, laser light is emitted based on the PWM signal generated by the PWM signal generation circuit 107. In the polygon M13, the polygon mirror is rotated based on the polygon CLK signal for back side image formation, and the laser beam is scanned toward the photosensitive drums 2 of the respective colors to start back side image formation.

  As described above, the timing when the image forming apparatus is applied to both image generations is the polygon after the surface imaging of all colors (Y, M, C, K) is completed as shown in the timing chart of FIG. The frequency and phase of the CLK signal and the pixel CLK frequency are changed, and back side image formation is started without a PLL lock waiting time. Therefore, the front and back resists can be realized with high accuracy, and the printing time at the time of surface transfer can be shortened.

  Furthermore, by adopting a configuration in which a polygon drive clock generation circuit is provided independently, the master index is set to the most upstream color unit (the Yellow unit in FIG. 10), so that the speed and phase can be changed every time image formation for each color is completed. This makes it possible to further shorten the printing time.

  FIG. 11 shows a timing chart when the polygon drive clock generation circuit is provided independently. Here, by setting the master index to the most upstream Yellow unit (Yellow V-Valid in FIG. 11), the frequency and phase of the polygon CLK signal of each color and the change of the pixel CLK frequency are changed after the completion of image formation for each color. The timings A, B, C, and D are performed. Therefore, the front and back resists can be realized with high accuracy, and the printing time at the time of surface transfer can be further shortened.

The description in this embodiment shows an example of an image forming apparatus according to the present invention, and can be applied to monochrome and color image forming apparatuses, and can be preferably applied to a color image forming apparatus. The detailed configuration and detailed operation of the image forming apparatus GH in the present embodiment can be changed as appropriate without departing from the spirit of the present invention.

It is sectional drawing of the image forming apparatus GH to which this invention is applied. It is a block diagram which shows the structure of the control circuit of exposure unit 1 (1Y, 1M, 1C, 1K). FIG. 6 is a diagram illustrating shrinkage of a transfer material (recording paper) due to fixing. 3 is a block diagram showing a polygon drive CLK generation circuit 105. FIG. 2 is a block diagram showing a frequency divider circuit 110. FIG. The figure which shows the change of the polygon motor rotational speed at the time of speed transition. 2 is a block diagram showing a phase control circuit 120. FIG. FIG. 3 is a diagram illustrating phase control by a phase control circuit 120. FIG. 3 is a diagram illustrating phase control by a phase control circuit 120. It is a timing chart which shows the timing of front surface image formation and back surface image formation for every color. It is a timing chart which shows the timing of front surface image formation and back surface image formation for every color.

Explanation of symbols

1, 1Y, 1M, 1C, 1K Exposure unit 11 Index sensor 12 LD driver 13 Polygon M
2Y, 2M, 2C, 2K Photosensitive drums 3Y, 3M, 3C, 3K Developing devices 4Y, 4M, 4C, 4K Image forming body cleaning means 10Y, 10M, 10C, 10K Image forming unit 20 Transfer unit 30 Fixing device 40 Paper feed Transport unit 101 CPU
102 (for pixel CLK) crystal oscillator 103 pixel CLK generation circuit 104 (for polygon CLK) crystal oscillator 105 polygon drive CLK generation circuit 106 horizontal synchronization circuit 107 PWM signal generation circuit 110 frequency division circuit 111 speed shift frequency division data table 112 PLL
120 phase control circuit 201 automatic document feeder 202 document image scanning exposure device P recording paper g document GH image forming device

Claims (7)

An image forming unit for image formation, images formed via the polygon mirror of the image forming unit can be printed on both sides of the recording paper, and an image from one side of the recording paper to the other side In an image forming apparatus provided with a PLL type rotational speed adjusting means for adjusting the rotational speed of the polygon mirror at the time of transition of formation,
The rotational speed adjusting means finely adjusts the rotational speed of the polygon mirror to a target rotational speed within a range that does not deviate from the stable speed range of the PLL during the transition of image formation from one side of the recording paper to the other side. An image forming apparatus characterized in that adjustment is performed while changing.   The image forming apparatus according to claim 1, wherein the image forming unit is an image forming unit provided corresponding to each of a plurality of colors.   The rotation speed adjusting means changes the frequency of a polygon clock signal for driving the polygon mirror in a stepwise manner up to a target rotation speed within a range that does not deviate from the stable speed range of the PLL. The image forming apparatus according to 2. Detecting means for detecting a light beam scanned by a polygon mirror of each color image forming unit and outputting a main scanning reference signal;
The color shift in the sub-scanning direction of the image formed via the polygon mirror is corrected by controlling the phase difference of the main scanning reference signal of each color output by the detecting means by controlling the phase of the polygon clock signal. Phase control means for correcting
The image forming apparatus according to claim 2, further comprising:   The phase control means is configured to make the rotation speed of the polygon mirror higher or lower than the target rotation speed in a range that does not deviate from the stable speed range of the PLL until the phase of the polygon clock signal reaches the target. The image forming apparatus according to claim 4, wherein the phase of the polygon clock signal is controlled.   The image forming apparatus according to claim 4, wherein the phase control unit performs the phase control after the polygon mirror reaches a target rotation speed by the rotation speed adjustment unit. Each polygon clock signal corresponding to the image forming unit of each color is generated from a different clock signal source,
In the phase control of the polygon clock signal, the phase control means uses a main scanning reference signal as a reference for the phase control as a main scanning reference signal of an image forming unit corresponding to the most upstream position of the image forming process. The image forming apparatus according to claim 4, wherein the image forming apparatus is an image forming apparatus.

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