JP4054773B2 - Silicon substrate cleaving method - Google Patents

Description

The present invention relates to a silicon substrate cutting method for separating a semiconductor substrate or the like in which a plurality of semiconductor element portions are arranged on a silicon wafer into individual element chips by laser processing.

  When a semiconductor substrate such as a silicon wafer is precisely cut into chips, conventionally, a circumferential blade having a width of several tens to several hundreds of μm is rotated at a high speed, and the blade surface abrasive is cut by grinding the semiconductor substrate. A blade dicing method is known. At this time, in order to reduce heat generation and wear due to cutting, cooling water is sprayed on the cut surface, but the semiconductor substrate and abrasive particles generated by cutting, an adhesive tape that fixes the semiconductor substrate and the processing table The pressure-sensitive adhesive particles and the like are mixed in the cooling water and scattered widely. In particular, in a semiconductor substrate on which ejection means such as inkjet nozzles are formed, if the fine particles are mixed as dust inside the nozzles or the like, there is a possibility that the ejection of liquid such as ink may be seriously affected.

  In order to solve this problem, it is desirable that the cutting can be performed in a dry environment without using cooling water. Therefore, a processing method is used in which a laser beam having a high absorption wavelength is focused on the surface of the semiconductor substrate and the substrate is cut. However, in this method, since the periphery of the cut portion is also melted on the substrate surface, there is a problem of damaging a logic circuit or the like provided on the semiconductor substrate, and laser processing is performed from the laser incident side to the emission side. Since the substrate is melted and proceeds, the re-solidified product of the melt adheres to the substrate surface and becomes dust. Therefore, a dust problem occurs as in the case of blade dicing.

  Further, as a processing method for cutting a substrate by condensing a highly absorbing laser beam inside the substrate, for example, the methods disclosed in Patent Document 1 and Patent Document 2 are transmitted through a substrate that is a material to be processed. A denatured layer formed by condensing a highly specific laser beam with a specific wavelength inside the substrate is used as the starting point for cutting, and because it does not form a molten region on the substrate surface, it enables cutting with less dust It is.

  However, in the above method, since the starting point of cutting is limited to the deteriorated layer inside the substrate, it is difficult to precisely control the direction and position of the crack reaching the substrate surface from the starting point of cutting.

  In particular, in the case of a silicon substrate, since the growth of cracks is affected by the crystal orientation, if there is a small deviation between the planned cutting line and the crystal orientation due to industrial errors in the formation of the silicon substrate and elements, the above laser In the processing method, there is a high possibility of deviating from the planned cutting line in the process of the crack progressing to the surface of the substrate and destroying the logic circuit or the like of the element portion.

  More specifically, as shown in FIG. 17A, a laser beam L having a specific wavelength is condensed at a predetermined depth inside a silicon substrate 101 made of single crystal silicon having a crystal orientation (100) on the surface. The altered layer 102 is formed, and as shown in FIG. 5B, an external force F is applied to the planned cutting line C to generate a crack 103 from the altered layer 102 toward the substrate surface, thereby dividing the silicon substrate 101. In this case, since a high-order crystal orientation plane is formed at the tip 102a of the altered layer 102 by the laser processing, the actual crack 103a due to the external force F is inclined in the cleavage direction (110) of the single crystal silicon. End up. As a result, the substrate surface is divided at a position greatly deviated from the planned cutting line C on the surface of the silicon substrate 101. In particular, in an element substrate of a liquid discharge head in which a discharge port for discharging a liquid such as ink is formed, an opening structure for supplying a liquid such as an ink exists below the discharge port. There is a problem of destroying the substrate.

Further, in the case of a glass substrate or the like, the same problem occurs when a fine flow path, a fluid inlet / outlet, or the like is formed in the substrate by etching.
JP 2002-192370 A (Patent No. 3408805) JP 2002-25180 A JP 2000-15467 A

The present invention has been made in view of the unsolved problems of the prior art, the silicon substrate breaking reliable method capable of cleaving precisely silicon substrate along the expected splitting line of the substrate surface Is intended to provide.

To achieve the above object, the silicon substrate breaking method of the present invention, by generating a crack focusing laser light within the silicon substrate, the silicon substrate breaking method for dividing the silicon substrate into a plurality of element chips A step of condensing a chirped light pulse whose wavelength changes with time due to a self-phase modulation effect as the laser light to generate cracks in the silicon substrate; and A step of forming the crack along the planned cutting line inside the silicon substrate by relative movement along the silicon substrate, and a linear processed portion for concentrating stress on the planned cutting line. a forming, and a step of connecting the cracks and the linear processing unit by providing an external force to the silicon substrate, the chirped light path When focusing the scan inside the silicon substrate, the condensing position where the depth is changed from the surface of the silicon substrate in accordance with the wavelength change, inside the silicon substrate by the condensing of the chirped optical pulse The present invention is characterized in that the generated crack does not reach the surface of the silicon substrate.

A chirped light pulse whose wavelength changes within the pulse time is condensed inside the substrate to form a crack group consisting of long internal cracks, and the crack group is propagated in the depth direction by external force to cleave the silicon substrate. Therefore, there is no possibility of contaminating the substrate surface like blade dicing or conventional laser processing for cutting from the substrate surface, and it is possible to cleave accurately along the planned cutting line.

  In addition, by forming a linear processed portion along the planned cutting line on the surface of the substrate, it is possible to induce cracks due to external forces to the linear processed portion, and to control the progress direction of the internal cracks very precisely. Therefore, in the cleaving process by external force, it prevents the cracks from deviating from the planned cutting line and damages the element part of the board, or the board itself is destroyed due to the influence of the opening formed in the board, etc. Highly cleaving can be performed.

As shown in FIG. 1, the cleaving process for separating divorced substrate 10 to the logic element portions 10a are formed a plurality of semiconductor element section on the surface of the individual element chips, the silicon substrate 10 as shown in FIG. 2 Laser light is condensed inside, and internal cracks 12 (12a to 12c) that are cracks that do not reach the substrate surface 11 on which the logic circuit or the like of the silicon substrate 10 is formed are formed. As shown in FIGS. 7 and 8, the laser light L that forms each internal crack 12 is a chirped light pulse having a wavelength that spreads from red to blue in terms of time due to the self-phase modulation effect. Moves at a high speed in the depth direction from A _{1 to} A _3, and the crack length (b) of the internal crack 12 increases by the movement amount Δa.

  By scanning (relatively moving) the laser light L along the planned cutting line C, a band-shaped crack group composed of long internal cracks 12 is formed.

  After or before the formation of such a crack group, surface processing for forming a surface processing mark 11a, which is a linear processing portion, is performed on the substrate surface 11 along the planned cutting line C.

  If an external force for cleaving is applied after the surface processing of the surface processing mark 11a and the internal processing of the crack group by the laser beam, stress concentrates on the surface processing mark 11a and is connected to the internal crack 12, so that the substrate surface 11 The actual breaking line that is generated does not deviate from the breaking line C.

  The same process is performed when the glass substrate 80 shown in FIG.

  As shown in FIG. 1C, the silicon substrate 10 shown in FIGS. 1A and 1B has a silicon wafer 1 formed in the (100) orientation and having a thickness of 625 μm as a base. An oxide film 2 having a thickness of about 1 μm is formed on the surface of the substrate, and a structure for discharging liquid such as ink, a logic element for driving them, and a structure made of epoxy resin containing wiring and the like are formed thereon. A certain nozzle layer 3 is arranged to constitute each logic element portion 10a.

  In this manner, a liquid supply port (ink supply port) 4 as an opening is formed by anisotropic etching of the silicon wafer 1 immediately below the nozzle layer 3 incorporating a liquid discharge mechanism and the like. The nozzle layer 3 is disposed with a cleaving line C between each other so that the silicon wafer 1 can be cleaved into element chips at the final stage of the manufacturing process. The cleavage line C is formed along the crystal orientation of the silicon wafer 1, and the interval S between the adjacent nozzle layers 3 is about 400 μm at the minimum.

  FIG. 3 is a flowchart for explaining a cleaving process for separating the silicon substrate 10 into the logic element portions 10a to be individual element chips. This process includes a tape mounting process in Step 1, a wafer correction process in Step 2, and a process in Step 3. The process consists of a surface linear processing process (surface processing process), an internal crack formation process (internal processing process) in step 4, a cleaving process in step 5, a repair process in step 6, and a pick-up process in step 7. Each step will be described below in order.

"Tape mounting process"
As shown in FIG. 4, the silicon substrate 10 is first tape-mounted to prevent the elements from being separated in the process up to cleaving. The tape mount is formed by attaching an adhesive dicing tape T to which the dicing frame M is attached to the back surface of the silicon substrate 10.

  As the dicing tape, an adhesive tape coated with an ultraviolet curable or pressure sensitive adhesive or an adhesive tape having a self-adhesive layer is used.

"Wafer correction (warp correction) process"
As described above, the nozzle layer 3, which is a resin layer formed on the surface of the silicon substrate 10, undergoes thermal shrinkage during curing, and thus the entire silicon substrate 10 is deformed as shown in FIG. When laser irradiation to be described later is performed in such a deformed state, the incident angle is locally different on the substrate surface 11 and processing cannot be performed with high accuracy. Therefore, it is necessary to correct this deformation in advance. Therefore, as shown in FIG. 5B, the silicon substrate 10 is sucked by the suction stage D from the dicing tape T side, thereby flattening the silicon substrate 10 and correcting the deformation.

"Surface linear processing process"
Subsequently, in order to cleave each logic element portion 10a of the silicon substrate 10 with high accuracy, a surface processing mark 11a that induces propagation of a crack to the cleaving line C is formed on the substrate surface 11. Thus, by forming the surface processing mark 11a along the planned cutting line C, stress concentration occurs when cleaving by an external force, and a crack is induced to the surface processing mark 11a. Or the surface processing trace 11a becomes a starting point, and a crack progresses inside. Therefore, unnecessary cracks that destroy logic circuits and the like do not occur.

  As shown in FIG. 6, the surface processing mark 11 a may be formed by marking with a scriber using a tool 40 such as cemented carbide or diamond along the planned cutting line C. The surface processing mark 11a preferably has a width of 2 μm or more and a depth of 1 μm or more. However, it is necessary to have a size that does not interfere with the optical path of the laser beam L for processing the internal crack 12. As the processing depth, a depth that causes stress concentration between the surface processing mark 11a and the crack at the time of cleaving is suitable, and this is the oxide film 2 that is the surface layer of the silicon substrate 10 as shown in FIG. There is no problem even if the thickness is equal to or greater than the thickness of the oxide film 2 as shown in FIG. Further, the surface processing mark 11a is indispensable for at least the substrate surface 11 having the logic element portion 10a, but may be formed on both the front side and the back side of the silicon substrate 10, and in this case, internal crack formation Sometimes there is no influence of laser beam vignetting (a phenomenon in which the amount of laser light that reaches the inside of the substrate by reflecting the laser beam irradiated on the concave slope of the surface with the surface processed traces is reduced), so that internal cracks can be made more efficiently. It can be carried out.

  The surface processing mark 11a may be formed after the internal crack formation step by the laser beam L.

"Internal crack formation process"
Each internal crack 12 (12a-12c) shown in FIG. 2 is formed using the processing apparatus 50 shown to (a) of FIG. This processing apparatus 50 includes a light source 51, a chirped light pulse generator 51a, a mirror 51b, a condensing optical system 52 having a microscope objective lens 52a, a mirror 52b, and the like, an X stage 53a, a Y stage 53b, and a fine adjustment stage. An automatic stage 53 having 53c and the like, and an alignment optical system (not shown) for performing alignment by the orientation flat 10b (see FIG. 1) of the silicon substrate 10 as the work W are provided.

  As the light source 51, an ultrashort pulse laser having a pulse width of femtosecond is used, and the oscillation frequency is 1 kHz. The laser light L emitted from the light source 51 is converted into a chirped light pulse as shown in FIG. 8 by the chirped light pulse generator 51a, and the wavelength width is distributed from the blue band to the red band to the near infrared band. The duration of the pulse is a few picoseconds.

  Only the transmission wavelength of the material to be processed (work W) is selected by the wavelength filter (not shown) and the chirped light pulse is incident on the condensing optical system 52.

  In the present embodiment, since the workpiece W that is a material to be processed is the silicon substrate 10, for example, a wavelength band with good absorption into the silicon substrate 10 of 1000 nm or less damages the substrate surface 11. Therefore, a wavelength cut filter having a characteristic of cutting a wavelength of 1000 nm or less is installed in the optical path.

  The principle of chirped light pulse generation is as follows. An ultrashort optical pulse train (mode-locked laser pulse train) emitted from a light source 51, which is an ultrashort pulse laser light generator, is incident on a chirped light pulse generator 51a and passed through a specific refractive index medium such as water or glass. A white light pulse (chirped light pulse) is obtained by the effects of self-phase change, velocity dispersion, and the like.

  As shown in FIG. 8A, this chirped light pulse has a characteristic that the first half of the pulse is red light with a long wavelength and the second half is blue light with a short wavelength.

When this chirped light pulse is condensed by the condensing optical system 52, the refractive index of the lens has wavelength dispersion characteristics, so that the depth of the condensing point changes as the wavelength changes from red to blue. If the microscope objective lens 52a of the condensing optical system 52 is a normal objective lens, for example, a material such as BK7 or quartz, the condensing point decreases in the depth direction which is the thickness direction as the wavelength changes from red to blue. Move up from A to A ₁ , A ₂ , A ₃ . Moreover, since this movement is performed within the time of the chirped light pulse, it is very fast. In this way, by condensing the chirped light pulse with the lens, the condensing position that becomes the starting point of the internal crack 12 moves at high speed within the pulse time width of the laser, and therefore, only the moving amount (Δa) of the condensing point. The long internal crack 12 having a long crack length (b) can be stably formed.

More specifically, as shown in FIG. 8B, the amount of movement (Δa) of the condensing points A _{1 to} A ₃ due to the change in the wavelength of the chirped light pulse from 1000 nm to 1400 nm is from the bottom in the depth direction. About 100 μm upward, the crystal state of the silicon wafer 1 changes in this moving region, and as a result, a long internal crack 12 runs.

In the experiment, it was confirmed that a crack runs below the condensing point, that is, far from the laser incident side, and the crack length (b) is the condensing point A ₁ to the condensing point A ₁ to the wavelength change of the chirped light pulse. The movement amount (Δa) of A ₃ is added to be 150 to 200 μm.

  As the microscope objective lens 52a of the condensing optical system 52, for example, one having a magnification of 20NA0.42 or a magnification of 50NA0.55 is used. In addition, in consideration of the refractive index of silicon, it is possible to use a condensing lens optimal for silicon internal processing that can be applied to microscopic observation. The laser light L, which is a chirped light pulse focused on the work W by the condensing optical system 52, is a logic element portion of the silicon substrate 10 that is the work W on the automatic stage 53, as shown in FIG. Incident from the substrate surface 11 having 10a.

  The optical conditions at this time are set so that the surface processing mark 11 a may exist on the substrate surface 11. That is, measures are taken such as increasing the power in consideration of energy loss due to the surface processing mark 11a or selecting the light flux so as to be incident while avoiding the surface processing mark 11a. The light beam incident from the substrate surface 11 is refracted in the silicon substrate 10 to generate the internal crack 12 as described above.

  According to the experiment, the crack tip of the uppermost internal crack 12c shown in FIG. 2 is processed according to the condensing position, the film configuration of the oxide film 2, the laser wavelength to be used, etc. so as to be at least 20 μm away from the substrate surface 11. It is desirable to set conditions. This is to prevent the internal crack 12c and the substrate surface 11 from being inadvertently connected during processing, or the substrate surface 11 may be damaged depending on the laser irradiation conditions.

  The depth (a) of the condensing point can be controlled by moving either the workpiece W, which is the silicon substrate 10, or the condensing optical system 52 in the optical axis direction and shifting the condensing position. When the refractive index with respect to the wavelength of 1064 nm of the silicon substrate 10 is n, and the mechanical movement amount (movement amount when either the silicon substrate 10 or the condensing optical system 52 is moved in the optical axis direction) is d, The optical movement amount of the condensing point is nd. The refractive index of the silicon substrate 10 is in the vicinity of 3.5 at a wavelength of 1.1 to 1.5 μm, which is close to 3.5 when compared with the value actually predicted in the experiment.

That is, when the mechanical movement amount is 100 μm, the condensing point of the laser beam is formed at a position of 350 μm at the shortest distance from the surface. The fact that the refractive index is in the vicinity of 3.5 indicates that the reflectance is large. In general, reflection at normal incidence is ((n−1) / (n + 1)) ² , and is about 30% for a silicon substrate. Although the remaining energy reaches the inside, the final energy at the condensing point is further reduced because there is also light absorption of the silicon substrate. When measured on a 625 μm thick silicon substrate, the transmittance was about 20%.

As described above, the laser beam L for forming the internal crack 12 in the silicon substrate 10 is relatively moved along the planned cutting line C, thereby performing internal processing for forming a crack group immediately below the planned cutting line C. As shown in FIG. 1, the planned cutting line C of the silicon substrate 10 includes two planned cutting lines C ₁ and C ₂ perpendicular to each other with respect to the orientation flat 10b.

  The workpiece W, which is the silicon substrate 10, is placed on an automatic stage 53 that can move in the X and Y directions, and the optical axis direction (depth direction) is the Z stage 52c on the side of the automatic stage on which the workpiece W is placed or on the condensing optical system side. And the interval between the condensing optical system 52 and the workpiece W is variable.

  The moving speed in the XY directions is determined in consideration of the frequency and crack shape, and the moving speed is generally 10 to 100 mm / sec at a normal frequency of 10 to 100 KHz. When the moving speed is 100 mm / sec or more, the internal processing is stepped in the moving direction, and the subsequent cleaving is affected, for example, the interval between adjacent cracks on the same cleaving line is significantly widened.

  Further, the condensing optical system 52 has an observation camera 52d so as to be conjugate with the workpiece irradiation point. On the other hand, the reflectance of the silicon substrate 10 is about 30%. Will be damaged. Therefore, a filter corresponding to the output of the laser is arranged. The illumination for observation uses a relay lens so that a light source can be formed at the position of the entrance pupil of the microscope objective lens 52a used for condensing so that Koehler illumination can be formed. In addition, illumination is also performed through a filter to eliminate damage to the illumination optical element as much as possible.

  In addition to the above observation optical system, an AF optical system 54 is introduced to measure the distance from the workpiece W. The AF optical system 54 obtains the contrast of the image obtained by the observation camera 52d, and measures the focus and tilt from the obtained value. Actually, in order to measure this contrast, the distance to the workpiece W is measured while being finely fed to determine the best position. Note that it is determined whether or not the AF operation is performed in view of the parallelism of the workpiece W that is the silicon substrate 10.

  Internal machining is performed in this way, but attention should be paid to the following points when starting machining.

(1) As shown in FIG. 9, laser processing is started from the end point of the silicon substrate 10 as the workpiece W. However, since the vicinity of the end point is difficult to process from the central portion, the laser energy is used when processing the vicinity of the end point. It is necessary to change machining conditions such as raising the workpiece W from the center.
(2) As shown in FIG. 10, when processing an irregular shaped chip having a rectangular shape, the internal crack 12 is first processed with the planned cutting line C ₁ on the long side as the first cutting direction, and then processing the internal crack 12 along a 20 percent cross direction expected splitting line C ₂ on the short side.

  As described above, the crack length formed at one condensing point is 150 to 200 μm, and the thickness of the target silicon substrate is 625 μm. It is necessary to perform processing. Also, the order of internal processing at one point starts from the far side (back side) from the substrate surface and approaches the surface.

  At the time of internal processing for forming internal cracks, processing is not performed in which internal cracks formed in the vicinity of the substrate surface reach the substrate surface having surface processing marks. In addition, it is assumed that a processing condition in which an existing internal crack near the condensing point grows due to the influence of heat or the like by laser irradiation and reaches the substrate surface is not selected.

  However, the inside of the substrate is not limited thereto, and the internal cracks 12a to 12c may be divided in the depth direction as shown in FIG. Further, the crack group of the internal crack 12c closest to the substrate surface 11 is provided at a depth of 20 to 100 μm from the substrate surface 11 of the silicon substrate and at a position not communicating with the surface processing mark 11a.

  Next, the processing order of each crack group will be described.

  As shown in FIGS. 11A, 11B, and 11C, the first method is a group of cracks having a height higher than the surface, for example, substantially the same for a plurality or all of the planned cutting lines C. After the formation of the crack group of the deep internal crack 12a is finished, the crack group of the internal crack 12b having a different depth is processed. Since the formation of the crack group for each depth is performed stepwise inside the silicon substrate 10, the influence of the adjacent planned cutting line C can be reduced.

  In the second method, as shown in FIG. 11 (c), the crack groups of the internal cracks 12a, 12b, and 12c having different depths are formed immediately below one fracture line C, and then another fracture schedule is formed. A similar crack group of line C is processed. This method can reduce the number of AF operations at the processing start point when correction of the focal position with respect to the flatness of the silicon substrate 10 is necessary.

  In the first method, as shown in FIGS. 11A and 11B, the condensing point is moved in one direction along the planned cutting line C, and as shown in FIG. 11C. The condensing point may be reciprocated along the planned cutting line C. The latter can shorten the machining time because the total operating distance is shortened.

  In the present embodiment, the latter is selected, but the determination is made comprehensively based on the state of the object (parallelism or swell of the silicon substrate).

In addition, as shown in FIG. 10, in the cutting planned lines C ₁ and C ₂ having two cutting directions, there is a point where they intersect (intersection C ₁₂ ). In the vicinity of the intersection C ₁₂ thus laser beams for the internal machining of the same depth in the second percent cross direction is blocked by the internal processing zone which is formed along the first percent cross direction. This does not occur in the entire internal machining zone in the second cleaving direction, but is a local phenomenon. However, considering the energy loss, the machining condition is changed in the vicinity of the intersection C ₁₂ or the second cleaving direction is changed. It is desirable to change the processing conditions when moving in the direction and to perform processing under processing conditions different from the first cutting direction throughout the second cutting direction.

"Cleaving process"
The silicon substrate 10 on which the surface processing mark 11a and the plurality of internal cracks 12a, 12b, 12c are formed for each planned cutting line C is not connected to at least the surface processing mark 11a and the internal crack 12c immediately below the surface. The individual logic element portions 10a of the silicon substrate 10 after laser processing are not cleaved. The procedure for cleaving the silicon substrate 10 in this state into elements is performed as follows.

  As shown in FIG. 12, the silicon substrate 10 after forming the surface processing marks 11a and the internal cracks 12 (12a, 12b, 12c) is mounted on the dicing tape T so that the back surface of the silicon substrate 10 faces up. Then, it is placed on a rubber sheet 60 having elasticity such as silicone rubber or fluoro rubber. In addition, in order to avoid that the substrate surface 11 of the silicon substrate 10 is in contact with the rubber sheet 60 and the dirt is attached to the surface side, a commercially available product used for back grinding or the like on the surface side of the silicon substrate 10 after the formation of internal cracks. A protective tape R may be attached.

The cleaving is performed by pressing the silicon substrate 10 through the dicing tape T with a stainless roller 61. First, the silicon substrate 10 is placed on the rubber sheet 60 so that one of the planned cutting lines C of the silicon substrate 10, preferably the aforementioned first cutting direction, is substantially parallel to the roller axis. When the silicon substrate 10 is pressed while rolling the roller 61, the rubber sheet 60 immediately below the roller 61 is deformed so as to sink. In the silicon substrate 10, stress in the extending direction acts on the rubber sheet 60 side, that is, the surface side. This stress concentrates on the weakest part of the substrate surface 11, that is, on the surface processing mark 11 a on the planned cutting line C ₁ , and acts to spread it.

As a result, a crack is generated starting from the surface processing mark 11a, and the crack progresses to the back surface of the substrate by connecting the internal cracks 12a, 12b, and 12c due to laser irradiation inside the substrate, reaches the back surface of the substrate, and reaches the planned cutting line. The silicon substrate 10 is cleaved along C ₁ . Although the progress of the crack occurs along the crystal orientation of the silicon substrate 10, since the cleaving is performed by the connection with the surface processing mark 11 a, the crack does not deviate greatly from the planned cutting line C ₁ on the substrate surface 11. As the roller 61 advances, the silicon substrate 10 is sequentially cut along the cutting line C ₁ in the first cutting direction. The roller 61 is advanced from the end of the silicon substrate 10 toward the other end, or the vicinity of the center of the silicon substrate 10 is used as the starting point for pressing the roller 61 toward the end of the silicon substrate 10. Any may be sufficient.

Next, the silicon substrate 10 is rotated by 90 ° so that the planned cutting line C ₂ in the second cutting direction and the axis of the roller 61 are substantially parallel. Similarly to the first cleaving direction, the silicon substrate 10 is pressed by the roller 61 to generate a crack starting from the surface processing mark 11a in the second cleaving direction and reach the back surface.

  Through the above steps, the silicon substrate 10 is separated into individual element chips.

  The cleaving step shown in FIG. 12 applies stress on the surface of the silicon substrate due to the deformation of the rubber sheet by the hard roller. However, the silicon substrate by the roller is used so that the logic element and the nozzle layer are not destroyed. It is necessary to select the compression load, rubber sheet thickness, and rubber hardness. In addition, the material and thickness of the dicing tape and the surface protection tape are selected so that unnecessary interference layers are not formed.

  Either of the following two methods may be used as a method of cleaving a silicon substrate having surface processing marks and internal cracks by an external force acting along the planned cutting line.

  In the first method, as shown in FIG. 13, bending stress is applied to the planned cutting line C between the logic element parts 10 a of the silicon substrate 10, and the elements are separated along the planned cutting line C. The logic element part 10a to be cut is pushed upward by about 1 to 10 μm with the collet A 62a sandwiching the front side and the pin 63 sandwiching the back side. At this time, a part of the adjacent logic element portion 10a is suppressed by the collet B62b so that the adjacent logic element portion 10a is not pushed upward. As a result, a stress that spreads the surface processing trace on the cleaving line C acts, a crack is generated starting from the surface processing trace, and is connected to the internal crack and reaches the back surface of the silicon substrate 10.

  The second method is a method in which a mechanical impact is directly applied to the surface side of the silicon substrate 10 along the planned cutting line C as shown in FIG. The silicon substrate 10 after the formation of the surface processing mark 11a and the internal crack 12 is transferred to a single point bonder, and the substrate surface 11, preferably the vicinity of the surface processing mark 11a, is made of ceramic or a ceramic and metal fired material (cermet material). By continuously hitting with a fine and hard tool 64, a crack is formed starting from the surface processing mark 11a.

  It is also conceivable to cleave the substrate after laser processing by newly applying a thermal shock by the method disclosed in Patent Document 3.

"Repair process"
In the cleaving step, the surface processing mark 11a and the crack due to the internal crack 12 are connected, and the crack reaches the back side, so that the silicon substrate 10 is separated into each element chip. However, if there is no accidental complete separation, re-cleaving is necessary. As a re-cleaving method, for example, only the logic element part 10a that has not been cleaved is individually cleaved by using the mechanism shown in FIG.

"Pickup process"
As shown in FIG. 15, the logic element portion 10a, which is an element chip separated in the cleaving process and the repair process, is carried out by the suction collet 65 and the pick-up pin 66 and stored individually. At this time, the gap between the elements may be widened by an expander or the like. Further, fine dust generated during pick-up may be removed by suction.
(Reference example)

  The glass substrate 80 shown in FIG. 16 was cleaved by the same cleaving process as in Example 1. The glass substrate 80 has a thickness of 500 μm and is fixed to the dicing frame, which is a ring-shaped base, with an adhesive tape.

  On the glass substrate 80, there is a resin-like structure with a built-in micro flow channel 73a having a width of about several tens to several hundreds μm, a micro pump for flowing a fluid through the flow channel 73a, a logic element, wiring, and the like. A nozzle layer 73 is disposed to constitute a logic element unit 80a. The resin structure which becomes the nozzle layer 73 is formed by, for example, a process of spin coating on the glass substrate 80 and then exposing / etching, a process of integrally forming with a mold, and affixing on the glass substrate 80.

  Immediately below the nozzle layer 73, which is a resinous structure, a fluid supply opening 74 is formed so as to penetrate the glass substrate 80. The logic element portions 80a are arranged with a cleavage line C between them so that they can be divided into chips at the final stage of the process. An interval S between the nozzle layers 73 adjacent to each other with the planned cutting line C is about 400 μm at the minimum.

  The difference from the silicon substrate in Example 1 is that the glass substrate 80 has a lower limit of the transmission wavelength region near 300 nm as compared to the silicon substrate, and therefore the wavelength cut filter used in the internal crack formation step is also in the wavelength region of 300 nm or less. Select the characteristics to cut. Further, when the wavelength band of the chirped light pulse is not 300 nm or less, the wavelength cut filter is not necessary.

  The amount of movement of the condensing point due to the chirped light pulse also increases as the transmission wavelength region increases. For example, the amount of movement of the condensing point due to the change in the wavelength of the chirped light pulse from 400 nm to 1400 nm is about 400 μm.

BRIEF DESCRIPTION OF THE DRAWINGS The silicon substrate by Example 1 is demonstrated, (a) is the perspective view, (b) is the elements on larger scale which expand and show a part of (a), (c) shows the cross section of (b). It is a fragmentary sectional view. 1 is a schematic diagram illustrating Example 1. FIG. It is a flowchart which shows the cleaving process by Example 1. FIG. It is a figure explaining a tape mounting process. It is a figure explaining a wafer correction process. The surface linear processing for forming the surface processing trace is described. (A) is the case where the surface processing trace is within the thickness of the oxide film, and (b) is the same as the thickness of the oxide film. It is a figure which shows a case. An internal crack formation process is demonstrated, (a) is a schematic diagram which shows the processing apparatus which irradiates a laser beam, (b) is a figure which shows the mechanism in which an internal crack generate | occur | produces. It is a figure explaining in detail the change of the color of a chirp light pulse, and the movement of a condensing point. It is a figure explaining the internal crack formation process in the edge part of a silicon substrate. It is a figure explaining the case where an unusual-shaped element chip is cut out. It is a figure explaining the laser scanning method when forming the crack group of each depth. It is a figure explaining the cleaving process by a roller. It is a figure explaining the cleaving process by a collet. It is a figure explaining the case where it cleaves by giving the hit | damage with a tool. It is a figure explaining a repair process. The glass substrate by a reference example is demonstrated, (a) is the perspective view, (b) is the partial expanded perspective view which expands and shows a part of (a), (c) is the part which shows the cross section of (b) It is sectional drawing. It is a figure explaining the board | substrate cleaving method by one prior art example.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Silicon wafer 2 Oxide film 2a Groove 3, 73 Nozzle layer 4 Liquid supply port 10 Silicon substrate 10a, 80a Logic element part 11, 81 Substrate surface 11a Surface processing trace 12, 12a, 12b, 12c, Internal crack 50 Processing apparatus 51 Light source 51a Chirped light pulse generator 52 Condensing optical system 53 Automatic stage 54 AF optical system 74 Aperture 80 Glass substrate

Claims (1)

By condenses the laser light within the silicon substrate to generate a crack, a silicon substrate breaking method for dividing the silicon substrate into a plurality of element chips,
A step of condensing a chirped light pulse whose wavelength changes with time due to a self-phase modulation effect as the laser light inside the silicon substrate, and generating cracks ;
Forming the crack along the planned cutting line inside the silicon substrate by relatively moving the chirped light pulse along the planned cutting line;
Forming a linearly processed portion on the surface of the silicon substrate for concentrating stress on the planned cutting line;
Connecting the linearly processed portion and the crack by applying an external force to the silicon substrate,
When condensing the chirped optical pulse inside the silicon substrate, the condensing position where the depth is changed from the surface of the silicon substrate in accordance with the wavelength change, the silicon substrate by the condensing of the chirped optical pulse silicon substrate breaking method characterized in that a crack generated in the inside is a position not reaching the surface of the silicon substrate.

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