JP4047271B2 - Tamper verification image generation apparatus, falsification verification image generation apparatus control method, falsification verification image information generation apparatus program, and recording medium - Google Patents

Description

The present invention relates to a falsification verification image generation apparatus, a falsification verification image generation apparatus control method, and a falsification verification image information generation apparatus program.

  The “printed material verification information creation device and printed material verification device” described in Patent Document 1 discloses a method for converting a printed material into a printed material corresponding to tampering verification. In this method, dependency information dependent on a printed material is printed as verification information on the printed material in a form such as a barcode, and when verifying, the printed material and the dependency information read from the printed material are collated.

  In addition, the “apparatus, system, method, program, printed material, and recording medium related to addition of printed material verification information and printed material verification” described in Patent Document 2 includes means for preventing falsification of the content of the printed material and confirming uniqueness at the same time. Is provided.

Further, “Form Non-Tampering Verification Method, Form Printing Device, and Form Tampering Verification Device” described in Patent Document 3 shows a form tampering verification method and a tampering verification device. In this method, a form image is coded in a reproducible format, further recorded in a form in a predetermined recording format, and when verifying, the form image and the form image reproduced from the code are visually compared. Validate.
JP-A-8-297743 JP 2002-99209 A JP 2002-298120 A

  However, the technique disclosed in Patent Document 1 is intended for what is already a printed matter, and does not support the generation of a printed matter that originally corresponds to digital data for tampering verification.

  In addition, since the technology of Patent Document 2 uses ID paper that outputs ID information in response to radio waves, it cannot be easily produced at low cost a printed material corresponding to tampering verification.

  Furthermore, since the technique of Patent Document 3 is verified visually, it cannot be said that productivity is high, and is not suitable for a case where a large amount of printed matter is verified in a short time.

  It is an object of the present invention to provide a technique for creating a printed material that can be verified whether the contents have been tampered with, and a technique for verifying tampering. In particular, it is an object of the present invention to provide a print document creation technique and a verification technique that enable detection and suppression of forgery using a creation apparatus and prevention of key decryption using a verification apparatus.

The present invention is a falsification verification image generation device that generates a falsification verification image by embedding falsification verification information and falsification suppression information, which are information used for falsification verification of the image data, Dividing means for dividing the image data into a plurality of rectangular areas, judging means for judging whether the divided rectangular areas contain character elements, and falsification verification by embedding predetermined information in the divided rectangular areas Generating means for generating an image, wherein the generating means embeds only the falsification verification information in a rectangular area including a character element according to the determination result of the determining means, and the falsification in other areas. The verification information and the falsification suppression information are mixed and embedded.

In addition, there is provided a control method for a falsification verification image generation apparatus that generates a falsification verification image by embedding falsification verification information, which is information used for falsification verification of the image data, and falsification suppression information. A division step of dividing the image data into a plurality of rectangular regions; a determination step of determining whether the divided rectangular regions include character elements; and falsification verification by embedding predetermined information in the divided rectangular regions And generating means for generating an image, wherein the generating step embeds only the falsification verification information in a rectangular area including a character element according to the determination result of the determining step, and the other area includes the above-described falsification verification information. The falsification verification information and the falsification prevention information are mixed and embedded.

According to a second aspect of the present invention, there is provided a program for a falsification verification image information generating apparatus, comprising a program for causing a computer to execute the steps recited in claim 2.

A computer-readable recording medium storing the program according to claim 3.

Therefore, according to the present invention, a falsification verification image generation device that generates a falsification verification image by embedding falsification verification information, which is information used for falsification verification of the image data, and falsification suppression information in the image data. A dividing unit that divides the image data into a plurality of rectangular regions; a determining unit that determines whether the divided rectangular regions include character elements; and embedding predetermined information in the divided rectangular regions. Generating means for generating a falsification verification image according to the above, wherein the generation means embeds only the falsification verification information in a rectangular area including a character element according to the determination result of the determination means, and other areas Since the falsification verification information and the falsification suppression information are embedded in a combination, for example, it is possible to detect falsification into the falsification suppression information embedded Such an effect that it is possible to generate an image.

Embodiments of the present invention will be described below.
Embodiment 1
In the first embodiment, not only information for verifying tampering but also information on the printing date can be embedded in the print document to detect tampering (or forgery), and further to suppress tampering. Can do.

  First, a recording medium storing a falsification verification document creation apparatus, a falsification verification document creation method, a falsification verification document creation program, and a falsification verification document creation program according to this embodiment will be described.

  1A is a functional block diagram of the falsification verification document creation apparatus, and FIG. 1B is a hardware block diagram of the falsification verification document creation apparatus.

  1A, the falsification verification document creation apparatus 1 includes a processing target document image acquisition unit 111, an arbitrary information acquisition unit 112, an arbitrary information superimposition unit 113, a verification information superimposition unit 114, and a printing unit 115. It is comprised including. 1B, the falsification verification document creation device 1 includes a CPU 121, a ROM 122, a RAM 123, a keyboard 124, a hard disk 125, a printer 126, an image scanner 127, and a communication circuit 128. It consists of The RAM 123 stores a processing target document image acquisition program (scanner program, communication program, etc.), an arbitrary information acquisition program, an arbitrary information superimposition program, a verification information superimposition program, and a printing program. These programs constitute the falsification verification document creation program of the present invention. Each of these programs cooperates with the CPU 121 (or further cooperates with other components) to process the document image acquisition unit 111, the arbitrary information acquisition unit 112, the arbitrary information superimposition unit 113, and the verification information superimposition unit 114. And the printing means 115. Each program can be stored in a recording medium such as a floppy disk or a magneto-optical disk and distributed.

  The document image to be processed for creating the falsification verification document can be acquired by the image scanner 127 in FIG. 1B, or can be acquired by the communication circuit 128 in FIG. 1B through the network or the public line. It can be acquired from a device, can also be acquired from the hard disk 125 in FIG. 1B, and can also be acquired from an application such as a word processor.

  The operation of the falsification verification document creation apparatus 1 shown in FIG. First, the processing target document image acquisition unit 111 acquires the processing target document image DG shown in FIG.

  The arbitrary information acquisition unit 112 can acquire, for example, arbitrary information such as the printing date, the name of the creator, and the creation location from the keyboard 124 or the like. For example, when the arbitrary information is a printing date, the printing date is encoded with a sequence of “0” and “1”. For example, as shown in FIG. 3, the year and month can be represented by 4 bits, the day can be represented by 5 bits, and the entire year, month and day can be represented by 13 bits.

  The arbitrary information superimposing unit 113 defines all or part of the image acquired by the processing target document image acquiring unit 111 as a processing region A, and divides the processing region A into a plurality of rectangular regions. Some of these rectangular areas include character strokes (including all or part of characters) and others do not. In this case, whether or not the stroke of the character is included in the predetermined area can also be determined by whether or not a black pixel connected component having a predetermined length exists in each rectangular area.

  The arbitrary information superimposing means 113 embeds the above-described arbitrary information in at least two regions that do not include a character stroke (not including a part of the character). Thereby, even if there is alteration, arbitrary information can be extracted. In particular, by embedding arbitrary information in all areas in the processing area A that do not include characters, it is possible to detect with high accuracy even for some tampering, and there is little influence from dirt (resistant to dirt). High-precision detection is possible.

  As shown in FIG. 4 (processing area A), with respect to the bit string indicating the printing date (“0011011101101” in the example of FIG. 4), if “1”, there is a dot (indicated by a black circle in FIG. 4), “0 ", There is no dot (however, it is indicated by a white circle in FIG. 4) and the dots are arranged from the upper left to the lower right of the rectangular area. In FIG. 4, five rectangular areas A1 to A5 are displayed, and the rectangular area A1 and the rectangular area A5 do not include character strokes. Therefore, the same arbitrary information (printing date is displayed in the two rectangular areas. Each bit string is embedded.

  This arbitrary information is formed in a portion corresponding to 13 dots in FIG. 4 (hereinafter, “arbitrary information portion”). For example, a bit string “0001110010110” representing the printing date is displayed in the row a11 of the rectangular area A1. The first 5 bits are embedded, the next 5 bits are embedded in row a12, and the remaining 3 bits are embedded in row a13. The same dot pattern as that of the rectangular area A1 is embedded in the rectangular area A5. The processing area A is defined as A1 to A5 in the above example, but the processing area A can be further expanded to the left side, right side, upper side, and lower side of A1 to A5.

  Next, the verification information superimposing means 114 embeds the falsification verification information for the processing area A (area consisting of the rectangular areas A1 to A5) as shown in FIG. In the present embodiment, as the verification information, information in which the number of dots in the processing area A is an even number or an odd number is employed (see Japanese Patent Application No. 2002-367853).

  That is, the verification information superimposing unit 114 embeds verification information for verifying further tampering in the processing area in which the dot is embedded by the arbitrary information superimposing unit 113. In the present embodiment, random numbers “0” or “1” are separately generated for the rectangular areas A1 to A5, and the number of dots in each rectangular area is an even number if the random number is “0”, and an odd number if the random number is “1”. Adjust so that Here, the random number is generated from a key which is secret information. In FIG. 5, random numbers “0”, “1”, “0”, “0”, “1” are assigned to the rectangular areas A1 to A5. Accordingly, the number of dots in the rectangular areas A1 to A5 is adjusted to be even, odd, even, even, or odd.

  First, for the rectangular area A1, since eight dots are already embedded in the portion representing the arbitrary information (see FIG. 4), the dots are arranged at regular intervals in the blank portion excluding the arbitrary information portion, and the number of the dots is as follows. Adjust to an even number. In FIG. 4, for convenience of explanation, a blank portion between 8 dots is indicated by white dots.

  In the example of FIG. 5, the twelve dots shown in FIG. 4 are arranged in the blank area of the rectangular area A1. In FIG. 5, these dots are densely arranged in the arbitrary information portion. However, for example, every other dot can be formed. Since the rectangular areas A2, A3, and A4 include character strokes, the dots are arranged so that the total number of dots is odd, even, and even so as not to overlap with the strokes. In FIG. 5, the dots in the rectangular areas A2 to A4 are densely arranged in a portion that does not overlap with the stroke. However, for example, every other dot may be formed.

  Since the random number “1” is set for the rectangular area A5, dots are arranged so that the number of dots is an odd number as in the rectangular area A1.

  The number of dots can be adjusted by setting dots and then deleting the dots as much as possible.

  As described above, the falsification verification image DD as shown in FIG. 6 in which the verification information is embedded is created, and this image DD is printed by the printing unit 115.

  Next, a falsification detection device, a falsification detection method, a falsification detection program, and a recording medium storing the program will be described.

  FIG. 7A is a functional block diagram of the falsification verification apparatus, and FIG. 7B is a hardware block diagram of the falsification verification apparatus.

  In FIG. 7A, the tampering verification apparatus 2 includes an image acquisition unit 211, an arbitrary information extraction unit 212, an arbitrary information extraction unit 213, a tampering verification unit 214, and a verification result display unit 215. ing. 7B, the falsification verification device 2 includes a CPU 221, a ROM 222, a RAM 223, a hard disk 224, a display 225, an image scanner 226, and a communication circuit 227. The RAM 223 stores an image reading program (scanner program, communication program, etc.), an arbitrary information extraction program, an arbitrary information extraction program, a falsification verification program, and a verification result output program. Each of these programs constitutes the document verification program of the present invention, and cooperates with the CPU 221 (or further cooperates with other components) to acquire the image acquisition means 211, arbitrary information extraction means 212, arbitrary information extraction means 713, It functions as a falsification verification unit 214 and a verification result display unit 215. Each program can be stored in a recording medium such as a floppy disk or a magneto-optical disk and distributed.

  The document image to be verified can be acquired by the image scanner 226 in FIG. 7B, or can be acquired from another device via the network or public line by the communication circuit 227 in FIG. 7B. It can also be acquired from the hard disk 224 in FIG. 7B, and can also be acquired from an application such as a word processor.

  Hereinafter, the operation of the tampering verification apparatus 2 shown in FIG. 7A will be described by taking as an example the case where the document image to be verified is a printed matter.

  First, a document image to be verified is acquired by the image acquisition unit 211 (image scanner 226). The arbitrary information extraction unit 212 divides the entire acquired image into rectangular areas as in the creation. Then, print date information embedded as arbitrary information is extracted from an area that does not include a character stroke. It is checked by the falsification verification means 214 whether the extracted print date information has been falsified. The verification information extraction unit 213 extracts the number of dots embedded in each area as verification information.

  Here, as shown in FIG. 8A, a case where the printing date and time is embedded in the rectangular areas A1 and A5 and tampering is performed for each printing date and time is taken as an example. In this example, it is assumed that the amount of money “¥ 10,000” has been altered to “¥ 50,000”, and at this time, the rectangular area in which the printing date and time are embedded is copied. The original amount is not listed.

  The falsification verification unit 214 first generates a random number of “0” or “1” for each region using the time of creation and the key. Then, the alteration verification is determined by whether or not the even or odd number of dots in each region matches the even or odd number of the random number.

  In the example of FIG. 8B, since the rectangular areas A3 and A4 fail (does not match the random number) as indicated by the circled numbers 1 and 2, it can be determined that the area has been tampered with. Also, it can be determined that the print date information embedded in the areas A1 and A5 that do not include the character stroke is not authentic. That is, when it is determined that any of the areas A1 to A5 has been tampered with, the extracted print date information may have been tampered with. Therefore, the print date information extracted from the area that has been tampered with is discarded, and the print date information extracted from the area that has not been tampered with (area not shown in FIG. 8A).

  The verification result display unit 215 displays the extracted print date on the display 225 and the like together with the document image in which the falsified portion is emphasized. By confirming the displayed print date, it can be determined whether or not the print document to be verified has been forged.

  Further, not only the printing date but also the name and affiliation of the person who performed printing can be embedded in the same manner.

In the above example, it is possible to detect falsification of the amount of money, and information relating to the falsified document remains without being lost. Therefore, even if tampering is performed, it is possible to easily specify what kind of document the original was.
<< Embodiment 2 >>
For a document image for falsification verification, a person or organization having the authority to perform verification can be set for each document image. A situation in which a distributed document image for verifying tampering can be verified by any number of people is not desirable in terms of security. In the crypto world, in general, security is often secured by keeping information called a key secret, but there is a possibility that an attack that attempts to know the key value (code) etc. by repeatedly performing verification actions There is.

  In the second embodiment, a key K encrypted with the public key k1 of the person or organization can be embedded as arbitrary information in order to limit the person or organization having the authority to perform verification.

  FIG. 9 shows an example where the document image creator A for falsification verification designates B as the verifier.

  The creator A uses the falsification verification document creation device 31 to create the falsification verification document D1. At this time, B is designated as the verifier. The document creation apparatus 31 obtains B's public key from the public key management center 32. Then, the key K is encrypted using the public key k1 of B, and this is embedded in the image in the same manner as the method described in the first embodiment. Further, verification information for verifying tampering is embedded, and a tampering verification document is generated.

  In the case of verification, first, the verifier B passes his / her private key k2 to the falsification verification device 33. The falsification verification device 33 extracts the encrypted key K embedded in the verification target image D2, and decrypts it using the B private key k2. The falsification verification device 33 acquires a key K necessary for verification. If the secret key k2 is not correct, it cannot be decrypted and the key K cannot be acquired. Since only B owns B's private key k1, this means that only B can obtain the key K required for verification. Then, tampering is verified using the acquired key. As described above, it is possible to create and verify a falsification verification document in which a verifier is limited.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is an explanatory diagram of Embodiment 1 of the present invention, where (A) is a functional block diagram of a falsification verification document creation device, and (B) is a hardware block diagram of a falsification verification document creation device. It is a figure which shows the image used as the process target in Embodiment 1 of FIG. It is the figure which represented the date in the bit string which shows the specific example of verification information. It is a figure which shows a mode that the printing date of FIG. 3 has been arrange | positioned in the rectangular area. It is a figure which shows a mode that the falsification verification information was embedded about the process area by the verification information superimposing means. It is a figure which shows the image which embedded the verification information. (A) is a functional block diagram of the falsification verification device, and (B) is a hardware block diagram of the falsification verification device. 4A and 4B are explanatory diagrams showing falsification verification processing, in which FIG. 4A shows a state where a part of a document image before falsification is to be tampered with, and FIG. 4B shows a part of the document image after falsification. It is. It is a figure which shows an example of a system in case the creator of a falsification verification document designates another person as a verifier.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Falsification verification document preparation apparatus 2 Falsification verification apparatus 111 Processing object document image acquisition means 112 Arbitrary information acquisition means 113 Arbitrary information superimposition means 114 Verification information superimposition means 115 Printing means 121,221 CPU
122,222 ROM
123,223 RAM
DESCRIPTION OF SYMBOLS 124 Keyboard 125,224 Hard disk 126 Printer 127,226 Image scanner 128,227 Communication circuit 211 Image acquisition means 212 Arbitrary information extraction means 213 Arbitrary information extraction means 214 Falsification verification means 215 Verification result display means 225 Display

Claims (4)

A falsification verification image generation apparatus that generates a falsification verification image by embedding falsification verification information, which is information used for falsification verification of the image data, and falsification suppression information in image data,
  Dividing means for dividing the image data into a plurality of rectangular regions;
  Determining means for determining whether the divided rectangular area includes a character element;
  Generating means for generating a falsification verification image by embedding predetermined information in the divided rectangular area,
  The generation unit embeds only the falsification verification information in a rectangular area including a character element according to the determination result of the determination unit, and mixes the falsification verification information and the falsification suppression information in other areas. An image information generating device for tampering verification characterized by being embedded. A method for controlling a falsification verification image generation apparatus that generates a falsification verification image by embedding falsification verification information and falsification suppression information, which are information used for falsification verification of the image data, into image data,
  A division step of dividing the image data into a plurality of rectangular regions;
  A determination step of determining whether the divided rectangular area includes a character element;
  And a step means for generating a tampering verification image by embedding predetermined information in the divided rectangular area,
  In the generation step, only the falsification verification information is embedded in a rectangular area including a character element according to the determination result of the determination step, and the falsification verification information and the falsification suppression information are mixed in other areas. A control method for an image information generating device for falsification verification, characterized by being embedded. A program for falsification verification image information generating apparatus, comprising a program for causing a computer to execute each step according to claim 2. A computer-readable recording medium storing the program according to claim 3.

Images