JP3927144B2 - Pattern forming method and pattern forming apparatus - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a pattern forming technique using a charged particle beam or a light beam, and more particularly, a pattern forming method and a pattern forming apparatus for positioning a beam of arbitrary shape, repeating shot exposure, connecting shots, and exposing a desired pattern. About.
[0002]
[Prior art]
As the VLSI is highly integrated, the pattern size is becoming finer, and it is becoming difficult to ensure the pattern dimension accuracy. In particular, it is said that the dimensional accuracy of a gate pattern required to suppress the variation in the characteristics of a transistor in a chip within an allowable range usually needs to be within ± 10% when the target dimension is L. It is said that the tolerance of dimensional error due to the process is within ± 7%. For example, when the gate pattern size is 0.15 μm, the dimensional error allowed due to the lithography process is ± 0.0105 μm.
[0003]
A device pattern master mask (photomask, X-ray mask, electron beam mask, ion beam mask, etc.) is formed by a mask drawing device (a device that forms a pattern by sequentially drawing using an electron beam or a laser beam). When the device pattern is formed by irradiating the master mask with electromagnetic waves such as light, X-rays or the like or charged particles such as an electron beam or ion beam and transferring the image onto the wafer, The drawing accuracy is a major factor of the dimensional error.
[0004]
In sequential exposure processing typified by electron beam exposure technology, a raster scan system that scans a fixed beam and a vector scan system that positions and exposes a beam at individual coordinates are known. The raster scan method uses an analog method to scan the beam and speeds up the beam scan to improve the processing speed. However, the processing speed increases as the beam size is made finer to obtain resolution. A decline has occurred. As a method for realizing higher-speed processing, a vector scan method using a variable shaped beam capable of increasing the beam size has been proposed. In this method, the beam size is set and the beam is positioned by digital processing, and the DAC setting speed and accuracy limit throughput and pattern accuracy.
[0005]
In a master mask such as a photomask, strict accuracy is required for the position and size of the pattern. For example, in a photomask for a semiconductor element, numerical values are required such that the pattern dimension accuracy is about 1/30 or less of the minimum line width and the position accuracy is 5% or less of the minimum line width. In addition, the semiconductor element has been refined into a pattern having a dimension of 70% in almost three years, and the accuracy improvement accompanying the miniaturization is required.
[0006]
FIG. 4A shows a plan view of a memory cell array pattern in VLSI. 41 is an active area and 42 is a gate pattern. What should be noted is the gate pattern 42, and the active area 41 is a separate layer. However, in order to clarify the positional relationship between the active area 41 and the gate pattern 42, the active area pattern is also indicated by a dotted line. The active area 41 shown by hatching is element-isolated in the surrounding element isolation region. Two gate lines overlap one active area 41 so that two transistors are formed.
[0007]
When the gate pattern is actually formed on the wafer, a photomask is created based on this plan design drawing, and the image is transferred onto the wafer by irradiating the photomask with light. When creating a photomask, a light shielding film is deposited on one main surface of a quartz substrate, a resist is applied thereon, and writing is performed according to the above method using a mask drawing apparatus using an electron beam or a laser beam, It is formed by resist development and base light shielding film etching.
[0008]
In the mask drawing apparatus, the device pattern is divided into figures that can be drawn and shots are made for each figure. Therefore, the gate pattern 42 shown in FIG. 4A is divided into graphics by the graphic element 43 corresponding to the one shot. When the graphic element 43 is shot with a mask drawing apparatus, the position is shifted from the original position due to the apparatus error. FIG. 4B shows a state in which the graphic element of the gate pattern is actually shot on the photomask. In order to clarify the positional relationship between the active area and the gate pattern, the active area pattern is also indicated by a dotted line as in FIG.
[0009]
Conventionally, there are places where shots are connected on the element isolation region, such as the position 44 in the figure, and places where shots are connected on the active area, such as the position 45 in the figure. FIG. 4C is a plan view of a photomask created by this method. A region 46 in the figure is a gate pattern. In this case, since a negative resist was used, the resist remained in the exposed exposed portion after development, and a pattern was formed by processing the underlying light shielding film using this resist pattern as a mask. In order to clarify the positional relationship between the active area pattern and the gate pattern, the active area pattern is indicated by a dotted line in the same manner as in FIGS. It can be seen that the dimensions fluctuate at the shot connecting portion of the gate pattern.
[0010]
FIG. 4D is a plan view of the gate pattern on the wafer obtained as a result of light exposure using this photomask. In this case, since a positive resist was used, the resist remained in the unexposed area after development. In the figure, reference numeral 47 denotes a portion where the resist remains. The substrate is processed using this resist pattern as a mask. In addition, the active area pattern formed in the previous process is also displayed in an overlapping manner. In the figure, 48 is an active area.
[0011]
As shown in FIG. 4C, the dimension of the gate pattern on the wafer varies at a location corresponding to the mask dimension variation caused by shot joining. Therefore, a high dimensional accuracy is obtained in a portion where the active area is drawn in a single shot, for example, a portion such as 49, whereas a portion where the dimensional variation is large in the active area, For example, at a location such as 410, this dimensional variation has an adverse effect on the characteristics of the transistor, increasing the variation in device characteristics within the chip.
[0012]
[Problems to be solved by the invention]
As described above, when a gate pattern of a transistor is drawn in mask drawing, shot division is performed at an arbitrary position, and thus there is a case where shot connection of gate patterns in an active area is performed. As a result, the dimensional variation at the connecting portion has an adverse effect on the characteristics of the transistor, increasing the variation in device characteristics. Thus, there is a problem that device characteristics cannot be stably ensured because there is a possibility that shot joining is performed in a region where it is highly necessary to ensure dimensional accuracy.
[0013]
The present invention has been made in consideration of the above circumstances. An object of the present invention is to provide a pattern forming method and a pattern forming apparatus for achieving high drawing accuracy as a result by using position information of an area requiring high dimensional accuracy.
[0014]
[Means for Solving the Problems]
(Constitution)
In order to solve the above problems, the present invention adopts the following configuration.
[0015]
That is, the present invention positions a beam formed by shaping a charged particle beam or electromagnetic wave beam into an arbitrary shape, repeats shot exposure for irradiation for a predetermined time, and forms a desired pattern shape on the photosensitive material film on the substrate as a set of the shots. In a pattern forming method and a pattern forming apparatus for forming an exposure area, an area or pattern that requires high dimensional accuracy is exposed in one single shot, and other areas or areas that require high position accuracy It is characterized in that multiple exposure is repeated for a pattern at least twice.
[0016]
Here, preferred embodiments of the present invention include the following.
[0017]
(1) In multiple exposure, multiple exposure is performed by repeating the same shot at the same position, or multiple exposure is performed while switching the connecting position between shots.
[0018]
(2) When an arbitrary shot is formed by a combination of optical overlap between the first aperture opening and the second aperture opening, and the selected region or pattern is exposed by a single shot, the same For the shape pattern, use the same combination of the first aperture opening and the second aperture opening.
[0019]
(3) Contrary to the above, multiple exposure is repeated for two or more shots for the selected region or pattern, and exposure is performed for other regions or patterns with a single shot.
[0020]
Further, the present invention is characterized in that an exposure mask or a semiconductor device is realized by using the pattern forming method or the pattern forming apparatus.
[0021]
(Function)
In a pattern exposure method in which a beam shot size and a beam position are set using a digital circuit, in principle, in a single exposure, a pattern constituted by a single shot is a dimension of a pattern constituted by a plurality of shots. It is known to be superior to accuracy. That is, each shot has an error factor with respect to size and position accuracy, and in a pattern composed of a plurality of shots, errors of each shot are overlapped and accuracy is lowered. The position setting accuracy of each shot has an averaging effect when the same shot is formed by multiple exposure multiple times. As a result, the accuracy of the pattern restricted by the position accuracy rather than the shot size is improved. This effect contributes to an improvement in the accuracy of the region formed in the unexposed area.
[0022]
By applying the present invention, a specific accuracy improvement of a specific pattern is achieved. The pattern accuracy required in semiconductor device manufacturing, etc. requires high accuracy in a limited part such as the size of a specific pattern, the size of a specific part of a specific pattern, or the distance between the pattern and the specific part of the pattern. Yes.
[0023]
Therefore, an improvement in accuracy is achieved by applying the present invention to a pattern that is regularly repeated in a single shot, or by extracting a specific pattern and applying the present invention. More specifically, a single shot width pattern is single-exposure, and the other is multiple exposure, so that the multiple exposure portion can obtain excellent accuracy in terms of dimensional and positional accuracy. Patterns can be formed with better dimensional accuracy.
[0024]
In addition, by applying multiple exposure to the shot of the contour portion of the selected non-exposed portion, the dimensional accuracy of the non-exposed portion can be improved without significantly reducing the throughput. Furthermore, the present invention enables exposure without a shot boundary for a specific portion, and enables pattern formation with extremely excellent dimensional accuracy and low edge roughness.
[0025]
DETAILED DESCRIPTION OF THE INVENTION
The details of the present invention will be described below with reference to the illustrated embodiments.
[0026]
(Reference example)
A pattern forming method according to a reference example of the present invention will be described with reference to FIG. FIG. 1A shows a plan view of a memory cell array pattern in VSLI. 11 is an active area, and 12 is a gate pattern. What should be noted is the gate pattern 12 and the active area 11 is a separate layer. However, in order to clarify the positional relationship between the active area 11 and the gate pattern 12, the active area pattern is also indicated by a dotted line.
[0027]
The active area 11 shown by hatching is element-isolated in the surrounding element isolation region. Two gate lines overlap with one active area 11 so that two transistors are formed.
[0028]
When the gate pattern was actually formed on the wafer, a photomask was created based on the plan design, and the image was transferred onto the wafer by irradiating the photomask with light. When creating a photomask, a light-shielding film is deposited on one main surface of a quartz substrate, a resist is applied thereon, and drawing is performed according to the above method using a mask drawing apparatus using an electron beam or a laser beam. It formed by performing development and base light shielding film etching.
[0029]
In the mask drawing apparatus, the device pattern is divided into figures that can be drawn and shot for each figure. Accordingly, the gate pattern 12 shown in FIG. 1A is divided into figures by the figure element 13 corresponding to the one shot. When this graphic element 13 was shot with a mask drawing apparatus, it shifted from the position where it should be shot due to an apparatus error.
[0030]
FIG. 1B shows a state where the graphic element of the gate pattern is actually shot on the photomask. In order to clarify the positional relationship between the active area and the gate pattern, the active area pattern is also indicated by a dotted line as in FIG. This reference example is characterized in that the figure is divided so that all shots are connected on the element isolation region.
[0031]
FIG.1 (c) is a top view of the photomask produced by the method of this reference example. A region 16 in the figure is a gate pattern. In this case, since a negative resist was used, the resist remained in the exposed exposed portion after development, and a pattern was formed by processing the underlying light-shielding film using this resist pattern as a mask. In order to clarify the positional relationship between the active area pattern and the gate pattern, the active area pattern is indicated by a dotted line, as in FIGS. It can be seen that the dimensions fluctuate at the shot connecting portion of the gate pattern.
[0032]
FIG. 1D is a plan view of the gate pattern on the wafer obtained as a result of light exposure using this photomask. In this case, since a positive resist was used, the resist remained in the unexposed area after development. In the figure, reference numeral 17 denotes a portion where the resist remains. Using this resist pattern as a mask, the substrate was processed. The active area pattern formed in the previous process is also displayed in an overlapping manner. In the figure, 18 is an active area. The gate length is 0.15 μm.
[0033]
Also in this reference example, as shown in FIG. 1C, the dimension of the gate pattern on the wafer fluctuated at a location corresponding to the mask dimension fluctuation caused by shot stitching. However, all shot stitches that cause this dimensional variation are performed on the element isolation region. Therefore, the dimensional variation in the active area is extremely small, and as a result, the dimensional accuracy of ± 0.0105 μm or less, which is the specification, can be achieved over the entire surface of the chip.
[0034]
As described above, according to this reference example, when the gate pattern is formed in mask drawing, shots are joined at a position corresponding to the element isolation region of the semiconductor device. Variations in dimensions can be suppressed, and thereby variations in device characteristics can be suppressed.
[0035]
(First embodiment)
Next, an embodiment in which the present invention is applied to reticle manufacturing using a variable shaped electron beam will be described.
[0036]
First, a negative electron beam resist SAL605 (manufactured by Shipley) is formed to a thickness of 0.5 μm on a 0.25 inch thick, 6 inch square blank having a light shielding film in which a thin film of chromium / chromium oxide is laminated on a quartz substrate. And a predetermined baking process was performed. Next, exposure was performed with a variable shaped electron beam (VSB) exposure apparatus operating at an acceleration voltage of 15 KeV.
[0037]
This exposure is performed by combining two apertures and illuminating the beam that has passed through the first aperture by positioning it on the second aperture, so that a square with a maximum length of 2.55 μm, or a right triangle with a maximum short side of 2.55 μm. Was performed using a variable shaped beam capable of generating Furthermore, using the function of changing the exposure amount for each pattern, the single shot portion was exposed at 8 μC / cm ² and the remaining pattern was exposed at ² μC / cm ² . Thereafter, multiple exposure was repeated three times at ² μC / cm ² for the portion exposed at ² μC / cm ² , and the entire exposure was unified to 8 μC / cm ² .
[0038]
Next, the substrate was taken out from the exposure apparatus and subjected to a predetermined baking process. Subsequently, paddle development processing was performed for 80 seconds using a dedicated developer, and rinse treatment with ultrapure water was performed, followed by drying to form a resist pattern. Next, a baking process was performed at 115 ° C. for 15 minutes. Next, descum etching was performed using a 15:85 mixed gas of oxygen and nitrogen using a parallel plate type high frequency plasma etching apparatus. This descum etching was performed at a vacuum of 100 mTorr and a power of 50 W for 45 seconds.
[0039]
Next, using a parallel plate type magnetron high-frequency plasma etching apparatus, an etching process was performed by holding the substrate at 70 ° C. using a mixed gas of 95: 5: 100 of chlorine, oxygen, and argon. Etching was performed at a power of 150 W for 15 minutes. Next, the resist was removed by an etching process mainly using ozone.
[0040]
The mask thus manufactured is shown in FIG. The width of a shown in FIG. 2A and the interval between the patterns shown by b were measured at 100 positions from the end, and as variations, values of 12.8 nm and 32 nm were obtained at 3σ, respectively. The measurement was performed in a repeated pattern as shown in FIG. In the figure, the hatched portion indicates the light shielding film left in an island shape by exposure, development, and etching.
[0041]
The measurement points are the width a of the A portion exposed by a single shot and the interval b between the C portions subjected to quadruple drawing. In the portion A, data is created by preferentially arranging shots in the central portion so that a shot boundary does not occur near the center of the region.
[0042]
As described above, according to the present embodiment, the A region requiring high dimensional accuracy is formed by single shot drawing, and the C region requiring high position accuracy is formed by four times of multiple drawing, The pattern interval can be set with high accuracy while maintaining the dimensional accuracy of the specific portion of the pattern.
[0043]
The pattern forming method, the pattern forming apparatus, the mask itself, and the semiconductor manufacturing apparatus formed by them have been described above by taking, as an example, the exposure of a photomask for manufacturing a semiconductor device, particularly the gate layer of a transistor. It is not limited. The gist of the present invention is to perform exposure with a single shot for an exposed portion that requires high dimensional accuracy, and to perform multiple exposure for an unexposed portion that requires high dimensional accuracy. As an embodiment, the effect does not change at all with respect to an X-ray exposure mask, an electron beam transfer mask, and a direct drawing technique for directly drawing a pattern on a wafer without using a mask.
[0044]
(Second Embodiment)
Next, an embodiment in which the present invention is applied to reticle manufacturing using a variable shaped electron beam will be described.
[0045]
An exposure substrate coated with a positive beam resist ZEP-7000B (manufactured by Zeon Corporation) was prepared by the same process as in the first embodiment. Only the exposed part forming a specific unexposed part was subjected to eight-fold multiple drawing, and other regions were drawn once. The processing time was about 37 minutes when the entire image was drawn at one time, but it took about 41 minutes and 30 seconds when the above-described partial 8-fold drawing was performed. The exposure amount was 10 μC / cm ² . The substrate was taken out from the exposure apparatus, spray development processing was performed for 360 seconds using a dedicated developer, rinse treatment was performed, and then dried to form a resist pattern.
[0046]
Thereafter, the same processing as in the first embodiment was performed to perform etching, and a mask was manufactured. The mask thus manufactured is shown in FIG. The width of a shown in FIG. 3A and the interval of the pattern shown by b were measured at 100 positions from the end, and as variations, values of 18.0 nm and 21.3 nm were obtained at 3σ, respectively. The measurement was performed in a repeated pattern as shown in FIG. In the figure, hatched portions indicate light shielding films in which openings are formed in an island shape by exposure, development, and etching.
[0047]
The measurement points are the width a of the A portion exposed by a single shot and the interval b between the C portions subjected to eight-fold drawing. In the portion A, data is created by preferentially arranging shots in the central portion so that a shot boundary does not occur near the center of the region.
[0048]
The pattern forming method, the pattern forming apparatus, the mask itself, and the semiconductor manufacturing apparatus formed by them have been described above by taking, as an example, the exposure of a photomask for manufacturing a semiconductor device, particularly the gate layer of a transistor. It is not limited. The gist of the present invention is to perform exposure with a single shot for an exposed portion that requires high dimensional accuracy, and to perform multiple exposure for an unexposed portion that requires high dimensional accuracy. As an embodiment, the effect does not change at all with respect to an X-ray exposure mask, an electron beam transfer mask, and a direct drawing technique for directly drawing a pattern on a wafer without using a mask.
[0049]
In addition, the description of the gist of the present invention has been made through the first and second embodiments. However, the intent of the present invention is to perform multiple drawing and single drawing and / or a portion exposed by a single shot and a plurality of portions. Provides a method to achieve the required accuracy by combining the parts to be exposed in a single shot. By using different types of positive and negative resists for exposure, the dimensional accuracy of a specific part can be more freely combined. Is to provide technology that can achieve the improvement. Further, when performing multiple exposure, a greater effect can be obtained by shifting the area covered by the beam deflection maximum value (subfield) by the beam sub-deflection device of the electron beam exposure apparatus for each exposure.
[0050]
Further, as an apparatus for drawing a pattern, not only an electron beam drawing apparatus but also an ion beam drawing apparatus can be used, and a laser drawing apparatus using a light beam other than a charged particle beam can also be used. . In addition, various modifications can be made without departing from the scope of the present invention.
[0051]
【The invention's effect】
As described above in detail, according to the present invention, an area requiring high dimensional accuracy is exposed with a single shot, and an area requiring high positional accuracy is subjected to multiple exposure. Thus, it is possible to perform pattern formation with substantially high accuracy.
[Brief description of the drawings]
FIG. 1 is a diagram for explaining a pattern forming method according to a reference example.
FIG. 2 is a view showing a mask created according to the first embodiment.
FIG. 3 is a view showing a mask created according to the second embodiment.
FIG. 4 is a view for explaining a conventional pattern forming method.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 11 ... Active area on design 12 ... Gate pattern on design 13 ... Graphic element 16 ... Gate pattern on mask 17 ... Resist remaining part on wafer 18 ... Active area on wafer

Claims (4)

Positioning a beam obtained by shaping a charged particle beam or electromagnetic wave beam into an arbitrary shape, repeating shot exposure for irradiation for a predetermined time, and forming an exposure area of a desired pattern shape on the photosensitive material film on the substrate as a set of the shots In the pattern forming method,
Multiple exposure that repeats two or more shots for a region or pattern that requires high dimensional accuracy is performed with one single shot, and other regions or patterns that require high positional accuracy. The pattern formation method characterized by the above-mentioned.   2. The pattern formation according to claim 1, wherein at the time of the multiple exposure, one of a multiple exposure that repeats the same shot at the same position, a multiple exposure that switches a connection position between shots, or a combination thereof is used. Method. An arbitrary shot is formed by a combination of optical overlaps of the first aperture opening and the second aperture opening;
The same combination of the first aperture opening and the second aperture opening is used for a pattern having the same shape when the selected region or pattern is exposed with a single shot. 2. The pattern forming method according to 1. Positioning a beam obtained by shaping a charged particle beam or electromagnetic wave beam into an arbitrary shape, repeating shot exposure for irradiation for a predetermined time, and forming an exposure area of a desired pattern shape on the photosensitive material film on the substrate as a set of the shots In the pattern forming apparatus,
Multiple exposure that repeats two or more shots for a region or pattern that requires high dimensional accuracy is performed with one single shot, and other regions or patterns that require high positional accuracy. A pattern forming apparatus.

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