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JP3912024B2 - PIN type lateral type semiconductor photo detector - Google Patents

PIN type lateral type semiconductor photo detector Download PDF

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Publication number
JP3912024B2
JP3912024B2 JP2001110169A JP2001110169A JP3912024B2 JP 3912024 B2 JP3912024 B2 JP 3912024B2 JP 2001110169 A JP2001110169 A JP 2001110169A JP 2001110169 A JP2001110169 A JP 2001110169A JP 3912024 B2 JP3912024 B2 JP 3912024B2
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Japan
Prior art keywords
layer
electrode
lateral
pin structure
dye
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JP2001110169A
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JP2002314117A (en
JP2002314117A5 (en
Inventor
篤 原田
次男 井出
昇二郎 北村
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Seiko Epson Corp
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Seiko Epson Corp
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Description

【0001】
【発明の属する技術分野】
本発明は、PIN構造のラテラル型半導体受光素子に関する。
【0002】
【従来の技術】
pn接合面が半導体基板面に対して平行に形成されている縦型フォトダイオードでは、p層またはn層を通して空乏層に光が入射されるのに対して、pn接合面が半導体基板面に対して垂直に形成されているラテラル型フォトダイオードでは、空乏層に直接(p層やn層を介さずに)光が入射される。そのため、ラテラル型フォトダイオードは縦型フォトダイオードよりも、受光効率の点で有利である。
【0003】
従来より、フォトダイオードにおいては、p層とn層との間にi層(真性層)を設けて、空乏層を厚くすることが行われている。このようなPIN構造を有する縦型フォトダイオードでは、受光感度を高くするために、i層を吸収長以上の厚さに形成することが行われている。これにより、波長700nm〜870nm前後において、70%以上の量子効率が得られるようになる。
【0004】
PIN構造のラテラル型フォトダイオード(PIN構造のi層とp層およびn層との界面が半導体基板面に対して垂直に形成されたフォトダイオード)は、例えば、i層をなす不純物濃度の極めて薄い領域を半導体基板の表層部に設けた後、この領域の所定間隔を開けた各位置に、上面からp型不純物及びn型不純物をそれぞれ添加して拡散させることによりp層及びn層を形成し、両層の間をi層として残すことによって作製される。
【0005】
そのため、PIN構造のラテラル型フォトダイオードの場合にi層の厚さ(光入射面からの深さ)を大きくしようとすると、p層及びn層を深く形成する必要がある。基板の厚さ方向でi層の幅(p層とn層との距離)を均一に保持しながら、p層及びn層を深く形成するためには、基板表面でのp層とn層との距離を大きくとる必要がある。基板表面でのp層とn層との距離を大きくとるとi層の幅が大きくなる。i層の幅が大きいと、i層のp層側で生じた電子がn層の電極に達するまでの移動距離が長くなって、応答速度が遅くなる。
【0006】
したがって、PIN構造のラテラル型フォトダイオードでは、受光感度をより高くする方法として、i層の厚さ(光入射面からの深さ)を大きくすることを単純に採用することができない。そのため、PIN構造のラテラル型フォトダイオードの受光感度をより高くする方法としては、i層の上面に反射防止膜を設けてi層への入射効率を高くすることが有効である。
【0007】
【発明が解決しようとする課題】
しかしながら、i層の上面に反射防止膜を有するPIN構造のラテラル型フォトダイオードには、高速の信号を受光する素子とした場合に応答速度が低くなるという問題点がある。
本発明は、このような従来技術の問題点に着目してなされたものであり、PIN構造のラテラル型半導体受光素子において、応答速度を低下させることなく受光感度を向上させることを課題とする。
【0008】
【課題を解決するための手段】
上記課題を解決するために、本発明は、PIN構造のi層とp層およびn層との界面が半導体基板面に対して垂直に形成され、i層に入射された光を電流に変換して検出するラテラル型半導体受光素子において、光電変換機能を有する色素層を、受光領域をなすi層の上面および/または内部に設けたことを特徴とするPIN構造のラテラル型半導体受光素子を提供する。
【0009】
【発明の実施の形態】
以下、本発明の実施形態について説明する。
図1は本発明の一実施形態に相当するフォトダイオードを示す断面図である。図2は、この実施形態のフォトダイオードがアレイ状に形成されている場合の平面形状の一例を示す図である。図1は図2のA−A線断面図に相当する。
【0010】
このフォトダイオードは、PIN構造がシリコン基板(半導体基板)1の基板面に対して垂直に形成されたラテラル型フォトダイオード(半導体受光素子)であり、i層15の受光領域2をなす部分(p層5とn層7とで挟まれた部分)の上面に、光電変換機能を有する色素層4が設けてある。
p層5およびn層7の上面には、p電極6およびn電極8がそれぞれ形成されている。両電極6,8の間の面が受光面3となっており、色素層4は両電極6,8の間に、絶縁層91を介して形成されている。なお、絶縁層91は、色素層4の光電変換で生じた電子によって両電極6,8間を導通させないために必要である。
【0011】
シリコン基板1の上面の両電極6,8、色素層4、および絶縁層91の位置を除いた部分に、シリコン酸化膜等からなる素子保護層9が所定の厚さで形成されている。また、シリコン基板1の下面にはp電極11が形成されている。
このフォトダイオードは、例えば以下の方法で作製できる。
先ず、p型のシリコン基板1の表層部にnウエル(不純物濃度の極めて薄い領域)10を設ける。次に、nウエル10の所定間隔を開けた2つの領域の一方にp型不純物を、他方にn型不純物をそれぞれ添加して拡散させる。これにより、nウエル10にp層5及びn層7が形成され、nウエル10のp層5とn層7との間の部分がi層15として残る。次に、p層5及びn層7の上に電極6,8を形成した後、素子保護層9を形成する。
【0012】
次に、電極6,8間の素子保護層9を除去した後、電極6,8に接触する幅の狭い絶縁層91を形成する。或いは素子保護層9を除去する際に、電極6,8側の素子保護層9を絶縁層91として少し残す。次に、i層15の上面の絶縁層91で囲われた部分に、光電変換機能を有する色素層4を形成する。
光電変換機能を有する色素としては、例えば、ポルフィリン類(ヘム等)、フタロシアニン類、ロドプシン類(バクテリオロドプシン等)が挙げられ、応答速度と感度が高いものを使用することが好ましい。色素層4の形成方法としては、ラングミュア・ブロジェット法(LB法)、スピンコート法、或いはインクジェット法が挙げられる。
【0013】
このフォトダイオードは、n層7の上面に接触するn電極8と基板1の下面のp電極11との間に、n層7側を正として電源を接続して逆バイアス電圧を付与し、p層5の上面に接触するp電極6を出力回路に接続することにより、受光面3からi層15に入射された光を電流に変換して検出することができる。
受光面3に入射された光のうち色素層4で吸収された光は、色素層4の光電変換機能により光電変換されて、生じた電子がi層15およびn層7を通ってn電極8に至る。色素層4を透過した光はi層15に入射され、i層15で光電変換されて、生じた電子がn層7を通ってn電極8に至る。
【0014】
したがって、このフォトダイオードによれば、i層15の上に色素層4が形成されていないものと比較して、受光効率を高くすることができる。また、i層15の上に色素層4の代わりに反射防止膜が形成されているものと比較して、応答速度が速くなる。
また、このフォトダイオードによれば、色素層4をインクジェット法等で形成することにより、反射防止膜を形成する場合と比較して、容易に製造できるようになるという効果も得られる。さらに、色素層4をなす材料の波長選択性を利用して、所定波長の光のみを検出できるようにすることも可能になる。また、使用する色素の吸収係数や色素層4の膜厚の設定によって、受光感度を容易に向上させることができる。
【0015】
なお、色素層4は、受光領域2をなすi層15の上面および/または内部に設けてあればよい。例えば、図3に示すように、p層5およびn層7を形成した後に、i層15の表層部に凹部41を形成し、この凹部41内と絶縁層91で囲われた領域内に、或いはこの凹部41内にのみ色素層4を設けてもよい。また、図3に2点鎖線で示すように、i層15の内部に色素層40を設けて、色素層40の上面にもi層15を有する構造であってもよい。ただし、色素層4をi層15内に設ける場合には、色素層4とp層5およびn層7との間にi層15を存在させて、p層5とn層7との間に逆バイアス電圧が付与されるようにする必要がある。
【0016】
また、この実施形態では、PIN構造のラテラル型フォトダイオードについて説明しているが、本発明のPIN構造のラテラル型半導体受光素子はこれに限定されず、ベースとコレクタの部分がPIN構造になっているラテラル型フォトトランジスタ等にも適用される。
【0017】
【発明の効果】
以上説明したように、本発明のPIN構造のラテラル型半導体受光素子によれば、応答速度を低下させることなく受光感度を向上させることができる。
【図面の簡単な説明】
【図1】本発明の一実施形態に相当するフォトダイオードを示す断面図であって、図2のA−A線断面図に相当する図である。
【図2】図1のフォトダイオードがアレイ状に形成されている場合の平面形状の一例を示す図である。
【図3】本発明の別の実施形態に相当するフォトダイオードを示す断面図である。
【符号の説明】
1 シリコン基板(半導体基板)
10 nウエル
11 p電極
15 i層
2 受光領域
3 受光面
4 光電変換機能を有する色素層
40 光電変換機能を有する色素層
5 p層
6 p電極
7 n層
8 n電極
9 素子保護層
91 絶縁層
[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a lateral semiconductor light-receiving element having a PIN structure.
[0002]
[Prior art]
In the vertical photodiode in which the pn junction surface is formed parallel to the semiconductor substrate surface, light is incident on the depletion layer through the p layer or the n layer, whereas the pn junction surface is in contact with the semiconductor substrate surface. In the lateral photodiode formed vertically, light is directly incident on the depletion layer (without passing through the p layer or the n layer). Therefore, the lateral type photodiode is more advantageous in light receiving efficiency than the vertical type photodiode.
[0003]
Conventionally, in a photodiode, an i layer (intrinsic layer) is provided between a p layer and an n layer to thicken a depletion layer. In the vertical photodiode having such a PIN structure, in order to increase the light receiving sensitivity, the i layer is formed to have a thickness greater than the absorption length. As a result, a quantum efficiency of 70% or more can be obtained at wavelengths of around 700 nm to 870 nm.
[0004]
A lateral photodiode with a PIN structure (a photodiode in which the interface between the i layer, the p layer, and the n layer of the PIN structure is formed perpendicular to the surface of the semiconductor substrate) has, for example, an extremely thin impurity concentration forming the i layer. After the region is provided in the surface layer portion of the semiconductor substrate, the p layer and the n layer are formed by adding and diffusing a p-type impurity and an n-type impurity from the upper surface to each position at a predetermined interval in the region. , By leaving between both layers as an i-layer.
[0005]
Therefore, in the case of a lateral type photodiode having a PIN structure, if it is attempted to increase the thickness of the i layer (depth from the light incident surface), it is necessary to form the p layer and the n layer deeply. In order to form the p layer and the n layer deeply while maintaining the width of the i layer (distance between the p layer and the n layer) uniformly in the thickness direction of the substrate, the p layer and the n layer on the substrate surface It is necessary to take a large distance. When the distance between the p layer and the n layer on the substrate surface is increased, the width of the i layer is increased. When the width of the i layer is large, the moving distance until the electrons generated on the p layer side of the i layer reach the electrode of the n layer becomes long, and the response speed becomes slow.
[0006]
Therefore, in the lateral type photodiode having the PIN structure, it is not possible to simply adopt increasing the thickness of the i layer (depth from the light incident surface) as a method for increasing the light receiving sensitivity. Therefore, as a method of increasing the light receiving sensitivity of the lateral photodiode having the PIN structure, it is effective to provide an antireflection film on the upper surface of the i layer to increase the incident efficiency to the i layer.
[0007]
[Problems to be solved by the invention]
However, a lateral photodiode having a PIN structure having an antireflection film on the upper surface of the i layer has a problem that the response speed is low when an element that receives a high-speed signal is used.
The present invention has been made paying attention to such problems of the prior art, and it is an object of the present invention to improve the light receiving sensitivity without reducing the response speed in a lateral type semiconductor light receiving element having a PIN structure.
[0008]
[Means for Solving the Problems]
In order to solve the above problems, the present invention converts the light incident on the i layer into a current by forming an interface between the i layer, the p layer, and the n layer of the PIN structure perpendicular to the semiconductor substrate surface. A lateral semiconductor light-receiving element having a PIN structure is provided, in which a dye layer having a photoelectric conversion function is provided on an upper surface and / or inside an i-layer forming a light-receiving region. .
[0009]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described.
FIG. 1 is a sectional view showing a photodiode corresponding to one embodiment of the present invention. FIG. 2 is a diagram showing an example of a planar shape when the photodiodes of this embodiment are formed in an array. 1 corresponds to a cross-sectional view taken along line AA in FIG.
[0010]
This photodiode is a lateral type photodiode (semiconductor light receiving element) in which a PIN structure is formed perpendicular to the substrate surface of a silicon substrate (semiconductor substrate) 1, and a portion (p) forming a light receiving region 2 of the i layer 15. A dye layer 4 having a photoelectric conversion function is provided on the upper surface of a portion sandwiched between the layer 5 and the n layer 7.
A p-electrode 6 and an n-electrode 8 are formed on the upper surfaces of the p-layer 5 and the n-layer 7, respectively. The surface between the electrodes 6 and 8 is the light receiving surface 3, and the dye layer 4 is formed between the electrodes 6 and 8 with an insulating layer 91 interposed therebetween. The insulating layer 91 is necessary to prevent conduction between the electrodes 6 and 8 by electrons generated by photoelectric conversion of the dye layer 4.
[0011]
An element protective layer 9 made of a silicon oxide film or the like is formed with a predetermined thickness on the upper surface of the silicon substrate 1 except for the positions of the electrodes 6 and 8, the dye layer 4, and the insulating layer 91. A p-electrode 11 is formed on the lower surface of the silicon substrate 1.
This photodiode can be manufactured, for example, by the following method.
First, an n-well (region with a very low impurity concentration) 10 is provided in the surface layer portion of the p-type silicon substrate 1. Next, a p-type impurity is added to one of the two regions of the n-well 10 that are spaced apart from each other, and an n-type impurity is added to the other to diffuse. As a result, the p layer 5 and the n layer 7 are formed in the n well 10, and the portion between the p layer 5 and the n layer 7 of the n well 10 remains as the i layer 15. Next, after forming the electrodes 6 and 8 on the p layer 5 and the n layer 7, the element protective layer 9 is formed.
[0012]
Next, after removing the element protection layer 9 between the electrodes 6 and 8, a narrow insulating layer 91 in contact with the electrodes 6 and 8 is formed. Alternatively, when the element protective layer 9 is removed, the element protective layer 9 on the electrodes 6 and 8 side is left a little as the insulating layer 91. Next, the dye layer 4 having a photoelectric conversion function is formed in a portion surrounded by the insulating layer 91 on the upper surface of the i layer 15.
Examples of the dye having a photoelectric conversion function include porphyrins (such as heme), phthalocyanines, and rhodopsins (such as bacteriorhodopsin), and those having high response speed and sensitivity are preferably used. Examples of the method for forming the dye layer 4 include Langmuir-Blodget method (LB method), spin coating method, and ink jet method.
[0013]
This photodiode applies a reverse bias voltage by connecting a power source with the n layer 7 side positive between the n electrode 8 in contact with the upper surface of the n layer 7 and the p electrode 11 on the lower surface of the substrate 1. By connecting the p-electrode 6 in contact with the upper surface of the layer 5 to the output circuit, the light incident on the i-layer 15 from the light receiving surface 3 can be converted into a current and detected.
Of the light incident on the light receiving surface 3, the light absorbed by the dye layer 4 is photoelectrically converted by the photoelectric conversion function of the dye layer 4, and the generated electrons pass through the i layer 15 and the n layer 7 to form the n electrode 8. To. The light that has passed through the dye layer 4 is incident on the i layer 15, undergoes photoelectric conversion in the i layer 15, and the generated electrons pass through the n layer 7 and reach the n electrode 8.
[0014]
Therefore, according to this photodiode, the light receiving efficiency can be increased as compared with the case where the dye layer 4 is not formed on the i layer 15. Further, the response speed is faster than that in which an antireflection film is formed on the i layer 15 instead of the dye layer 4.
Also, according to this photodiode, the effect that the dye layer 4 is formed by an ink jet method or the like can be easily manufactured as compared with the case of forming the antireflection film. Furthermore, it becomes possible to detect only light of a predetermined wavelength by utilizing the wavelength selectivity of the material forming the dye layer 4. Further, the light receiving sensitivity can be easily improved by setting the absorption coefficient of the dye to be used and the film thickness of the dye layer 4.
[0015]
The dye layer 4 may be provided on the upper surface and / or inside the i layer 15 forming the light receiving region 2. For example, as shown in FIG. 3, after forming the p layer 5 and the n layer 7, the concave portion 41 is formed in the surface layer portion of the i layer 15, and the concave portion 41 and the region surrounded by the insulating layer 91 are formed. Alternatively, the dye layer 4 may be provided only in the recess 41. Further, as shown by a two-dot chain line in FIG. 3, a structure in which the dye layer 40 is provided inside the i layer 15 and the i layer 15 is also provided on the upper surface of the dye layer 40 may be employed. However, when the dye layer 4 is provided in the i layer 15, the i layer 15 is present between the dye layer 4 and the p layer 5 and the n layer 7, and between the p layer 5 and the n layer 7. It is necessary to apply a reverse bias voltage.
[0016]
In this embodiment, a lateral photodiode having a PIN structure is described. However, the lateral semiconductor light receiving element having the PIN structure of the present invention is not limited to this, and the base and collector portions have a PIN structure. The present invention is also applied to a lateral phototransistor or the like.
[0017]
【The invention's effect】
As described above, according to the lateral type semiconductor light receiving element of the PIN structure of the present invention, the light receiving sensitivity can be improved without lowering the response speed.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view showing a photodiode corresponding to one embodiment of the present invention, and corresponds to a cross-sectional view taken along line AA in FIG.
FIG. 2 is a diagram showing an example of a planar shape when the photodiodes of FIG. 1 are formed in an array.
FIG. 3 is a cross-sectional view showing a photodiode corresponding to another embodiment of the present invention.
[Explanation of symbols]
1 Silicon substrate (semiconductor substrate)
10 n-well 11 p-electrode 15 i-layer 2 light-receiving region 3 light-receiving surface 4 dye layer 40 having a photoelectric conversion function dye layer 5 having a photoelectric conversion function p-layer 6 p-electrode 7 n-layer 8 n-electrode 9 element protection layer 91 insulating layer

Claims (4)

PIN構造のi層とp層およびn層との界面が半導体基板面に対して垂直に形成され、i層に入射された光を電流に変換して検出するラテラル型半導体受光素子において、
光電変換機能を有する色素層を、受光領域をなすi層の上面および/または内部に設けたことを特徴とするPIN構造のラテラル型半導体受光素子。
In the lateral type semiconductor light-receiving element in which the interface between the PIN layer i layer, the p layer, and the n layer is formed perpendicular to the semiconductor substrate surface, and the light incident on the i layer is detected by converting it into a current.
A lateral type semiconductor light-receiving element having a PIN structure, wherein a dye layer having a photoelectric conversion function is provided on an upper surface and / or inside of an i layer forming a light-receiving region.
電極と、
前記電極と電気的に接続された半導体基板と、
前記半導体基板の上方に配置され、PIN構造のi層とp層およびn層との界面が半導体基板面に対して垂直に形成されたラテラル型フォトダイオードと、
前記p層の上面に設けられたp電極と、
前記n層の上面に設けられたn電極と、
前記i層の上面に設けられ、光電変換機能を有する色素層と、
前記p電極及び前記n電極と前記色素層とを絶縁する絶縁層と、
を備えたことを特徴とするPIN構造のラテラル型半導体受光素子。
Electrodes,
A semiconductor substrate electrically connected to the electrode;
A lateral photodiode disposed above the semiconductor substrate and having an interface between the i layer, the p layer, and the n layer of the PIN structure formed perpendicular to the semiconductor substrate surface;
A p-electrode provided on the upper surface of the p-layer;
An n-electrode provided on the upper surface of the n-layer;
A dye layer provided on the upper surface of the i layer and having a photoelectric conversion function;
An insulating layer that insulates the p-electrode and the n-electrode from the dye layer;
A lateral type semiconductor light-receiving device having a PIN structure.
請求項1又は2において、
前記色素層は、少なくともポルフィリン類、フタロシアニン類、ロドプシン類のいずれか1つを含むことを特徴とするPIN構造のラテラル型半導体受光素子。
In claim 1 or 2,
The lateral type semiconductor light-receiving element having a PIN structure, wherein the dye layer includes at least one of porphyrins, phthalocyanines, and rhodopsins.
請求項1〜3のいずれかにおいて、
前記p電極及び前記n電極は、平面形状が櫛形である、PIN構造のラテラル型半導体受光素子。
In any one of Claims 1-3,
The p-electrode and the n-electrode are lateral semiconductor light-receiving elements having a PIN structure, in which the planar shape is a comb shape.
JP2001110169A 2001-04-09 2001-04-09 PIN type lateral type semiconductor photo detector Expired - Fee Related JP3912024B2 (en)

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