JP3767702B2 - Ferroelectric memory device and memory method using ferroelectric capacitor - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a ferroelectric memory device and a memory method using a ferroelectric capacitor, and more particularly to extending the life of a ferroelectric memory device.
[0002]
[Prior art]
As a nonvolatile semiconductor memory, a ferroelectric memory using a ferroelectric capacitor is known. FIG. 8 shows a part of the circuit configuration of a conventional ferroelectric memory. The conventional ferroelectric memory includes a ferroelectric capacitor 4 and a load capacitor 6. FIG. 9 shows the voltage related to the ferroelectric capacitor 4 (the potential of the bit line BL when the plate line PL shown in FIG. 8 is the reference potential) and the polarization state (in the figure, “charge” equivalent to the “polarization state”). The history curve showing the relationship with
[0003]
In FIG. 9, the state in which the remanent polarization Z1 is generated is the first polarization state P1 (corresponding to the memory content “H”), and the state in which the remanent polarization Z2 is occurring is the second polarization state P2 (memory content “L”). ”). By checking which polarization state the ferroelectric capacitor 4 is in, the stored contents of the ferroelectric capacitor 4 can be read out.
[0004]
In order to check which polarization state the ferroelectric capacitor 4 is in, the load capacitor 6 shown in FIG. 8 is discharged, the bit line BL is brought into a floating state, and then the read voltage Vp is applied to the plate line PL. At this time, the voltage Vf generated at both ends of the ferroelectric capacitor 4 is measured.
[0005]
According to the graphical solution shown in FIG. 9, when the capacitance of the load capacitor 6 is expressed by the slope of the straight line L1, if the ferroelectric capacitor 4 is in the first polarization state P1, the ferroelectric capacitor 4 The voltage Vf generated at both ends is V1, and in the second polarization state P2, the voltage Vf is V2. Therefore, if the reference voltage Vref is set as shown in FIG. 9, the ferroelectric capacitor 4 can determine which polarization is caused by comparing the voltage Vf generated at both ends of the dielectric capacitor 4 at the time of reading with the reference voltage Vref. You can check if it is in a state.
[0006]
In this case, as shown in FIG. 9, when the ferroelectric capacitor 4 is in the second polarization state P2, the polarization state P3 is temporarily shown at the time of reading, but when the applied voltage returns to zero, Since the state also returns to the second polarization state P2, the residual polarization does not fluctuate due to reading.
[0007]
However, when the ferroelectric capacitor 4 is in the first polarization state P1, the polarization state P4 is temporarily shown during reading, and when the applied voltage returns to zero, the polarization state P5 is shown. That is, the residual polarization varies due to reading. For this reason, after reading, the rewrite voltage Vrw is applied to the ferroelectric capacitor 4 to generate the polarization state P6. In this way, when the applied voltage returns to zero, the ferroelectric capacitor 4 again exhibits the first polarization state P1.
[0008]
As described above, when the ferroelectric capacitor 4 is in the first polarization state P1, by performing rewriting after reading, the residual polarization is further changed to forcibly return to the first polarization state. With this configuration, it is possible to prevent the stored contents from changing due to reading.
[0009]
[Problems to be solved by the invention]
However, the conventional ferroelectric memory as described above has the following problems. The lifetime of the ferroelectric capacitor 4 is determined in relation to the number of times of spontaneous polarization reversal (variation of remanent polarization), and the like when a certain kind of ferroelectric material is used. ¹² About once. Therefore, even when the same memory cell whose stored content is “H” (corresponding to the first polarization state P1) is read each time, if the read cycle is long, that is, after rewriting, the ferroelectric capacitor In the case where the next reading is performed after reaching the first polarization state P1 by the natural discharge of No. 4, there is no problem because the usable years become sufficiently long.
[0010]
However, when the read cycle is short, that is, when the next read is performed in a state where the natural discharge of the ferroelectric capacitor 4 is hardly performed after rewriting, there is a problem in terms of the usable years. .
[0011]
That is, as shown in FIG. 9, since the margin between the reference voltage Vref and the voltages V1 and V2 needs to be large to prevent erroneous reading, the capacitance of the load capacitor 6 is relatively large (the slope of the straight line L1 is reduced). (Relatively large) is set. Therefore, after rewriting, even if the next reading is performed in a state where the natural discharge of the ferroelectric capacitor 4 is hardly performed (polarization state P6), the residual polarization varies as P1 to P8 to P1. To do. For this reason, as in the case where the read cycle is long, the number of times of reading the same memory cell whose stored content is “H” is related to the lifetime. Therefore, since the read cycle is short, the usable years are shortened.
[0012]
In order to solve such a problem, during normal writing / reading, the ferroelectric capacitor 4 is used in a state in which the remanent polarization is not changed (state 1). A method of using the ferroelectric capacitor 4 in a state involving a change in the state (state 2) has been proposed (A Ferroelectric DRAM Cell for High-Density NVRAM's (IEEE ELECTRON DEVICE LETTERS, VOL.11, NO.10, OCTOBER 1990). )).
[0013]
By adopting this method, it is possible to solve the problem that the usable years are shortened. However, in this method, a processing algorithm is required for each of the state 1 and the state 2, so that the processing contents are complicated. In addition, a determination circuit for determining the state 1 or the state 2 is required. Furthermore, there is a possibility that the transition to the state 2 at the time of occurrence of an abnormal situation may not be performed promptly, and there is a problem in terms of protection of stored contents.
[0014]
The present invention solves the problems of ferroelectric memory devices such as a ferroelectric memory using such a conventional ferroelectric capacitor, has a simple structure, has a long life, and is reliable in protecting stored contents. It is an object of the present invention to provide a high ferroelectric memory device and a memory method using a ferroelectric capacitor.
[0015]
[Means for Solving the Problems]
This invention This ferroelectric memory device exhibits the first storage content and the second polarization state that exhibit the first polarization state when the voltage is zero, based on the hysteresis characteristic that defines the relationship between the voltage and the polarization state. In a ferroelectric memory device comprising a ferroelectric capacitor that retains either one of the second stored contents or the stored contents, at least when the stored contents are read out, it is electrically connected in series with the ferroelectric capacitor. A read voltage for applying a read voltage having a polarity different from the voltage causing the first polarization state to the connected load capacitor, the ferroelectric capacitor electrically connected in series at the time of reading, and the load capacitor The memory content determining means for determining the memory content based on the partial pressure generated in the ferroelectric capacitor in a state where the reading voltage is applied, and the memory content determined by the memory content determining means Rewriting means for applying a rewriting voltage for recovering the polarization state corresponding to the ferroelectric capacitor to the ferroelectric capacitor, and stronger by the first rewriting voltage for recovering the first polarization state. When reading in a polarization state in which the dielectric capacitor is fully charged, the voltage for reading, the first voltage is set so that the voltage generated at both ends of the ferroelectric capacitor is almost zero or the same polarity as the first rewriting voltage. By defining the rewriting voltage, the hysteresis characteristics of the ferroelectric capacitor and the characteristics of the load capacitor, The ferroelectric capacitor is configured so that the polarization state of the ferroelectric capacitor is not lower than the second polarization state than the first polarization state in the case of high-speed reading in which the next reading is performed immediately after rewriting. It is characterized by this.
[0016]
This invention In the ferroelectric memory device, when reading is performed in a polarization state in which the ferroelectric capacitor is fully charged by the first rewriting voltage, the voltage generated at both ends of the ferroelectric capacitor is almost zero or the first rewriting voltage. The read voltage, the first rewrite voltage, the hysteresis characteristic of the ferroelectric capacitor, and the capacitance of the load capacitor are determined so as to have the same polarity as the write voltage. This invention When the hysteresis characteristic of the ferroelectric capacitor is expressed as a combination of a ferroelectric term having a hysteresis property and a paraelectric term having no hysteresis property, the first rewriting voltage is obtained. The hysteresis characteristics of the ferroelectric capacitor are determined so that the polarization state based on the ferroelectric term in the fully charged state is substantially equal to the polarization state based on the ferroelectric term in the first polarization state. It is characterized by.
[0017]
This invention In the ferroelectric memory device, when the storage content determined by the storage content determination means is the first storage content, the rewriting means causes the ferroelectric capacitor to be fully charged by the first rewriting voltage. After that, if the ferroelectric capacitor is set in a floating state and the stored content is the second stored content, the ferroelectric capacitor is set after the rewrite means sets the ferroelectric capacitor in the second polarization state. Is configured to be in a floating state.
[0018]
This invention This ferroelectric memory device uses a threshold voltage as a reference for determining the memory contents at the time of reading, the voltage generated at both ends of the ferroelectric capacitor at the time of reading in the first polarization state, and the reading in the second polarization state. It is characterized in that it is sometimes a value between the voltages generated at both ends of the ferroelectric capacitor.
[0019]
This invention In the storage method using the ferroelectric capacitor, the first storage content that exhibits the first polarization state when the voltage is zero and the second storage based on the hysteresis characteristic that defines the relationship between the voltage and the polarization state. In a storage method using a ferroelectric capacitor that retains one of the second stored contents exhibiting a polarization state, a load capacitor is connected in series with the ferroelectric capacitor at least when the stored contents are read. Is applied to the ferroelectric capacitor and the load capacitor electrically connected in series at the time of reading, and a reading voltage having a polarity different from the voltage causing the first polarization state is applied. In a state where a voltage is applied, the memory content is determined based on the partial pressure generated in the ferroelectric capacitor, and a rewrite voltage for recovering the polarization state corresponding to the determined memory content is increased. The ferroelectric capacitor is configured to be applied to the dielectric capacitor, and at the time of reading in the polarization state in which the ferroelectric capacitor is fully charged by the first rewriting voltage for recovering the first polarization state, The read voltage, the first rewrite voltage, the hysteresis characteristics of the ferroelectric capacitor, and the characteristics of the load capacitor are set so that the voltage generated at both ends is almost zero or the same polarity as the first rewrite voltage. By deciding The ferroelectric capacitor is configured so that the polarization state of the ferroelectric capacitor is not lower than the second polarization state than the first polarization state in the case of high-speed reading in which the next reading is performed immediately after rewriting. It is characterized by this.
[0020]
This invention In the storage method using the ferroelectric capacitor, the capacitance of the load capacitor indicates the polarization state corresponding to the first rewrite voltage on the hysteresis curve indicating the hysteresis characteristic of the ferroelectric capacitor. The capacitance parallel to the line corresponding to the slope of the straight line connecting the point where the parallel line of polarization state intersects the voltage parallel line indicating the voltage for reading and the point indicating the first polarization state on the hysteresis curve, or the static It is set to be smaller than the electric capacity.
[0021]
【The invention's effect】
This invention The ferroelectric memory device and the storage method using the ferroelectric capacitor are generated at both ends of the ferroelectric capacitor at the time of reading in the polarization state in which the ferroelectric capacitor is fully charged by the first rewriting voltage. The read voltage, the first rewrite voltage, the hysteresis characteristics of the ferroelectric capacitor, and the characteristics of the load capacitor are determined so that the voltage to be read is substantially zero or the same polarity as the first rewrite voltage. By The ferroelectric capacitor is configured so that the polarization state of the ferroelectric capacitor is not lower than the second polarization state than the first polarization state in the case of high-speed reading in which the next reading is performed immediately after rewriting. It is characterized by this.
[0022]
Therefore, in the case of high-speed reading in which the next reading is performed immediately after rewriting, the polarization state of the ferroelectric capacitor does not become the second polarization state rather than the first polarization state. For this reason, in the case of high-speed reading, there is no variation in remanent polarization, and there is no decrease in life due to remanent polarization variation (polarization reversal).
[0023]
In addition, the stored contents are retained as remanent polarization regardless of whether it is high-speed reading or low-speed reading. For this reason, it is not necessary to separately perform a process for recalling / saving the stored contents accompanying the power interruption. Further, there is no need to provide a circuit or the like for detecting power supply interruption. Furthermore, the stored contents are not lost even when the power is turned off due to an abnormal situation.
[0024]
That is, with a simple configuration, it is possible to realize a ferroelectric storage device and a storage method using a ferroelectric capacitor that have a long lifetime and high reliability with respect to protection of stored contents.
[0025]
This invention The ferroelectric storage device and the storage method using the ferroelectric capacitor are a ferroelectric memory in which the residual polarization does not fluctuate in the case of high-speed reading by a simple operation of determining the capacitance of the load capacitor. A device can be obtained. That is, it is possible to realize a ferroelectric memory device or the like that has a longer lifetime and higher reliability with respect to protection of stored contents.
[0026]
This invention In the ferroelectric memory device, the polarization state based on the ferroelectric term in the fully charged state by the first rewriting voltage and the polarization state based on the ferroelectric term in the first polarization state are approximately The hysteresis characteristic of the ferroelectric capacitor is determined so as to be equal.
[0027]
Therefore, there is almost no fluctuation in the polarization state based on the ferroelectric term between the polarization state fully charged by the first rewriting voltage and the first polarization state. For this reason, in the case of high-speed reading, there is almost no decrease in lifetime due to a change in polarization state based on the ferroelectric term. That is, it is possible to realize a ferroelectric memory device having a longer lifetime.
[0028]
This invention In the ferroelectric memory device, in the case where the memory content is the first memory content, after the rewrite means sets the ferroelectric capacitor to a fully charged state by the first rewrite voltage, the ferroelectric memory When the capacitor is in a floating state and the stored content is the second stored content, the rewrite means sets the ferroelectric capacitor to the floating state after setting the ferroelectric capacitor to the second polarization state. It is characterized by that.
[0029]
Therefore, regardless of the stored contents, the relationship between the operation of the rewriting means and the operation of bringing the ferroelectric capacitor into a floating state can be made constant. That is, it is possible to realize a ferroelectric memory device or the like that has a long lifetime and high reliability with respect to protection of stored contents by a simpler configuration.
[0030]
This invention This ferroelectric memory device uses a threshold voltage as a reference for determining the memory contents at the time of reading, the voltage generated at both ends of the ferroelectric capacitor at the time of reading in the first polarization state, and the reading in the second polarization state. It is sometimes characterized in that the value is between the voltages generated at both ends of the ferroelectric capacitor.
[0031]
Therefore, the same threshold voltage can be used even in the case of high-speed reading with a large margin by setting the threshold voltage in accordance with low-speed reading with a small margin when determining stored contents. For this reason, the same threshold voltage can be used regardless of whether the reading is performed at low speed or high speed. That is, it is possible to realize a ferroelectric memory device or the like that has a long lifetime and high reliability with respect to protection of stored contents by a simpler configuration.
[0032]
DETAILED DESCRIPTION OF THE INVENTION
FIG. 2 shows a part of a circuit diagram of a ferroelectric memory 10 using a ferroelectric capacitor which is a ferroelectric memory device according to an embodiment of the present invention. The ferroelectric memory 10 has a configuration in which a plurality of memory cells M11, M21... Mmn are arranged in a matrix. In FIG. 2, the arrangement of memory cells M11... M1n (vertical arrangement) is called a row, and the arrangement of memory cells M11... Mm1 (horizontal arrangement) is called a column.
[0033]
The ferroelectric memory 10 further includes a reference cell driving circuit 12, a sense amplifier unit 14 having sense amplifiers AMP1 ..., and a reference cell preset circuit unit 16. The reference cell driving circuit 12 corresponds to a read voltage applying unit. The sense amplifier unit 14 and the reference preset circuit unit 16 correspond to the stored content determination unit. Further, the reference cell driving circuit 12 and the sense amplifier unit 14 correspond to a rewriting unit.
[0034]
In this embodiment, the reference cell driving circuit 12 is used as both the read voltage applying unit and the rewriting unit, and the sense amplifier unit 14 is used as the stored content determining unit and the rewriting unit. ing. With this configuration, the circuit can be simplified.
[0035]
FIG. 3 shows an enlarged circuit diagram in the vicinity of the memory cell M11. The memory cell M11 includes a ferroelectric capacitor C11 and a selection transistor TR11. One end of the ferroelectric capacitor C11 is electrically connected in series with the load capacitor Cb via the selection transistor TR11 and the bit line / BL1. In this embodiment, the load capacitor Cb is a paraelectric capacitor provided as a parasitic capacitance between the bit line / BL1 and the ground. The other end of the ferroelectric capacitor C11 is connected to the reference cell driving circuit 12 (see FIG. 2) via the plate line PL1.
[0036]
The gate of the selection transistor TR11 is connected to the word line WL1. One end of the sense amplifier AMP1 is connected to the bit line / BL1, and the other end of the sense amplifier AMP1 is connected to the reference cell preset circuit unit 16 (see FIG. 2) via the bit line BL1.
[0037]
FIG. 1 shows the voltage related to the ferroelectric capacitor C11 (the potential of the bit line / BL1 when the plate line PL1 shown in FIG. 3 is used as a reference potential) and the polarization state (in the figure, “charge equivalent to the“ polarization state ”). A history curve showing a relationship with “ In FIG. 1, the state in which the remanent polarization Z1 is generated is defined as a first polarization state P1 (corresponding to the memory content “H” which is the first memory content), and the state in which the remanent polarization Z2 is generated is the second polarization. The state is P2 (corresponding to the storage content “L” which is the second storage content).
[0038]
The capacitance of the load capacitor Cb shown in FIG. 3 is determined as follows based on FIG. That is, on the hysteresis curve, a point Q1 where a polarization state parallel line passing a point indicating a polarization state P6 corresponding to a first rewrite voltage Vrw1 described later intersects a voltage parallel line indicating a read voltage Vp described later, and the history curve. The capacitance corresponding to the slope of the straight line connecting the point indicating the first polarization state P1 is defined as the capacitance of the load capacitor Cb.
[0039]
By using the load capacitor Cb having such an electrostatic capacity, as will be described later, when the stored content “H” is read out at a high speed, there is almost no change in the remanent polarization, and a reduction in the life can be prevented.
[0040]
FIG. 4 shows the hysteresis characteristic H of the ferroelectric capacitor C11 shown in FIG. It is considered that the hysteresis characteristic H of the ferroelectric capacitor C11 can be expressed as a combination of a ferroelectric term Hf having a hysteresis property and a paraelectric term Hp having no hysteresis property. The polarization state R6 based on the ferroelectric term Hf in the state P6 fully charged by the first rewriting voltage Vrw1 is almost equal to the polarization state R1 based on the ferroelectric term Hf in the first polarization state P1. Thus, the hysteresis characteristic of the ferroelectric capacitor C11 is determined. That is, the ferroelectric capacitor C11 having high power receiving sensitivity (steep rise of the ferroelectric term Hf) is used.
[0041]
Using the ferroelectric capacitor C11 having such a hysteresis characteristic, when the stored content “H” is read at a high speed as will be described later, there is almost no change in the polarization state based on the ferroelectric term Hf, and the lifetime is reduced. Can be prevented.
[0042]
If a ferroelectric capacitor with low power reception sensitivity as shown in FIG. 5 is used, the polarization state R6 based on the ferroelectric term Hf in the state P6 fully charged with the first rewrite voltage Vrw1, and the first Is significantly different from the polarization state R1 based on the ferroelectric term Hf in the polarization state P1 (indicated by “d” in the figure). Therefore, when a ferroelectric capacitor having such a hysteresis characteristic is used, when the stored content “H” is read out at a high speed, the polarization state varies greatly based on the ferroelectric term Hf, leading to a reduction in life. .
[0043]
Accordingly, the polarization state R1 based on the ferroelectric term Hf in the first polarization state P1 is at least 80 of the polarization state R6 based on the ferroelectric term Hf in the state P6 fully charged by the first rewrite voltage Vrw1. It is preferable that it is about% or more.
[0044]
Next, the operation when reading the stored contents of the ferroelectric memory 10 will be described. For example, when reading the stored contents of the memory cell M11, the corresponding address is input to the address buffer 18 shown in FIG. As a result, the memory cell M11 is selected via the row decoder 20 for selecting a row and the column decoder 22 for selecting a column.
[0045]
FIG. 6 is a timing chart showing the state of each signal line and the like when reading the stored content “H”. With reference to FIGS. 6 and 2, the operation in the case of reading the stored content “H” will be described based on FIGS. First, a description will be given of a case where reading is performed in a polarization state P6 in which the ferroelectric capacitor C11 is fully charged by a first rewriting voltage Vrw1 described later (high-speed reading).
[0046]
First, by setting the bit line / BL1 shown in FIG. 3 to “L”, the load capacitor Cb is discharged (see FIG. 6A), and then the bit line BL1 is brought into a floating state (FIG. 6B). )reference).
[0047]
Next, the word line WL1 is set to “H” to turn on the selection transistor TR11 (see FIG. 6C), and then the plate line according to the output from the reference cell driving circuit 12 (see FIG. 2). PL1 is set to “H” (see FIG. 6D).
[0048]
By setting the plate line PL1 to “H”, the read voltage Vp is applied to both ends of the ferroelectric capacitor C11 and the load capacitor Cb electrically connected in series. As a result, as shown in FIG. 1, a divided voltage V3 based on the read voltage Vp is generated at both ends of the ferroelectric capacitor C11. According to the graphical solution, the divided voltage V3 is given as the voltage of the ferroelectric capacitor C11 in the first polarization state P1. That is,
V3 = 0
It becomes. Therefore, the potential of the bit line / BL1 with reference to the ground has the value shown in FIG.
[0049]
Next, the sense amplifier AMP1 is operated (see FIG. 6F). The sense amplifier AMP1 is supplied from the reference cell preset circuit unit 16 (see FIG. 2) via the bit line BL1, and the reference voltage Vref (threshold voltage) shown in FIG. 1 and the divided voltage V3 of the ferroelectric capacitor C11 are shown. (Actually, the potential of the reference voltage Vref is compared with the potential of the divided voltage V3 when the read voltage Vp shown in FIG. 1 is used as a reference), and if the divided voltage V3 is higher, the memory is stored. The content is determined to be “H”, and the potential of the bit line / BL1 is set to “H” (see FIG. 6G). At this time, the polarization state of the ferroelectric capacitor C11 remains the first polarization state P1 shown in FIG. Note that the value of the reference voltage Vref is set to be an intermediate value between a divided voltage V1 and a divided voltage V2, which will be described later.
[0050]
Next, the plate line PL1 is set to “L” in accordance with the output from the reference cell driving circuit 12 (see FIG. 2) (see FIG. 6H).
[0051]
By setting the plate line PL1 to “L”, a potential difference is generated between the plate line PL1 and the bit line / BL1 maintained at “H”. This potential difference is the first rewrite voltage Vrw1 shown in FIG. 1, and is applied to both ends of the ferroelectric capacitor C11. The ferroelectric capacitor C11 is applied with the first rewriting voltage Vrw1, and enters the polarization state P6 shown in FIG. This state is a fully charged state.
[0052]
Next, in a state where the ferroelectric capacitor C11 is fully charged by the first rewriting voltage Vrw1, the word line WL1 is dropped to “L” (see FIG. 6 (i)), thereby turning off the selection transistor TR11. And the ferroelectric capacitor C11 is in a floating state.
[0053]
Next, by raising the output line B1 (see FIG. 2) of the column decoder 22 (see FIG. 6 (j)), the potential “H” (see FIG. 6 (k)) of the bit line / BL1 is set to the output buffer. 24 (see FIG. 6 (l)). Thereafter, the sense amplifier AMP1 is turned off (see FIG. 6 (m)), so that the bit line / BL1 is brought into a floating state again (see FIG. 6 (n)). Finally, the output line B1 of the column decoder 22 is returned to "L", and the reading process is terminated.
[0054]
Thus, in the case of high-speed reading, that is, in the case of short-cycle reading in which the next reading is performed before the ferroelectric capacitor C11 is fully charged with the first rewriting voltage Vrw1 and then discharged. As described above, the polarization state of the ferroelectric capacitor C11 only changes from P6 to P1 to P6 as shown in FIG.
[0055]
For this reason, the remanent polarization of the ferroelectric capacitor C11 remains unchanged in the first polarization state P1. Therefore, according to this embodiment, there is no decrease in the lifetime of the ferroelectric capacitor C11 due to a change in remanent polarization during high-speed reading.
[0056]
Further, as shown in FIG. 4, there is almost no change in the polarization state based on the ferroelectric term Hf in the process in which the polarization state of the ferroelectric capacitor C11 changes from P6 to P1 to P6. Therefore, according to this embodiment, there is almost no decrease in the lifetime of the ferroelectric capacitor C11 due to the fluctuation of the polarization state based on the ferroelectric term Hf during high-speed reading.
[0057]
Next, when reading is performed in a long cycle, that is, when the paraelectric term Hp (see FIG. 4) of the ferroelectric capacitor C11 is completely discharged, that is, in the first polarization state P1 in FIG. The operation in the case of low speed reading will be described.
[0058]
The ferroelectric memory 10 of this embodiment performs reading in exactly the same processing procedure without distinguishing between high-speed reading and low-speed reading. Therefore, the low-speed read operation is performed in the same manner as the high-speed read operation. However, as shown in FIG. 1, the low-speed readout is different from the high-speed readout in which the polarization state at the time of readout is the first polarization state P1, and the polarization state at the time of readout is P6.
[0059]
Therefore, in the case of low-speed reading, when the reading voltage Vp shown in FIG. 1 is applied, the ferroelectric capacitor C11 exhibits the polarization state P4. Therefore, the partial pressure generated in the ferroelectric capacitor C11 indicates V1. At this time, the potential of the bit line / BL1 with reference to the ground has a value shown in FIG.
[0060]
However, as described above, since the reference voltage Vref is set to a value lower than V1, the sense amplifier AMP1 determines that the stored content is “H” as in the case of high-speed reading, and the bit line / BL1 The potential is set to “H” (see FIG. 6G). At this time, the ferroelectric capacitor C11 exhibits a polarization state P5 as shown in FIG.
[0061]
Thereafter, rewriting is performed by applying a first rewriting voltage Vrw1 to both ends of the ferroelectric capacitor C11 (see FIG. 6H). By rewriting, the ferroelectric capacitor C11 exhibits the polarization state P6. After the reading process is completed, with the passage of time, all charges based on the paraelectric term Hp (see FIG. 4) of the ferroelectric capacitor C11 are discharged, and the state returns to the first polarization state P1 in FIG.
[0062]
Accordingly, at the time of low-speed reading, the residual polarization fluctuates as P1 to P5 to P1, and as shown in FIG. 4, the ferroelectric term Hf changes in the process of changing the polarization state of the ferroelectric capacitor C11 to P1 to P4. The polarization state based on the above also varies from R1 to R4. For this reason, when the stored content “H” is read out at a low speed, the lifetime of the ferroelectric capacitor C11 is reduced.
[0063]
However, when reading at low speed, since the number of readings per unit time is small, the amount of decrease in the life per unit time is small, and there is no problem.
[0064]
Next, the operation for reading the stored content “L” will be described. FIG. 7 is a timing chart showing the state of each signal line and the like when reading the stored content “L”. As shown in FIGS. 6 and 7, the ferroelectric memory 10 of this embodiment reads out the stored contents “H” or the stored contents “L” in exactly the same processing procedure without distinguishing whether the stored contents “H” are read. Is configured to perform.
[0065]
Therefore, the read operation of the stored content “L” is performed in the same manner as the read operation of the stored content “H”. However, as shown in FIG. 1, the case of reading the memory content “L” is different from the case of reading the memory content “H” in that the polarization state at the time of reading is the second polarization state P2. In addition, when the stored content “L” is read, the polarization state at the time of reading is always the second polarization state P2, regardless of whether the reading is performed at high speed or low speed. This is different from the case of reading the stored content “H”.
[0066]
In the case of reading the stored content “L”, the ferroelectric capacitor C11 exhibits the polarization state P3 when the read voltage Vp shown in FIG. 1 is applied. Therefore, the partial pressure generated in the ferroelectric capacitor C11 indicates V2. At this time, the potential of the bit line / BL1 with reference to the ground has the value shown in FIG.
[0067]
As described above, since the reference voltage Vref is set to a value higher than V2, the sense amplifier AMP1 determines that the stored content is “L” and sets the potential of the bit line / BL1 to “L” ( (Refer FIG.7 (b)).
[0068]
By setting the potential of the bit line / BL1 to “L”, a potential difference is generated between the bit line / BL1 and the plate line PL1 maintained at “H”. This potential difference is the second rewrite voltage Vrw2 (equal to the read voltage Vp) shown in FIG. 1, and is applied across the ferroelectric capacitor C11. The ferroelectric capacitor C11 is applied with the second rewriting voltage Vrw2, and enters the polarization state P7 shown in FIG.
[0069]
Thereafter, the plate line PL1 is set to “L” (see FIG. 7C). As a result, the voltage applied to both ends of the ferroelectric capacitor C11 is forcibly set to 0V. As a result, all charges based on the paraelectric term Hp (see FIG. 4) of the ferroelectric capacitor C11 are forcibly discharged, and the state returns to the second polarization state P2 in FIG.
[0070]
Therefore, at the time of reading the stored content “L”, the polarization state of the ferroelectric capacitor C11 only changes from P2 to P3 to P7 to P2 as shown in FIG. is there.
[0071]
For this reason, the remanent polarization of the ferroelectric capacitor C11 remains unchanged in the second polarization state P2. Therefore, according to this embodiment, there is no decrease in the lifetime of the ferroelectric capacitor C11 due to the fluctuation of the remanent polarization when the stored content “L” is read.
[0072]
Further, as shown in FIG. 4, in the process in which the polarization state of the ferroelectric capacitor C11 changes from P2 to P3 to P7 to P2, there is almost no fluctuation of the polarization state based on the ferroelectric term Hf. Therefore, according to this embodiment, there is almost no decrease in the lifetime of the ferroelectric capacitor C11 due to the change of the polarization state based on the ferroelectric term Hf when the stored content “L” is read.
[0073]
As described above, according to this embodiment, the lifetime of the ferroelectric capacitor C11 is reduced only when the stored content “H” is read out at a low speed. Since there is little decrease in the lifetime per unit time, there is no practical problem. Further, reading can be performed by the same processing procedure without distinguishing the length of the read cycle and the stored contents.
[0074]
In the above-described embodiment, the parasitic capacitance of the bit line is used as the load capacitor Cb. However, a separate capacitor may be provided as the load capacitor Cb. Further, although the paraelectric capacitor is used as the load capacitor Cb, a capacitor other than the paraelectric capacitor can be used as the load capacitor Cb.
[0075]
Further, when reading in the polarization state in which the ferroelectric capacitor C11 is fully charged by the first rewriting voltage Vrw1, the load capacitor Cb is set so that the voltage generated at both ends of the ferroelectric capacitor C11 becomes almost zero. However, it is also possible to determine the capacitance of the load capacitor Cb so that the voltage generated at both ends of the ferroelectric capacitor C11 has the same polarity as the first rewrite voltage Vrw1. The capacitance of the load capacitor Cb is the same as that of the conventional one, and one or more elements can be adjusted among the read voltage Vp, the first rewrite voltage Vref, and the hysteresis characteristics of the ferroelectric capacitor. Further, the one or more elements can be adjusted together with the capacitance of the load capacitor Cb.
[0076]
Further, although the read voltage Vp and the second rewrite voltage Vrw2 have the same value, the read voltage Vp and the second rewrite voltage Vrw2 do not necessarily have the same value.
[0077]
Further, a polarization state R6 based on the ferroelectric term Hf in the state P6 fully charged with the first rewriting voltage Vrw1 and a polarization state R1 based on the ferroelectric term Hf in the first polarization state P1 are: Although the hysteresis characteristic of the ferroelectric capacitor C11 is determined so as to be substantially equal, the hysteresis characteristic of the ferroelectric capacitor C11 does not necessarily have to be such.
[0078]
Further, the procedure of reading processing of the ferroelectric memory 10 is not limited to the timing charts shown in FIGS. Further, the present invention is not limited to the ferroelectric memory 10 having the circuit configuration shown in FIG.
[Brief description of the drawings]
FIG. 1 is a drawing for explaining an operating state of a ferroelectric capacitor used in a ferroelectric memory that is a ferroelectric memory device according to an embodiment of the present invention;
FIG. 2 is a diagram showing a part of a circuit configuration of a ferroelectric memory according to an embodiment of the present invention;
FIG. 3 is an enlarged view of the vicinity of a memory cell in a circuit configuration of a ferroelectric memory according to an embodiment of the present invention;
FIG. 4 is a drawing showing hysteresis characteristics of a ferroelectric capacitor used in a ferroelectric memory according to an embodiment of the present invention.
FIG. 5 is a diagram for explaining hysteresis characteristics of a ferroelectric capacitor used in a ferroelectric memory according to an embodiment of the present invention;
FIG. 6 is a timing chart for explaining a reading procedure of stored content “H” in the ferroelectric memory according to the embodiment of the present invention;
FIG. 7 is a timing chart for explaining a reading procedure of stored content “L” in the ferroelectric memory according to the embodiment of the present invention;
FIG. 8 is a diagram showing a part of a circuit configuration of a conventional ferroelectric memory.
FIG. 9 is a drawing for explaining an operating state of a ferroelectric capacitor used in a conventional ferroelectric memory.
[Explanation of symbols]
C11 ・ ・ ・ ・ ・ ・ ・ Ferroelectric capacitor
Cb: Load capacitor
Vrw1 ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ First rewrite voltage
P6... Polarization state corresponding to the first rewriting voltage
Vp ・ ・ ・ ・ ・ ・ ・ ・ Reading voltage
P1 ... The first polarization state

Claims (7)

Based on the history characteristic that defines the relationship between the voltage and the polarization state, the first storage content that exhibits the first polarization state and the second storage content that exhibits the second polarization state when the voltage is zero A ferroelectric capacitor that retains the stored content of either one,
In a ferroelectric memory device comprising:
A load capacitor that is electrically connected in series to the ferroelectric capacitor at least when reading the stored content;
Read voltage applying means for applying a read voltage having a polarity different from the voltage causing the first polarization state to the ferroelectric capacitor and the load capacitor electrically connected in series at the time of reading;
Stored content determination means for determining the stored content based on the partial pressure generated in the ferroelectric capacitor in a state where the read voltage is applied;
Rewriting means for applying to the ferroelectric capacitor a rewriting voltage for recovering the polarization state corresponding to the stored content determined by the stored content determining means;
With
When reading in the polarization state in which the ferroelectric capacitor is fully charged by the first rewriting voltage for recovering the first polarization state, the voltage generated at both ends of the ferroelectric capacitor is substantially zero or the first Immediately after rewriting, the reading voltage, the first rewriting voltage, the hysteresis characteristics of the ferroelectric capacitor and the characteristics of the load capacitor are determined so as to have the same polarity as the rewriting voltage of In the case of high-speed reading in which the next reading is performed, the ferroelectric capacitor is configured such that the polarization state of the ferroelectric capacitor is not lower than the second polarization state than the first polarization state ;
A ferroelectric memory device. 2. The ferroelectric memory device according to claim 1, wherein
At the time of reading in a polarization state in which the ferroelectric capacitor is fully charged by the first rewriting voltage, the voltage generated at both ends of the ferroelectric capacitor is substantially zero or the same polarity as the first rewriting voltage. The reading voltage, the first rewriting voltage, the hysteresis characteristics of the ferroelectric capacitor and the capacitance of the load capacitor are determined so that
A ferroelectric memory device. The ferroelectric memory device according to claim 1 or 2,
When the hysteresis characteristic of the ferroelectric capacitor is expressed as a combination of a ferroelectric term having a hysteresis property and a paraelectric term having no hysteresis property, the ferroelectric capacitor in a fully charged state by the first rewrite voltage is used. Determining the hysteresis characteristics of the ferroelectric capacitor so that the polarization state based on the dielectric term and the polarization state based on the ferroelectric term in the first polarization state are substantially equal;
A ferroelectric memory device. The ferroelectric memory device according to claim 1, 2, or 3,
If the storage content determined by the storage content determination means is the first storage content, the ferroelectric capacitor is set after the rewriting means sets the ferroelectric capacitor to a fully charged state by the first rewriting voltage. In a floating state
In the case where the stored content is the second stored content, the rewrite means is configured to place the ferroelectric capacitor in a floating state after the ferroelectric capacitor is set to the second polarization state,
A ferroelectric memory device. The ferroelectric memory device according to claim 1, 2, 3, or 4,
The threshold voltage used as a reference for determining the memory contents at the time of reading is the voltage generated across the ferroelectric capacitor at the time of reading in the first polarization state and the voltage across the ferroelectric capacitor at the time of reading in the second polarization state. A value between the generated voltage and
A ferroelectric memory device. Based on the history characteristic that defines the relationship between the voltage and the polarization state, the first storage content that exhibits the first polarization state and the second storage content that exhibits the second polarization state when the voltage is zero In a storage method using a ferroelectric capacitor that holds either one of the stored contents,
At least when reading the stored contents, electrically connect a load capacitor to the ferroelectric capacitor in series,
A read voltage having a polarity different from the voltage causing the first polarization state is applied to the ferroelectric capacitor and the load capacitor electrically connected in series at the time of reading, and in the state where the read voltage is applied The memory content is determined based on the partial pressure generated in the ferroelectric capacitor,
The rewriting voltage for recovering the polarization state corresponding to the determined stored content is applied to the ferroelectric capacitor, and
When reading in the polarization state in which the ferroelectric capacitor is fully charged by the first rewriting voltage for recovering the first polarization state, the voltage generated at both ends of the ferroelectric capacitor is substantially zero or the first Immediately after rewriting, the reading voltage, the first rewriting voltage, the hysteresis characteristics of the ferroelectric capacitor and the characteristics of the load capacitor are determined so as to have the same polarity as the rewriting voltage of In the case of high-speed reading in which the next reading is performed, the ferroelectric capacitor is configured such that the polarization state of the ferroelectric capacitor is not lower than the second polarization state than the first polarization state ;
And a storage method using a ferroelectric capacitor. In the memory | storage method using the ferroelectric capacitor of Claim 6,
The voltage at which the parallel line of the polarization state passing through the point indicating the polarization state corresponding to the first rewrite voltage on the hysteresis curve indicating the hysteresis characteristic of the ferroelectric capacitor indicates the capacitance of the load capacitor. The capacitance is set to be substantially equal to or smaller than the capacitance corresponding to the slope of the straight line connecting the point intersecting the parallel line and the point indicating the first polarization state on the hysteresis curve;
And a storage method using a ferroelectric capacitor.

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