[go: up one dir, main page]
More Web Proxy on the site http://driver.im/

JP3672913B2 - Oscillation frequency correction circuit for portable radio - Google Patents

Oscillation frequency correction circuit for portable radio Download PDF

Info

Publication number
JP3672913B2
JP3672913B2 JP2003015632A JP2003015632A JP3672913B2 JP 3672913 B2 JP3672913 B2 JP 3672913B2 JP 2003015632 A JP2003015632 A JP 2003015632A JP 2003015632 A JP2003015632 A JP 2003015632A JP 3672913 B2 JP3672913 B2 JP 3672913B2
Authority
JP
Japan
Prior art keywords
frequency
signal
modulation
circuit
oscillation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2003015632A
Other languages
Japanese (ja)
Other versions
JP2004229045A (en
Inventor
太 斎藤
和幸 杉本
栄樹 藤田
Original Assignee
株式会社国際電気エンジニアリング
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社国際電気エンジニアリング filed Critical 株式会社国際電気エンジニアリング
Priority to JP2003015632A priority Critical patent/JP3672913B2/en
Publication of JP2004229045A publication Critical patent/JP2004229045A/en
Application granted granted Critical
Publication of JP3672913B2 publication Critical patent/JP3672913B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Landscapes

  • Transceivers (AREA)
  • Oscillators With Electromechanical Resonators (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Description

【0001】
【発明の属する技術分野】
本発明は、携帯型無線機の基準発振器の発振周波数の制御が行える電圧制御形温度補償水晶発振器の回路に関する。
【0002】
【従来の技術】
従来の無線機は、VCOと基準発振器の両方に変調信号を入力し、VCOの変調で減衰される低域の周波数成分を基準発振器の変調で補い、変調周波数特性を低域から高域まで一定にすることにより、低域成分と高域成分を持った矩形波形であっても、変調波形に生じる歪みを抑える(例えば、特許文献1参照)。
【0003】
【特許文献1】
特開平11−284524号公報(第2頁、第2欄、図7)
【0004】
図2は、従来使われている説明図であり、電圧制御発振器(以下「VCO」とする;Voltage Controlled Oscillator)1と、PLL集積回路(以下「PLL−IC」とする;Phase Locked Loop IC)2と、電圧制御形温度補償水晶発振器(以下「VC−TCXO」とする;Voltage Controlled−Temperature Compensated Crystal Oscillator)3と、制御回路(I)6及び周波数調整回路8の回路ブロック構成を有する。
この回路をFM変調方式の送信変調回路として用いる場合は、変調信号(信号 <1> )として入力されたアナログ音声信号又はディジタルデータ信号は、そのDC成分がコンデンサでカットされた後、信号 <4> として、b点からVCO1へ、(d)点からVC−TCXO3に入力される。VC−TCXO3では変調信号の低域周波数帯での変調が行われ、その出力である信号 <3> は、a点からPLL−IC2に入力され、PLL−IC2の出力である信号 <2> に重畳される。
VCO1と、自動又は手動のチャネル制御の信号が外部より入力される制御回路(I)6と、PLL−IC2とのループされた回路で周波数シンセサイザとしての制御が行われてVCO1では送信搬送波の信号(信号 <6> )を得る。同時に変調信号 <4> がb点でVCO1に入力され、VCO1では変調信号入力(信号 <1> )の高域周波数帯での変調が行われる。
【0005】
変調信号入力(信号▲1▼)は、アナログ音声信号での通信の場合、主に300Hz〜3KHzの信号帯域、即ち300Hz以上の高域変調周波数帯となり、ディジタルデータ信号の場合、一例を挙げると4800bpsや9600bpsの2値の矩形波となり、300Hz以下の低域から300Hz以上の高域までの変調周波数帯が必要であり、これら2つの信号のうちいずれか1つの信号が変調信号入力▲1▼として入力される。以上により高域と低域の両方の帯域を持った広帯域で変調された送信搬送波(信号▲6▼)がVCO1とVC−TCXO3の一組の回路によって得られるようになる。
【0006】
図3に図2従来回路の変調特性図を示す。先ずVCO1側の特性として、即ちVC−TCXO3側へ入力される信号▲4▼のラインが未接続の状態とし、VCO1にのみ信号▲4▼を入力して変調をかけた場合の変調では、×ポイントで示す特性カーブを有し、300Hz以上の変調信号の周波数帯域の変調が行われ、ここでは変調信号の周波数帯域が低くなるほど変調感度が低い特性である。これは音声の全帯域とディジタルデータの高域周波数成分をそれぞれ変調特性としてカバーすることになる。
一方VC−TCXO3側の変調では、VCO1側へ供給する信号▲4▼のラインが未接続の状態で、VC−TCXO3にのみ信号▲4▼を入力して変調を行うと、黒丸ポイントで示す特性カーブであり、300Hz以下の変調信号の周波数帯域の変調がなされ、変調信号の周波数帯域が高くなるほど変調感度が低い特性である。ここではディジタルデータの低域周波数成分であるDC成分に近い周波数帯を変調特性としてカバーする。
従って両特性カーブを合体された特性として20Hz付近の低い周波数から、5KHz付近の高い周波数まで平坦な特性が得られる。この合体特性カーブは、黒三角ポイントで示す特性カーブのように低域から広域まで平坦な特性を有し、音声周波数帯域のみならず4800bpsないし9600bpsのディジタルデータ速度の変調に対応できている。
【0007】
また、図2による送信搬送波の発振回路としての動作は、VC−TCXO3を基準発振器として、その出力a点(信号▲3▼)をPLL−IC2に入力し、PLL−IC2の出力(信号▲2▼)の電圧に従った周波数をVCO1で作り出すシンセサイザ回路となり、VCO1では送信信号の搬送波(信号▲6▼)が作り出される。このようにPLL−IC2とVCO1が組み合わされて制御回路(I)6からのチャネル周波数制御信号により送信チャネル周波数が制御されて、自動又は手動で任意の送信チャネル周波数に設定される。VHF帯での一例を示すと、信号▲2▼が1.0Vでの搬送波(信号▲6▼)は136.000MHz、同様に信号▲2▼が2.0Vで搬送波(信号▲6▼)は155.000MHz、信号▲2▼が3.0Vで搬送波(信号▲6▼)は174.000MHzとなる。
図2従来回路でのVC―TCXO3は、周波数調整回路8で設定される固定の基準周波数発振器であり、これに、変調信号(信号▲4▼)の入力レベルに応じて周波数変調された、周波数変調成分を合成された基準周波数発振の形で出力し、PLL−IC2の基準周波数とされたものとなる。一例を示すと、VC―TCXO3への入力される信号▲4▼が2.5Vのとき信号▲3▼として19.2MHzを出力し、変調信号電圧の変化に対しては、10ppm/Vの特性を有する。
回路のシンセサイザとしての周波数合成については、先ずVCO1の出力周波数(搬送波の周波数)信号▲6▼は、VC―TCXO3の出力周波数の1/N倍と、VCO1の出力周波数の1/M倍が等しくなるような周波数関係からVCO1の出力周波数が得られる。M、Nの値は制御回路(I)6よりチャネル周波数制御信号としてPLL−IC2に入力され、チャネル周波数が設定される。例えば基準周波数発振器としてのVC―TCXO3の出力周波数が19.2MHzであれば、N=10、M=100とPLL−IC2に設定され、VCO1の出力周波数信号▲6▼は、送信搬送波周波数として192MHzとなる。
【0008】
前記の送信回路は、無線機が送信モードの時であって、図2の従来回路が受信モードの時には変調信号入力(信号▲1▼)は入力OFF状態となり、VCO1の出力信号(信号▲6▼)は、スーパーヘテロダイン方式の受信機の局部発振周波数信号として受信回路に供給される。
即ち、図2の従来回路を受信の無線周波数の局部発振器としても用いられ、この場合は変調信号(信号6)が断の状態であり、VC−TCXO3を固定の単一周波数の基準発振器として動作し、その出力をPLL−IC2に入力し、PLL−IC2はVCO1と組み合わされて制御回路(I)6からのチャネル周波数制御信号により受信チャネル周波数が制御されて、自動又は手動で任意の受信チャネル周波数に設定される。
【0009】
【発明が解決しようとする課題】
しかし、従来回路では、VC−TCXOの周波数偏差を周波数調整回路8で初期設定後は自動又は手動で制御することは行っていない。そのため、従来の携帯型無線機では、送信及び受信の周波数の初期偏差の分又は経時偏差の分だけ偏差を持ったままの周波数精度であり、高い周波数精度を要求されるデータ伝送システムでは、VC−TCXOの発振周波数に対して微細な補正をしないと基準発振器として安定に用いることが出来ない問題があった。
【0010】
本発明の目的は、アナログ音声信号又はディジタルデータ信号の両方での変調が可能な回路を有した携帯型無線機において、高い周波数精度が要求されるデータ伝送システムでの利用を可能にした携帯型無線機における発振周波数補正回路を提供することにある。
【0011】
【課題を解決するための手段】
本発明の携帯型無線機における発振周波数補正回路は、電圧制御形水晶発振器を基準発振器として用いる携帯型無線機において、
LL−ICにより制御される電圧制御発振器の位相制御ループ内にチャネル選択用の第1の制御回路を備えて周波数シンセサイザ機能を有せしめるとともに、該電圧制御発振器の発振周波数は変調入力信号により音声周波数帯域における高域周波数の変調がなされるように構成された電圧制御発振回路と、
水晶発振器を備え該水晶発振器の発振周波数は、前記変調入力信号により音声周波数帯域における低域周波数の変調がなされて該変調された発振出力は前記PLL−ICに基準周波数として与えられる電圧制御形水晶発振器と、
受信信号のRSSI出力電圧あるいは受信データのビット誤り率である自動又は手動の制御入力によりステップ状の周波数偏差制御DC信号を出力する第2の制御回路と、
該周波数偏差制御DC信号を前記変調入力信号の差動入力として重畳することにより前記低域周波数の変調と前記周波数偏差制御とが同時に行われる演算増幅回路とを備え、
前記周波数偏差制御DC信号の調整により前記電圧制御形水晶発振器の基準発振周波数が補正されることにより前記電圧制御発振器の発振周波数が所定のチャネル発振周波数に微調整され
前記音声周波数帯域のアナログ音声信号とディジタルデータ信号のいずれもを前記変調入力信号とするように構成されたものを提供することにより前記課題を解決した。
【0012】
【作用】
本発明の作用は、VC−TCXOの発振周波数が、第2の制御回路から出力される周波数偏差制御信号により、送信及び受信の周波数偏差を微調整制御されるようにしたものである。
【0013】
【発明の実施の形態】
本発明の実施例は、図1に示されるように、VCO1、PLL−IC2,VC−TCXO3、演算増幅器(I)4、演算増幅器(II)5、制御回路(I)6、制御回路(II)7から構成される。
FM変調方式の送信回路としての動作は、先ずアナログ音声の送信信号又はディジタルデータの送信信号のいずれかを変調信号入力(信号▲1▼)として、演算増幅器(I)4に入力され、その出力信号▲5▼のb点がVCO1に入力されると同時に、演算増幅器(II)5へも入力され、演算増幅器(II)5の出力は信号▲4▼(d)点としてVC−TCXO3に入力される。
演算増幅器(I)4からVCO1に入力された信号▲5▼のb点によりVCO1では高域周波数帯(約300Hz以上)の変調が行なわれる。演算増幅器(II)5の出力からVC−TCXO3に入力された信号▲4▼のa点により低域周波数帯(約300Hz以下)の変調が行なわれる。
以上の2つの帯域の変調が行われることにより、入力された変調信号のDC近傍の低域から高域までの周波数変調が可能となり、これにより、高域部分でのアナログ音声と低域から高域を用いたディジタルデータ信号の両方での変調が可能となる。
【0014】
さらに図1の回路構成において、送信周波数の搬送波発生回路としても機能しており、無線周波数の基準発振器の発振周波数を周波数制御させる周波数偏差制御信号(信号▲7▼)のc点が演算増幅器(I)4と演算増幅器(II)5の基準電圧として両演算増幅器へ入力される。これにより、演算増幅器(II)5の出力である信号▲4▼の(d)点のDC電圧分は、周波数偏差制御としての電圧分となる。
周波数偏差制御信号は、制御回路(II)7出力の信号▲7▼のc点であり、0〜5Vを1024ステップに分割した中の自動又は手動で任意の分解能の電圧を周波数偏差制御信号として出力する。
周波数偏差制御信号であるDC電圧を変化させることにより、VC−TCXO3とVCO1での発振回路でとしての搬送波周波数を送信のチャネル周波数に対し自動又は手動で任意の周波数に微調整できるものである。
VCO1からの出力周波数(信号▲6▼)の周波数調整は、先ず変調信号入力(信号▲1▼)を入力断にしてVC−TCXO3とVCO1とも無変調の状態にしておき、VCO1からの出力周波数(信号▲6▼)を測定し、希望とする搬送波周波数より周波数偏差が生じていた場合に周波数偏差制御信号(信号▲7▼)の電圧をステップ調整し、所定の搬送波周波数に合わせるものである。
【0015】
図1発明回路の周波数シンセサイザの周波数合成関係としてのM、N値は、VC−TCXO3の出力周波数が仕様値の周波数を標準として決めてあるので、先ず、制御回路(II)7の出力である周波数偏差制御信号(信号▲7▼)の電圧はVC−TCXO3の出力周波数が仕様値の周波数になるように調整される。例えば周波数偏差制御信号(信号▲7▼)の制御電圧DC2.5Vのとき、発振周波数(信号▲3▼)は19.2MHzの仕様値であっても、時には回路部品の特性バラツキで、制御電圧2.3Vで発振周波数(信号▲3▼)が19.2MHzとなる装置もあれば、制御電圧2.7Vで発振周波数(信号▲3▼)が19.2MHzとなる装置もある。
そこで本発明のVC−TCXO3発振回路の発信周波数を周波数偏差制御信号(信号▲7▼)のステップ電圧によりVC−TCXO3を独自に微調整がおこなえるようにしたものである。通常一度設定されたあとの周波数偏差制御信号(信号▲7▼)の入力ステップ電圧は、所定のDC電圧を維持する。
周波数偏差制御信号(信号▲7▼)のステップ電圧は、演算増幅器(I)4、演算増幅器(II)5の(+)側端子に入力されることにより、(−)側端子に入力された変調信号入力(信号▲1▼)とで差動増幅で合成される。VC−TCXO3側に入力された信号▲4▼は周波数偏差制御信号(信号▲7▼)のステップ電圧にVC−TCXO3側での変調信号が重畳されて、かつ、基準周波数発振器としても制御回路(II)7から自動又は手動で任意に周波数制御されるようにしている。このようにして、高精度の搬送波周波数安定度や高精度の変調精度を求められるデータ伝送などのディジタル通信に適合するものである。
【0016】
次に図1の回路構成は受信モードの局部発振周波数の発生回路としても機能している。この場合、変調信号(信号6)は、入力「なし」の状態としておく。先ず、周波数偏差制御信号(信号▲7▼)を演算増幅器(I)4と演算増幅器(II)5の基準電圧として入力される。次に、演算増幅器(II)5の出力のDC電圧成分は制御電圧として、制御回路(II)7からの周波数偏差制御信号(信号▲7▼)入力と演算増幅器(I)4の出力のDC電圧成分を入力とした差動増幅出力であり、一定のDC値の周波数偏差制御信号となる。
周波数偏差制御信号(信号▲7▼)は、制御回路(II)7(例えばマイクロプロセッサ)の出力であり、DC0〜5Vを1024ステップに分割した中の自動又は手動で任意のステップ電圧を出力することが出来る。
周波数偏差制御信号(信号▲7▼)のDC電圧を変化させ調整することにより、受信の周波数を、自動又は手動で任意の周波数に合わせることが出来る。
なおPLL−IC2と、VCO1と、制御回路(I)6とによるシンセサイザとしての周波数発生される原理(M値、N値の関係)は送信と同じである。
受信した信号の周波数が当該無線機に設定された受信周波数との間で周波数差が生じていた場合の周波数偏差制御として、その周波数差分を所定の手段で検出し、周波数の差分だけ当該無線機に設定された受信周波数を補正できるようにした制御回路(II)7の出力である周波数偏差制御信号(信号▲7▼)によってVC−TCXO3の発振周波数が微調整され、最終的に受信モードの局部発振周波数としてVCO1の出力周波数を受信した信号の周波数に合わせることができる。
【0017】
基地局からの送信周波数を受信して、その受信周波数偏差を検出し、その偏差を補正するように微調整された値の周波数偏差制御信号を得ることにより、携帯型無線機の送信及び受信の周波数を基地局の送信周波数に合わせることが出来る。
この周波数偏差を検出する手段の一例としては、受信機のRSSI機能(Received Signal Strength Indicator;受信した信号の電界レベルに比例した電圧を出力する。)を用いて周波数偏差を補正するものであり、周波数偏差制御信号を変化させながらRSSI出力電圧をモニタし、RSSI出力電圧が一番高いときが周波数の偏差が一番少ない状態とされるので、周波数偏差制御信号を変化させた中でRSSI出力電圧が一番高いときの電圧に固定されるものである。
周波数の偏差を検出する手段の他の例としては、ディジタルデータ信号受信の場合において、受信信号の中の同期信号等の特定のパターンのところで、無線機の内部でパターンのビット誤り率を監視するものであって、周波数偏差制御信号を変化させながら誤り率を監視して、誤り率が一番少ないときが周波数偏差が一番少ない状態とされるので、周波数偏差制御信号を変化させた中で誤り率が一番少ないときの電圧に固定されるものである。
【0018】
【発明の効果】
以上のように、請求項1記載の発明によれば、変調をVCO及びVC−TCXOの両方で行うので、低域から高域まで偏差の少ない平坦な周波数特性を持ち、これによりアナログ音声信号及びディタルデータ信号両方での高精度な周波数変調回路を有したことになる。このような回路を用いれば、各演算増幅器を通して基準電圧をVC−TCXOへ供給され、VC−TCXOの周波数を制御され、これが送信搬送波周波数及び受信局部発振周波数の周波数偏差を制御し、基地局の偏差を有した送信周波数に、受信周波数を整合させるような微調整の周波数補正効果を有するので、高精度の周波数を条件とするようなディジタルデータ伝送に適した携帯型無線機としたものとして極めて効果大なるものである。
【図面の簡単な説明】
【図1】本発明に係る携帯型無線機の変調回路を例としたブロック図である。
【図2】従来の携帯型無線機の変調回路を表したブロック図である。
【図3】従来の携帯型無線機の変調回路の変調特性を表した特性図である。
【符号の説明】
1 VCO
2 PLL−IC
3 VC−TCXO
4、5 演算増幅器(I、II)
6、7 制御回路(I、II)
8 周波数調整回路
[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a circuit of a voltage-controlled temperature-compensated crystal oscillator that can control the oscillation frequency of a reference oscillator of a portable radio device.
[0002]
[Prior art]
Conventional radio equipment inputs modulation signals to both the VCO and the reference oscillator, compensates for the low frequency components attenuated by the modulation of the VCO with the modulation of the reference oscillator, and keeps the modulation frequency characteristics constant from low to high. Thus, even in the case of a rectangular waveform having a low-frequency component and a high-frequency component, distortion generated in the modulation waveform is suppressed (see, for example, Patent Document 1).
[0003]
[Patent Document 1]
JP-A-11-284524 (2nd page, 2nd column, FIG. 7)
[0004]
FIG. 2 is an explanatory diagram used in the past, and is a voltage-controlled oscillator (hereinafter referred to as “VCO”; Voltage Controlled Oscillator) 1 and a PLL integrated circuit (hereinafter referred to as “PLL-IC”; Phase Locked Loop IC). ) 2, a voltage-controlled temperature-compensated crystal oscillator (hereinafter referred to as “VC-TCXO”; Voltage Controlled-Temperature Compensated Crystal Oscillator) 3, and a control circuit (I) 6 and a frequency adjustment circuit 8.
When this circuit is used as an FM modulation type transmission modulation circuit, an analog audio signal or digital data signal input as a modulation signal (signal <1>) is subjected to signal <4 after its DC component is cut by a capacitor. Is input from the point b to the VCO 1 and from the point (d) to the VC-TCXO 3. In the VC-TCXO3, the modulation signal is modulated in the low frequency band, and the output signal <3> is input to the PLL-IC2 from the point a, and the signal <2> is output from the PLL-IC2. Superimposed.
Control as a frequency synthesizer is performed in a looped circuit of the VCO 1, a control circuit (I) 6 to which an automatic or manual channel control signal is input from the outside, and the PLL-IC 2. (Signal <6>) is obtained. At the same time, the modulation signal <4> is input to the VCO 1 at the point b, and the VCO 1 performs modulation in the high frequency band of the modulation signal input (signal <1>).
[0005]
The modulation signal input (signal (1)) is mainly a signal band of 300 Hz to 3 KHz in the case of communication with an analog audio signal, that is, a high frequency modulation frequency band of 300 Hz or more. In the case of a digital data signal, for example, It becomes a binary rectangular wave of 4800 bps or 9600 bps, and a modulation frequency band from a low frequency of 300 Hz or lower to a high frequency of 300 Hz or higher is required, and one of these two signals is input to the modulation signal (1) Is entered as As described above, a wideband modulated transmission carrier (signal (6)) having both high and low frequency bands can be obtained by a set of circuits of VCO1 and VC-TCXO3.
[0006]
FIG. 3 shows a modulation characteristic diagram of the conventional circuit of FIG. First, as a characteristic on the VCO 1 side, that is, in a case where the line of the signal (4) inputted to the VC-TCXO3 side is not connected and the signal (4) is inputted only to the VCO 1, the modulation is performed. It has a characteristic curve indicated by a point, and the modulation of the frequency band of the modulation signal of 300 Hz or higher is performed. Here, the modulation sensitivity is lower as the frequency band of the modulation signal is lower. This covers the entire band of speech and the high frequency components of digital data as modulation characteristics.
On the other hand, in the modulation on the VC-TCXO3 side, when the signal (4) line supplied to the VCO1 side is not connected and the signal (4) is input only to the VC-TCXO3, the modulation is indicated by the black circle point. This is a curve, which is modulated in the frequency band of a modulation signal of 300 Hz or less, and has a characteristic that the modulation sensitivity is lower as the frequency band of the modulation signal is higher. Here, a frequency band close to a DC component which is a low frequency component of digital data is covered as a modulation characteristic.
Therefore, a flat characteristic is obtained from a low frequency near 20 Hz to a high frequency near 5 KHz as a characteristic obtained by combining both characteristic curves. This coalescence characteristic curve has a flat characteristic from a low frequency range to a wide frequency range like a characteristic curve indicated by a black triangle point, and can cope with modulation of a digital data rate of 4800 bps to 9600 bps as well as a voice frequency band.
[0007]
Also, the operation of the transmission carrier oscillation circuit according to FIG. 2 is performed by using VC-TCXO3 as a reference oscillator and inputting the output a point (signal {circle around (3)}) to PLL-IC2 and output of PLL-IC2 (signal {circle around (2)}). The synthesizer circuit generates a frequency according to the voltage of ▼) by the VCO1, and the VCO1 generates a carrier wave (signal (6)) of the transmission signal. In this way, the PLL-IC 2 and the VCO 1 are combined, the transmission channel frequency is controlled by the channel frequency control signal from the control circuit (I) 6, and the transmission channel frequency is automatically or manually set to an arbitrary transmission channel frequency. As an example in the VHF band, the carrier wave (signal (6)) when the signal (2) is 1.0V is 136.000 MHz, and similarly the carrier wave (signal (6)) is 2.0V and the signal (2) is 2.0V. 155.000 MHz, signal (2) is 3.0 V, and the carrier wave (signal (6)) is 174.000 MHz.
2. VC-TCXO3 in the conventional circuit is a fixed reference frequency oscillator set by the frequency adjustment circuit 8, and is frequency-modulated according to the input level of the modulation signal (signal (4)). The modulation component is output in the form of a synthesized reference frequency oscillation, which is the reference frequency of the PLL-IC2. As an example, when the signal (4) input to the VC-TCXO3 is 2.5V, 19.2 MHz is output as the signal (3), and the change of the modulation signal voltage is 10 ppm / V. Have
Regarding frequency synthesis as a circuit synthesizer, first, the output frequency (carrier frequency) signal (6) of VCO1 is equal to 1 / N times the output frequency of VC-TCXO3 and 1 / M times the output frequency of VCO1. From this frequency relationship, the output frequency of VCO 1 is obtained. The values of M and N are input to the PLL-IC 2 as a channel frequency control signal from the control circuit (I) 6, and the channel frequency is set. For example, if the output frequency of VC-TCXO3 as a reference frequency oscillator is 19.2 MHz, N = 10, M = 100 and PLL-IC2 are set, and the output frequency signal {circle around (6)} of VCO1 is 192 MHz as the transmission carrier frequency. It becomes.
[0008]
In the transmission circuit, when the radio is in the transmission mode and the conventional circuit in FIG. 2 is in the reception mode, the modulation signal input (signal (1)) is in the input OFF state, and the output signal of the VCO 1 (signal (6)). ▼) is supplied to the receiving circuit as a local oscillation frequency signal of a superheterodyne receiver.
That is, the conventional circuit shown in FIG. 2 is also used as a local oscillator for receiving radio frequency. In this case, the modulation signal (signal 6) is off, and VC-TCXO3 operates as a fixed single frequency reference oscillator. Then, the output is input to the PLL-IC 2, and the PLL-IC 2 is combined with the VCO 1 and the reception channel frequency is controlled by the channel frequency control signal from the control circuit (I) 6. Set to frequency.
[0009]
[Problems to be solved by the invention]
However, in the conventional circuit, the frequency deviation of VC-TCXO is not automatically or manually controlled after the initial setting by the frequency adjustment circuit 8. Therefore, in the conventional portable wireless device, the frequency accuracy remains as much as the initial deviation of the transmission and reception frequencies or the deviation over time, and in a data transmission system that requires high frequency accuracy, VC There was a problem that it could not be used stably as a reference oscillator unless fine correction was made to the oscillation frequency of TCXO.
[0010]
An object of the present invention is to provide a portable wireless device having a circuit capable of modulating both an analog audio signal and a digital data signal, and capable of being used in a data transmission system that requires high frequency accuracy. An object of the present invention is to provide an oscillation frequency correction circuit in a radio device.
[0011]
[Means for Solving the Problems]
The oscillation frequency correction circuit in the portable radio of the present invention is a portable radio that uses a voltage-controlled crystal oscillator as a reference oscillator.
A first control circuit for channel selection is provided in the phase control loop of the voltage controlled oscillator controlled by the P LL-IC so as to have a frequency synthesizer function, and the oscillation frequency of the voltage controlled oscillator can be controlled by a modulation input signal. A voltage controlled oscillation circuit configured to be modulated at a high frequency in a frequency band;
Oscillation frequency of the crystal oscillator comprises a crystal oscillator, the modulation input signal modulating low frequency is made is a voltage controlled given as a reference frequency before Symbol P LL-IC oscillation output which is the modulation in the audio frequency band by Crystal oscillator,
A second control circuit that outputs a stepped frequency deviation control DC signal by an automatic or manual control input that is an RSSI output voltage of a received signal or a bit error rate of received data ;
An operational amplifier circuit in which the low frequency modulation and the frequency deviation control are simultaneously performed by superimposing the frequency deviation control DC signal as a differential input of the modulation input signal;
The reference oscillation frequency of the voltage controlled crystal oscillator is corrected by adjusting the frequency deviation control DC signal, whereby the oscillation frequency of the voltage controlled oscillator is finely adjusted to a predetermined channel oscillation frequency ,
Solved the problems by providing what the none of the analog audio signals and digital data signals of the audio frequency band is configured so that to said modulated input signal.
[0012]
[Action]
The operation of the present invention is such that the oscillation frequency of the VC-TCXO is finely controlled by the frequency deviation control signal output from the second control circuit.
[0013]
DETAILED DESCRIPTION OF THE INVENTION
As shown in FIG. 1, the embodiment of the present invention includes VCO1, PLL-IC2, VC-TCXO3, operational amplifier (I) 4, operational amplifier (II) 5, control circuit (I) 6, control circuit (II ) 7.
As an FM modulation transmission circuit, first, either an analog audio transmission signal or a digital data transmission signal is input to the operational amplifier (I) 4 as a modulation signal input (signal {circle around (1)}), and its output is output. The point b of the signal {circle over (5)} is input to the VCO 1 and at the same time is input to the operational amplifier (II) 5, and the output of the operational amplifier (II) 5 is input to the VC-TCXO 3 as the signal {circle around (4)} (d). Is done.
The VCO 1 performs modulation in the high frequency band (about 300 Hz or more) by the point b of the signal (5) input to the VCO 1 from the operational amplifier (I) 4. Modulation in the low frequency band (about 300 Hz or less) is performed by the point a of the signal (4) input from the output of the operational amplifier (II) 5 to the VC-TCXO 3.
By performing the modulation of the above two bands, it is possible to perform frequency modulation from low frequencies to high frequencies in the vicinity of DC of the input modulation signal. It is possible to modulate both of the digital data signals using the band.
[0014]
Further, in the circuit configuration of FIG. 1, it also functions as a carrier circuit for a transmission frequency, and the point c of the frequency deviation control signal (signal (7)) for controlling the oscillation frequency of the reference oscillator of the radio frequency is an operational amplifier ( I) The reference voltage of 4 and the operational amplifier (II) 5 is input to both operational amplifiers. As a result, the DC voltage component at the point (d) of the signal {circle around (4)} which is the output of the operational amplifier (II) 5 becomes a voltage component as frequency deviation control.
The frequency deviation control signal is the point c of the signal (7) output from the control circuit (II) 7 and a voltage of arbitrary resolution is automatically or manually divided into 0 to 5 V in 1024 steps as the frequency deviation control signal. Output.
By changing the DC voltage, which is a frequency deviation control signal, the carrier frequency in the oscillation circuit of VC-TCXO3 and VCO1 can be finely adjusted to an arbitrary frequency automatically or manually with respect to the transmission channel frequency.
To adjust the frequency of the output frequency (signal (6)) from the VCO 1, first, the modulation signal input (signal (1)) is disconnected and both the VC-TCXO3 and VCO1 are left unmodulated. (Signal {circle over (6)}) is measured, and when there is a frequency deviation from the desired carrier frequency, the voltage of the frequency deviation control signal (signal {circle over (7)}) is step-adjusted to match the predetermined carrier frequency. .
[0015]
1 is the output of the control circuit (II) 7 because the output frequency of the VC-TCXO 3 is determined with the frequency of the specification value as the standard, as the frequency synthesis relationship of the frequency synthesizer of the inventive circuit. The voltage of the frequency deviation control signal (signal {circle around (7)}) is adjusted so that the output frequency of the VC-TCXO3 becomes a specified value frequency. For example, when the control voltage DC2.5V of the frequency deviation control signal (signal (7)), even if the oscillation frequency (signal (3)) is a specification value of 19.2 MHz, sometimes the control voltage Some devices have an oscillation frequency (signal (3)) of 19.2 MHz at 2.3 V, and other devices have an oscillation frequency (signal (3)) of 19.2 MHz at a control voltage of 2.7 V.
Therefore, the VC-TCXO3 oscillation circuit according to the present invention can be finely adjusted independently with the stepping voltage of the frequency deviation control signal (signal (7)). Usually, the input step voltage of the frequency deviation control signal (signal (7)) after being set once maintains a predetermined DC voltage.
The step voltage of the frequency deviation control signal (signal (7)) is input to the (−) side terminal by being input to the (+) side terminal of the operational amplifier (I) 4 and the operational amplifier (II) 5. The signal is synthesized by differential amplification with the modulation signal input (signal (1)). The signal (4) input to the VC-TCXO3 side is obtained by superimposing the modulation signal on the VC-TCXO3 side on the step voltage of the frequency deviation control signal (signal (7)), and the control circuit ( II) The frequency is arbitrarily controlled automatically or manually from 7. In this way, it is suitable for digital communication such as data transmission that requires high accuracy carrier frequency stability and high modulation accuracy.
[0016]
Next, the circuit configuration of FIG. 1 also functions as a local oscillation frequency generating circuit in the reception mode. In this case, the modulation signal (signal 6) is set to an input “none” state. First, the frequency deviation control signal (signal (7)) is input as a reference voltage for the operational amplifier (I) 4 and the operational amplifier (II) 5. Next, the DC voltage component of the output of the operational amplifier (II) 5 is the control voltage, and the DC of the frequency deviation control signal (signal (7)) input from the control circuit (II) 7 and the output of the operational amplifier (I) 4 is output. This is a differential amplification output with a voltage component as an input, and becomes a frequency deviation control signal having a constant DC value.
The frequency deviation control signal (signal (7)) is an output of the control circuit (II) 7 (for example, a microprocessor), and outputs an arbitrary step voltage automatically or manually while dividing 0 to 5 VDC into 1024 steps. I can do it.
By changing and adjusting the DC voltage of the frequency deviation control signal (signal (7)), the reception frequency can be automatically or manually adjusted to an arbitrary frequency.
The frequency generation principle (relationship between M value and N value) as a synthesizer by the PLL-IC 2, the VCO 1, and the control circuit (I) 6 is the same as that of transmission.
As frequency deviation control when a frequency difference occurs between the frequency of the received signal and the reception frequency set in the radio device, the frequency difference is detected by a predetermined means, and only the frequency difference is detected by the radio device. The oscillation frequency of the VC-TCXO 3 is finely adjusted by the frequency deviation control signal (signal {circle around (7)}) which is the output of the control circuit (II) 7 which can correct the reception frequency set to ## EQU3 ## The output frequency of VCO 1 can be matched with the frequency of the received signal as the local oscillation frequency.
[0017]
By receiving the transmission frequency from the base station, detecting the reception frequency deviation, and obtaining the frequency deviation control signal of a value finely adjusted to correct the deviation, the transmission and reception of the portable radio The frequency can be matched to the transmission frequency of the base station.
An example of means for detecting this frequency deviation is to correct the frequency deviation using the RSSI function (Received Signal Strength Indicator; which outputs a voltage proportional to the electric field level of the received signal) of the receiver. The RSSI output voltage is monitored while changing the frequency deviation control signal, and when the RSSI output voltage is the highest, the frequency deviation is the smallest. Therefore, the RSSI output voltage is changed while the frequency deviation control signal is changed. Is fixed at the highest voltage.
As another example of means for detecting a frequency deviation, in the case of receiving a digital data signal, the bit error rate of the pattern is monitored inside the radio at a specific pattern such as a synchronization signal in the received signal. The error rate is monitored while changing the frequency deviation control signal, and when the error rate is the smallest, the frequency deviation is the smallest. It is fixed to the voltage when the error rate is the smallest.
[0018]
【The invention's effect】
As described above, according to the invention described in claim 1, since modulation is performed by both the VCO and the VC-TCXO, it has a flat frequency characteristic with a small deviation from a low frequency to a high frequency. A high-accuracy frequency modulation circuit for both the digital data signals is provided. If such a circuit is used, a reference voltage is supplied to the VC-TCXO through each operational amplifier, and the frequency of the VC-TCXO is controlled, which controls the frequency deviation between the transmission carrier frequency and the reception local oscillation frequency, and It has a fine-tuning frequency correction effect that matches the reception frequency to the transmission frequency with deviation, so it is extremely useful as a portable radio device suitable for digital data transmission that requires high-precision frequency. The effect is great.
[Brief description of the drawings]
FIG. 1 is a block diagram illustrating an example of a modulation circuit of a portable radio device according to the present invention.
FIG. 2 is a block diagram showing a modulation circuit of a conventional portable radio device.
FIG. 3 is a characteristic diagram showing a modulation characteristic of a modulation circuit of a conventional portable radio device.
[Explanation of symbols]
1 VCO
2 PLL-IC
3 VC-TCXO
4, 5 operational amplifier (I, II)
6, 7 Control circuit (I, II)
8 Frequency adjustment circuit

Claims (1)

電圧制御形水晶発振器を基準発振器として用いる携帯型無線機において、
LL−ICにより制御される電圧制御発振器の位相制御ループ内にチャネル選択用の第1の制御回路を備えて周波数シンセサイザ機能を有せしめるとともに、該電圧制御発振器の発振周波数は変調入力信号により音声周波数帯域における高域周波数の変調がなされるように構成された電圧制御発振回路と、
水晶発振器を備え該水晶発振器の発振周波数は、前記変調入力信号により音声周波数帯域における低域周波数の変調がなされて該変調された発振出力は前記PLL−ICに基準周波数として与えられる電圧制御形水晶発振器と、
受信信号のRSSI出力電圧あるいは受信データのビット誤り率である自動又は手動の制御入力によりステップ状の周波数偏差制御DC信号を出力する第2の制御回路と、
該周波数偏差制御DC信号を前記変調入力信号の差動入力として重畳することにより前記低域周波数の変調と前記周波数偏差制御とが同時に行われる演算増幅回路とを備え、
前記周波数偏差制御DC信号の調整により前記電圧制御形水晶発振器の基準発振周波数が補正されることにより前記電圧制御発振器の発振周波数が所定のチャネル発振周波数に微調整され
前記音声周波数帯域のアナログ音声信号とディジタルデータ信号のいずれもを前記変調入力信号とするように構成された携帯型無線機における発振周波数補正回路。
In a portable radio using a voltage controlled crystal oscillator as a reference oscillator,
A first control circuit for channel selection is provided in the phase control loop of the voltage controlled oscillator controlled by the P LL-IC so as to have a frequency synthesizer function, and the oscillation frequency of the voltage controlled oscillator is controlled by a modulation input signal. A voltage controlled oscillation circuit configured to perform high-frequency modulation in a frequency band;
Oscillation frequency of the crystal oscillator comprises a crystal oscillator, the modulation input signal modulating low frequency is made is a voltage controlled given as a reference frequency before Symbol P LL-IC oscillation output which is the modulation in the audio frequency band by Crystal oscillator,
A second control circuit that outputs a stepped frequency deviation control DC signal by an automatic or manual control input that is an RSSI output voltage of a received signal or a bit error rate of received data ;
An operational amplifier circuit that simultaneously performs the modulation of the low frequency and the frequency deviation control by superimposing the frequency deviation control DC signal as a differential input of the modulation input signal;
By adjusting the frequency deviation control DC signal, the oscillation frequency of the voltage controlled oscillator is finely adjusted to a predetermined channel oscillation frequency by correcting the reference oscillation frequency of the voltage controlled crystal oscillator .
Oscillation frequency correction circuit in a portable radio apparatus of any of the analog audio signals and digital data signals of the audio frequency band are configured to the modulated input signal and to so that.
JP2003015632A 2003-01-24 2003-01-24 Oscillation frequency correction circuit for portable radio Expired - Fee Related JP3672913B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2003015632A JP3672913B2 (en) 2003-01-24 2003-01-24 Oscillation frequency correction circuit for portable radio

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2003015632A JP3672913B2 (en) 2003-01-24 2003-01-24 Oscillation frequency correction circuit for portable radio

Publications (2)

Publication Number Publication Date
JP2004229045A JP2004229045A (en) 2004-08-12
JP3672913B2 true JP3672913B2 (en) 2005-07-20

Family

ID=32903325

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2003015632A Expired - Fee Related JP3672913B2 (en) 2003-01-24 2003-01-24 Oscillation frequency correction circuit for portable radio

Country Status (1)

Country Link
JP (1) JP3672913B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012195833A (en) * 2011-03-17 2012-10-11 Yokogawa Denshikiki Co Ltd Multi-frequency oscillator

Also Published As

Publication number Publication date
JP2004229045A (en) 2004-08-12

Similar Documents

Publication Publication Date Title
US7352249B2 (en) Phase-locked loop bandwidth calibration circuit and method thereof
US7224237B2 (en) Modulator and correction method thereof
US8674771B2 (en) Fixed bandwidth LO-GEN
JPH06343166A (en) High frequency receiver
WO1992008294A1 (en) Receiver with automatic frequency control
JPH08505508A (en) Automatic frequency controller
JP2014504490A (en) Method and apparatus for reducing signal phase contamination
US20050242889A1 (en) PLL modulation circuit and polar modulation apparatus
US7248658B2 (en) Method and circuit for deriving a second clock signal from a first clock signal
US6774738B2 (en) Trimming method for a transceiver using two-point modulation
CA2118810C (en) Radio having a combined pll and afc loop and method of operating the same
JP3672913B2 (en) Oscillation frequency correction circuit for portable radio
US5557244A (en) Dual port phase and magnitude balanced synthesizer modulator and method for a transceiver
KR20070013483A (en) Automatic frequency control loop circuit
JP2005304004A (en) Pll modulation circuit and polar modulation device
JPH05211449A (en) Fm modulator circuit provided with split modulation and with channel signal route
US20090189699A1 (en) Fixed bandwidth lo-gen
JP2937865B2 (en) Wireless receiver
JPS6131647B2 (en)
JP4618554B2 (en) FSK modulation apparatus and wireless communication apparatus including the same
JP6107408B2 (en) Wireless communication device and reception frequency adjustment method
JP4692261B2 (en) Reception device and reception frequency control method
JP2699717B2 (en) Tuning device for double conversion receiver
JP2008113068A (en) Frequency adjusting method and device for radio device
JPH077921B2 (en) FM transmitter circuit

Legal Events

Date Code Title Description
A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20050120

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20050201

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20050325

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20050419

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20050420

R150 Certificate of patent or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090428

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090428

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100428

Year of fee payment: 5

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100428

Year of fee payment: 5

S111 Request for change of ownership or part of ownership

Free format text: JAPANESE INTERMEDIATE CODE: R313113

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100428

Year of fee payment: 5

R360 Written notification for declining of transfer of rights

Free format text: JAPANESE INTERMEDIATE CODE: R360

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100428

Year of fee payment: 5

R370 Written measure of declining of transfer procedure

Free format text: JAPANESE INTERMEDIATE CODE: R370

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100428

Year of fee payment: 5

S111 Request for change of ownership or part of ownership

Free format text: JAPANESE INTERMEDIATE CODE: R313113

S531 Written request for registration of change of domicile

Free format text: JAPANESE INTERMEDIATE CODE: R313531

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100428

Year of fee payment: 5

R360 Written notification for declining of transfer of rights

Free format text: JAPANESE INTERMEDIATE CODE: R360

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100428

Year of fee payment: 5

R370 Written measure of declining of transfer procedure

Free format text: JAPANESE INTERMEDIATE CODE: R370

S111 Request for change of ownership or part of ownership

Free format text: JAPANESE INTERMEDIATE CODE: R313113

S531 Written request for registration of change of domicile

Free format text: JAPANESE INTERMEDIATE CODE: R313531

S533 Written request for registration of change of name

Free format text: JAPANESE INTERMEDIATE CODE: R313533

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110428

Year of fee payment: 6

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110428

Year of fee payment: 6

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130428

Year of fee payment: 8

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130428

Year of fee payment: 8

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20140428

Year of fee payment: 9

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

LAPS Cancellation because of no payment of annual fees