JP3658249B2 - Semiconductor layer manufacturing method, photovoltaic device manufacturing method, and semiconductor layer manufacturing apparatus - Google Patents

Description

【０１０２】
このような膜堆積を帯状基板の長さ４００ｍにわたって連続的に行った後、各チャンバーヘの放電電力の供給と、原料ガスの導入と、帯状基板の加熱とを停止し、各室内を十分にパージし、帯状基板と装置内部を充分冷却した後、装置を大気開放し、半導体積層膜が形成されて巻き取り室のボビンに巻きとられた帯状基板を取り出した。
【０１０３】
更に、取り出した帯状基板を連続モジュール化装置によって連続的に加工し、本発明の装置で形成した半導体積層膜の上に、透明電極として全面厚さ６０ｎｍのＩＴＯ薄膜を形成し、集電電極として一定間隔に細線状のＡｇ電極を形成し、基板を切断して、幅３５ｃｍ、基板移動方向長さ５ｃｍの長方形のｎｉｐ構造の太陽電池モジュールを作成した。
【０１０４】
そして、作成した太陽電池モジュールについて、ＡＭ１．５（１００ｍＷ／ｃｍ²）の擬似太陽光照射下にて特性評価を行った。
【０１０５】
特性評価の結果、作成した太陽電池モジュールの平均光電変換効率は、チャンバー５０４における直流バイアス電圧の投入を行なわない（バイアス電極除去）以外は同様にして作成した太陽電池モジュール（比較モジュール）を１．０とした比較で光電変換効率は１．３倍に向上していた。また、短絡による不良発生率は約２％と低く、バイアス電力の投入なしの時と変わらなかった。
【０１０６】
（比較例１−１）
成膜室５０４の直流電圧を１０Ｖにした以外は実施例１と同様にして、ステンレス基板上に３層のシリコン系非単結晶膜からなるｎｉｐ構造の半導体層を有する太陽電池を製造した。バイアス電極に流れる直流電流は０．０４Ａで、バイアス電流密度は０．０５Ａ／ｍ²であった。
【０１０７】
実施例１と同様にして太陽電池モジュールを連続的に作成し、特性評価を行ったところ、比較モジュールに比べ、光電変換効率は１．０倍と向上が見られなかった。
【０１０８】
（比較例１−２）
成膜室５０４の直流電圧を５００Ｖにした以外は実施例１と同様にして、ステンレス基板上に３層のシリコン系非単結晶膜からなるｎｉｐ構造の半導体層を有する太陽電池を製造した。バイアス電極に流れる直流電流は１２Ａで、バイアス電流密度は１５Ａ／ｍ²であった。
【０１０９】
実施例１と同様にして太陽電池モジュールを連続的に作成し、特性評価を行ったところ、光電変換効率は短絡による不良が無いモジュールでは、比較モジュールに比べ１．３倍に向上していたが、モジュールには所々に微小なスパーク跡があり、短絡による不良発生率が約６０％と極めて高かった。
【０１１０】
（実施例２）
成膜室５０４における直流電力の投入方法を図２に示すように、ＶＨＦ放電電極から同時に投入を行なうようにした以外は実施例１と同様にして、ステンレス基板上に３層のシリコン系非単結晶膜からなるｎｉｐ構造の半導体層を有する太陽電池を製造した。
【０１１１】
尚、電極に流れる直流電流は３．２Ａで、バイアス電流密度は３．２／０．８＝４．０Ａ／ｍ²であった。
【０１１２】
実施例１と同様にして太陽電池モジュールを連続的に作成し、特性評価を行ったところ、比較モジュールに比べ、光電変換効率は１．３倍に向上していた。
【０１１３】
また、短絡による不良発生率は約２％と低く、バイアス投入なしの時と変わらなかった。
【０１１４】
（実施例３）
成膜室５０４におけるバイアス電力をＲＦ周波数の高周波電力とし、投入方法を図３に示すようにした以外は実施例１と同様にして、ステンレス基板上に３層のシリコン系非単結晶膜からなるｎｉｐ構造の半導体層を有する太陽電池を製造した。表２に各層の条件を示す。
【０１１５】
尚、バイアス電極に流れる直流電流は２．４Ａで、バイアス電流密度は２．４／０．８＝３．０Ａ／ｍ²であった。
【０１１６】
【表２】

【０１１７】
実施例１と同様にして太陽電池モジュールを連続的に作成し、特性評価を行ったところ、比較モジュールに比べ、光電変換効率は１．２５倍に向上していた。
【０１１８】
また、短絡による不良発生率は約１．５％と低く、バイアス投入なしのときと変わらなかった。
【０１１９】
（実施例４）
成膜室５０４における堆積膜を非晶質シリコンゲルマニウムに変え、投入する直流電圧を２００Ｖとした以外は実施例１と同様にして、ステンレス基板上に３層のシリコン系非単結晶膜からなるｎｉｐ構造の半導体層を有する太陽電池を製造した。表３に各層の条件を示す。
【０１２０】
尚、バイアス電極に流れる直流電流は２．８Ａで、バイアス電流密度は２．８／０．８＝３．５Ａ／ｍ²であった。
【０１２１】
【表３】

【０１２２】
実施例１と同様にして太陽電池モジュールを連続的に作成し、特性評価を行ったところ、比較モジュールに比べ、光電変換効率は１．３５倍に向上していた。
【０１２３】
また、短絡による不良発生率は約２．０％と低く、バイアス投入なしのときと変わらなかった。
【０１２４】
（実施例５）
成膜室５０４における放電周波数を５００ＭＨｚに変えた以外は実施例４と同様にして、ステンレス基板上に３層のシリコン系非単結晶膜からなるｎｉｐ構造の半導体層を有する太陽電池を製造した。
【０１２５】
尚、バイアス電極に流れる直流電流は２．８Ａで、バイアス電流密度は２．８／０．８＝３．５Ａ／ｍ²であった。
【０１２６】
実施例１と同様にして太陽電池モジュールを連続的に作成し、特性評価を行ったところ、比較モジュールに比べ、光電変換効率は１．３０倍に向上していた。
【０１２７】
また、短絡による不良発生率は約２．５％と低く、バイアス投入なしのときと変わらなかった。
【０１２８】
（実施例６）
実施例６では、図６に示した構成の本発明の半導体積層膜の製造装置を用いて、ステンレス鋼製の基板上に６層のシリコン系非単結晶膜からなるｎｉｐｎｉｐ構造の半導体層を有する２層タンデム型太陽電池を製造した。
【０１２９】
図６に示した装置において、先ず、長さ５００ｍ、幅３５６ｍｍ、厚さ０．１５ｍｍのステンレス鋼製基板６０１（ＳＵＳ４３０−ＢＡ）を、巻き出し室６０２のコイル状に巻かれたボビンからガスゲート６１０を介してグロー放電室６０３、６０４、６０５、６０６、６０７、６０８を通し、巻き取り室６０９のボビンにコイル状に巻き取られるようにセットし、不図示の張力印加機構により弛みなく張られるようにした。
【０１３０】
次に、各真空容器６０２乃至６０９内を各室の排気手段により１Ｐａ以下に一度真空排気した。
【０１３１】
引き続き排気を行いながら、各プラズマ放電室の不図示のガス供給手段に接続されたガス導入管６１２からＨｅガスを各１００ｓｃｃｍ導入し、排気管６１３の不図示の排気弁の開度を調整することで各チャンバー（真空容器）の内圧を１００Ｐａに維持した。
【０１３２】
この状態で、巻き取り室６０９のボビンに接続された不図示の基板搬送機構により、帯状基板が毎分６００ｍｍの移動速度で連続的に移動するようにした。
【０１３３】
次いで、各プラズマ放電室に設けた基板加熱ヒータ６１５および不図示の基板温度モニタにより、各プラズマ放電室内で移動する帯状基板６０１が所定の温度になるように加熱制御した。
【０１３４】
各グロー放電室内で基板６０１が均一に加熱されたら、引き続き加熱しつつ、Ｈｅガスの導入を停止し、ガス導入管６１２へのガスをＳｉＨ₄を含む原料ガスに切り替えた。
【０１３５】
また、各ガスゲート６１０には、不図示のガス供給手段に接続されたゲートガス導入管６１１から原料ガス分離用のガスとしてＨ₂を各１０００ｓｃｃｍ導入した。
【０１３６】
次に、各プラズマ放電室の放電電極６１４に高周波電源から高周波電力を供給し、各グロー放電室にグロー放電を発生させ、原料ガスをプラズマ分解して、連続的に移動する帯状基板６０１上にシリコン系非単結晶膜の積層膜を堆積させ、シリコン系非単結晶半導体を有する２層タンデム構造の太陽電池の半導体膜を形成した。
【０１３７】
尚、プラズマ放電室６０４、６０７の放電周波数は１０５ＭＨｚで、放電電極は棒状、プラズマ放電室６０３、６０５、６０６、６０８の放電周波数は１３．５６ＭＨｚで放電電極は平板状であった。
【０１３８】
その際、プラズマ放電室６０４のバイアス電極にはアース電位の帯状基板に対し正の向きに直流電圧３００Ｖを印加し、プラズマ放電室６０７のバイアス電極にはアース電位の帯状基板に対し正の向きに直流電圧１００Ｖを印加した。プラズマ放電室６０４のバイアス電極に流れる電流の直流成分は７．５Ａであり、成膜室の内面積は約０．８ｍ²であった。従って、バイアス電流密度は９．３８Ａ／ｍ²であった。また、プラズマ放電室６０７のバイアス電極に流れる電流の直流成分は３．０Ａであり、成膜室の内面積は約０．８ｍ²であった。従ってバイアス電流密度は３．７５Ａ／ｍ²であった。
【０１３９】
各プラズマ放電室の成膜条件を表４に示す。
【０１４０】
【表４】

【０１４１】
このような膜堆積を帯状基板の長さ４００ｍにわたって連続的に行った後、各プラズマ放電室への放電電力の供給と、原料ガスの導入と、帯状基板の加熱とを停止し、各室内を充分にパージし、帯状基板と装置内部とを充分に冷却した後、製造装置を大気開放し、半導体積層膜が形成されて巻き取り室のボビンに巻きとられた帯状基板を取り出した。
【０１４２】
更に、取り出した帯状基板を連続モジュール化装置によって連続的に加工し、本発明の製造装置で形成した半導体積層膜の上に、透明電極として全面に６０ｎｍのＩＴＯ薄膜を形成し、集電電極として一定間隔に細線状のＡｇ電極を形成し、基板を切断して、３５ｃｍ角のｎｉｐｎｉｐ構造の半導体層を有する２層タンデム型太陽電池モジュールを連続的に作成した。
【０１４３】
そして、作成した太陽電池モジュールについて、ＡＭ１．５（１００ｍＷ／ｃｍ²）の擬似太陽光照射下にて特性評価を行った。
【０１４４】
特性評価の結果、作成した太陽電池モジュールの平均光電変換効率は、放電室６０４、６０７にバイアス電圧を印加しなかった場合の太陽電池モジュールの平均光電変換効率を１とした比較で１．４倍、放電室６０４、６０７共に１００Ｖを印加した場合の１．２倍、放電室６０４、６０７共に３００Ｖを印加した場合の１．２倍となっており、２つの放電室に異なるバイアス電圧を印加することによって、製造される光電変換効率が向上することが確認された。
【０１４５】
（実施例７）
ＶＨＦ周波数の放電室におけるバイアス電圧印加方法を高周波放電電極に直流電圧を重畳印加するようにした以外は、実施例６と同様にして、３５ｃｍ角のｎｉｐｎｉｐ構造の半導体層を有する２層タンデム型太陽電池モジュールを連続的に作成した。
【０１４６】
図７は、本実施例で用いた本発明の半導体積層膜の製造装置の模式図であり、図７中７０１〜７１７は図６の６０１〜６１７に対応しており、説明を省略する。
【０１４７】
図７の装置ではＶＨＦ周波数の放電室７０４、７０７にバイアス電極６１６がなく、高周波放電電極７１４にチョークコイル７１６を介して直流電圧が印加されるようになっている。放電室７０４、７０７の電極に流れる電流はそれぞれ８．０Ａ，３．２Ａであり、電流密度はそれぞれ１０Ａ／ｍ²，４．０Ａ／ｍ²であった。
【０１４８】
また、ＶＨＦ高周波電源は、コンデンサ７１８を介して高周波放電電極７１４に接続されている。
【０１４９】
そして、作成した太陽電池モジュールについて、ＡＭ１．５（１００ｍＷ／ｃｍ²）の擬似太陽光照射下にて特性評価を行った。
【０１５０】
特性評価の結果、作成した太陽電池モジュールの平均光電変換効率は、放電室７０４、７０７にバイアス電圧を印加しなかった場合の太陽電池モジュールの平均光電変換効率を１とした比較で１．４倍、放電室７０４、７０７共に１００Ｖを印加した場合の１．２倍、放電室７０４、７０７共に３００Ｖを印加した場合の１．２倍となっており、このバイアス電圧印加方法においても、２つの放電室に異なるバイアス電圧を印加することによって、製造される光電変換効率が向上することが確認された。
【０１５１】
（実施例８）
放電室６０４、６０７における放電周波数を３０ＭＨｚに変えた以外は、実施例６と同様にして、３５ｃｍ角のｎｉｐｎｉｐ構造の半導体層を有する２層タンデム型太陽電池モジュールを連続的に作成した。
【０１５２】
そして、作成した太陽電池モジュールについて、ＡＭ１．５（１００ｍＷ／ｃｍ²）の擬似太陽光照射下にて特性評価を行った。
【０１５３】
特性評価の結果、作成した太陽電池モジュールの平均光電変換効率は、放電室６０４、６０７にバイアス電圧を印加しなかった場合の太陽電池モジュールの平均光電変換効率を１とした比較で１．３倍、放電室６０４、６０７共に１００Ｖを印加した場合の１．１５倍、放電室６０４、６０７共に３００Ｖを印加した場合の１．１５倍となっており、このバイアス電圧印加方法においても、２つの放電室に異なるバイアス電圧を印加することによって、製造される光電変換効率が向上することが確認された。
【０１５４】
（実施例９）
放電室６０４、６０７における放電周波数を４５０ＭＨｚに変えた以外は、実施例６と同様にして、３５ｃｍ角のｎｉｐｎｉｐ構造の半導体層を有する２層タンデム型太陽電池モジュールを連続的に作成した。
【０１５５】
そして、作成した太陽電池モジュールについて、ＡＭ１．５（１００ｍＷ／ｃｍ²）の擬似太陽光照射下にて特性評価を行った。
【０１５６】
特性評価の結果、作成した太陽電池モジュールの平均光電変換効率は、放電室６０４、６０７にバイアス電圧を印加しなかった場合の太陽電池モジュールの平均光電変換効率を１とした比較で１．５倍、放電室６０４、６０７共に１００Ｖを印加した場合の１．３倍、放電室６０４、６０７共に３００Ｖを印加した場合の１．３倍となっており、このバイアス電圧印加方法においても、２つの放電室に異なるバイアス電圧を印加することによって、製造される光電変換効率が向上することが確認された。
【０１５７】
【発明の効果】
以上、説明したように、本発明によれば、プラズマＣＶＤ法によるシリコン系非単結晶半導体の形成方法において、高い成膜速度が得られるＶＨＦ周波数のプラズマＣＶＤ法を大面積への膜堆積に適用しようとした場合の、高周波による電界とともに適度な直流電界を印加することが必要でスパークやチャージアップによる堆積膜の不良発生を防ぎつつ良好なバイアス効果を得るためのバイアス電力の投入量の調整が難しいという問題を解決し、適正なバイアス電力量を容易に設定することができるようにして、大面積に良質のシリコン系非単結晶半導体膜を高速で堆積することができる。
【０１５８】
本発明の方法は、光起電力素子のｉ型層に適用すると効果的である。
【図面の簡単な説明】
【図１】本発明に係る半導体層の製造装置の一例を示す模式的な断面図である。
【図２】本発明に係る半導体層の製造装置の他の例を示す模式的な断面図である。
【図３】本発明に係る半導体層の製造装置の他の例を示す模式的な断面図である。
【図４】直流バイアス電流密度と光起電力素子の特性との関係を示すグラフである。
【図５】本発明の実施例で用いた製造装置を示す模式的な断面図である。
【図６】本発明の製造装置の一態様であるロール・ツー・ロール方式の製造装置の一例を示す模式的な断面図である。
【図７】本発明の製造装置の一態様であるロール・ツー・ロール方式の製造装置の他の例を示す模式的な断面図である。
【符号の説明】
１０１、２０１、３０１ 真空容器
１０２、２０２、３０２ 成膜室
１０３、２０３、３０３ ガス導入管
１０４、２０４、３０４ 排気管
１０５、２０５、３０５ ＶＨＦ周波数の高周波電源
１０６、２０６、３０６ 棒状電極
１０７、２０７、３０７ 基板
１０８、２０８、３０８ 基板移動方向
１０９、２０９、３０９ ヒーター
１１０、２１０ 直流電源
１１１、２１１、３１１ 電流計
１１２、２１２、３１２ チョークコイル
１１３、３１３ バイアス電源
３１４ ＲＦ周波数の高周波電源
３１５ ブロッキングコンデンサ
５０１ 帯状基板
５０２ 巻き出し室
５０３、５０４、５０５ 成膜室（チャンバー）
５０６ 巻き取り室
５０７ ガスゲート
５０８ ゲートガス導入管
５０９ 原料ガス導入管
５１０ 排気管
５１１ 平板放電電極
５１２ 棒状放電電極
５１３ 基板加熱ヒーター
５１４ バイアス電極
６０１ 帯状基板
６０２ 巻き出し室
６０３、６０４、６０５、６０６、６０７、６０８ グロー放電室
６０９ 巻き取り室
６１０ ガスゲート
６１１ ゲートガス導入管
６１２ 原料ガス導入管
６１３ 排気管
６１４ 高周波電極
６１５ 基板加熱ヒータ
６１６ バイアス電極
６１７ 直流電源
７０１ 帯状基板
７０２ 巻き出し室
７０３、７０４、７０５、７０６、７０７、７０８ グロー放電室
７０９ 巻き取り室
７１０ ガスゲート
７１１ ゲートガス導入管
７１２ 原料ガス導入管
７１３ 排気管
７１４ 高周波電極
７１５ 基板加熱ヒータ
７１６ チョークコイル
７１７ 直流電源
７１８ コンデンサ[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method for manufacturing a semiconductor layer on a substrate and an apparatus for manufacturing the semiconductor layer, and more particularly to amorphous silicon and amorphous used for solar cells, photoconductive drums for copying machines, image sensors for facsimiles, thin film transistors for liquid crystal displays, and the like. The present invention relates to a method and an apparatus for manufacturing a non-single-crystal silicon-based semiconductor layer such as silicon germanium, amorphous silicon carbide, and microcrystalline silicon. The present invention also relates to a photovoltaic device manufacturing method and a photovoltaic device manufacturing apparatus using such a manufacturing method.
[0002]
[Prior art]
With amorphous silicon, a semiconductor film having a large area can be formed by a plasma CVD method, and a semiconductor device having a large area can be formed relatively easily as compared with crystalline silicon or polycrystalline silicon.
[0003]
For this reason, amorphous silicon films are often used for semiconductor devices that require a large area, specifically, solar cells, photoconductor drums for copying machines, image sensors for facsimiles, thin film transistors for liquid crystal displays, and the like.
[0004]
These devices are larger in area of one device than devices made of crystal semiconductors such as LSI and CCD. For example, in the case of a solar cell, if the conversion efficiency is 10%, it is about 3 kW to cover the power of a general household. In order to obtain this output, an area of about 30 square meters is required per household, and a single solar cell element is considerably large.
[0005]
In order to form an amorphous silicon film, SiH is generally used. _Four And Si ₂ H ₆ The material gas containing Si atoms such as is decomposed by a high frequency discharge into a plasma state, and a plasma CVD method is used in which a film is formed on a substrate placed in the plasma.
[0006]
When an amorphous silicon film is formed by plasma CVD, a high frequency having an RF frequency (near 13.56 MHz) has been generally used.
[0007]
On the other hand, in recent years, plasma CVD using a VHF frequency has attracted attention.
[0008]
For example, in the Amorphous Silicon Technology 1992 p15-p26 (Materials Research Society Symposium Processing Volumes 258), a high-density plasma can be obtained by increasing the discharge frequency from RF of 13.56 MHz to VHF frequency. It is reported that a good deposited film can be formed at high speed.
[0009]
US Pat. No. 4,406,765 discloses a high-frequency plasma CVD method in which a direct current electric field is applied. It is said that a high-quality amorphous semiconductor can be obtained by applying an appropriate DC electric field together with an electric field due to a high frequency in the plasma CVD method.
[0010]
However, when the plasma CVD method using the VHF frequency capable of forming a deposited film at a high speed as described above is applied to film deposition over a large area, the following problems occur.
[0011]
That is, when a large area flat plate discharge electrode generally used at an RF frequency is used in order to generate a uniform discharge over a large area, impedance is difficult to obtain at the VHF frequency, and uniform plasma can be obtained on the discharge electrode. Have difficulty.
[0012]
In addition, although the impedance matches if a rod-shaped or radial antenna is used, the area ratio between the discharge electrode and the counter electrode, which was approximately 1 on the parallel plate, becomes extremely small in the area on the discharge electrode side, and the balance of the area is lost. If the parallel plate has a large area, the absolute value of the self-bias of the discharge electrode, which should become smaller as the frequency increases, increases conversely, and the discharge electrode generates a large negative self-bias voltage. In this case, since the area of the discharge electrode is small, a large-area substrate cannot be placed thereon, and a large positive voltage is applied to the substrate with respect to the discharge electrode.
[0013]
However, as disclosed in the aforementioned U.S. Pat. No. 4,406,765, in order to obtain a high-quality amorphous semiconductor in the plasma CVD method, an appropriate DC electric field is applied together with an electric field due to a high frequency. It is important to adjust the amount of bias power input to properly control the DC electric field without causing abnormal discharge such as spark in the discharge chamber or charging up the deposited film surface to cause dielectric breakdown. It was difficult.
[0014]
In addition to the above-described method of applying a DC voltage, a method of applying a high-frequency bias power separately from the high-frequency power for gas discharge decomposition is known for controlling the DC electric field. Even in this case, when a rod-shaped or radial antenna is used, abnormal discharge such as sparks occurs in the discharge chamber, or the deposited film surface is charged up and causes dielectric breakdown. Therefore, it is difficult to adjust the input amount of bias power for appropriately controlling the DC electric field.
[0015]
Further, as a continuous production apparatus for amorphous silicon semiconductor devices, a continuous plasma CVD apparatus employing a roll-to-roll method has been disclosed in US Pat. No. 4,400,409. .
[0016]
According to this apparatus, a plurality of glow discharge chambers are provided, and each of the glow discharge chambers is arranged along a path through which a sufficiently long strip-shaped substrate having a desired width is sequentially passed, and is required in each of the glow discharge chambers. A large-area device having a semiconductor junction can be continuously formed by continuously transporting the substrate in the longitudinal direction while depositing and forming a conductive semiconductor film.
[0017]
If a roll-to-roll type continuous plasma CVD apparatus is used in this way, devices can be manufactured continuously for a long time without stopping the manufacturing apparatus, so that high productivity can be obtained.
[0018]
However, when a DC electric field (DC electric field) is applied to the plasma by this roll-to-roll type plasma CVD method, there is a problem similar to that described above, particularly at the VHF frequency.
[0019]
In the roll-to-roll system, there are a plurality of discharge chambers for forming a deposited film. However, since the substrates are continuous and common, and generally conductive, the above-mentioned US Pat. No. 4,406,765 is disclosed. In the method of applying a DC voltage to the substrate side as disclosed in the above, it is not possible to apply different DC voltages to a plurality of discharge chambers, and appropriate methods according to the type of deposited film and discharge conditions in each discharge chamber. There was a problem that the bias voltage value could not be set.
[0020]
[Problems to be solved by the invention]
An object of the present invention is to solve the above problem by applying a high-frequency electric field in the above-described semiconductor layer formation method when applying the VHF frequency plasma CVD method capable of obtaining a high film formation rate to film deposition of a large area. In addition, it is necessary to apply an appropriate DC electric field and solve the problem that it is difficult to adjust the amount of bias power input to obtain a good bias effect while preventing defects in the deposited film due to spark and charge-up. It is an object of the present invention to provide a method and apparatus for depositing a high-quality semiconductor layer in a large area at high speed so that a large amount of bias power can be easily set.
[0022]
[Means for Solving the Problems]
Therefore, the present invention introduces a source gas into the discharge chamber, In the discharge chamber space In the method for manufacturing a semiconductor layer, the raw material gas is discharged and decomposed by applying high-frequency power, and a semiconductor layer is formed on a substrate in the discharge chamber.
As the high frequency power, at least high frequency power of VHF frequency is input,
Said discharge chamber space In addition, a bias power composed of direct-current power and / or high-frequency power of the RF frequency is input together with the high-frequency power of the VHF frequency,
The direct current component of the current flowing through the electrode to which the bias power is input is 0.1 A / m in terms of the current density with respect to the area of the inner wall of the discharge chamber. ² -10 A / m ² A method for manufacturing a semiconductor layer is provided, which is characterized in that
[0024]
Furthermore, the present invention introduces a source gas into the discharge chamber, In the discharge chamber space In the method for manufacturing a photovoltaic device, the method includes at least a step of discharging and decomposing the source gas by applying high-frequency power and forming an i-type semiconductor layer on a substrate in the discharge chamber
In the step of forming the i-type semiconductor layer, as the high-frequency power, at least high-frequency power having a VHF frequency is input,
Said discharge chamber space In addition, a bias power composed of direct-current power and / or high-frequency power of the RF frequency is input together with the high-frequency power of the VHF frequency,
The direct current component of the current flowing through the electrode to which the bias power is input is 0.1 A / m in terms of the current density with respect to the area of the inner wall of the discharge chamber. ² -10 A / m ² A method for manufacturing a photovoltaic device is provided, which is characterized in that
[0027]
In each of the above manufacturing methods, it is preferable to use a source gas containing molecules containing silicon atoms as the source gas, and form a silicon-based non-single-crystal semiconductor layer on the substrate.
[0028]
The substrate and the inner wall surface of the discharge chamber are preferably set to ground potential.
[0029]
The bias power may be applied to an electrode provided independently of the electrode that inputs the high frequency power of the VHF frequency, or the bias power may be input to the electrode that inputs the high frequency power of the VHF frequency. preferable. As the bias power, DC power is preferably used.
[0030]
The semiconductor layer is preferably formed by a plasma CVD method.
[0031]
Moreover, it is preferable to use a strip-like and / or conductive substrate as the substrate.
[0032]
The substrate is preferably a part of the inner wall of the discharge chamber.
[0033]
Furthermore, the present invention introduces a source gas into the discharge chamber, In the discharge chamber space In the semiconductor layer manufacturing apparatus for discharging and decomposing the source gas by supplying high-frequency power, and forming a semiconductor layer on the substrate in the discharge chamber,
Means for supplying at least high frequency power of VHF frequency as the high frequency power;
Said discharge chamber space Means for supplying a bias power consisting of DC power and / or high-frequency power of RF frequency;
The direct current component of the current flowing through the electrode to which the bias power is input is 0.1 A / m in terms of the current density with respect to the area of the inner wall of the discharge chamber. ² -10 A / m ² And an apparatus for controlling the semiconductor layer so as to fall within the above range.
[0035]
In these apparatuses, it is preferable that the means for supplying high-frequency power having the VHF frequency is a discharge electrode and a high-frequency power source having a VHF frequency connected to the discharge electrode. The means for supplying the bias power is a bias electrode provided separately from the discharge electrode and a power source connected to the bias electrode, or the means for supplying the bias power is connected to the discharge electrode. A power supply is preferred.
[0036]
In the case where a DC power source is connected to the discharge electrode as a means for supplying the bias power, it is preferable to use a high-frequency power cutoff means. In that case, it is preferable that the high-frequency power source is connected to the discharge electrode through a DC power cut-off means.
[0037]
In the present invention, in the formation of the semiconductor layer by the high-frequency plasma CVD method, first, a high-density plasma can be formed by using high-frequency power of VHF frequency as high-frequency power for decomposing the source gas, and a high deposition rate. can get.
[0038]
Furthermore, at least one of DC power and RF power is applied as bias power simultaneously with VHF power in the film forming chamber (discharge chamber) to improve the film quality. At that time, the DC component of the current flowing through the bias electrode is measured. Then, the application state of bias power to the film formation chamber is monitored, and the direct current component of the current flowing through the bias electrode is 0.1 to 10 A / m in terms of current density with respect to the area of the inner wall of the film formation chamber. ² By adjusting the input electric energy so that it falls within the range, the silicon non-single crystal semiconductor film is set to an appropriate bias electric energy that does not cause defects due to sparks or charge-up, and provides a sufficient bias effect. can do.
[0039]
FIG. 4 shows a solar cell module made of non-single-crystal silicon by applying the method of the present invention to the formation of an i-type layer of a solar cell having a semiconductor layer having a nip structure by the method shown in the examples described later. The result when manufactured on a stainless steel substrate is shown.
[0040]
FIG. 4A is a graph showing the relationship between the photoelectric conversion efficiency of the manufactured solar cell module and the bias current density with respect to the film formation chamber wall area of the DC bias power input to the film formation chamber. From this, the bias current density is about 0.1 A / m ² It can be seen that good device characteristics can be obtained under the above conditions.
[0041]
On the other hand, FIG. 4B shows the relationship between the defect occurrence rate due to the short circuit of the i-type layer of the manufactured solar cell module and the bias current density with respect to the wall area of the film formation chamber of the DC bias power input to the film formation chamber. It is a graph. From this, the bias current density is about 10 A / m ² It can be seen that short-circuit failure occurs suddenly under the above conditions.
[0042]
At this time, the inner area of the film forming chamber is 0.8 m. ² The VHF frequency was 100 MHz, and the direct current was controlled by adjusting the applied voltage.
[0043]
Further, the present inventor changed the bias power to be applied to a high frequency (13.56 MHz) and correlated the direct current density of the current flowing through the bias electrode with the conversion efficiency of the solar cell and the short-circuit occurrence rate. A similar investigation was made, but the result was the same, about 0.1 A / m. ² Good device characteristics can be obtained under the above conditions, about 10 A / m. ² Under these conditions, a short circuit failure occurred suddenly.
[0044]
Furthermore, the film forming chamber area is 0.1 to 3 m. ² In the range of VHF, the VHF frequency was changed in the range of 20 MHz to 500 MHz and the same thing was done, but the result was the same, about 0.1 A / m ² Good device characteristics can be obtained under the above conditions, about 10 A / m. ² Under these conditions, a short circuit failure occurred suddenly.
[0045]
As described above, when the VHF frequency is adopted, the impedance matches if a rod-like or radial antenna electrode is used instead of the flat discharge electrode, but the absolute value of the self-bias of the discharge electrode increases conversely, and the discharge electrode side A negative undesired DC electric field is formed.
[0046]
Therefore, when the VHF frequency plasma CVD method is to be adopted in a roll-to-roll system or the like that forms a deposited film in a large area, the discharge electrode side is excellent in a large area by eliminating the influence of negative self-bias. In order to obtain a simple film, it is important to control the DC electric field by applying a bias power such as a DC power.
[0047]
As a method of applying a bias power such as a DC power to a film forming chamber for introducing a high frequency power of a VHF frequency, a method of providing a bias electrode for applying a bias power separately from the VHF discharge electrode in the inside of the discharge chamber, or a VHF discharge electrode A method of superimposing a bias power such as a DC power together with a high frequency power on the surface is conceivable.
[0048]
The method of superimposing and applying DC voltage together with high frequency power to the VHF discharge electrode requires fewer electrodes and simplifies the structure of the discharge chamber. However, a choke coil or the like is used to prevent high frequency power from entering the DC voltage application circuit. It is necessary to cut off the direct current with the DC power cut-off means such as a capacitor so that the high-frequency power cut-off means cuts off the high-frequency power and the DC power does not flow to the high-frequency power source.
[0049]
Here, by applying different direct current power to a plurality of discharge chambers that require high-density plasma according to the respective film formation conditions, a high-quality semiconductor multilayer film is continuously manufactured on the strip substrate. As a result, the photoelectric conversion efficiency of the solar cell module is improved.
[0050]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described in detail.
[0051]
<Bias power>
In the method of the present invention, when bias power such as DC power is applied to the discharge chamber, the potential of the electrode (bias electrode) to which the bias power is applied may be the same as the substrate potential or positive with respect to the substrate potential. Desirably, more preferably, the potential difference between the electrode to which the bias power is applied and the substrate is in the range of 0 to 500 V, more preferably in the range of 50 to 400 V, and it is preferable to set the current value within a predetermined range.
[0052]
<DC bias power input method>
In the method of the present invention, as a method of applying DC bias power to the film forming chamber, a method of providing a bias electrode for supplying bias power separately from the VHF discharge electrode in the film forming chamber, and a method of supplying high frequency power to the VHF discharge electrode are provided. There is a method of superimposing DC power.
[0053]
The method of superimposing DC power together with high frequency power on the VHF discharge electrode requires less electrodes and simplifies the structure of the film forming chamber, but the choke coil prevents the high frequency power from entering the DC power input circuit. It is necessary to cut off the direct current with a capacitor or the like so that the direct current does not flow to the high-frequency power source.
[0054]
FIG. 1 is a schematic cross-sectional view showing an example of the configuration of an apparatus for carrying out the present invention, which is an example in which a bias electrode for supplying DC bias power is provided inside a film forming chamber in addition to a VHF discharge electrode.
[0055]
In FIG. 1, a film forming chamber (discharge chamber) 102 is provided inside the vacuum vessel 101, and the film forming chamber 102 is connected to a gas introduction pipe 103 for introducing a source gas of a deposited film and an exhaust device (not shown). An exhaust pipe 104, a rod-like electrode 106 which is a high-frequency power radiating means connected to a high-frequency power source 105 having a VHF frequency, a moving substrate 107, and a heater 109 for heating the substrate are provided. Plasma CVD is performed on the moving substrate. To form a deposited film.
[0056]
Here, the rod-like electrode 106 which is a high-frequency power radiating means is long in the depth direction in FIG. 1, and the longitudinal direction thereof is arranged substantially perpendicular to the substrate moving direction 108.
[0057]
In addition, a bias electrode 113 is provided inside the film formation chamber 102, and bias power is supplied from the DC power supply 110. The direct current component of the current flowing through the bias electrode 113 is measured by the ammeter 111.
[0058]
A choke coil 112 is provided between the bias electrode 113 and the ammeter 111 to prevent the VHF power from entering the DC circuit.
[0059]
FIG. 2 is a schematic cross-sectional view showing an example of the configuration of an apparatus for carrying out the present invention, in which DC power is superimposed on a VHF discharge electrode together with high-frequency power. 2, 201 to 212 correspond to 101 to 112 in FIG.
[0060]
<High-frequency bias power input method>
In the method of the present invention, as a method for applying high-frequency bias power to the film forming chamber, a method of providing a bias electrode for supplying bias power separately from the VHF discharge electrode in the film forming chamber is preferably used. In this case, the direct current component of the current flowing through the bias electrode is measured as a direct current flowing through the choke coil with the bias electrode grounded via the choke coil.
[0061]
FIG. 3 is a schematic cross-sectional view showing another example of the configuration of the apparatus for carrying out the present invention, in which a bias electrode for supplying high-frequency bias power is provided in the film forming chamber in addition to the VHF discharge electrode. 3, 301 to 309 and 311 to 313 correspond to 101 to 109 and 111 to 113 in FIG. Reference numeral 314 denotes a high-frequency power source having an RF frequency, and reference numeral 315 denotes a blocking capacitor.
[0062]
In this case, a DC power source may be connected between the choke coil and the ground portion, and DC power may be applied simultaneously, or DC power may be applied simultaneously to the VHF discharge electrode. However, when bias power is applied to both the VHF discharge electrode and the bias electrode, the direct current component of the current flowing through the bias electrode is the sum of the direct current components of the current flowing through the electrodes through which the bias power is applied.
[0063]
<VHF frequency>
In the present invention, the VHF frequency used in the plasma CVD method refers to a frequency range that is higher than a conventionally used RF frequency such as 13.56 MHz, and a microwave such as 2.45 GHz is lower than the frequency. Specifically, the frequency range is from 30 MHz to 500 MHz. Within that range, select a relatively high frequency region if you want to increase the plasma density and increase the deposition rate, or select a relatively low frequency region if you want to use a shorter wavelength and achieve large area uniformity. And use it.
[0064]
<Raw gas>
In the method of the present invention, when a silicon-based non-single-crystal semiconductor film is produced, the raw material gas used as a raw material is a gas containing a gasifiable compound containing at least silicon atoms, and can be gasified containing germanium atoms. You may contain the compound, the compound which can be gasified containing the carbon atom, etc., and the mixed gas of this compound.
[0065]
Specifically, as a gasifiable compound containing a silicon atom, a chain or cyclic silane compound is used. Specifically, for example, SiH _Four , Si ₂ H ₆ , SiF _Four , SiFH _Three , SiF ₂ H ₂ , SiF _Three H, Si _Three H ₈ , SiD _Four , SiHD _Three , SiH ₂ D ₂ , SiH _Three D, SiFD _Three , SiF ₂ D ₂ , Si ₂ D _Three H _Three , (SiF ₂ ) _Five , (SiF ₂ ) ₆ , (SiF ₂ ) _Four , Si ₂ F ₆ , Si _Three F ₈ , Si ₂ H ₂ F _Four , Si ₂ H _Three F _Three , SiCl _Four , (SiCl ₂ ) _Five , SiBr _Four , (SiBr ₂ ) _Five , Si ₂ Cl ₆ , SiHCl _Three , SiH ₂ Br ₂ , SiH ₂ Cl ₂ , Si ₂ Cl _Three F _Three Or those that can be easily gasified. Here, D represents deuterium.
[0066]
Further, as a compound capable of gasification containing germanium atoms used as a source gas when an amorphous silicon germanium film is formed as a deposited film, GeH can be used. _Four , GeD _Four , GeF _Four , GeFH _Three , GeF ₂ H ₂ , GeF _Three H, GeHD _Three , GeH ₂ D ₂ , GeH _Three D, Ge ₂ H ₆ , Ge ₂ D ₆ Etc.
[0067]
Further, as a compound capable of gasification containing carbon atoms used as a source gas when an amorphous silicon carbide film is formed as a deposited film, CH _Four , CD _Four , C _n H _{2n + 2} (N is an integer), C _n H _2n (N is an integer), C ₂ H ₂ , C ₆ H ₆ , CO ₂ , CO and the like.
[0068]
Examples of the substance introduced into the p-type layer or the n-type layer for valence electron control include Group III atoms and Group V atoms in the periodic table.
[0069]
Examples of the boron atom-introducing compound suitably used as a starting material for introducing a group III atom include B ₂ H ₆ Boron hydride such as BF _Three And boron halides.
[0070]
Examples of the phosphorus atom-introducing compound that is preferably used as a starting material for introducing the group V atom include PH _Three Phosphorus hydrides such as PF _Three And the like. In addition, AsH _Three Etc. can also be suitably used as a starting material for introducing a Group V atom.
[0071]
The gasatable compound is H ₂ , He, Ne, Ar, Xe, Kr or the like may be appropriately diluted with a gas such as He, Ne, Ar, Xe, or Kr.
[0072]
Next, a method and apparatus when the present invention is applied to continuous formation of a plurality of semiconductor layers will be described.
[0073]
FIG. 6 is a schematic cross-sectional view showing an example of a semiconductor laminated film manufacturing apparatus of the present invention.
[0074]
In the apparatus shown in FIG. 6, a silicon-based non-single-crystal semiconductor multilayer film comprising, for example, six layers for a two-layer tandem solar cell is passed through six plasma discharge chambers while continuously transporting a belt-shaped substrate. Is manufactured continuously.
[0075]
In FIG. 6, a long belt-like substrate 601 is pulled out from a state wound in a coil shape in an unwinding chamber 602, and sequentially passes through plasma discharge chambers 603, 604, 605, 606, 607, and 608, and is not shown. A coil is wound in a winding chamber 609 having a winding mechanism. The unwinding chamber 602, the plasma discharge chambers 603 to 608, and the winding chamber 609 are connected to adjacent chambers (chambers) by gas gates 610.
[0076]
Each of the gas gates 610 that allow the band-shaped substrate 601 to pass is provided with a gate gas introduction pipe 611 in the vicinity of the central portion in the substrate transfer direction. ₂ , He, or the like is introduced, a gas flow is formed from the center of the gas gate to the adjacent chamber, preventing the raw material gas from being mixed between the adjacent chambers, and separating the raw material gas.
[0077]
Each plasma discharge chamber 603 to 608 is provided with a source gas introduction tube 612, an exhaust tube 613, a discharge electrode 614, and a substrate heater 615, and a semiconductor film is stacked on the surface of the moving strip substrate 601.
[0078]
In the manufacturing apparatus of the present invention shown in FIG. 6, among the plasma discharge chambers 603 to 608, the plasma discharge chambers 604 and 607 have a high frequency discharge frequency of 105 MHz and the other plasma discharge chambers 603, 605, 606, and 608 have high frequency discharge frequencies. Is 13.56 MHz.
[0079]
In the plasma discharge chambers 604 and 607 having a discharge frequency of 105 MHz, high-frequency power is radiated from an antenna electrode 614 provided in the discharge chamber. In addition, a bias electrode 616 is provided in the discharge chambers of the plasma discharge chambers 604 and 607 separately from the antenna electrode, and DC power is applied from a DC power source 617.
[0080]
In the manufacturing method and manufacturing apparatus of the present invention, electrodes other than the substrate are provided in the plasma discharge chamber with the VHF frequency and a DC bias voltage is applied, so that the substrate potential is common to all discharge chambers (for example, ground potential). However, it is possible to apply a DC bias voltage having a different voltage value suitable for each discharge condition to a plasma discharge chamber having a plurality of VHF frequencies.
[0081]
<Striped substrate>
The material of the belt-like substrate that is preferably used in the manufacturing method and manufacturing apparatus of the present invention is one that has a desired strength and a low strength with little deformation and distortion at the temperature required when forming the semiconductor layer. preferable.
[0082]
Specifically, a metal thin plate such as stainless steel, aluminum, iron, or the like, or a surface of a heat resistant resin such as polyimide, Teflon, etc. subjected to a conductive treatment can be used.
[0083]
<Plasma discharge chamber>
In the manufacturing method and manufacturing apparatus of the present invention, when the plasma CVD method is performed at a high frequency of the VHF frequency in at least two discharge chambers, the discharge frequency in the other plasma discharge chambers may be RF or microwave.
[0084]
In the present specification, only an example in which a high frequency of the VHF frequency is input from a rod-shaped electrode is described. However, the present invention is not limited to this and is also effective when a flat electrode or the like is used. . However, as described above, it is preferable to use a rod-shaped electrode from the viewpoint of matching impedance.
[0085]
【Example】
Examples of the present invention will be described below, but the present invention is not limited to these examples.
[0086]
(Example 1)
Using the apparatus shown in FIG. 5, a solar cell having a semiconductor layer with a nip structure composed of three silicon non-single crystal films on a stainless steel substrate was manufactured. In FIG. 5, an i-type layer forming chamber 504 is shown in FIG.
[0087]
In the apparatus shown in FIG. 5, the three-layered silicon-based non-single-crystal semiconductor multilayer film for solar cells, for example, is continuously manufactured on the substrate while passing the three chambers while continuously moving the belt-like substrate. .
[0088]
In FIG. 5, a long belt-like substrate 501 is pulled out from a state wound in a coil shape in an unwinding chamber 502, and sequentially passes through chambers (film forming chambers) 503, 504, and 505, and a winding mechanism (not shown). Is wound up in a coil shape. The unwinding chamber 502, the chambers 503 to 505, and the winding chamber 506 are connected by a gas gate 507, respectively.
[0089]
Each of the gas gates 507 that allow the band-shaped substrate 501 to pass therethrough is provided with a gate gas introduction pipe 508 in the vicinity of the center in the substrate transfer direction. ₂ , He, and the like are introduced, a gas flow is formed from the center of the gas gate to the adjacent chamber, preventing mixing of the source gas between the adjacent chambers, and separating the source gas.
[0090]
Each chamber 503 to 505 is provided with a source gas introduction pipe 509, an exhaust pipe 510, a flat discharge electrode 511, a rod-like discharge electrode 512, and a substrate heater 513, and a semiconductor film is laminated on the surface of the moving belt-like substrate 501. The
[0091]
In the apparatus of FIG. 5, among the chambers 503 to 505, the high frequency discharge frequency of the chamber 504 is 100 VHF frequency, and the high frequency discharge frequencies of the other chambers 503 and 505 are 13.56 MHz of RF frequency.
[0092]
In the chamber 504, high-frequency power is input from a rod-shaped discharge electrode 512 provided in the deposition chamber. A VHF power source 518 is connected to the rod-shaped discharge electrode 512.
[0093]
In the chamber 504, bias power is input from a bias electrode 514 provided in the deposition chamber. A DC power source 515 is connected to the bias electrode 514, and a DC ammeter 516 and a choke coil 517 are connected in series.
[0094]
In the apparatus shown in FIG. 5, first, a stainless steel substrate 501 (SUS430-BA) having a length of 500 m, a width of 356 mm, and a thickness of 0.15 mm is passed through a gas gate 507 from a bobbin wound in a coil shape of the unwind chamber 502. The chambers 503, 504, and 505 are passed through the bobbins of the winding chamber 506 so as to be wound in a coil shape, and the tension is applied without tension by a tension applying mechanism (not shown).
[0095]
Next, the chambers 502 to 506 were evacuated once to 1 Pa or less by the evacuation means of each chamber.
[0096]
While continuously evacuating, 100 sccm of He gas is introduced from a source gas introduction pipe 509 connected to a gas supply means (not shown) of each chamber, and the opening degree of an exhaust valve (not shown) of the exhaust pipe 510 is adjusted. The internal pressure of each vacuum vessel was maintained at 100 Pa. In this state, the belt-like substrate was continuously moved at a moving speed of 1200 mm / min by a substrate transfer mechanism (not shown) connected to the bobbin of the winding chamber 506.
[0097]
Next, heating was controlled by the substrate heater 513 provided in each chamber and a substrate temperature monitor (not shown) so that the belt-like substrate 501 moving in each chamber had a predetermined temperature. When the substrate 501 is uniformly heated in each chamber, the introduction of the He gas is stopped while continuing the heating, and the gas to the source gas introduction pipe 509 is changed to SiH. _Four Switched to source gas containing.
[0098]
Further, each gas gate 507 is supplied with H as a gas for separating a source gas from a gate gas introduction pipe 508 connected to a gas supply means (not shown). ₂ 1000 sccm of each was introduced.
[0099]
Next, a high-frequency power is supplied from a high-frequency power source to the flat plate discharge electrode 511 and the rod-shaped discharge electrode 512 of each chamber, a high-frequency discharge is generated in each chamber, a raw material gas is plasma-decomposed, and the belt-like substrate moves continuously. A stacked film of a silicon-based non-single-crystal film was deposited on 501 to form a semiconductor film of a solar cell made of a silicon-based non-single-crystal semiconductor.
[0100]
At that time, a DC voltage of 100 V was applied to the bias electrode 514 of the chamber 504 in a positive direction with respect to the belt-like substrate 501 having the ground potential. At this time, the direct current component of the current flowing through the bias electrode 514 was measured by the direct current ammeter 516 and found to be 3.0A. The area of the inner wall of the film forming chamber of the chamber 504 is about 0.8 m. ² The bias current density is 3.0 / 0.8 = 3.75 A / m ² Met. Table 1 shows the film forming conditions in each chamber.
[0101]
[Table 1]

[0102]
After such film deposition is continuously performed over a length of 400 m of the belt-shaped substrate, the supply of discharge power to each chamber, the introduction of the source gas, and the heating of the belt-shaped substrate are stopped, After purging and sufficiently cooling the band-shaped substrate and the inside of the apparatus, the apparatus was opened to the atmosphere, and the band-shaped substrate on which the semiconductor laminated film was formed and wound on the bobbin in the winding chamber was taken out.
[0103]
Furthermore, the taken-out strip | belt-shaped board | substrate is continuously processed with the continuous modularization apparatus, and the ITO thin film of 60 nm in thickness is formed as a transparent electrode on the semiconductor laminated film formed with the apparatus of this invention, and it serves as a current collection electrode. Thin-line Ag electrodes were formed at regular intervals, the substrate was cut, and a rectangular nip structure solar cell module having a width of 35 cm and a substrate moving direction length of 5 cm was produced.
[0104]
And about the created solar cell module, AM1.5 (100 mW / cm ² ) Was evaluated under simulated sunlight irradiation.
[0105]
As a result of the characteristic evaluation, the average photoelectric conversion efficiency of the produced solar cell module is as follows: 1. The solar cell module (comparison module) produced in the same manner except that the DC bias voltage is not input in the chamber 504 (bias electrode removal). Compared to 0, the photoelectric conversion efficiency was improved 1.3 times. Further, the defect occurrence rate due to short circuit was as low as about 2%, which was the same as when no bias power was input.
[0106]
(Comparative Example 1-1)
A solar cell having a nip structure semiconductor layer composed of three silicon non-single crystal films on a stainless steel substrate was manufactured in the same manner as in Example 1 except that the DC voltage in the film formation chamber 504 was changed to 10V. The direct current flowing through the bias electrode is 0.04 A, and the bias current density is 0.05 A / m. ² Met.
[0107]
When solar cell modules were continuously prepared and characteristics were evaluated in the same manner as in Example 1, the photoelectric conversion efficiency was 1.0 times that of the comparison module, and no improvement was observed.
[0108]
(Comparative Example 1-2)
A solar cell having a semiconductor layer having a nip structure composed of three silicon non-single crystal films on a stainless steel substrate was manufactured in the same manner as in Example 1 except that the DC voltage in the film formation chamber 504 was changed to 500V. The direct current flowing through the bias electrode is 12 A, and the bias current density is 15 A / m. ² Met.
[0109]
When solar cell modules were continuously prepared and characteristics were evaluated in the same manner as in Example 1, the photoelectric conversion efficiency was improved 1.3 times compared with the comparative module in the module without defects due to short circuit. The module had minute spark traces in some places, and the occurrence rate of defects due to short circuit was extremely high at about 60%.
[0110]
(Example 2)
As shown in FIG. 2, the method for supplying DC power in the film forming chamber 504 is the same as in Example 1 except that the DC power is simultaneously supplied from the VHF discharge electrode. A solar cell having a semiconductor layer having a nip structure made of a crystal film was manufactured.
[0111]
The direct current flowing through the electrode is 3.2 A, and the bias current density is 3.2 / 0.8 = 4.0 A / m. ² Met.
[0112]
When solar cell modules were continuously prepared and characteristics were evaluated in the same manner as in Example 1, the photoelectric conversion efficiency was improved 1.3 times as compared with the comparative module.
[0113]
Moreover, the defect occurrence rate due to short circuit was as low as about 2%, which was the same as when no bias was applied.
[0114]
(Example 3)
In the same manner as in Example 1 except that the bias power in the film forming chamber 504 is RF power of RF frequency and the charging method is as shown in FIG. 3, it consists of a three-layer silicon-based non-single crystal film on a stainless steel substrate. A solar cell having a semiconductor layer with a nip structure was manufactured. Table 2 shows the conditions of each layer.
[0115]
The direct current flowing through the bias electrode is 2.4 A, and the bias current density is 2.4 / 0.8 = 3.0 A / m. ² Met.
[0116]
[Table 2]

[0117]
When solar cell modules were continuously prepared and characteristics were evaluated in the same manner as in Example 1, the photoelectric conversion efficiency was improved 1.25 times compared to the comparative module.
[0118]
Further, the defect occurrence rate due to short circuit was as low as about 1.5%, which was the same as when no bias was applied.
[0119]
(Example 4)
A nip composed of three layers of silicon-based non-single crystal film on a stainless steel substrate in the same manner as in Example 1 except that the deposited film in the film formation chamber 504 is changed to amorphous silicon germanium and the input DC voltage is set to 200V. A solar cell with a structured semiconductor layer was produced. Table 3 shows the conditions of each layer.
[0120]
The direct current flowing through the bias electrode is 2.8 A, and the bias current density is 2.8 / 0.8 = 3.5 A / m. ² Met.
[0121]
[Table 3]

[0122]
When solar cell modules were continuously prepared and characteristics were evaluated in the same manner as in Example 1, the photoelectric conversion efficiency was improved 1.35 times compared to the comparative module.
[0123]
Moreover, the defect occurrence rate due to short circuit was as low as about 2.0%, which was the same as when no bias was applied.
[0124]
(Example 5)
Except for changing the discharge frequency in the film formation chamber 504 to 500 MHz, a solar cell having a nip structure semiconductor layer composed of three layers of silicon-based non-single crystal film on a stainless steel substrate was manufactured in the same manner as in Example 4.
[0125]
The direct current flowing through the bias electrode is 2.8 A, and the bias current density is 2.8 / 0.8 = 3.5 A / m. ² Met.
[0126]
When solar cell modules were continuously prepared and characteristics were evaluated in the same manner as in Example 1, the photoelectric conversion efficiency was improved by 1.30 times compared to the comparative module.
[0127]
Further, the defect occurrence rate due to short circuit was as low as about 2.5%, which was the same as when no bias was applied.
[0128]
(Example 6)
In Example 6, the semiconductor laminated film manufacturing apparatus of the present invention having the configuration shown in FIG. 6 is used to have a nipnip structure semiconductor layer composed of six silicon non-single crystal films on a stainless steel substrate. A two-layer tandem solar cell was manufactured.
[0129]
In the apparatus shown in FIG. 6, first, a stainless steel substrate 601 (SUS430-BA) having a length of 500 m, a width of 356 mm, and a thickness of 0.15 mm is transferred from a bobbin wound in a coil shape of the unwind chamber 602 to a gas gate 610. Through the glow discharge chambers 603, 604, 605, 606, 607, and 608, and is set so as to be wound in a coil shape on the bobbin of the winding chamber 609 so that the tension is applied without tension by a tension application mechanism (not shown). I made it.
[0130]
Next, each of the vacuum containers 602 to 609 was evacuated once to 1 Pa or less by the evacuation means of each chamber.
[0131]
While continuously evacuating, 100 sccm of He gas is introduced from a gas introduction pipe 612 connected to a gas supply means (not shown) of each plasma discharge chamber, and the opening degree of an exhaust valve (not shown) of the exhaust pipe 613 is adjusted. The internal pressure of each chamber (vacuum container) was maintained at 100 Pa.
[0132]
In this state, the belt-like substrate was continuously moved at a moving speed of 600 mm per minute by a substrate transfer mechanism (not shown) connected to the bobbin of the winding chamber 609.
[0133]
Next, heating was controlled by the substrate heater 615 provided in each plasma discharge chamber and a substrate temperature monitor (not shown) so that the belt-like substrate 601 moving in each plasma discharge chamber had a predetermined temperature.
[0134]
When the substrate 601 is uniformly heated in each glow discharge chamber, the introduction of the He gas is stopped while continuing the heating, and the gas to the gas introduction pipe 612 is changed to SiH. _Four Switched to source gas containing.
[0135]
Further, each gas gate 610 is supplied with H as a gas for separating a source gas from a gate gas introduction pipe 611 connected to a gas supply means (not shown). ₂ 1000 sccm of each was introduced.
[0136]
Next, high-frequency power is supplied from a high-frequency power source to the discharge electrode 614 of each plasma discharge chamber, a glow discharge is generated in each glow discharge chamber, the raw material gas is plasma-decomposed, and the strip substrate 601 moves continuously. A stacked film of a silicon-based non-single-crystal film was deposited to form a semiconductor film for a solar battery having a two-layer tandem structure having a silicon-based non-single-crystal semiconductor.
[0137]
The discharge frequency of the plasma discharge chambers 604 and 607 was 105 MHz, the discharge electrode was rod-shaped, the discharge frequency of the plasma discharge chambers 603, 605, 606, and 608 was 13.56 MHz, and the discharge electrode was flat.
[0138]
At that time, a DC voltage of 300 V is applied to the bias electrode of the plasma discharge chamber 604 in a positive direction with respect to the belt substrate at the ground potential, and the bias electrode of the plasma discharge chamber 607 is applied to the bias electrode in a positive direction with respect to the belt substrate at the ground potential. A DC voltage of 100 V was applied. The direct current component of the current flowing in the bias electrode of the plasma discharge chamber 604 is 7.5 A, and the inner area of the film forming chamber is about 0.8 m. ² Met. Therefore, the bias current density is 9.38 A / m. ² Met. The DC component of the current flowing through the bias electrode of the plasma discharge chamber 607 is 3.0 A, and the inner area of the film forming chamber is about 0.8 m. ² Met. Therefore, the bias current density is 3.75 A / m. ² Met.
[0139]
Table 4 shows the film forming conditions in each plasma discharge chamber.
[0140]
[Table 4]

[0141]
After such film deposition is continuously performed over a length of 400 m of the strip substrate, the supply of discharge power to each plasma discharge chamber, introduction of the source gas, and heating of the strip substrate are stopped, After sufficiently purging and sufficiently cooling the belt-like substrate and the inside of the apparatus, the manufacturing apparatus was opened to the atmosphere, and the belt-like substrate on which the semiconductor laminated film was formed and wound around the bobbin of the winding chamber was taken out.
[0142]
Furthermore, the strip-shaped substrate taken out is continuously processed by a continuous modularization apparatus, and a 60 nm ITO thin film is formed on the entire surface as a transparent electrode on the semiconductor laminated film formed by the manufacturing apparatus of the present invention. Thin-line Ag electrodes were formed at regular intervals, the substrate was cut, and a two-layer tandem solar cell module having a 35 cm square nipnip structure semiconductor layer was continuously formed.
[0143]
And about the created solar cell module, AM1.5 (100 mW / cm ² ) Was evaluated under simulated sunlight irradiation.
[0144]
As a result of the characteristic evaluation, the average photoelectric conversion efficiency of the produced solar cell module is 1.4 times compared with the average photoelectric conversion efficiency of the solar cell module when the bias voltage is not applied to the discharge chambers 604 and 607 as 1. The discharge chambers 604 and 607 are 1.2 times as large as 100 V is applied, and the discharge chambers 604 and 607 are 1.2 times as large as 300 V are applied, and different bias voltages are applied to the two discharge chambers. As a result, it was confirmed that the manufactured photoelectric conversion efficiency was improved.
[0145]
(Example 7)
A two-layer tandem solar cell having a 35 cm square nipnip structure semiconductor layer in the same manner as in Example 6 except that a bias voltage application method in a VHF frequency discharge chamber is such that a DC voltage is superimposed and applied to a high-frequency discharge electrode. Battery modules were made continuously.
[0146]
FIG. 7 is a schematic diagram of the semiconductor laminated film manufacturing apparatus of the present invention used in this example. 701 to 717 in FIG. 7 correspond to 601 to 617 in FIG.
[0147]
In the apparatus of FIG. 7, the discharge chambers 704 and 707 having the VHF frequency do not have the bias electrode 616, and a DC voltage is applied to the high frequency discharge electrode 714 through the choke coil 716. The currents flowing through the electrodes of the discharge chambers 704 and 707 are 8.0 A and 3.2 A, respectively, and the current densities are 10 A / m, respectively. ² , 4.0A / m ² Met.
[0148]
The VHF high frequency power supply is connected to the high frequency discharge electrode 714 via the capacitor 718.
[0149]
And about the created solar cell module, AM1.5 (100 mW / cm ² ) Was evaluated under simulated sunlight irradiation.
[0150]
As a result of the characteristic evaluation, the average photoelectric conversion efficiency of the produced solar cell module is 1.4 times compared with the average photoelectric conversion efficiency of the solar cell module when the bias voltage is not applied to the discharge chambers 704 and 707 as 1. The discharge chambers 704 and 707 are 1.2 times as large as when 100 V is applied, and 1.2 times as large as 300 V when both of the discharge chambers 704 and 707 are applied. It was confirmed that the photoelectric conversion efficiency produced was improved by applying different bias voltages to the chamber.
[0151]
(Example 8)
Except that the discharge frequency in the discharge chambers 604 and 607 was changed to 30 MHz, a two-layer tandem solar cell module having a 35 cm square nipnip structure semiconductor layer was continuously formed in the same manner as in Example 6.
[0152]
And about the created solar cell module, AM1.5 (100 mW / cm ² ) Was evaluated under simulated sunlight irradiation.
[0153]
As a result of the characteristic evaluation, the average photoelectric conversion efficiency of the produced solar cell module is 1.3 times compared with the average photoelectric conversion efficiency of the solar cell module when the bias voltage is not applied to the discharge chambers 604 and 607 as 1. The discharge chambers 604 and 607 both have 1.15 times when 100 V is applied, and the discharge chambers 604 and 607 both have 1.15 times when 300 V is applied. It was confirmed that the photoelectric conversion efficiency produced was improved by applying different bias voltages to the chamber.
[0154]
Example 9
Except that the discharge frequency in the discharge chambers 604 and 607 was changed to 450 MHz, a two-layer tandem solar cell module having a 35 cm square nipnip structure semiconductor layer was continuously formed in the same manner as in Example 6.
[0155]
And about the created solar cell module, AM1.5 (100 mW / cm ² ) Was evaluated under simulated sunlight irradiation.
[0156]
As a result of the characteristic evaluation, the average photoelectric conversion efficiency of the produced solar cell module is 1.5 times compared with the average photoelectric conversion efficiency of the solar cell module when the bias voltage is not applied to the discharge chambers 604 and 607 as 1. The discharge chambers 604 and 607 are 1.3 times as large as when 100 V is applied, and the discharge chambers 604 and 607 are as large as 1.3 times when 300 V is applied. It was confirmed that the photoelectric conversion efficiency produced was improved by applying different bias voltages to the chamber.
[0157]
【The invention's effect】
As described above, according to the present invention, in the method for forming a silicon-based non-single crystal semiconductor by the plasma CVD method, the plasma CVD method with a VHF frequency capable of obtaining a high film formation rate is applied to film deposition over a large area. When trying to do so, it is necessary to apply an appropriate DC electric field together with the electric field due to the high frequency, and adjustment of the amount of bias power input to obtain a good bias effect while preventing the occurrence of defects in the deposited film due to spark or charge-up can be adjusted. A high-quality silicon-based non-single-crystal semiconductor film can be deposited at a high speed over a large area by solving the problem of difficulty and easily setting an appropriate bias power amount.
[0158]
The method of the present invention is effective when applied to an i-type layer of a photovoltaic device.
[Brief description of the drawings]
FIG. 1 is a schematic cross-sectional view showing an example of a semiconductor layer manufacturing apparatus according to the present invention.
FIG. 2 is a schematic cross-sectional view showing another example of a semiconductor layer manufacturing apparatus according to the present invention.
FIG. 3 is a schematic cross-sectional view showing another example of a semiconductor layer manufacturing apparatus according to the present invention.
FIG. 4 is a graph showing the relationship between DC bias current density and photovoltaic device characteristics.
FIG. 5 is a schematic cross-sectional view showing a manufacturing apparatus used in an example of the present invention.
FIG. 6 is a schematic cross-sectional view showing an example of a roll-to-roll manufacturing apparatus that is an embodiment of the manufacturing apparatus of the present invention.
FIG. 7 is a schematic cross-sectional view showing another example of a roll-to-roll manufacturing apparatus that is an aspect of the manufacturing apparatus of the present invention.
[Explanation of symbols]
101, 201, 301 Vacuum container
102, 202, 302 Deposition chamber
103, 203, 303 Gas introduction pipe
104, 204, 304 Exhaust pipe
105, 205, 305 High frequency power supply with VHF frequency
106, 206, 306 Bar electrode
107, 207, 307 substrate
108, 208, 308 Substrate movement direction
109, 209, 309 Heater
110, 210 DC power supply
111, 211, 311 Ammeter
112, 212, 312 Choke coil
113, 313 Bias power supply
314 RF power supply with RF frequency
315 Blocking capacitor
501 Strip substrate
502 Unwinding room
503, 504, 505 Deposition chamber (chamber)
506 Winding room
507 gas gate
508 Gate gas introduction pipe
509 Source gas introduction pipe
510 exhaust pipe
511 Flat discharge electrode
512 Rod-shaped discharge electrode
513 Substrate heater
514 Bias electrode
601 Strip substrate
602 Unwinding room
603, 604, 605, 606, 607, 608 Glow discharge chamber
609 Winding room
610 Gas Gate
611 Gate gas introduction pipe
612 Source gas introduction pipe
613 Exhaust pipe
614 High frequency electrode
615 Substrate heater
616 Bias electrode
617 DC power supply
701 Strip substrate
702 Unwinding room
703, 704, 705, 706, 707, 708 Glow discharge chamber
709 Winding room
710 Gas Gate
711 Gate gas introduction pipe
712 Source gas introduction pipe
713 Exhaust pipe
714 High frequency electrode
715 Substrate heater
716 choke coil
717 DC power supply
718 capacitor

Claims (35)

In the method for manufacturing a semiconductor layer, introducing a source gas into a discharge chamber, discharging and decomposing the source gas by supplying high-frequency power into the discharge chamber space, and forming a semiconductor layer on a substrate in the discharge chamber.
As the high frequency power, at least high frequency power of VHF frequency is input,
Into the discharge chamber space , a bias power composed of direct-current power and / or high-frequency power of RF frequency is input together with high-frequency power of VHF frequency,
Semiconductors the DC component of the current flowing through the bias power to the electrodes to be introduced, characterized in that to be in the range at a current density of 0.1A / m ² ~10A / m ² with respect to the area of the inner wall of the discharge chamber Layer manufacturing method.   2. The method of manufacturing a semiconductor layer according to claim 1, wherein the potential of the electrode to which the bias power is applied is the same as the potential of the substrate or positive with respect to the potential of the substrate.   3. The method of manufacturing a semiconductor layer according to claim 2, wherein a potential difference between the electrode to which the bias power is input and the substrate is set to 0 to 500V.   The silicon-based non-single-crystal semiconductor layer is formed on the substrate using a source gas containing molecules containing silicon atoms as the source gas. Method.   The method for manufacturing a semiconductor layer according to claim 1, wherein an inner wall surface of the substrate and the discharge chamber is set to a ground potential.   6. The method of manufacturing a semiconductor layer according to claim 1, wherein the bias power is applied to an electrode provided independently of an electrode to which the high frequency power of the VHF frequency is applied.   The method for manufacturing a semiconductor layer according to claim 1, wherein the bias power is applied to an electrode to which the high-frequency power of the VHF frequency is input.   The method for manufacturing a semiconductor layer according to claim 1, wherein DC power is used as the bias power.   The method for manufacturing a semiconductor layer according to claim 1, wherein the semiconductor layer is formed by a plasma CVD method.   The method for manufacturing a semiconductor layer according to claim 1, wherein a strip-shaped substrate is used as the substrate.   The method for manufacturing a semiconductor layer according to claim 1, wherein a conductive substrate is used as the substrate.   The method for manufacturing a semiconductor layer according to claim 1, wherein the substrate is a part of an inner wall of the discharge chamber. Photovoltaic element having at least a step of introducing a source gas into the discharge chamber, discharging and decomposing the source gas by supplying high frequency power to the discharge chamber space, and forming an i-type semiconductor layer on a substrate in the discharge chamber In the manufacturing method of
In the step of forming the i-type semiconductor layer, as the high-frequency power, at least high-frequency power having a VHF frequency is input,
Into the discharge chamber space , a bias power composed of direct-current power and / or high-frequency power of RF frequency is input together with high-frequency power of VHF frequency,
Light the DC component of the current flowing through the bias power to the electrodes to be introduced, characterized in that to be in the range at a current density of 0.1A / m ² ~10A / m ² with respect to the area of the inner wall of the discharge chamber Manufacturing method of electromotive force element. The method of manufacturing a photovoltaic element according to claim 13 , wherein the potential of the electrode to which the bias power is applied is the same as the potential of the substrate or positive with respect to the potential of the substrate. The method of manufacturing a photovoltaic element according to claim 14 , wherein a potential difference between the electrode to which the bias power is input and the substrate is set to 0 to 500V. 16. The photovoltaic element according to claim 13 , wherein a silicon-based non-single-crystal semiconductor layer is formed on the substrate using a source gas containing molecules containing silicon atoms as the source gas. Manufacturing method. The method for manufacturing a photovoltaic element according to any one of claims 13 to 16, wherein an inner wall surface of the substrate and the discharge chamber is set to a ground potential. The method of manufacturing a photovoltaic element according to any one of claims 13 to 17 , wherein the bias power is applied to an electrode provided independently of an electrode to which the high frequency power of the VHF frequency is applied. The method for manufacturing a photovoltaic element according to any one of claims 13 to 18 , wherein the bias power is applied to an electrode to which high-frequency power of the VHF frequency is applied. The method for manufacturing a photovoltaic element according to claim 13, wherein DC power is used as the bias power. 21. The method of manufacturing a photovoltaic element according to claim 13, wherein the i-type semiconductor layer is formed by a plasma CVD method. The method for manufacturing a photovoltaic device according to any one of claims 13 to 21, wherein a strip-like substrate is used as the substrate. The method for manufacturing a photovoltaic element according to claim 13, wherein a conductive substrate is used as the substrate. The method for manufacturing a photovoltaic device according to any one of claims 13 to 23, wherein the substrate is a part of an inner wall of the discharge chamber. The method for manufacturing a photovoltaic device according to any one of claims 13 to 24, further comprising a step of forming an n-type semiconductor layer and a step of forming a p-type semiconductor layer before and after the step of forming the i-type semiconductor layer. In a semiconductor layer manufacturing apparatus that introduces a source gas into a discharge chamber, discharges and decomposes the source gas by introducing high-frequency power into the discharge chamber space, and forms a semiconductor layer on a substrate in the discharge chamber.
Means for supplying at least high frequency power of VHF frequency as the high frequency power;
Means for injecting bias power comprising DC power and / or high frequency power of RF frequency into the discharge chamber space ;
The DC component of the current flowing through the bias power to the electrode to be introduced is, to have a means for controlling to be in the range at a current density of 0.1A / m ² ~10A / m ² with respect to the area of the inner wall of the discharge chamber A semiconductor layer manufacturing apparatus. 27. The apparatus for manufacturing a semiconductor layer according to claim 26 , wherein the means for supplying high-frequency power having the VHF frequency is a discharge electrode and a high-frequency power source having a VHF frequency connected to the discharge electrode. 28. The apparatus for manufacturing a semiconductor layer according to claim 27 , wherein the means for supplying the bias power is a bias electrode provided separately from the discharge electrode and a power source connected to the bias electrode. 28. The apparatus for manufacturing a semiconductor layer according to claim 27 , wherein the means for applying the bias power is a power source connected to the discharge electrode. 28. The apparatus for manufacturing a semiconductor layer according to claim 27 , wherein the means for applying the bias power is a DC power source connected to the discharge electrode via a high frequency power cutoff means. 31. The apparatus for manufacturing a semiconductor layer according to claim 30 , wherein the high-frequency power cutoff means is a choke coil. 31. The apparatus for manufacturing a semiconductor layer according to claim 30 , wherein the high-frequency power source is connected to the discharge electrode through a DC power cut-off means. The apparatus for manufacturing a semiconductor layer according to claim 32 , wherein the DC power cut-off means is a capacitor. 34. The semiconductor layer manufacturing apparatus according to claim 26, wherein the substrate and the inner wall surface of the discharge chamber are at ground potential. 35. The semiconductor layer manufacturing apparatus according to claim 26, wherein the substrate is a part of an inner wall of the discharge chamber.

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