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JP3512554B2 - Wiring board - Google Patents

Wiring board

Info

Publication number
JP3512554B2
JP3512554B2 JP04161496A JP4161496A JP3512554B2 JP 3512554 B2 JP3512554 B2 JP 3512554B2 JP 04161496 A JP04161496 A JP 04161496A JP 4161496 A JP4161496 A JP 4161496A JP 3512554 B2 JP3512554 B2 JP 3512554B2
Authority
JP
Japan
Prior art keywords
copper
plating
wiring board
coating layer
insulating substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP04161496A
Other languages
Japanese (ja)
Other versions
JPH09237946A (en
Inventor
昌則 堀添
憲一 合原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Denso Corp
Original Assignee
Kyocera Corp
Denso Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp, Denso Corp filed Critical Kyocera Corp
Priority to JP04161496A priority Critical patent/JP3512554B2/en
Publication of JPH09237946A publication Critical patent/JPH09237946A/en
Application granted granted Critical
Publication of JP3512554B2 publication Critical patent/JP3512554B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

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  • Parts Printed On Printed Circuit Boards (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は、半導体素子が収容
搭載される半導体素子収納用パッケージや、半導体素子
等の能動部品の他にコンデンサや抵抗体等の各種受動部
品が多数搭載され、所定の電子回路を構成する混成集積
回路装置等に好適な配線基板に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention has a predetermined number of various passive components such as capacitors and resistors in addition to a semiconductor device housing package in which a semiconductor device is housed and mounted, and active components such as semiconductor devices. The present invention relates to a wiring board suitable for a hybrid integrated circuit device or the like that constitutes an electronic circuit.

【0002】[0002]

【従来の技術】従来、半導体素子収納用パッケージや混
成集積回路装置等に用いられる配線基板は、通常、絶縁
基体の上面の略中央部に設けた凹部周辺から下面に、あ
るいはその表面及び内部に、タングステン(W)、モリ
ブデン(Mo)、マンガン(Mn)等の高融点金属から
成る複数の配線導体を配設するとともに、各配線導体は
絶縁基体内に設けた前記同様の高融点金属から成るスル
ーホール導体で電気的に接続されている。
2. Description of the Related Art Conventionally, a wiring board used for a package for housing a semiconductor element, a hybrid integrated circuit device, etc. is usually provided from the periphery of a recess provided in the upper surface of an insulating substrate to the lower surface, or on the surface and inside thereof. , A plurality of wiring conductors made of refractory metal such as tungsten (W), molybdenum (Mo) and manganese (Mn) are arranged, and each wiring conductor is made of the same refractory metal provided in the insulating substrate. It is electrically connected by a through-hole conductor.

【0003】そして、前述のように構成された配線基板
は、例えば半導体素子収納用パッケージでは、その絶縁
基体の凹部底面に半導体素子をガラスあるいは樹脂、ロ
ウ材等の接着剤を介して接着固定するとともに、半導体
素子の各電極を凹部周辺に位置する配線導体にボンディ
ングワイヤを介して電気的に接続し、金属やセラミック
ス等から成る蓋体を前記凹部を塞ぐように前記接着剤と
同様の封止材を介して接合し、絶縁基体の凹部内に半導
体素子を気密に収容することにより最終製品としての半
導体装置とされていた。
In the wiring board constructed as described above, for example, in a package for housing a semiconductor element, the semiconductor element is adhered and fixed to the bottom surface of the recess of the insulating substrate via an adhesive such as glass, resin, or brazing material. At the same time, each electrode of the semiconductor element is electrically connected to a wiring conductor located around the recess via a bonding wire, and a lid made of metal or ceramics is sealed in the same manner as the adhesive so as to close the recess. The semiconductor device as the final product is obtained by joining the semiconductor elements through the materials and hermetically housing the semiconductor element in the recess of the insulating base.

【0004】しかしながら、前記配線導体を構成するタ
ングステンに代表される高融点金属は、前述のような接
着剤として用いるロウ材、とりわけはんだとのヌレ性が
悪い上、半導体素子を配線導体とボンディングワイヤを
介して電気的に接続する際の接続のし易さ、即ちワイヤ
ーボンディング性が悪いため、通常、前述のように絶縁
基体表面に露出した配線導体の表面には金(Au)から
成るメッキ被覆層が被着されている。
However, the refractory metal typified by tungsten, which constitutes the wiring conductor, has poor wettability with the brazing material used as an adhesive as described above, especially solder, and the semiconductor element is used as a wiring conductor and a bonding wire. As described above, the surface of the wiring conductor exposed on the surface of the insulating substrate is usually plated with gold (Au) because the ease of connection when connecting electrically through Layers have been deposited.

【0005】前記金から成るメッキ被覆層は耐候性に優
れ、はんだとのヌレ性やワイヤーボンディング性にも優
れているため現在広く採用されているが、金は高価であ
ることや、前記高融点金属上に強固に被着させるために
は下地にニッケル(Ni)から成るメッキ被覆層が必要
であり、そのために工程が増してコストアップになる等
の問題があった。
The plated coating layer made of gold is widely used at present because of its excellent weather resistance, wettability with solder and wire bonding property. However, gold is expensive and has a high melting point. A plating coating layer made of nickel (Ni) is required as an underlayer in order to firmly adhere to the metal, which causes a problem that the number of steps is increased and the cost is increased.

【0006】そこで、係る問題を解消するために、金に
代えて銅から成るメッキ被覆層を用いることが検討され
るようになり、係る銅のメッキ被覆方法として従来から
各種の無電解メッキ法が提案されている。
Therefore, in order to solve such a problem, it has been studied to use a plating coating layer made of copper instead of gold, and various electroless plating methods have hitherto been used as the plating coating method of copper. Proposed.

【0007】係る無電解メッキ法では、銅が前記高融点
金属と接合性が悪いことから該高融点金属から成る配線
導体の表面を活性化するために、パラジウムを前記配線
導体表面に析出させる、いわゆるパラジウム活性を施し
た後、無電解銅メッキ浴中に浸漬しCuをPdと置換し
ながら析出させることによって銅のメッキ被覆層を被着
することが行われていた(特公昭60−21226号公
報、特開昭63−256588号公報参照)。
In the electroless plating method, since copper has a poor bondability with the refractory metal, palladium is deposited on the surface of the wiring conductor in order to activate the surface of the wiring conductor made of the refractory metal. After so-called palladium activation, a copper plating coating layer was deposited by immersing it in an electroless copper plating bath and precipitating while replacing Cu with Pd (Japanese Patent Publication No. 60-21226). Japanese Patent Laid-Open No. 63-256588).

【0008】[0008]

【発明が解決しようとする課題】しかしながら、前記配
線基板に対する高機能化及び小型化の要求が高まるにつ
れ、従来のチップ部品のはんだ実装に代わり配線基板上
に厚膜回路を形成して高密度化することが行われるよう
になってきた。
However, with the increasing demand for higher functionality and smaller size of the wiring board, a thick film circuit is formed on the wiring board instead of the conventional solder mounting of chip parts to increase the density. Things have come to be done.

【0009】係る厚膜回路は導体と抵抗体及び保護ガラ
スから構成され、該厚膜回路は前記配線導体の酸化防止
のため、例えば窒素雰囲気中、600〜1000℃の温
度で焼き付けされる。
The thick film circuit is composed of a conductor, a resistor and a protective glass, and the thick film circuit is baked at a temperature of 600 to 1000 ° C. in a nitrogen atmosphere, for example, in order to prevent oxidation of the wiring conductor.

【0010】従って、前記銅から成るメッキ被覆層を被
着した配線基板上にその一部あるいは全部を覆うように
厚膜回路を形成した場合、パラジウムが水素吸蔵金属で
あることから前記パラジウム活性で高融点金属から成る
配線導体表面に析出したパラジウムが、活性時や無電解
銅メッキ時に取り込んだ水素によると考えられるフクレ
を前記メッキ被覆層と配線導体との間に生じ、その結
果、メッキ被覆層の接着強度が低下したり、該メッキ被
覆層に直接ワイヤーボンディングができなかったり、半
導体素子の表面電極を直接接続するフリップチップ接続
法が採用できない等の課題があった。
Therefore, when a thick film circuit is formed so as to cover a part or the whole of the wiring board on which the plating coating layer made of copper is deposited, since palladium is a hydrogen storage metal, the palladium activation can be performed. Palladium deposited on the surface of the wiring conductor made of a refractory metal causes blisters between the plating coating layer and the wiring conductor, which are considered to be due to hydrogen taken in during activation or electroless copper plating, and as a result, the plating coating layer. However, there are problems such as a decrease in the adhesive strength, the inability to directly wire bond to the plating coating layer, and the inability to adopt the flip-chip connection method for directly connecting the surface electrode of the semiconductor element.

【0011】[0011]

【発明の目的】本発明は前記課題に鑑み成されたもの
で、その目的は絶縁基体表面に露出した配線導体と該配
線導体の少なくとも一部を覆うように被着させた銅から
成るメッキ被覆層との間にフクレを発生させず、該メッ
キ被覆層を強固に被着させるとともに、該メッキ被覆層
に直接ワイヤーボンディングが可能で、フリップチップ
接続法も適用可能となる配線基板を提供することにあ
る。
SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problems, and an object thereof is a plating coating made of a wiring conductor exposed on the surface of an insulating substrate and copper deposited so as to cover at least a part of the wiring conductor. To provide a wiring board which does not generate blisters between the layers, firmly adheres the plating coating layer, enables direct wire bonding to the plating coating layer, and is also applicable to the flip chip connection method. It is in.

【0012】[0012]

【課題を解決するための手段】本発明者等は前記課題を
鋭意検討した結果、パラジウム活性で高融点金属から成
る配線導体表面に析出したパラジウムとメッキ被覆層の
銅とが合金化すると、前記厚膜回路の焼き付け時に60
0〜700℃付近からメッキ被覆層がシンターし始め、
前記パラジウムが活性時や無電解銅メッキ時に取り込ん
だ水素を排出し難くなり、その結果、前記メッキ被覆層
と配線導体との密着が弱い部分にフクレを生じることが
明らかとなった。
Means for Solving the Problems The inventors of the present invention have made earnest studies on the above-mentioned problems, and as a result, when palladium deposited on the surface of a wiring conductor made of a palladium-active and refractory metal and copper of a plating coating layer are alloyed, 60 when baking thick film circuits
The plating layer starts to sinter from around 0 to 700 ° C.
It has become clear that it becomes difficult for the palladium to discharge hydrogen taken in during activation or electroless copper plating, and as a result, blisters are generated in the portion where the plating coating layer and the wiring conductor have poor adhesion.

【0013】即ち、前記パラジウムがメッキ被覆層の銅
に単に固溶している状態では拡散するだけであり、パラ
ジウムが取り込んだ水素は前記厚膜回路焼き付け時に系
外に問題なく排出され、前記フクレは発生しないことを
知見し、本発明に至った。
That is, the palladium only diffuses when it is in solid solution with the copper of the plating layer, and the hydrogen taken up by the palladium is discharged to the outside of the system during the baking of the thick film circuit without any problem, and The present invention has been completed by finding out that the above does not occur.

【0014】本発明の配線基板は、絶縁基体に高融点金
属から成る配線導体を一体的に形成するとともに、該絶
縁基体表面に露出した配線導体の少なくとも一部を覆う
ように銅(Cu)から成るメッキ被覆層を被着した配線
基板であって、前記銅(Cu)から成るメッキ被覆層が
銅と合金化せずに銅中に固溶し拡散した0.1〜7μg
/cmのパラジウム(Pd)を含有するとともにメッ
キ後に熱処理が施されていることを特徴とするものであ
る。また、本発明の配線基板は、上記構成において、前
記熱処理は、前記絶縁基体の外表面に前記メッキ被覆層
と接触するように厚膜回路を形成するための焼成処理で
あることを特徴とするものである。さらに、本発明の配
線基板は、上記構成において、前記メッキ被覆層は、前
記メッキ被覆層の接着強度が3.6kg/mm以上で
あることを特徴とするものである。また、本発明の配線
基板は、絶縁基体に高融点金属から成る配線導体を一体
的に形成するとともに、該絶縁基体表面に露出した配線
導体の少なくとも一部を覆うように銅(Cu)から成る
メッキ被覆層を被着した配線基板であって、前記銅(C
u)から成るメッキ被覆層が銅と合金化せずに銅中に固
溶し拡散した0.1〜7μg/cmのパラジウム(P
d)を含有するとともにメッキ後に熱処理が施されてお
り、前記メッキ被覆層の接着強度が3.6kg/mm
以上であることを特徴とするものである。
In the wiring board of the present invention, a wiring conductor made of a refractory metal is integrally formed on an insulating base, and copper (Cu) is used to cover at least a part of the wiring conductor exposed on the surface of the insulating base. A wiring board having a plated coating layer formed thereon, wherein the plated coating layer made of copper (Cu) is solid-dissolved and diffused in copper without alloying with copper.
/ Cm 2 of palladium (Pd), and is characterized by being heat-treated after plating. Further, the wiring board of the present invention is characterized in that, in the above structure, the heat treatment is a baking treatment for forming a thick film circuit on the outer surface of the insulating substrate so as to come into contact with the plating coating layer. It is a thing. Further, the wiring board of the present invention is characterized in that, in the above structure, the plating coating layer has an adhesive strength of 3.6 kg / mm 2 or more. Further, the wiring board of the present invention is formed by integrally forming a wiring conductor made of a refractory metal on an insulating base and making copper (Cu) so as to cover at least a part of the wiring conductor exposed on the surface of the insulating base. A wiring board coated with a plating coating layer, the copper (C
u) a plating layer formed of 0.1 to 7 μg / cm 2 of palladium (P
d) is included and heat treatment is performed after plating, and the adhesive strength of the plating layer is 3.6 kg / mm 2
The above is a feature.

【0015】本発明において、前記銅から成るメッキ被
覆層が含有するパラジウム量が0.1μg/cm2 未満
では、活性化が不十分となり、無電解銅メッキにおいて
銅の析出時の初期反応が不十分となってメッキ被膜にピ
ンホールが発生したり、配線導体表面に均一に析出しな
くなる。
In the present invention, when the amount of palladium contained in the plating layer made of copper is less than 0.1 μg / cm 2 , the activation is insufficient and the initial reaction at the time of copper deposition in electroless copper plating is unsatisfactory. Sufficiently, pinholes are not formed in the plated film, and the plated film is not evenly deposited on the surface.

【0016】また、前記パラジウム含有量が10μg/
cm2 を越えると配線導体とメッキ被覆層との間にフク
レが発生するようになる。
Further, the palladium content is 10 μg /
If it exceeds cm 2 , blisters will occur between the wiring conductor and the plated coating layer.

【0017】従って、銅から成るメッキ被覆層のパラジ
ウム含有量は、0.1〜10μg/cmがよいが、メ
ッキ被覆層の接着強度に影響するメッキ粒子の粒成長を
抑制するという点から0.1〜7μg/cmとする。
Therefore, the palladium content of the plating layer made of copper is preferably 0.1 to 10 μg / cm 2, but it is 0 from the viewpoint of suppressing grain growth of the plating particles which affects the adhesive strength of the plating layer. 0.1 to 7 μg / cm 2 .

【0018】[0018]

【作用】本発明の配線基板によれば、銅から成るメッキ
被覆層に含有されるパラジウム量を0.1〜7μg/c
に特定したことから、パラジウムはメッキ被覆層の
銅と合金化せずに該銅中に固溶して拡散し、該パラジウ
ムに吸蔵された水素は600〜700℃の温度で比較的
容易に系外に排出され、前述のようなフクレを発生する
恐れはないとともに、メッキ被覆層の接着強度に影響す
るメッキ粒子の粒成長を抑制することができる。
According to the wiring board of the present invention, the amount of palladium contained in the plating coating layer made of copper is 0.1 to 7 μg / c.
Since it is specified as m 2 , palladium does not form an alloy with copper of the plating coating layer and diffuses as a solid solution in the copper, and hydrogen occluded in the palladium is relatively easy at a temperature of 600 to 700 ° C. It is possible to suppress the particle growth of the plating particles which is discharged to the outside of the system and causes the blisters as described above and which affects the adhesive strength of the plating coating layer.

【0019】従って、配線導体に銅から成るメッキ被覆
層を強固に被着させることができ、該メッキ被覆層に直
接ワイヤーボンディングも可能となり、フリップチップ
ランド等の微小パッドでも問題なく実装可能となる上、
耐腐食性やはんだ喰われ性にも優れることとなる。
Therefore, the plated conductor layer made of copper can be firmly adhered to the wiring conductor, the wire can be directly bonded to the plated conductor layer, and even a small pad such as a flip chip land can be mounted without any problem. Up,
It also has excellent corrosion resistance and solder erosion resistance.

【0020】[0020]

【発明の実施の形態】以下、本発明の配線基板を詳細に
説明する。
BEST MODE FOR CARRYING OUT THE INVENTION The wiring board of the present invention will be described in detail below.

【0021】先ず、絶縁基体は、例えばアルミナ(Al
2 3 )、シリカ(SiO2 )、カルシア(CaO)、
マグネシア(MgO)等の原料粉末に各種バインダーを
添加して泥漿を調製し、該泥漿をドクターブレード法や
カレンダーロール法等の公知の成形法によりシート状に
成形し、得られたセラミックグリーンシートに打ち抜き
加工をしてスルーホールを形成し、該セラミックグリー
ンシートに後述する導体ペーストを用いてスクリーン印
刷法で所定の配線パターンに印刷塗布するとともに、前
記スルーホールにも充填した後、それらを複数枚積層
し、還元性雰囲気中、1500〜1600℃の温度で焼
成することにより形成されている。
First, the insulating substrate is made of, for example, alumina (Al
2 O 3 ), silica (SiO 2 ), calcia (CaO),
Various binders are added to raw material powder such as magnesia (MgO) to prepare slurry, and the slurry is formed into a sheet by a known forming method such as a doctor blade method or a calender roll method, and the obtained ceramic green sheet is obtained. A punching process is performed to form through holes, and a conductive paste described later is applied to the ceramic green sheet by a screen printing method to apply a predetermined wiring pattern by printing, and after filling the through holes as well, a plurality of them are formed. It is formed by stacking and firing at a temperature of 1500 to 1600 ° C. in a reducing atmosphere.

【0022】前記絶縁基体の内部及び表面に形成された
配線導体は、タングステン(W)やモリブデン(M
o)、マンガン(Mn)等の高融点金属粉末に公知の有
機溶剤と溶媒を添加混合して調製した導体ペーストを用
いて所定の配線パターンに被着形成される。
The wiring conductors formed inside and on the surface of the insulating base are made of tungsten (W) or molybdenum (M).
o), a conductive paste prepared by adding and mixing a known organic solvent and a solvent to a high melting point metal powder such as manganese (Mn) is deposited on a predetermined wiring pattern.

【0023】更に、前述のようにして形成した絶縁基体
の表面に露出した配線導体の少なくとも一部を覆うよう
に銅から成るメッキ被覆層を被着するに先立って、例え
ば塩化パラジウムの酸性溶液中に所定時間浸漬して活性
化処理を行う。
Further, prior to depositing the plating coating layer made of copper so as to cover at least a part of the wiring conductor exposed on the surface of the insulating substrate formed as described above, for example, in an acidic solution of palladium chloride. The substrate is dipped in a predetermined time for activation treatment.

【0024】その後、例えば硫酸銅が7g/l、ロッシ
ェル塩が75g/l、トリエタノールアミンが10g/
l、ホルマリンが25g/l、水酸化ナトリウムが20
g/l、炭酸ナトリウムが10g/lから成る液温50
〜55℃の無電解銅メッキ浴中に前記活性化処理済の配
線導体を有する絶縁基体を浸漬し、配線導体の露出表面
に銅を析出させることにより配線基板が作製される。
Thereafter, for example, copper sulfate is 7 g / l, Rochelle salt is 75 g / l, and triethanolamine is 10 g / l.
1, formalin 25g / l, sodium hydroxide 20
Liquid temperature 50 g / l and sodium carbonate 10 g / l
A wiring board is manufactured by immersing the insulating substrate having the activated wiring conductor in an electroless copper plating bath at ˜55 ° C. and depositing copper on the exposed surface of the wiring conductor.

【0025】かくして得られた配線基板には、更に銅か
ら成る厚膜回路が被着され、該厚膜回路には半導体素子
等の能動部品の他に、コンデンサや抵抗体等の各種受動
部品が接続される。
The wiring board thus obtained is further coated with a thick film circuit made of copper. The thick film circuit has various passive components such as capacitors and resistors in addition to active components such as semiconductor elements. Connected.

【0026】前記厚膜回路は銅の粉末にガラスフリット
と適当な有機溶剤、溶媒等を添加混合して銅ペーストを
調製し、該銅ペーストをその一部が配線導体に被着させ
たメッキ被覆層と接触するようにして絶縁基体の外表面
に印刷塗布し、然る後、これを中性雰囲気中、約900
℃の温度で焼成することにより絶縁基体の外表面に被着
される。
In the thick film circuit, copper powder is mixed with glass frit and an appropriate organic solvent, solvent, etc. to prepare a copper paste, and a part of the copper paste is applied to a wiring conductor by plating. Printed onto the outer surface of the insulating substrate in contact with the layer, and then applying this to about 900 in a neutral atmosphere.
It is applied to the outer surface of the insulating substrate by firing at a temperature of ° C.

【0027】尚、この場合、厚膜回路中には該厚膜回路
をケミカルボンドやガラスボンドにより強固に被着させ
るために多量のガラスフリットが添加され、厚膜回路の
銅とメッキ被覆層との密着領域が狭いものとなるが、両
者はいずれも同種の銅よりなるため強固に被着し、その
結果、厚膜回路に外力が印加されてもメッキ被覆層から
剥離することはなく、またメッキ被覆層と厚膜回路間の
電気的接続も確実、かつ良好なものとなる。
In this case, a large amount of glass frit is added to the thick film circuit in order to firmly adhere the thick film circuit by chemical bonding or glass bonding, and the thick film circuit is provided with copper and a plating coating layer. Although the adhesion area of is narrow, both are firmly adhered because they are made of the same kind of copper, and as a result, they do not separate from the plating layer even when external force is applied to the thick film circuit, and The electrical connection between the plating layer and the thick film circuit is also reliable and good.

【0028】かくして、係る配線基板はその表面に半導
体素子やコンデンサ等の部品が搭載され、該半導体素子
等を厚膜回路にはんだ等の接着剤を介して接合させるこ
とにより混成集積回路装置となる。
In this way, the wiring board has components such as semiconductor elements and capacitors mounted on the surface thereof, and the semiconductor elements and the like are joined to a thick film circuit via an adhesive such as solder to form a hybrid integrated circuit device. .

【0029】[0029]

【実施例】本発明の配線基板を評価するに際し、先ずア
ルミナ質焼結体から成る絶縁基体として、平均粒径が3
μmのAl2 3 90重量%に、SiO2 、MgO、C
aOを合計で10重量%加えた原料粉末に適当な有機バ
インダー、可塑剤、溶剤を添加混合して泥漿を調製し、
該泥漿を周知のドクターブレード法やカレンダーロール
法等のテープ成形技術により厚さ約300μmのセラミ
ックグリーンシートを成形した後、予め該セラミックグ
リーンシートの所定位置に打ち抜き加工を施してスルー
ホールを形成した。
EXAMPLES When evaluating the wiring board of the present invention, first, as an insulating base made of an alumina sintered body, an average particle size of 3 was obtained.
90% by weight of Al 2 O 3 of μm, SiO 2 , MgO, C
Prepare a slurry by adding and mixing an appropriate organic binder, plasticizer, and solvent to the raw material powder containing aO added in a total amount of 10% by weight.
The slurry was formed into a ceramic green sheet having a thickness of about 300 μm by a tape forming technique such as a well-known doctor blade method or calendar roll method, and then punched at a predetermined position of the ceramic green sheet to form a through hole. .

【0030】次に、タングステン粉末とガラス粉末を所
定の割合で混合し、公知の有機物系バインダーを添加混
合して調製した導電性ペーストを用いて前記セラミック
グリーンシートにスクリーン印刷法で評価用の配線パタ
ーンを印刷塗布するとともにスルーホールにも充填し、
これを複数枚積層した後、水素(H2 )や窒素(N2
の混合ガスから成る還元性雰囲気中、もしくはアルゴン
(Ar)ガス等の中性雰囲気中、約1600℃の温度で
焼成一体化して縦25.4mm、横25.4mm、厚さ
0.76mmの絶縁基体を作製した。
Next, using a conductive paste prepared by mixing tungsten powder and glass powder in a predetermined ratio and adding a known organic binder, the ceramic green sheet is screen-printed with wiring for evaluation. The pattern is printed and applied, and the through holes are also filled.
After stacking multiple layers, hydrogen (H 2 ) and nitrogen (N 2 )
Insulating of 25.4 mm in length, 25.4 mm in width, and 0.76 mm in thickness by firing and integrating at a temperature of about 1600 ° C. in a reducing atmosphere composed of mixed gas of, or in a neutral atmosphere such as argon (Ar) gas. A substrate was prepared.

【0031】かかる絶縁基体を塩化パラジウム、NaO
H、KOHを主成分とする活性液に時間を変えて浸漬
し、いわゆるパラジウム活性を行い、絶縁基体表面に露
出した配線導体上にPdを析出させる。
The insulating substrate is made of palladium chloride or NaO.
The Pd is deposited on the wiring conductor exposed on the surface of the insulating substrate by immersing in an active liquid containing H and KOH as main components for different times to perform so-called palladium activation.

【0032】その後、硫酸銅、ホルマリン、NaOHを
主成分とする無電解銅メッキ液に浸漬して約2.5〜
3.0μm厚の銅メッキ被覆を得た。尚、銅メッキ被覆
層の厚さは、目的とするメッキ厚に応じて浸漬時間を変
更することにより変更自由である。
After that, it is dipped in an electroless copper plating solution containing copper sulfate, formalin and NaOH as the main components, and then about 2.5-
A copper plated coating with a thickness of 3.0 μm was obtained. The thickness of the copper-plated coating layer can be freely changed by changing the dipping time according to the intended plating thickness.

【0033】かくして得られた評価用の配線基板を用い
て、銅メッキ被覆層中のPdの含有量は、0.5mm角
のワイヤーボンディングパッド部をHClやH2 SO4
等により銅メッキ被覆層を溶解し、ICP発光分光分析
や蛍光X線分析法、原子吸光分析法等により測定し、銅
メッキ被覆層中のPd量を算出した。
Using the thus obtained wiring board for evaluation, the content of Pd in the copper plating coating layer was 0.5 mm square in the wire bonding pad portion with HCl or H 2 SO 4
The copper-plated coating layer was dissolved by the method described above, and measured by ICP emission spectroscopy, fluorescent X-ray analysis, atomic absorption spectrometry, etc. to calculate the amount of Pd in the copper-plated coating.

【0034】また、銅メッキ被覆層のフクレは200倍
の金属顕微鏡にて目視検査し、フクレの有無を判定し
た。
The blisters on the copper-plated coating layer were visually inspected with a 200 × metallographic microscope to determine the presence or absence of blisters.

【0035】一方、銅メッキ被覆層の接着強度及びワイ
ヤーボンディング性の評価は、前記評価用の配線基板と
同様にして作製した2mm角のパターン上にSnメッキ
軟銅線をはんだ付けし、該Snメッキ軟銅線を銅メッキ
被覆面に対してほぼ垂直方向に引っ張り、破断荷重から
算出した接着強度により評価した。
On the other hand, the evaluation of the adhesive strength and wire bonding property of the copper-plated coating layer was carried out by soldering Sn-plated annealed copper wire on a 2 mm square pattern prepared in the same manner as the above-mentioned wiring board for evaluation, and then Sn-plating it. The annealed copper wire was pulled in a direction substantially perpendicular to the copper-plated surface, and evaluated by the adhesive strength calculated from the breaking load.

【0036】[0036]

【表1】 [Table 1]

【0037】表から明らかなように、Pd含有量が本発
明である請求範囲外の試料番号1では、銅メッキ被覆層
のフクレも認められずワイヤーボンディングも良好であ
るが、銅メッキ被覆層の接着強度が2.5kg/mm2
と低く、また同じく試料番号8では銅メッキ被覆層の接
着強度は高いものの、フクレが認められ、ワイヤーボン
ディング性が悪い。
As is apparent from the table, in Sample No. 1 whose Pd content is outside the scope of the present invention, no blistering of the copper plating coating layer is observed and wire bonding is good, but the copper plating coating layer Adhesive strength 2.5 kg / mm 2
Similarly, in Sample No. 8, although the adhesive strength of the copper plating coating layer is high, blistering is observed and the wire bonding property is poor.

【0038】それに対して本発明では、いずれもフクレ
は認められず、ワイヤーボンディング性も良好であり、
銅メッキ被覆層の接着強度も3.6kg/mm2 以上と
充分な強度を保持している。
On the other hand, in the present invention, no blister is observed and the wire bonding property is good,
The adhesive strength of the copper-plated coating layer is 3.6 kg / mm 2 or more, which is sufficient.

【0039】尚、本発明は前記実施例に限定されるもの
ではなく、本発明の要旨を逸脱しない範囲であれば種々
の変更が可能である。
The present invention is not limited to the above embodiments, but various modifications can be made without departing from the scope of the present invention.

【0040】[0040]

【発明の効果】本発明の配線基板によれば、絶縁基体中
及びその表面に高融点金属から成る配線導体を一体的に
形成し、該絶縁基体表面に露出した配線導体の少なくと
も一部を覆うように0.1〜7μg/cmのパラジウ
ムを含有するとともにメッキ後に熱処理が施されている
銅から成るメッキ被覆層を被着したことから、厚膜回路
形成時の600〜1000℃の焼き付け温度でも絶縁基
体表面に露出した配線導体と該配線導体の少なくとも一
部を覆うように被着させた銅から成るメッキ被覆層との
間にフクレを発生せず、メッキ被覆層の接着強度に影響
するメッキ粒子の粒成長を抑制することができるため、
該メッキ被覆層を強固に被着させることができ、該メッ
キ被覆層に直接ワイヤーボンディングが可能で、フリッ
プチップ接続法も適用可能となる上、部品搭載後のメッ
キ強度の信頼性が向上した配線基板が得られる。
According to the wiring board of the present invention, a wiring conductor made of a refractory metal is integrally formed in and on the surface of the insulating substrate, and at least a part of the wiring conductor exposed on the surface of the insulating substrate is covered. As described above, since the plating coating layer made of copper which contains 0.1 to 7 μg / cm 2 of palladium and is heat treated after plating is applied, the baking temperature of 600 to 1000 ° C. when forming a thick film circuit is applied. However, no blistering occurs between the wiring conductor exposed on the surface of the insulating substrate and the plating coating layer made of copper that is deposited so as to cover at least a part of the wiring conductor, which affects the adhesive strength of the plating coating layer. Since the grain growth of plated particles can be suppressed,
Wiring in which the plating coating layer can be firmly adhered, wire bonding can be directly performed on the plating coating layer, the flip chip connection method can be applied, and the reliability of plating strength after component mounting is improved. A substrate is obtained.

フロントページの続き (56)参考文献 特開 平2−292896(JP,A) 特開 平7−212009(JP,A) 特開 平7−297514(JP,A) 特開 平6−69632(JP,A) (58)調査した分野(Int.Cl.7,DB名) H05K 1/09 H05K 3/24 Continuation of front page (56) Reference JP-A-2-292896 (JP, A) JP-A-7-212009 (JP, A) JP-A-7-297514 (JP, A) JP-A-6-69632 (JP , A) (58) Fields surveyed (Int.Cl. 7 , DB name) H05K 1/09 H05K 3/24

Claims (4)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 絶縁基体に高融点金属から成る配線導体
を一体的に形成するとともに、該絶縁基体表面に露出し
た配線導体の少なくとも一部を覆うように銅(Cu)か
ら成るメッキ被覆層を被着した配線基板であって、前記
銅(Cu)から成るメッキ被覆層が銅と合金化せずに銅
中に固溶し拡散した0.1〜7μg/cm のパラジウ
ム(Pd)を含有するとともにメッキ後に熱処理が施さ
れていることを特徴とする配線基板。
1. A wiring conductor made of refractory metal is integrally formed on an insulating substrate, and a plating coating layer made of copper (Cu) is formed so as to cover at least a part of the wiring conductor exposed on the surface of the insulating substrate. A wiring board deposited, wherein the plated coating layer made of copper (Cu) does not alloy with copper
A wiring board containing 0.1 to 7 μg / cm 2 of palladium (Pd) which is solid-dissolved and diffused therein and is heat-treated after plating.
【請求項2】 前記熱処理は、前記絶縁基体の外表面に
前記メッキ被覆層と接触するように厚膜回路を形成する
ための焼成処理であることを特徴とする請求項1記載の
配線基板。
2. The wiring board according to claim 1, wherein the heat treatment is a baking treatment for forming a thick film circuit on the outer surface of the insulating substrate so as to come into contact with the plating layer.
【請求項3】 前記メッキ被覆層の接着強度が3.6k
g/mm 以上であることを特徴とする請求項1または
請求項2記載の配線基板。
3. The adhesive strength of the plating layer is 3.6 k.
The wiring board according to claim 1 or 2, wherein g / mm 2 or more .
【請求項4】 絶縁基体に高融点金属から成る配線導体
を一体的に形成するとともに、該絶縁基体表面に露出し
た配線導体の少なくとも一部を覆うように銅(Cu)か
ら成るメッキ被覆層を被着した配線基板であって、前記
銅(Cu)から成るメッキ被覆層が銅と合金化せずに銅
中に固溶し拡散した0.1〜7μg/cm のパラジウ
ム(Pd)を含有するとともにメッキ後に熱処理が施さ
れており、前記メッキ被覆層の接着強度が3.6kg/
mm 以上であることを特徴とする配線基板
4. A wiring conductor made of a refractory metal as an insulating substrate.
Is formed integrally and is exposed on the surface of the insulating substrate.
Copper (Cu) to cover at least a part of the wiring conductor
A wiring board coated with a plating coating layer comprising:
Copper (Cu) plating layer does not alloy with copper
0.1 to 7 μg / cm 2 of palladium dissolved and dissolved in
(Pd) contained and heat treated after plating
The adhesive strength of the plating layer is 3.6 kg /
A wiring board having a size of at least mm 2 .
JP04161496A 1996-02-28 1996-02-28 Wiring board Expired - Fee Related JP3512554B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP04161496A JP3512554B2 (en) 1996-02-28 1996-02-28 Wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP04161496A JP3512554B2 (en) 1996-02-28 1996-02-28 Wiring board

Publications (2)

Publication Number Publication Date
JPH09237946A JPH09237946A (en) 1997-09-09
JP3512554B2 true JP3512554B2 (en) 2004-03-29

Family

ID=12613225

Family Applications (1)

Application Number Title Priority Date Filing Date
JP04161496A Expired - Fee Related JP3512554B2 (en) 1996-02-28 1996-02-28 Wiring board

Country Status (1)

Country Link
JP (1) JP3512554B2 (en)

Also Published As

Publication number Publication date
JPH09237946A (en) 1997-09-09

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