JP3597112B2 - Congestion control method for ATM exchange - Google Patents

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to an ATM (Asynchronous Transfer Mode) exchange accommodating an ABR (Available Bit Rate) service class, and a rate between end terminals using an RM (Resource Management) resource in an ATM (Asynchronous Transfer Mode) exchange. The present invention relates to a congestion control method for performing congestion control by control.
[0002]
[Prior art]
When an ABR class ATM connection is set up between the user terminals, the data transmitting terminal periodically transmits the RM cells to the data receiving terminals by mixing them with normal data cells. The data receiving terminal returns the received RM cell to the data transmitting terminal and transmits it. The RM cell may be newly created by the ATM switch in addition to the one created by the data transmitting terminal. The network writes necessary congestion information in the RM cell while being returned to the data transmitting terminal, and the data transmitting terminal that receives the information adaptively adjusts the transmission rate ACR (Allowed Cell Rate) based on the information. I do.
[0003]
FIG. 8 shows a format of an RM cell defined by the ATM Forum, which is a deliberative body on ATM communication.
[0004]
In the format, the first 5 bytes are a standard ATM cell header having PTI (Payload Type Identifier) = 110. PTI = 110 indicates that the cell is an RM cell.
[0005]
The next one byte is an RM protocol identifier, which indicates the identification of the service using the RM cell. “1” is assigned to ABR.
[0006]
The next one byte is a message type and includes a DIR element, a BN element, a CI element, a NI element, and an RA element as shown in the lower part of FIG. Each element consists of one bit.
[0007]
The DIR element indicates the direction in which the RM cell is flowing. If it is flowing in the same direction as the data cells, "0" is assigned, this direction is called the forward direction, and this RM cell is called the forward RM cell. If the direction is reversed, "1" is assigned. This direction is called the backward direction, and the RM cell is called the backward RM cell. The data receiving terminal that receives the forward RM cell changes the DIR element to “1” and then replies to the data transmitting terminal.
[0008]
The BN element indicates who created the RM cell. “0” indicates that it was created by the data transmitting terminal, and “1” indicates that it was created by the data receiving terminal or switch.
[0009]
The CI element is used to notify a terminal of the presence of network congestion. The CI is set when the switch detects congestion or when the data receiving terminal has received a data cell in which the EFCI (Explicit Forward Congestion Indication) bit has been set to "1". You. If the CI of the received backward RM cell is "1", the data transmitting terminal must reduce the transmission rate.
[0010]
The NI element is used to prevent the data transmission terminal from increasing its transmission rate. If the NI of the received backward RM cell is "1", the data transmitting terminal does not increase the transmission rate.
[0011]
The RA element is an area not used by the ATM Forum. Others are reserved areas.
[0012]
The next 2 bytes are an ER area. First, a maximum transmission rate PCR (Peak Cell Rate: peak cell rate) is described by the data transmitting terminal and flows in the forward direction. As a result, the rate is reduced to the rate permitted by each ATM exchange.
[0013]
The next two bytes are a CCR area, in which the transmission rate of the data transmitting terminal when the RM cell is transmitted is described.
[0014]
The next two bytes are an MCR (Minimum Cell Rate: minimum cell rate) area in which the minimum transmission rate set for the connection through which the RM cell flows is described.
[0015]
The next two bytes are a QL area and an SN area, and are not used by the ATM forum. The spare area below this is an empty field whose use purpose is undefined.
[0016]
Each ATM exchange on the ATM connection updates the resource management information such as whether the backward RM cell passing therethrough is congested and the transfer rate ER (Explicit Rate) that can be transmitted on the ATM exchange. Is applied.
[0017]
Specifically, if it is determined that there is congestion, the CI bit is set to “1”. Further, if a function for calculating a transfer rate ER that can be transmitted is provided, a smaller value is selected from the result calculated by itself and the ER value already written in the backward RM cell, It is recorded in the ER area in the backward RM cell. Further, under the present circumstances, when there are a plurality of buffers, the update of the ER value is updated based on the congestion information of each buffer.
[0018]
[Problems to be solved by the invention]
In the above-described ABR rate control method using ER, it is necessary to know the state of the logical queue of the cell buffer in order to calculate the ER value. However, in the case of a system divided into a plurality of cell buffers, the following inconvenience occurs because the calculation of the ER value is performed independently for each cell buffer. That is, an ABR connection passing through a cell buffer with a low usage rate does not have its ER value rewritten inside the ATM switch, but an ABR connection passing through another cell buffer with a high usage rate has its ER value rewritten inside the ATM switch. It happens to be done.
[0019]
In this way, even between ABR connections passing through the same ATM exchange, the ER value to be set is different if the cell buffer passing through is different, so that so-called fair share cannot be guaranteed. Was.
[0020]
As one of the methods for guaranteeing fair distribution, a method of guaranteeing fair distribution between ABR connections passing through the same ATM switch by adopting a shared memory type ATM switch having a single cell buffer can be considered. However, in the case of a shared memory type ATM exchange, it is difficult to increase the exchange capacity of the ATM exchange and increase the cell buffer amount due to restrictions such as the access speed of the memory used for the cell buffer. It is not considered in the present invention.
[0021]
SUMMARY OF THE INVENTION It is an object of the present invention to provide, in an ATM switch composed of n (n ≧ 1) cell buffers, congestion that guarantees fair share between ABR connections passing through different cell buffers in the same ATM switch. The purpose is to provide a control method.
[0022]
[Means for Solving the Problems]
The congestion control system according to the present invention uses the logical queue length of the input cell buffer unit 100 in an ATM switch composed of n (n ≧ 1) cell buffers as shown in FIG. It is characterized in that a circuit for calculating congestion information of the output cell buffer unit 200 is provided in the output cell buffer unit 200 and an RM calculation unit 400 for performing the calculation.
[0023]
As a result, the most congested information among “congestion information of all input cell buffers”, “congestion information of output cell buffers”, and “congestion information included in RM cells” is set in the backward RM cell. Therefore, when the same ATM exchange is used for different ATM connections, fairness of a buffer can be guaranteed.
[0024]
That is, the congestion control method of the ATM switch according to the present invention accommodates an ABR service class, supports a rate control which is a congestion control of the ABR service class, and divides to perform delay priority control and discard priority control (Qos). An ATM switch provided with n (n ≧ 1) input cell buffer units and n output cell buffer units, the ATM switch including an RM operation unit connected to each of the input cell buffer units; The RM operation unit calculates congestion information of the entire input cell buffer unit from logical queue length information of the input cell buffer sent from all the input cell buffer units, and stores a first RM cell in the input cell buffer unit. A first RM cell rewriting circuit, wherein the first RM cell rewriting circuit includes congestion information sent from the RM operation unit and is included in the RM cell; Comparing with the congestion information, setting the congestion information indicating the most congested of both in the RM cell, and disposing a congestion information calculation circuit and a second RM cell rewriting circuit in the output cell buffer unit. The congestion information calculation circuit calculates the congestion information of the output cell buffer unit from the logical queue length information of the output cell buffer, and the second RM cell rewrite circuit calculates the congestion information calculated by the congestion information calculation circuit. The RM cell is compared with the congestion information included in the RM cell, and congestion information indicating that the two are most congested is set in the RM cell .
[0032]
BEST MODE FOR CARRYING OUT THE INVENTION
(1) Description of Configuration Next, an embodiment of the present invention will be described with reference to the drawings.
[0033]
FIG. 1 is a block diagram showing an embodiment of a congestion control method for an ATM exchange according to the present invention.
[0034]
In FIG. 1, an ATM switch 503 is connected to each of n (n ≧ 1) input cell buffer units 100, n output cell buffer units 200, switch units 300, and input cell buffer units 100. And an RM operation section 400.
[0035]
FIG. 2 is a detailed block diagram illustrating an example of the input cell buffer unit.
[0036]
In FIG. 2, an input cell buffer unit 100 determines, for each QoS (Quality of service) class, each output route, and each VC (Virtual Channel: virtual channel) from header information of a cell input from a line. A QosDEMUX 101 for selecting a logical queue that is logically divided into logical queues, a logical queue control device 103 for controlling cell writing and reading to the logical queue, a cell temporary storage device 102 for implementing the logical queue, and a logical queue control A logical queue length monitoring device 104 for monitoring each logical queue length based on the write / read control information from the device 103 and transmitting the logical queue length to the RM operation unit 400, and receiving congestion information from the RM operation unit 400, The cell output from the temporary storage device 102 is monitored. Comparing the congestion information from the calculation unit 400 with the congestion information written in the RM cell, and when the congestion information from the RM calculation unit 400 is more congested, the congestion information from the RM calculation unit 400 , RM value rewriting device 105 for rewriting the ER value.
[0037]
FIG. 3 is a detailed block diagram illustrating an example of the output cell buffer unit.
[0038]
In FIG. 3, the output cell buffer unit 200 includes a QosDEMUX 201 for selecting a logical queue that is logically divided for each Qos class, for each outgoing path, and for each VC from the header information of the input cell; A logical queue control device 203 for controlling cell writing and reading to the logical queue, a cell temporary storage device 202 for realizing the logical queue, and a logical queue length based on write / read control information from the logical queue control device 203. , A congestion information computing device 205 that determines a congestion state from information from the logical queue length monitoring device 204, and a cell output from the cell temporary storage device 202. For example, the congestion information from the congestion information calculation device 205 is compared with the congestion information written in the RM cell, and the congestion information operation is performed. If the direction of the congestion information from the device 205 is congested, the congestion information from the congestion information calculation unit 205, and a RM cell rewrite unit 206 to rewrite ER value.
[0039]
The switch unit 300 has a function of switching an ATM cell input from the input cell buffer unit 100 and outputting the ATM cell to the output cell buffer unit 200. However, since the configuration diagram is not directly related to the present invention, a description thereof will be omitted.
[0040]
FIG. 4 is a detailed block diagram illustrating an example of the RM operation unit.
[0041]
In FIG. 4, the RM operation unit 400 receives congestion operation information from each input cell buffer unit 100, calculates congestion information of the entire input cell buffer unit from the congestion operation information of each input cell buffer unit 100, and calculates the calculated congestion information. An RM arithmetic unit 401 for outputting information to each input cell buffer unit 100 is provided.
[0042]
(2) Description of Operation Next, the operation of the present invention will be described.
[0043]
First, the congestion control of the ABR service class will be briefly described.
[0044]
FIG. 5 is a block diagram showing a state of feedback type congestion control in an ABR connection. When an ABR connection is established between the data transmitting terminal 510 and the data receiving terminal 520, RM cells are transferred in addition to user data cells.
[0045]
FIG. 6 is a block diagram showing an example of fair distribution among a plurality of ABR connections.
[0046]
In FIG. 6, as an example, three ATM exchanges 500, 501, and 502, four data transmission terminals 510, 511, 512, 513, and four data reception terminals 520, 521, 522, and 523, respectively. A network connected by transmission paths 600, 601, 602, 603, 604, 605, 606, 607, 608, and 609 having a transmission path bandwidth of 150 Mbps will be described as an example.
[0047]
The transmission path 603 between the ATM switch 500 and the ATM switch 501 is set with three connections of the data transmission terminals 510, 511, 512 and the data reception terminals 520, 521, 522. The divided 50 Mbps is allocated to each connection.
[0048]
The transmission path 607 between the ATM switch 501 and the ATM switch 502 is set for the connection between the data transmission terminals 512 and 513 and the data reception terminals 522 and 523, but is not 75 Mbps obtained by dividing 150 Mbps by 2 but data transmission. Since the bandwidth of the connection between the terminal 512 and the data receiving terminal 522 is limited to 50 Mbps on the transmission line 603 between the ATM exchange 500 and the ATM exchange 501, the bandwidth of the connection between the data transmitting terminal 513 and the data receiving terminal 523 includes The remaining 100 Mbps obtained by subtracting 50 Mbps from 150 Mbps will be allocated.
[0049]
Next, the reason why fair distribution cannot be guaranteed when the input cell buffer is divided will be described with reference to FIG. Here, an ATM network composed of three ATM exchanges 500, 501, 502, four data transmission terminals 510, 511, 512, 513, and four data reception terminals 520, 521, 522, 523 is shown. An example will be described.
[0050]
The three ATM exchanges 500, 501 and 502 are so-called input / output buffer type ATM exchanges each having an input cell buffer unit 100 and an output cell buffer unit 200 inside the ATM exchange. 2 and a switch unit 300. The 2 × 2 ATM switches 500, 501, and 502 have two input ports and two output ports, and input cell buffer units 100-1 and 100-2 are provided in front of the respective input ports. You. Output cell buffer units 200-1 and 200-2 are provided downstream of each output port.
[0051]
It is assumed that the data transmitting terminal 510 and the data receiving terminal 520 use a CBR (Constant Bit Rate: fixed transmission rate) connection with reserved bandwidth. It is assumed that the data transmitting terminal 511 and the data receiving terminal 521 use a VBR (Variable Bit Rate: variable transmission rate) connection with reserved bandwidth. It is assumed that the data transmission terminals 512 and 513 and the data reception terminals 522 and 523 use an ABR (Available Bit Rate: available transmission rate) connection.
[0052]
The connection between the data transmission terminals 510 and 511 and the data reception terminals 520 and 521 is established via the input cell buffer unit 100-1, the switch unit 300, and the output cell buffer unit 200-1 of the ATM exchange 500. It is assumed that they are connected via The connection between the data transmission terminal 512 and the data reception terminal 522 is connected via the input cell buffer unit 100-1, the switch unit 300, and the output cell buffer unit 200-2 of the ATM exchange 500, and further via the ATM exchange 502. It is assumed that The connection between the data transmission terminal 513 and the data reception terminal 523 is connected via the input cell buffer unit 100-2, the switch unit 300, and the output cell buffer unit 200-2 of the ATM exchange 500, and further via the ATM exchange 502. It is assumed that
[0053]
Here, the cells input from the data transmission terminal 512, which is an ABR connection using the input cell buffer unit 100-1, are cells input from the data transmission terminals 510 and 511 whose bandwidth is reserved. It is easy to accumulate in the buffer unit 100-1. For this reason, the number of cells stored in the input cell buffer unit 100-1 increases, and the logical queue length increases. As a result, it is determined that there is congestion, and the data transmission terminal 512 lowers the transmission rate by the ABR congestion control. On the other hand, the cells input from the data transmission terminal 513 using the input cell buffer unit 100-2 have no connection for which the band is reserved, and the cells are accumulated in the input cell buffer unit 100-2. In this case, the logical queue length is kept short, and it is determined that no congestion has occurred. Therefore, the data transmission terminal 513 increases the transmission rate. As described above, when judging the congestion state individually, there is a difference in the available bandwidth between ABR connections passing through the same ATM exchange, and fair distribution cannot be performed between ABR connections.
[0054]
Next, the operation of the ATM switch whose entire configuration is shown in FIG. 1 and whose detailed configuration is shown in FIGS. 2 and 3 and FIG. 4 will be described.
[0055]
ATM cells input from the line are sent to the input cell buffer unit 100 shown in FIG. The QosDEMUX 101 in the input cell buffer unit 100 has a logical queue number management table loaded with a call control program and set for each connection from a processor device for setting and releasing a call. With reference to the management table, the logical queue number is transmitted to the logical queue control device 103 and the logical queue length monitoring device 104, and the cell is transmitted to the temporary cell storage device 102. The logical queue control device 103 instructs the cell temporary storage device 102 to write the cell. If there is a cell to be read from the temporary cell storage device 102, the logical queue control device 103 issues a read instruction to the temporary cell storage device 102 and simultaneously issues a logical queue of the read cell to the logical queue length monitoring device 104. Advertise the number. The logical queue length monitoring device 104 manages the logical queue length of each logical queue based on the logical queue numbers sent from the QosDEMUX 101 and the logical queue control device 103, and sends the logical queue length information to the RM operation unit 400. .
[0056]
The ATM cell read from the temporary cell storage device 102 is input to the RM cell rewriting device 105. If the cell is an RM cell, the congestion information sent from the RM operation unit 400 and the RM cell itself are used. Comparing the congestion information with the RM cell, if the congestion information from the RM operation unit 400 is more congested, it updates the ER value in the ER area of the RM cell and then outputs it to the switch unit 300. FIG. 8 shows a format of an RM cell defined by the ATM Forum, which is a deliberative body on ATM communication.
[0057]
The ATM cell output from the input cell buffer unit 100 enters the switch unit 300, is switched, and is output to the output cell buffer unit 200 shown in FIG.
[0058]
The QosDEMUX 201 in the output cell buffer unit 200 has a logical queue number management table loaded with a call control program and set for each connection from a processor device for setting and releasing a call. By referring to the management table, the logical queue number is transmitted to the logical queue control device 203 and the logical queue length monitoring device 204, and the cell is transmitted to the temporary cell storage device 202. The logical queue control device 203 instructs the cell temporary storage device 202 to write the cell. If there is a cell to be read from the temporary cell storage device 202, the logical queue control device 203 issues a read instruction to the temporary cell storage device 202, and at the same time, the logical queue of the cell read to the logical queue length monitoring device 204. Advertise the number.
[0059]
The logical queue length monitoring device 204 manages the logical queue length of each logical queue based on the QosDEMUX 201 and the logical queue number sent from the logical queue control device 203, and sends the logical queue length information to the congestion information calculation device 205. . The congestion information calculation device 205 calculates the congestion information of the output cell buffer unit 200 based on the logical queue length information. The ATM cell read from the temporary cell storage device 202 is input to the RM cell rewriting device 206. If the cell is an RM cell, the congestion information sent from the congestion information calculation device 205 and the RM cell itself are used. When the congestion information from the congestion information calculation device 205 is more congested, the ER value in the ER area of the RM cell is updated and then output to the line.
[0060]
The RM calculation device 401 in the RM calculation unit 400 calculates the congestion information of the entire input cell buffer unit 100 based on the logical queue length information of the input cell buffer unit 100 sent from each input cell buffer unit 100, The result is transmitted to each input cell buffer unit 100.
[0061]
【The invention's effect】
As described above, according to the congestion control method of the present invention, in an ATM exchange composed of n (n ≧ 1) cell buffers, the congestion information of all input cell buffers in the ATM exchange and the output congestion information of the output cell buffer are provided. By setting the most congested information among the congestion information and the congestion information included in the RM cell in the RM cell, fair share can be achieved between ABR connections passing through different cell buffers in the same ATM exchange. Can be guaranteed.
[Brief description of the drawings]
FIG. 1 is a block diagram showing an embodiment of a congestion control method for an ATM exchange according to the present invention.
FIG. 2 is a detailed block diagram illustrating an example of an input cell buffer unit.
FIG. 3 is a detailed block diagram illustrating an example of an output cell buffer unit.
FIG. 4 is a detailed block diagram illustrating an example of an RM calculation unit.
FIG. 5 is a block diagram showing a state of feedback type congestion control in an ABR connection.
FIG. 6 is a block diagram illustrating an example of fair distribution among a plurality of ABR connections.
FIG. 7 is a diagram illustrating an example in which fair distribution cannot be performed among a plurality of ABR connections.
FIG. 8 is a diagram showing a format of an RM cell defined by an ATM forum.
[Explanation of symbols]
100 Input cell buffer unit 101 QosDEMUX
Reference Signs List 102 Temporary cell storage device 103 Logical queue control device 104 Logical queue length monitoring device 105 RM cell rewriting device 200 Output cell buffer unit 201 QoSDEMUX
202 Temporary cell storage device 203 Logical queue control device 204 Logical queue length monitoring device 205 Congestion information operation device 206 RM cell rewrite device 300 Switch unit 400 RM operation unit 401 RM operation devices 500, 501, 502, 503 ATM exchanges 510, 511, 512, 513 Data transmission terminals 520, 521, 522, 523 Data reception terminals 600, 601, 602, 603 Transmission lines 604, 605, 606, 607 Transmission lines 608, 609 Transmission lines

Claims (1)

N (n ≧ 1) input cell buffers divided to accommodate an ABR service class, support rate control as a congestion control of the ABR service class, and perform delay priority control and discard priority control (Qos) Part and n
In an ATM switch provided with a plurality of output cell buffers, the ATM switch includes an RM operation unit connected to each of the input cell buffer units, and the RM operation unit transmits data from all the input cell buffer units. Calculating the congestion information of the entire input cell buffer unit from the logical queue length information of the input cell buffer, disposing a first RM cell rewriting circuit in the input cell buffer unit, Comparing the congestion information sent from the RM operation unit with the congestion information included in the RM cell, and setting the congestion information indicating the most congested of both in the RM cell; A congestion information calculation circuit and a second RM cell rewriting circuit are arranged on the output cell buffer based on logical queue length information of an output cell buffer. The second RM cell rewriting circuit compares the congestion information calculated by the congestion information calculation circuit with the congestion information included in the RM cell, and calculates A congestion control method for an ATM exchange characterized by setting congestion information indicating that there is an error in the RM cell.

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