JP3583769B2 - Receiver - Google Patents
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- JP3583769B2 JP3583769B2 JP2002227491A JP2002227491A JP3583769B2 JP 3583769 B2 JP3583769 B2 JP 3583769B2 JP 2002227491 A JP2002227491 A JP 2002227491A JP 2002227491 A JP2002227491 A JP 2002227491A JP 3583769 B2 JP3583769 B2 JP 3583769B2
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Description
【0001】
【発明の属する技術分野】
本発明は、例えばデジタル放送に用いられ、同期符号と主信号を合わせて誤り訂正符号化して伝送される信号を受信する受信装置に関する。
【0002】
【従来の技術】
近年、デジタル方式による衛星テレビジョン放送が実現化し普及しつつあるが、伝送路数の制限から、時分割多重による階層伝送の必要性が生じてきている。
【0003】
ここで、時分割多重化伝送にあっては、時分割での変調方式が変えられるような場合、フレーム構造を認識しないと正しく復調できないため、同期判定が必須となる。
【0004】
また、デジタル伝送では、伝送路の変化や伝送特性の向上といった観点から誤り訂正が必須であるが、中でも誤り訂正回路の動作のしやすさといった観点などから、同期符号を含めた誤り訂正符号化する方式が考えられる。
【0005】
但し、誤り訂正符号化によって同期符号が変化してしまう場合、同期性能が劣化する可能性がある。そのため、従来のデジタル伝送では、結局、同期部分には符号化を施さないなどの処理を行っている。
【0006】
【発明が解決しようとする課題】
以上述べたように、従来のデジタル伝送にあっては、主信号に同期符号を付加した場合、同期符号を合わせて誤り訂正符号化すると、同期化処理の性能劣化が問題となる。
【0007】
本発明は、上記の問題を解決し、主信号に同期符号を付加してデジタル伝送する際に、同期符号を合わせて誤り訂正符号化しても、同期化処理の性能劣化を抑圧し、同期化処理の性能と誤り訂正処理能力を共に満足させることのできる同期方式によるデジタル伝送信号を受信する受信装置を提供することを目的とする。
【0008】
【課題を解決するための手段】
上記の目的を達成するために本発明に係る受信方法は、主信号に同期符号として16進数の1B95hを付加し、同期符号と主信号を合わせて非組織符号である多項式G133,171により畳み込み符号化を行って伝送する伝送システムに用いられ、この伝送信号を受信する受信方法であって、復調手段により前記受信された伝送信号を復調することにより信号成分を摘出し、検出手段により前記復調手段で摘出された信号のうち畳み込み符号化後の符号の一部である16進数のECD28hを検出し、同期判定手段により前記検出手段の検出結果に基づいて同期を判定することを特徴とする。
【0009】
また、本発明に係る受信装置は、主信号に同期符号として16進数の1B95hを付加し、同期符号と主信号を合わせて非組織符号である多項式G133,171により畳み込み符号化を行って伝送する伝送システムに用いられ、この伝送信号を受信する受信装置であって、前記受信された伝送信号を復調し、信号成分を摘出する復調手段と、この復調手段で摘出された信号のうち、畳み込み符号化後の符号の一部である16進数のECD28hを検出する検出手段と、この検出手段の検出結果に基づいて同期を判定する同期判定手段とを具備することを特徴とする。
【0010】
【発明の実施の形態】
以下、図面を参照して本発明の実施の形態を詳細に説明する。
【0011】
図1は本発明に係る同期方式を用いたシステム構成を示すものである。まず、送信装置側において、同期符号多重部11は伝送する主信号S1及び同期符号S2を図2に示すフレーム構造に従って時分割に多重化する。誤り訂正符号化部12は同期符号多重部11で得られた同期符号+主信号に対し、誤り訂正を施す。変調部13は誤り訂正符号化部12で誤り訂正符号化された信号を、同期符号や主信号の部分に応じて変調方式を変えながらPSK、QAM等の変調処理を施し、伝送する。
【0012】
一方、受信装置側において、復調部21では、信号処理が可能なように復調動作を行い、信号成分を摘出する。同期検出部22は復調部21で摘出された信号のうち、同期符号もしくは同期符号の差分をとったものを検出する。同期判定部23は、同期検出部22で検出された信号が同期信号であるか否かの判定を行い、フレーム構造を再現して復調部21に戻す。
【0013】
尚、同期検出部22では、同期符号は誤り訂正後の一意となる部分を利用して同期検出を行う。この際、同期符号S2には、誤り訂正符号化後の信号で一意となる部分が相関の高い符号となるものを選択することにより、誤った同期検出を行うことを低減させることが可能となる。
【0014】
図2に示す同期符号+主信号のフォーマットにおいて、同期符号、主信号に連続して誤り訂正をかける場合、誤り訂正の種類によっては元の信号成分が残らず、同期判定が困難になる。以下に誤り訂正符号化方式の種類について説明する。
【0015】
まず、ブロック符号などには、組織符号(元の信号+訂正用符号が付加されたもの)が多いが、特に畳み込み符号の中には、非組織符号(元の信号とは同一ではない)が多いため、符号化前に相関が高く選ばれていても、符号化後の同期符号の相関が高いという補償はない。
例)組織符号(例えばブロック符号)
135Ah→135A7932h(=前半部分は同一符号)
非組織符号(例えば畳み込み符号)
1B95h→×××ECD28h(×××は不定、一致部分なし)
図3に同期符号+ヘッダ+主信号の多重化フォーマットの一例を示す。図に示すように、特に同期符号化後に各変調方式を示すヘッダ情報を含む場合や、変調方式が時分割されて多重化され、その変調方式に応じた復調動作を行う場合など、同期を確立してからではないと誤り訂正そのものが動作しない。このため、同期判定を誤り訂正前に行う必要があるが、同期符号が誤り訂正符号化されているため、符号化された信号では同期性能が保証されないという問題が発生する。
【0016】
相関性の低い同期符号により同期をかけると、引き込み時に疑似同期と同期はずれを繰り返すことで、引き込み時間の増大、不安定な同期引き込みが発生し、データ再生が見込めない。
【0017】
そこで、本発明の同期方式では、同期符号として、相関性の高い符号を選択するだけでなく、誤り訂正符号化処理後のうち、前後の信号によらず一意となる部分の符号で、誤り訂正符号化処理前後で自己相関性のある符号を選択する。これにより、同期性能を改善することが可能となる。
【0018】
この場合、受信装置における復調処理では、その一意となる既知部分の検出により、訂正動作を行うことなく、同期判定が可能となり、さらには復調動作に反映させることで、復調動作をも安定させることが可能となる。これらは勿論、図3に示すように同期符号が一つとは限らず、複数の場合にも全く同様に適用が可能である。
【0019】
ここで、自己相関について、例をあげて説明する。
【0020】
例として、8ビットの符号の相関を考えた場合、符号を巡回符号(ずらした時に一巡して、後ろのビットを前にもってくる)とみなし、自分自身とずらしたビット列を比較し、一致するビット数をカウントする。例として8ビットの11101011符号列について図4に示す。
【0021】
この場合、同一するビットは8ビット中4ビットとなり、これが少なければ少ないほど同期がずれている(正しくない)と判定できるため、誤同期の可能性が低くなる。したがって、自分自身がずらしたビット系列の一致するビット数が少ないビット列が同期符号として好ましい。
【0022】
自分自身を除く、8−1=7ビットずらし量全てについて、同様の操作を行い、一致するビット数をカウントし、その少ないものを自己相関の高い符号とみなす。
【0023】
同期符号1B95h(16ビット)を多項式G133,171で畳み込み符号化すると、符号化により、×××ECD28h(32ビット)符号となる。但し、畳み込み符号化は前後のデータ列の値により、一部の値が不確定となる(上記×××部分)。そのため、前後の符号によらず、一意となるECD28h(20ビット)の部分だけについて着目する。
【0024】
そこで、本発明である1B95hの畳み込み符号化後の一意となる符号ECD28hについて解析したところ、1,2,10,18,19ビットずれの時、一致する符号は8ビット、それ以外では10ビットとなり、誤同期を起こしにくい、高い相関性があることが検証された。
【0025】
【発明の効果】
以上述べたように、本発明によれば、主信号に同期符号を付加してデジタル伝送する際に、同期符号を合わせて誤り訂正符号化しても、同期化処理の性能劣化を抑圧し、同期化処理の性能と誤り訂正処理能力を共に満足させることのできる同期方式によるデジタル伝送信号を受信する受信装置を提供することができる。
【図面の簡単な説明】
【図1】本発明に係る同期方式を用いたシステムの一実施形態を示すブロック図。
【図2】本発明の伝送フォーマットの一例を示す図。
【図3】本発明の他の伝送フォーマットの一例を示す図。
【図4】本発明の同期方式における自己相関について説明するための図。
【符号の説明】
11…同期符号多重部、12…誤り訂正符号化部、13…変調部、21…復調部、22…同期検出部、23…同期判定部。[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a receiving apparatus that is used for, for example, digital broadcasting, and that receives a signal transmitted by performing error correction coding on a combination of a synchronization code and a main signal.
[0002]
[Prior art]
2. Description of the Related Art In recent years, digital satellite television broadcasting has been realized and spread, but the need for hierarchical transmission by time division multiplexing has arisen due to the limitation of the number of transmission paths.
[0003]
Here, in time-division multiplexing transmission, when the modulation scheme in time division can be changed, demodulation cannot be performed correctly without recognizing the frame structure, and therefore synchronization determination is essential.
[0004]
In digital transmission, error correction is indispensable from the viewpoint of changes in the transmission path and improvement of transmission characteristics, but error correction coding including synchronization codes is particularly important from the viewpoint of easy operation of the error correction circuit. There is a method to do it.
[0005]
However, if the synchronization code changes due to the error correction coding, the synchronization performance may be degraded. Therefore, in the conventional digital transmission, after all, processing such as not performing encoding on the synchronous portion is performed.
[0006]
[Problems to be solved by the invention]
As described above, in the conventional digital transmission, when a synchronization code is added to a main signal, if the error correction coding is performed together with the synchronization code, performance degradation of the synchronization processing becomes a problem.
[0007]
SUMMARY OF THE INVENTION The present invention solves the above-described problem, and when performing digital transmission by adding a synchronization code to a main signal, suppresses performance deterioration of synchronization processing even if error correction coding is performed with the synchronization code. It is an object of the present invention to provide a receiving apparatus for receiving a digital transmission signal by a synchronous system capable of satisfying both processing performance and error correction processing capability.
[0008]
[Means for Solving the Problems]
In order to achieve the above object, a receiving method according to the present invention provides a convolutional code by adding a hexadecimal 1B95h as a synchronization code to a main signal, and combining the synchronization code and the main signal with a polynomial G133, 171 which is a non-systematic code. Used in a transmission system for performing transmission by performing demodulation and receiving the transmission signal, extracting a signal component by demodulating the received transmission signal by demodulation means, and detecting the demodulation means by detection means. The ECD 28h in hexadecimal, which is a part of the convolutionally encoded code, is detected from the signals extracted in step (1), and synchronization is determined by the synchronization determination unit based on the detection result of the detection unit.
[0009]
In addition, the receiving apparatus according to the present invention adds 1B95h in hexadecimal as a synchronization code to the main signal, performs convolutional coding on the synchronization code and the main signal by using a polynomial G133, 171 which is a non-systematic code, and transmits the result. What is claimed is: 1. A receiving apparatus used in a transmission system, for receiving a transmission signal, comprising: a demodulation means for demodulating the received transmission signal and extracting a signal component; and a convolutional code among signals extracted by the demodulation means. It is characterized by comprising detection means for detecting a hexadecimal ECD 28h which is a part of the converted code, and synchronization determination means for determining synchronization based on the detection result of the detection means.
[0010]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
[0011]
FIG. 1 shows a system configuration using a synchronization system according to the present invention. First, on the transmission device side, the synchronization
[0012]
On the other hand, on the receiving device side, the
[0013]
Note that the
[0014]
In the synchronous code + main signal format shown in FIG. 2, when the synchronous code and the main signal are successively subjected to error correction, the original signal component does not remain depending on the type of error correction, making synchronization determination difficult. Hereinafter, the types of the error correction coding scheme will be described.
[0015]
First, many block codes and the like include systematic codes (codes to which an original signal and a correction code are added), and among convolutional codes, in particular, non-systematic codes (not identical to the original signals) are included. Therefore, even if a high correlation is selected before encoding, there is no compensation that the correlation of the synchronous code after encoding is high.
Example) systematic code (for example, block code)
135Ah → 135A7932h (= the first half has the same sign)
Non-systematic codes (eg convolutional codes)
1B95h → xxx ECD28h (xxx is undefined, no match)
FIG. 3 shows an example of a multiplex format of a synchronization code + a header + a main signal. As shown in the figure, synchronization is established especially when header information indicating each modulation scheme is included after synchronous coding, or when the modulation scheme is time-division multiplexed and a demodulation operation according to the modulation scheme is performed. Otherwise, the error correction itself does not work. For this reason, it is necessary to perform synchronization determination before error correction. However, since the synchronization code is error-correction-coded, there arises a problem that the coded signal does not guarantee synchronization performance.
[0016]
When synchronization is performed using a synchronization code having low correlation, pseudo synchronization and synchronization loss are repeated at the time of pull-in, so that the pull-in time increases and unstable pull-in occurs, and data reproduction cannot be expected.
[0017]
Therefore, in the synchronization method of the present invention, not only a code having high correlation is selected as a synchronization code, but also a code of a unique part after error correction coding processing, which is unique regardless of a signal before and after, is used for error correction. A code having an autocorrelation before and after the encoding process is selected. This makes it possible to improve synchronization performance.
[0018]
In this case, in the demodulation process in the receiving apparatus, the synchronization can be determined without performing a correction operation by detecting the unique known portion, and furthermore, the demodulation operation is reflected to stabilize the demodulation operation. Becomes possible. Of course, the number of synchronization codes is not limited to one as shown in FIG. 3, and the same can be applied to a plurality of synchronization codes.
[0019]
Here, the autocorrelation will be described with an example.
[0020]
As an example, when considering the correlation of an 8-bit code, the code is regarded as a cyclic code (it makes a round when shifted, and the subsequent bit is brought forward), compares the bit sequence shifted with itself and matches. Count the number of bits. As an example, an 8-bit 11101111 code string is shown in FIG.
[0021]
In this case, the same bits are 4 bits out of 8 bits, and the smaller the number is, the more it can be determined that the synchronization is shifted (incorrect), and the possibility of erroneous synchronization is reduced. Therefore, a bit sequence having a small number of matching bits in the bit sequence shifted by itself is preferable as the synchronization code.
[0022]
The same operation is performed for all of the 8-1 = 7-bit shift amounts except for itself, the number of matching bits is counted, and the smaller number is regarded as a code having high autocorrelation.
[0023]
When the synchronization code 1B95h (16 bits) is convolutionally coded by the polynomials G133 and G171, the coding results in a xxx ECD28h (32 bits) code. However, in the convolutional coding, some values are uncertain due to the values of the preceding and succeeding data strings (the above-mentioned XXX part). Therefore, attention is paid only to the unique ECD 28h (20 bits) portion regardless of the preceding and following signs.
[0024]
Then, when the unique code ECD28h after convolutional encoding of 1B95h of the present invention is analyzed, when the shift is 1, 2, 10, 18, and 19 bits, the matching code is 8 bits, and otherwise, it is 10 bits. It has been verified that there is high correlation, which is unlikely to cause erroneous synchronization.
[0025]
【The invention's effect】
As described above, according to the present invention, when digital signals are transmitted with a synchronization code added to a main signal, even if the synchronization codes are combined and error-correction encoded, the performance degradation of the synchronization processing is suppressed, and the synchronization is reduced. It is possible to provide a receiving apparatus that receives a digital transmission signal by a synchronization method that can satisfy both the performance of the decoding process and the error correction processing capability.
[Brief description of the drawings]
FIG. 1 is a block diagram showing an embodiment of a system using a synchronization system according to the present invention.
FIG. 2 is a diagram showing an example of a transmission format according to the present invention.
FIG. 3 is a diagram showing an example of another transmission format according to the present invention.
FIG. 4 is a diagram for explaining autocorrelation in the synchronization system of the present invention.
[Explanation of symbols]
11: synchronous code multiplexing unit, 12: error correction encoding unit, 13: modulation unit, 21: demodulation unit, 22: synchronization detection unit, 23: synchronization determination unit
Claims (2)
復調手段により前記受信された伝送信号を復調することにより信号成分を摘出し、
検出手段により前記復調手段で摘出された信号のうち畳み込み符号化後の符号の一部である16進数のECD28hを検出し、
同期判定手段により前記検出手段の検出結果に基づいて同期を判定することを特徴とする受信方法。Hexadecimal 1B95h is added as a synchronization code to the main signal, and the synchronization signal and the main signal are combined and convolutionally encoded by a polynomial G133, 171 which is a non-organized code, and used for a transmission system. A receiving method for receiving,
Extracting a signal component by demodulating the received transmission signal by demodulation means,
The detecting means detects a hexadecimal ECD28h which is a part of the code after the convolutional coding in the signal extracted by the demodulating means,
A receiving method, wherein synchronization is determined by a synchronization determining unit based on a detection result of the detecting unit.
前記受信された伝送信号を復調し、信号成分を摘出する復調手段と、
この復調手段で摘出された信号のうち、畳み込み符号化後の符号の一部である16進数のECD28hを検出する検出手段と、
この検出手段の検出結果に基づいて同期を判定する同期判定手段とを具備することを特徴とする受信装置。Hexadecimal 1B95h is added to the main signal as a synchronization code, and the synchronization signal and the main signal are used together in a transmission system that performs convolutional coding using a polynomial G133, 171 that is a non-organized code and transmits the resultant signal. A receiving device for receiving,
Demodulation means for demodulating the received transmission signal and extracting signal components,
Detecting means for detecting a hexadecimal ECD28h, which is a part of the convolutionally encoded code, of the signal extracted by the demodulating means;
A receiver for determining synchronization based on a detection result of the detector.
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JP2002227491A JP3583769B2 (en) | 2002-08-05 | 2002-08-05 | Receiver |
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JP36681397A Division JP3350428B2 (en) | 1997-12-26 | 1997-12-26 | Transmission signal generator |
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