JP3400286B2 - Receiver circuit - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an optical transmission device, and more particularly to a receiving circuit such as an optical receiving circuit of an optical data transmission device which needs to transmit a burst signal having an arbitrary pattern.

[0002]

2. Description of the Related Art In recent years, with the development of multimedia, the demand for large capacity and high speed of information / communication devices has increased, and the electric wiring in and between devices has a serious problem that the frequency is high and the number of connections is large. Is becoming. Waveform distortion and attenuation,
To meet strict system requirements such as EMI measures, ground isolation, and low power consumption, it has become difficult for electrical wiring to meet all of these requirements.

On the other hand, due to the success of optical communication technology, for high-speed, large-capacity, long-distance signal transmission, it is better to first convert the signal into light and transmit it using an optical fiber than to directly transmit the electric signal as it is. It proved to be superior. That is,
It shows that the optical transmission with the photoelectric conversion function in the system is practically superior. As a matter of course, a method of solving various problems of the electric wiring, that is, an optical wiring technique by utilizing various characteristics of light can be considered.

In recent years, the performance of optical devices essential for realizing optical wiring technology has been improved, and further the development of required technology for optical / electrical mounting has progressed. Therefore, the development of a module replacing optical wiring with optical wiring has been developed. It is becoming active. However, in optical wiring modules that aim to replace electrical wiring, complicated control is eliminated, unlike optical communication technology.
There are many requirements that are indispensable for practical use, such as realizing usability similar to that of an electrical interface IC, compactness, low power consumption, and low cost. Inevitably, there are many demanding tasks for ICs that realize this.

In the conventional AC-coupled optical receiver used in optical communication, it is premised that a continuous data signal having a constant mark ratio is input. Therefore, a coding processing circuit is added to the data to realize it. ing. Based on the same idea, there is an attempt to introduce a coding circuit in optical wiring to realize an optical receiving circuit with a configuration similar to that of optical communication, but in addition to increasing the circuit scale, it also improves data transfer efficiency. There is a problem that the internal delay time of data transmission increases and the internal delay time of data transmission increases.

In the conventional DC-coupled optical receiver shown in FIG. 8, an optical signal 100 is sent to an optical semiconductor detector (pin-P).
D) 101, the detection signal is input to the transimpedance amplifier 102, and the output of the transimpedance amplifier 102 is reproduced and discriminated by the discriminator 103. Since the reference voltage Vref of the discrimination level at the time of discrimination is constant, the ratio of the discrimination level to the total amplitude of the input waveform changes with the variation of the input level, the width of the output pulse fluctuates, and the transmission signal error occurs. There was a problem of changing rates. Of course, in this case, it is necessary to make a slight manual adjustment to the optimum discrimination level in the state where the entire transmission system is actually coupled, and when a large number of connections are required like optical wiring,
It is not suitable for practical use with many manual adjustment points.

Further, in the DC coupling type optical receiver according to another conventional example shown in FIG. 9, the transimpedance amplifier 20 is used.
Since 2 is a differential output, the discrimination level of the discriminator 202 becomes a differential input, and the adjustment of the reference voltage Vref becomes somewhat easier, but the above-mentioned essential problem remains.

Further, another DC-coupled optical receiving circuit shown in FIG. 10 is one in which the discrimination level is automatically determined internally in order to avoid fluctuations in the discrimination level and external adjustment. Proposed by Nishikido et al. (“Demonstration of multi”
gigabit optical interconn
election using offset laser
driving for a broadband
switching network ", OFC / IO
OC'93 Technical Digest, pa
per ThC3, p168, 1993). In this example, the peak detector 3 (amplifier 304, 305, resistor 30
It is necessary to invert the logic levels 1 and 0 at least once more than the retention time of (6, 307), and such a signal conversion circuit is indispensable.

A circuit system that can solve these problems and can truly receive a burst signal is disclosed in Y. Proposed by Ota et al. (“Burst mode digital dat
areceiver ", USP No. 5 025 4
56, June 18, 1991; "DC-1 Gb / s.
Burst Mode Compatible Rec
ever for Optical Bus App
licenses ”, Jour. Didit. Tec
h. Vol. 10, p244, 1992). Basically, it has a feedback structure that outputs a differential signal of the received data signal and can automatically adjust the offset so that the differential output signal becomes an output that intersects at the midpoint of the logical total amplitude. Therefore, the function of always obtaining the rectangular pulse identified at the midpoint of the logical amplitude of the input signal is realized.

However, in order to obtain such an ideal operation, it is a key to optimally design a high-speed feedback circuit according to the semiconductor process of the IC, suppressing the instability of the negative feedback circuit, and It is difficult to design for the desired operation. In addition, since the direct feedback is directly applied to the input circuit, when the level of the input signal becomes large, the operating voltage of the input largely fluctuates according to the level of the signal and is applied to the optical semiconductor detector (pin-PD). There are problems that the reverse bias voltage fluctuates and the junction capacitance is modulated, the frequency characteristics change, and the operating point of the internal circuit fluctuates, limiting the dynamic range.

[0011]

As described above, the optical receiving circuit according to the prior art does not have the characteristics required for the optical wiring to realize the signal connection by substituting the electric signal for light instead of the electric signal. However, there is a problem that some of the characteristics are insufficient even though the characteristics of (1) are provided.

An object of the present invention is to identify a waveform having a small change in pulse width including a transmission waveform and a head pulse with respect to an input of logic signal data of an arbitrary pattern including a burst signal in the form of an optical signal. It is an object to provide a receiving circuit having a wide dynamic range that can be reproduced.

Further, the object of the present invention is to achieve the above-mentioned functions, to have a relatively simple circuit structure, to reduce the circuit scale, to facilitate the design without using complicated feedback, and to further improve the process. An object of the present invention is to provide a receiving circuit whose characteristic change due to variation is small.

[0014]

The receiving circuit of the present invention comprises an input signal conversion circuit for converting an input signal into a current signal, and a DC bias current in which the direction of the current is reversed within the output amplitude from the input signal conversion circuit. A DC bias generator for generating
A transimpedance amplifier that converts two current signals corresponding to the output of the input signal conversion circuit biased by the DC bias current into a voltage signal and outputs a differential signal of the same amplitude in the positive phase and the negative phase. , A peak detector for detecting the positive peak value of each of the positive and negative phase output signals from the transimpedance amplifier, and the output of the peak detector and the differential signal of the same amplitude of the positive and negative phases. Of the output voltage of the transimpedance amplifier and the output voltage of the switch circuit, and the addition operation from the resistance circuit And a discriminator that discriminates a potential at which the outputs intersect and inverts a logic level according to the discrimination potential to generate a rectangular pulse waveform.

In the present invention having such a configuration, the current signal from the input conversion circuit is input to the transimpedance amplifier. At the same time, the output of a DC bias generator that generates a current with a reverse current direction within the photocurrent output amplitude corresponding to the optical reception pulse is input. The transimpedance amplifier converts it into a voltage signal proportional to the combined input current, and at the same time, outputs it as a differential signal of the same amplitude in the positive and negative phases. The two pulsed voltage signals are such that the voltage levels cross each other. The ideal state in which the crossing point is the center of the pulse amplitude is the optimum value of the DC bias current, which is, in principle, half the photocurrent pulse amplitude.
These positive-phase and negative-phase output signals are input to the peak detector, respectively. The peak detector has a function of detecting the peak value of the positive pulse regardless of the amplitude of the input pulse, ideally within the minimum pulse width of the transmission data, or at most within twice the minimum pulse width. The output signal of each peak detector is
It is compared with the voltage of the average value of the positive-phase and negative-phase signals of the differential amplifier, if it is large, it is as it is, if it is small, the peak detection signal on the opposite side is dynamically and instantaneously and switch-selected,
Outputs the peak reference voltage of positive phase and negative phase.

Under ideal conditions, two resistors having the same value are connected between the negative-phase output and the positive-phase peak reference voltage output of the differential amplifier, and between the positive-phase output and the negative-phase peak reference voltage output. The signal waveform is output from the midpoint.

As a result, 1/2 of the difference in pulse peak voltage
Are shifted relative to each other, and in principle, the intersection of these output voltages is at the midpoint of the amplitude of the pulse signal. From the output of the discriminator that discriminates the cross potential and generates a rectangular waveform, a reproduced waveform whose discrimination level is always the midpoint of the amplitude is obtained regardless of the magnitude of the amplitude of the input optical signal.

Each element in the present invention is DC-coupled, and as a result, it is an optical receiving circuit capable of automatically generating a discrimination level internally for an arbitrary waveform. Further, in the present invention, even when the first pulse of the burst signal whose peak voltage is not accurately determined is input, the bias current is applied in advance and the crossing occurs near the center of the amplitude, so that the change in the pulse width is suppressed to a small level.

Further, in the present invention, the rising edge of the first pulse is approximately, and after the falling edge of the first pulse, the transmission waveform is reproduced equivalently automatically with the midpoint of the logical amplitude of the input signal as the discrimination level. it can. Therefore, it is possible to transmit the logic signal data of an arbitrary pattern including the burst signal while maintaining the pulse width. In this case, since transmission signal coding or the like is not required, the data transmission efficiency is high, the delay time is small, and the optimal function for optical wiring is provided.

Further, the receiving circuit of the present invention has the above-mentioned function, has a relatively simple circuit configuration, has a small circuit scale, and does not use complicated feedback, so that it is easy to design. Moreover, it has a characteristic that the change in characteristics due to variations in the semiconductor process is small. Due to this feature, when it is used for multi-channel optical wiring, the time skew is small and synchronous wiring is possible, so it also has the characteristics applicable to optical bus circuits. Further, the number of pins can be reduced by using the common bias current circuit, and the adjustment can be performed without adjustment other than the common bias adjustment, so that the multi-channel optical wiring can be downsized.

[0021]

BEST MODE FOR CARRYING OUT THE INVENTION An embodiment of the present invention will be described below with reference to FIG. As shown in FIG. 1, the receiving circuit of the present embodiment is an optical receiving circuit that receives an optical signal, is an input conversion circuit, and is a pin-P that converts an input optical signal into a current signal.
D1, a DC bias generator which is a DC bias constant current power supply 7, a differential transimpedance amplifier 2 including a preamplifier 21 and a feedback resistor ZT, and a discriminator 3.
It comprises a resistor network 4, switch circuits 5, 5 ', and peak detectors 6, 6'.

With this configuration, the optical signal 100 is incident on the pin-PD1 to which the reverse bias voltage Vb is applied, is converted into a current signal by the pin-PD1, and is output as Iin.
To get Further, it is provided with a DC bias constant current power supply 7 of a type that absorbs a DC current Ib that is equal to or less than the amplitude of Iin, ideally ½ of the logical amplitude. Preamplifier 21
Forms a transimpedance amplifier 2 in combination with a feedback resistor ZT, and outputs a differential voltage of a positive phase output V- and a negative phase output V- of the same amplitude.

Here, a pulse input of logic 1 (optical signal 10
0) enters the pin-PD1, the output V + of the transimpedance amplifier 2 outputs a positive pulse and the output V- of the transimpedance amplifier 2 outputs a negative pulse. When the output Iin of the pin-PD1 is zero, the bias Ib of the DC bias constant current power supply 7 causes
The outputs V + and V- of the transimpedance amplifier 2 have a potential difference, and the value thereof is ideally equal to the pulse voltage amplitude.

Output V of transimpedance amplifier 2
+ And V- are input to the peak detectors 6 and 6 ', respectively. The outputs Vp + and Vp- of the peak detectors 6 and 6'rise with a delay in the response time of the peak detectors, but ideally, within the minimum pulse width of the transmission data, or at the second.
It becomes equal to the peak value of the input pulse instantly within double. For the decay time of the peak value, a time constant of 5 times or more and 1000 times or less of the minimum pulse width is selected.

When the input of the optical signal 100 to the pin-PD1 is continuous (continuous pulse input), the peak detectors 6 and 6'always hold the peak value of the input pulse.
However, when the input logic change is interrupted continuously, one of the peak detectors 6 and 6'has a value smaller than the average value of V + and V- and is far from the peak value to be held. The other value will output the correct peak value.

In this way, when the output of one of the peak detectors 6 and 6'is low, the output value of the other is selected to obtain the approximate peak value Vpr + or Vpr-, and the logical change is appropriately made. In a certain steady state, Vpr + = Vp +, Vpr−
= Vp- is established.

On the other hand, when the input to the pin-PD1 of the optical signal 100 is, for example, the input of logic 0 continues, Vpr
+ = Vp−, Vpr− = Vp−. Output V- of transimpedance amplifier 2 and output V of switch circuit 5
The resistors R1, R2, R3, and R4 of the resistor network 4 are connected to pr +, the output V + of the transimpedance amplifier 2 and the output Vpr- of the switch circuit 5 ', respectively, so that the voltage addition operation is performed ( As an ideal condition, R
The resistance values 1 = R2 and R3 = R4 are selected. ), A voltage ((V +) + (Vp −)) / 2 is applied to the input terminal of the discriminator 3.
And ((V-) + (Vp +)) / 2 will be input.

The manner in which the voltage of each part of the optical receiving circuit of this embodiment changes is shown in FIGS. 2 (a), 2 (b), 2 (c), 2 (d),
The waveforms of (e) and (f) are obtained. As is clear from (f) of FIG. 2, the differential input signal of the discriminator 3 always crosses at the midpoint of the amplitude after the fall of the first pulse input, and the output logic is generated by the voltage cross reversal. Output V that inverts the level
D is delayed by the internal response delay to obtain the output waveform (g).

Except for the exception that the rising edge of the first signal input is at the midpoint of the pulse amplitude and does not cross exactly, it is always possible to perform identification and reproduction at the midpoint of the input pulse amplitude regardless of the optical data input amplitude. Become.

In the receiving circuit of this embodiment, the optical signal 100
Even in the case of the first signal input to the pin-PD1 of
The midpoint of the pulse amplitude in advance depending on the bias current, or
Since they intersect at a point near the midpoint, the change in pulse width, which was inevitable in the patent application by the preceding inventor (Japanese Patent Application No. 7-76287), can be suppressed to a small level.

In the receiving circuit of this embodiment, the bias constant current and the peak detector are simply added as the circuit configuration,
Since it is essentially the same as Japanese Patent Application No. 7-76287,
Since a complicated feedback circuit is not required, the circuit design is easy, and the characteristics that are not so affected by variations in device characteristics that change depending on the process are retained.
In addition, the transimpedance amplifier 2 has a standard usage that does not depend on the voltage feedback to the input section of
Generally, the input potential of the amplifier does not fluctuate, and there is no possibility that the center of operation of the circuit thereafter fluctuates and the dynamic range is unexpectedly limited.

Therefore, since the circuit structure is relatively simple, it is possible to realize a compact circuit having a small chip size and low power consumption. Generally, in the receiving circuit,
Since a bias current source is provided to guarantee the dark current of the PD, the number of peak detectors is substantially increased and the increase in circuit size is small.

As described above, according to the present embodiment, all the circuit blocks forming the optical receiving circuit are DC-coupled, and equivalently, the midpoint of the logical amplitude of the input signal is automatically transmitted as the discrimination level. It has a circuit configuration that can reproduce waveforms. For this reason, it is possible to transmit while maintaining the pulse width even for logical signal data input of an arbitrary pattern including a burst signal, and since transmission signal coding is not required, the data transmission efficiency is high, It has a small delay time and is equipped with optimal functions for optical wiring. In addition, the circuit is relatively simple, the circuit scale is small, and complicated feedback is not used, so that the design is easy, and the characteristic change due to variations in the semiconductor process is small.

From the above characteristics, when the optical receiver circuit of the present embodiment is used for multi-channel optical wiring, the skew of the transmission signal is small and synchronous wiring is possible, so that it is also applicable to optical bus circuits. Have both.

Next, a detailed circuit configuration example in the case where a receiver circuit to which the present invention is applied is actually prototyped as an integrated circuit element (IC) will be described. 3 and 4 show examples of the same circuit configuration. 4 is a peak detector of FIG. 3 to which a damping circuit to be described later is added, and the left side of AA ′ of the circuit of FIG. 4 has a portion AA ′ of the circuit of FIG.
Although the same circuit as the left half of the circuit exists, it is omitted in the drawing.

In FIG. 3, the current output of the pin-PD1 is input from the input terminal Input, and the transistor Q1
Enter the base of. Load resistance R of transistors Q1 and Q2
10, R11 and transistors Q24, Vcs,
A differential amplifier composed of a constant current source of a resistor R27, followed by transistors Q3, Q4, Q5, Q6, Q25,
The emitter follower by Q26 and the feedback resistor Rf form a transimpedance amplifier. This transimpedance amplifier has two resistors Rc1 = R.
Since the midpoint between the outputs of V + and V- is taken at c2 = 2Rf and input to the base of Q2, it is possible to obtain a transimpedance gain close to an ideal value and obtain a well-balanced differential output. It is also the embodiment of claim 2. In addition, the input terminal is -Vcc
It can be designed to adopt a voltage of about 3V. Further, since this voltage is constant regardless of the magnitude of the input, it can be used as a good reverse bias of the pin-PD. This circuit is also an embodiment of claim 10.

The V + signal is input to the base of the transistor Q7. The load resistances R12 and R13 of the transistor Q7 and the transistor Q8, and the transistor Q27,
A differential amplifier composed of a constant current source of Vcs and R30,
A peak detector is constituted by a transistor Q9 which functions as a switch and an emitter follower, a voltage holding capacitor Cpd, an emitter follower transistor Q10 thereof, and a constant current generating transistor Q28.

When a positive pulse is input to the output voltage Vp-, the transistor Q9 turns on and the voltage holding capacitance Cpd-
Is charged and the peak value of the pulse is output. When actually making a circuit, about twice as much overshoot was observed when the signal input was small due to the propagation delay of the feedback circuit. Overshooting can be improved by inserting a resistor of several tens to several hundreds of Ω between the emitter of the transistor Q9 and the voltage holding capacitance Cpd.

However, the optimum value changed depending on the magnitude of the input amplitude. By connecting the capacitor Cb and the resistor Rb in series between the resistors R12 and R13, the gain characteristic of the error amplifier of the piece detector can be modified as shown by the solid line in FIG. The values of fB and G1 can be freely changed by changing the values of the capacitance Cb and the resistance Rb, and by attempting optimization, the rise time can be made almost constant with respect to the input fluctuation. The optimum value cannot be generally determined depending on the IC process, but G1 = G0 / 2 to 4 and fB = fc / 2 to
It was 5. This is an embodiment of claim 6.

In order to obtain the gain G0 of the feedback amplifier, the resistor R
It is possible to change the value of 12 to zero, but it should be noted that the output offset voltage changes and the optimum values of the capacitance Cb and the resistance Rb change.

Usually, the above-mentioned method can secure the required dynamic range of the peak detector. However, in order to obtain a wider dynamic range, A- in FIG.
The circuit configuration shown in FIG. 4 is effective for the peak detector between A'and BB '. That is, the peak detector is designed in principle in the same manner as in FIG. 3, and then the transistor size of the transistor Q9 is increased to 2 to 4 times. As a result, the peak detector always has a characteristic that the output tends to overshoot regardless of the size of the input. The transient response of the peak detection signal output with overshoot is measured by the resistor R14,
A differential amplifier including a resistor R15, a capacitor C1, and a transistor Q1 and a transistor Q12 detects and amplifies.

Transistors Q11 and Q12
The differential amplifier composed of (3) supplies the transient signal voltage generated in the resistive load R16 to the base of the current generating transistor Q29 which is supplied to the common emitter of the transistor Q11 and the transistor Q12 through the emitter follower of the transistor Q13 and the resistors R17 and R33. Is
It is a feedback amplifier as a whole.

Normally, the bias current to the common emitter when no transient signal is input is 100 μA or less, and the constant of the feedback amplifier is determined so as to have a value as small as possible within a range in which the bandwidth required by the amplifier circuit can be secured. . At the same time, the collector of the transistor Q11 is connected to the peak holding capacitance Cpd, and the maximum mA order current flows only when the transient response is included, so that the overshoot of the peak detector is quickly attenuated. Decide.

As described above, the combination of the damping circuit which suppresses the overshoot caused by the transient response to the peak detector makes it possible to construct the peak detector which operates accurately including the transient response in a wide dynamic range. . However, in this case, the high-speed feedback damping circuit needs to be optimized, and the performance of the transistor is affected, so that the process dependence becomes somewhat strong, but it cannot be helped.

The peak detector for V-is shown in FIGS.
Although not shown, the circuit is the same as the circuit for the V + signal. As a result, Vp- signal processing delay and the like have the same characteristics as Vp +.

The peak-detected Vp- signal is input to the base of the transistor Q17. Transistor Q1
7, a comparison amplifier composed of a transistor Q18 and a load resistor R18, and a constant current source of transistors Q31, Vcs, and resistor R35, has a resistor R19 = R20 and V + and V +.
Since the average voltage of − and − is input to the base of the transistor Q18, when Vp− is smaller than the average value of V + and V−, the base of the transistor Q16 becomes High, so that the transistor Q16 is switched on and the transistor Q15 is turned on. Emitter follower operation becomes possible and Vp
r + outputs Vp-.

When the burst signal is input and the Vp- signal rises, the transistor Q16 is turned off and the transistor Q16 is turned off.
15 also turns off, on the other hand, the emitter follower of the transistor Q14 starts to operate, and the transistor Q is connected to Vpr +.
Vp + of the same voltage as the emitter of 10 is output.

These transient characteristics are shown in FIG.
It is shown in (d) and (e). As for the voltage level of Vpr + before the burst waveform is input, Vp− is selected as an approximate value because Vp + becomes a low voltage.

Once there is a signal input and Vp- approaches the correct peak value, Vpr- is automatically switched to Vp-. As described above, the input bias current I
Although b is adjusted so that Vp− is ideally set to the same value as Vp +, it is close to the peak voltage to be held even when deviating from the ideal state.

As a result, the Vpr-output can take a value close to the peak voltage to be always held, so that the spread of the first pulse width of the identified burst signal is small or small. Hold.

The ideal values of the resistor R1, the resistor R2, the resistor R3, and the resistor R4, which perform the addition operation between the voltages of V-, V +, Vpr-, and Vrp +, are as described above, but actually designed. , It was almost the same as the ideal value.
Strictly speaking, the magnitude of the differential signal and the waveform are out of balance, so that the imbalance could be corrected by slightly changing the resistance value from the ideal value. This is the embodiment of claim 4. Transistor Q19, transistor Q20 and load resistance R21, resistance R22, resistance R23, and transistor Q32,
The differential amplifier composed of a constant current source of Vcs and resistor R36 is designed as a limiter amplifier, and is configured to be combined with an output circuit in the subsequent stage to form a discriminator.

Transistor Q2 connected to the input section
A constant current source 3 generates a DC offset bias current. The amount of bias current is adjusted by the Control input. Control may be set from the outside so as to satisfy the above conditions, but if there is a clock signal or a signal with a fixed mark ratio and the average value of the pulse amplitude is obtained internally, feedback is performed based on this. The circuit can be configured so that the value is always close to the optimum value.

Further, when the logical level of the transmission signal changes appropriately, the output voltage Vp of the peak detector of the positive phase and the negative phase
It is also possible to perform feedback based on + and Vp-. This is the embodiment of claim 11.

According to the circuit example shown in the embodiment, it is apparent that the circuit scale is compact and that the power consumption and the chip size can be reduced. In addition, it is easy to use the circuit as an array for a multi-channel optical receiver. Inevitably, it is obvious that it can be applied to the optical receiver circuit.

6 and 7 show an embodiment of claims 8 and 9, wherein the differential transimpedance amplifier 2 of FIG.
A combination of a single-phase transimpedance amplifier 12 and a differential amplifier 13 is used, or a variable gain circuit 14 is inserted between the single-phase transimpedance amplifier 12 and the differential amplifier 13 to obtain a dynamic input signal. It is an expanded range.

In the above-mentioned embodiments, the circuit using the Si bipolar transistor is used for explanation.
, GaAs MESFET, GaAs HBT, In
It can also be composed of an active element such as PHEMT or InP HBT. Moreover, as an optical semiconductor detector, a pin-
Although the PD has been described as an example, it may be an APD, an MSM light detector, or a phototransistor.

In the above description, the optical receiving circuit of the optical data transmitting apparatus that needs to transmit the burst signal of an arbitrary pattern has been exemplified, but the receiving circuit of the data transmitting apparatus of the signal other than the light that transmits the burst signal of an arbitrary pattern is illustrated. It goes without saying that it can also be applied to.

[0058]

As described above in detail, according to the present invention, by automatically identifying the midpoint of the input pulse amplitude, a logical signal input of an arbitrary pattern including a burst signal can be performed.
The original input waveform can be identified and reproduced regardless of the magnitude of its amplitude, and the pulse width change is small for all pulses including the first pulse, and the input dynamic range is wide. It is possible to provide a receiving circuit that plays.

Further, according to the present invention, the circuit scale can be small with a relatively simple circuit configuration, the design is easy without using complicated feedback, and the change in characteristics due to process variations is small. It is possible to provide a receiving circuit that has advantages such as the above, and that can reduce costs and increase the number of channels.

[Brief description of drawings]

FIG. 1 is a block diagram of an embodiment of a receiving circuit according to the present invention.

FIG. 2 is a diagram showing waveforms inside a circuit when a burst signal is input in the same embodiment.

FIG. 3 is a diagram showing a specific example of an IC circuit of the same embodiment.

FIG. 4 is a diagram showing another embodiment of the receiving circuit according to the present invention, and is a diagram showing a specific example of the IC circuit of the embodiment provided with a circuit for suppressing overshoot in the peak detector.

FIG. 5 is a diagram showing frequency characteristics of the error amplifier of the peak detector in the embodiment.

FIG. 6 is a circuit diagram showing a modification of the differential transimpedance amplifier according to the present invention.

FIG. 7 is a circuit diagram showing another modification of the differential transimpedance amplifier according to the present invention.

FIG. 8 is a circuit diagram showing an example of a conventional receiving circuit.

FIG. 9 is a circuit diagram showing another example of a conventional receiving circuit.

FIG. 10 is a circuit diagram of a conventional DC-coupled optical receiver circuit.

[Explanation of symbols]

1 ... pin-PD 2 ... Differential type transimpedance amplifier 3. Discriminator (discriminator) 4 resistance network 5 ... Switch circuit 6 ... Peak detector 7 ... DC bias constant current power supply 100 ... Incident light signal

─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. ⁷ Identification code FI H04B 10/26 10/28 H04L 25/03 (56) References JP-A-8-331064 (JP, A) JP-A-8- 84160 (JP, A) JP-A 1-286655 (JP, A) JP-A 6-232917 (JP, A) JP-A 8-293838 (JP, A) JP-A 57-11515 (JP, A) JP-A-56-107628 (JP, A) (58) Fields investigated (Int.Cl. ⁷ , DB name) H03F 3/08 H03K 5/01 H04B 9/00 H04L 25/03

Claims (13)

(57) [Claims] 1. An input signal conversion circuit for converting an input signal into a current signal, a direct current bias generator for generating a direct current bias current with a reverse current direction within an output amplitude from the input signal conversion circuit, and the direct current. A transimpedance amplifier that converts two current signals corresponding to the output of the input signal conversion circuit biased by a bias current into a voltage signal and outputs a differential signal of the same amplitude in the positive phase and the negative phase. A peak detector that detects the positive peak value of each of the positive and negative phase output signals from the transimpedance amplifier, and the average of the output of this peak detector and the differential signal of the same amplitude of the positive and negative phases. A switch circuit for comparing output values and switching output signals, and a resistor for performing addition operation between the output voltage of the transimpedance amplifier and the output voltage of the switch circuit. A circuit network and a discriminator that discriminates a potential at which an addition operation output from the resistance network intersects and inverts a logic level according to the discriminating potential to generate a rectangular pulse waveform. Receiver circuit. 2. The discriminator comprises a differential amplifier, the peak detector comprises a positive phase peak detector and a negative phase peak detector, and the resistance network has a predetermined relationship between resistance values. The differential amplifier, which has four resistors R1, R2, R3, and R4, has a negative-phase input terminal of the differential amplifier, which is the discriminator, and is connected to the resistor R1 connected to the positive-phase peak detector and the negative-phase voltage signal. A voltage at a connection point with the resistor R2 is applied, and a resistor R3 connected to the negative-phase peak detector and a resistor R connected to the positive-phase voltage signal are connected to the positive-phase input terminal of the discriminator.
4. The voltage at the connection point with 4 is applied.
The receiving circuit according to. 3. Resistors R1, R2 forming the resistor network,
3. The receiving circuit according to claim 2, wherein the resistance values of R3 and R4 are set to satisfy a relationship of R1 = R2 and R3 = R4. 4. The predetermined resistance among the resistances forming the resistance network is set such that the resistance value is deviated from the theoretical value by an amount that compensates the imbalance between the gain and the offset of the other circuit. The receiving circuit according to any one of claims 1 to 3. 5. The transimpedance amplifier comprises:
A differential transimpedance amplifier having a differential amplifier, wherein an average voltage of the positive phase voltage signal and the negative phase voltage signal is applied as a reference voltage to a negative phase input terminal of the differential amplifier. The receiving circuit according to claim 1 or 4. 6. The peak detector is provided with a negative feedback amplifier circuit, and the negative feedback amplifier circuit has a gain characteristic of a two-stage roll-off characteristic. The receiving circuit according to. 7. The receiving circuit according to claim 1, wherein the peak detector includes a damping circuit that suppresses overshoot caused by a transient response. 8. The transimpedance amplifier circuit comprises a single-phase type transimpedance amplifier and a differential amplifier.
Or the receiving circuit according to any one of 7. 9. The transimpedance amplifier circuit includes a single-phase type transimpedance amplifier, a variable gain circuit, and a differential amplifier, according to claim 1. The receiver circuit described. 10. The transimpedance amplifier comprises means for applying a constant reverse bias voltage to the input conversion circuit, as claimed in any one of claims 1 to 5, 8 or 9. Receiver circuit. 11. A differential amplifier output instead of an external fixed voltage as a control voltage for the DC bias generator, or
The receiving circuit according to claim 1, further comprising a feedback circuit that uses an output signal of the peak detector. 12. The DC bias generator comprises a voltage controlled constant current source.
1. The receiving circuit according to any one of 1. 13. The input signal conversion circuit comprises an optical semiconductor detector for inputting an optical signal and converting the optical signal into a current signal, according to any one of claims 1 to 12. The receiver circuit described.