JP3452902B2 - Method and apparatus for transmitting a transmission signal via a two-core line - Google Patents

Description

Detailed Description of the Invention

The present invention relates to a method and a device for transmitting a transmission signal via a two-core line, in particular a two-core telephone according to the preamble of claim 1 and the preamble of claim 8, respectively. TECHNICAL FIELD The present invention relates to a method and an apparatus for transmitting a transmission signal via a line.

Two similarly configured transceivers, for transmitting a transmitted signal over a telephone subscriber line (hereinafter referred to as a telephone line for simplicity) or for receiving a received signal from the telephone line. Transformer-free circuit arrangements are known which essentially have a device and also a control device for driving the transceiver. Each of these modules is constructed, but in particular arranged as a separate chip. On the one hand, the transmission signal is applied on the telephone line and on the other hand the reception signal is taken out in pairs using the transceiver. Each transmitting / receiving device is connected to the core of the telephone line. The two transceivers operate with different supply voltages. The controller drives the two transceivers so that the desired transmission signal is sent from the transceiver via the telephone line. in this case,
Each transceiver produces a partial signal of the desired transmission signal, which transmission signal is formed by the AC difference between the two partial signals, which in turn drives the two transceivers correspondingly by the central control unit. To be achieved.

The general type of circuit configuration described above is particularly suitable for connection to an ISDN telephone line (Integrated Services Digital Network). The two transceivers drive the transmission line cores connected to them via series resistors, which two series resistors mimic the impedance of the transmission line and have the same value.

For electromagnetic radiation, according to international standards,
Limitations are placed on the in-phase components of the transmitted signal. So, for example, France, Sophia Antipolis (So
PIA-Antipolis), European Telecommunications Standards Institute, September 1995 publication ETSI Technical Report ET
In R080 a test circuit is defined for monitoring the longitudinal component of the transmitted signal, in this case 100 Hz to 1
The average value for each one second for the longitudinal component of the transmission signal in the frequency range of 50 kHz is only allowed to be a voltage effective value below -50 dBV.

Ideally, the partial signals transmitted via the two cores should have the same amplitude and opposite phases. In order to meet the above requirements,
The resistance of the series resistors connected to the outputs of the two transceivers should not exceed a deviation of 2.5% for exactly the same output level. On the other hand, the output levels should not exceed 0.5% deviation in the case of identical lines, that is, when the resistance of the series resistors is identical. However, in semiconductor circuits it is not possible to keep the cost to achieve such things.

In conventional circuits, the common mode component has been reduced by using a transformer. Similarly, there are known solutions for circuits in which signals are generated together on one module, ie on one chip, in this case
The output signal can be adjusted by the effect of the corresponding symmetrical design of the circuit. However, no solution is known for circuits of the type mentioned in the introduction, in which the partial signals are generated on a separate chip.

The object underlying the invention is therefore to provide a method and a transformer-free device for transmitting a transmission signal over a two-core line, in particular a two-core telephone line. It is possible to reduce the in-phase component of the transmission signal. In particular, it is intended that the present invention
It is also possible to apply the transmission signal to a circuit produced by two separate modules, namely separate chips.

The above mentioned objects are achieved by the present invention by a method having the features of claim 1 and an apparatus having the features of claim 8. Each of the dependent claims describes a preferred and advantageous embodiment of the invention.

According to the present invention, a transmission device for generating a partial signal is calibrated. This calibration is performed so that the output levels of the transmission devices connected to the cores of the transmission lines match each other. Be seen.

In this case, the calibration may proceed in two steps. In the first stage, various conversion rates of the analog / digital converters included in each module or chip or manufacturing instructions between the converter rates were specified so that the actual calibration could be considered later. A relative deviation is realized. Then, in the second stage, the individual output levels are measured using an analog / digital converter,
They are compared with each other and adjusted to match them within the limits of measurement accuracy.

For this purpose, in particular, after comparing the output levels, a correction value is supplied to one of the two modules, which correction value is then used to generate the output level of the corresponding partial signal. Used in the corresponding module to correct the reference voltage.

To further improve the matching of the output levels, the above-mentioned calibration may be repeatedly executed. Therefore, the present invention allows AC current calibration of the output levels output by the two modules. However, in terms of voltage, the output levels are at completely different potentials, and for this purpose no direct current needs to flow through this large potential difference.

The present invention is particularly suitable for use in an ISDN telephone line (service integrated digital network). However, the present invention generally contemplates that a high remote feed voltage is applied to the transmission line or copper wire at the same time without the use of a transformer, and the transmission signal is passed on the transmission line. , The partial signal flowing through the two-core part of the transmission line,
It can be used anywhere with high precision and with the same amplitude and intended to be in antiphase. For example,
This applies to the following signal transmission methods. That is, 2B1Q coding method, 4B3T coding method, Up
0, MDSL (multi-speed digital subscriber line), HDS
L (high-speed digital subscriber line), SDSL (single-pair symmetric digital subscriber line), VDSL (ultra high-speed digital subscriber line), and ADSL (asymmetric digital subscriber line).

The present invention is described below with reference to a single embodiment using a preferred embodiment. FIG. 1 is a schematic block diagram of a preferred embodiment of the device according to the invention.
The device shown in FIG. 1 is two transceivers 2 and 3,
These are control devices 1 configured as separate chip modules and for driving two transceivers 2, 3.
Composed of.

The two transmitters / receivers have different voltage levels. The transmitter / receiver 2 has supply voltage connections _VH and _VH- VD.
D, while the transceiver 3 has a supply voltage connection V _BAT +
It has VDD and V _BAT . The voltage difference that exists between the transceivers 2 and 3 is VDD in both cases, where VDD is less than or equal to 6V and is within the conventional supply voltage range for CMOS semiconductor devices. The voltage difference between V _H and V _BAT is about 110V. Each transmitting / receiving device 2, 3
Has an output buffer or an output driver 7 (details of which will be described later), through which the transmission signal is fed onto the corresponding wire core of the transmission line. In this case, the output buffer 7 of the transmitter / receiver 2 has V _H and V _H
-VDD, and the output buffer 7 of the transceiver 3 outputs a voltage between V _BAT + VDD and V _BAT , so that between the output connections of the output buffers 2 and 3, V _H -V _BAT below, V _H -V _BAT -2VDD more voltage is always present. The requirements imposed on the application of voltage to the telephone subscriber line are V _H , V _BAT of appropriate magnitude,
And VDD, it can be satisfied.

On the output side, two transceivers 2, 3
Are respectively a first resistor 12, a field effect transistor 13,
And the second resistor 14 to be connected to the connection part A or B, respectively, and the connection parts A and B are assigned to the corresponding core parts of the two-core transmission line or the telephone subscriber line. On the other hand, the transmission / reception devices 2 and 3 output a reception signal in each case, and the signal is transmitted from the wire core portions A and B to the corresponding line termination circuit via the analog / digital converter 5 to the control device 1. Be directed. Further, each transmitter / receiver 2, 3 has an echo filter 8 for echo-attenuating the signal received via the respective wire core portions A, B. In the opposite direction,
The transceivers 2, 3 receive from the controller 1 via the digital / analog converter 6 and the output buffer 7 already described a digital signal which is coupled to the corresponding core of the telephone line or the transmission line. Output buffer 7 of transceivers 2 and 3
Performs the opposite operation of the push-pull operation. The partial signals received by the transmitter / receivers 2, 3 form a received signal received by the transmission line, and the partial signals added by the transmitter / receivers 2, 3 to the corresponding wire cores A, B are the transmission lines. Form a transmission signal that is transmitted via
This transmission signal is formed in particular by the AC difference between the partial signals to be transmitted by the two transceivers 2, 3.

The lines assigned to the above-mentioned input and output signals of the transceivers 2, 3 are respectively connected to the control unit 1 via capacitors 16 and 17, which control unit
It is constructed in the form of a digital circuit. The signals received by the transceivers 2 and 3 are analog / digital converters 5.
After being analog-to-digital converted by the digital signal processor (DS), it is supplied to a summing element via a capacitor 17 and a low pass filter (LP) 18, and further via a variable switch 19.
P) 20 and further via a digital low pass filter 22 to an input / output control unit 21. In contrast, the digital transmission signal is provided to the transceivers 2, 3 via the capacitor 16. The capacitors 16 and 17 provided between the transceivers 2 and 3 and the controller 1 function directly as electrical insulation elements.

In addition to the elements described above, the control device 1 also comprises a line encoder 23 and an adder element connected to the line encoder 23 and the output of the input / output control unit 21. The input / output control unit 21 transfers the transmission signal to the line encoder 23, which for example 2B1Q encodes the signal (ie generates 4 symbols in 2 bits). Furthermore, the input / output control unit 2
1 supplies a signal to the summing element, which allows the operating points of the components of the transceivers 2, 3 to be adjusted.

In the present embodiment, the input / output control unit 21 is provided in particular with a transceiver device for mutually calibrating their outputs connected to the cores A, B after each existing sequence control related reset. It is configured to automatically perform a few calibrations. The actual purpose of such a calibration is to obtain the output levels of the two transceivers 2, 3 which substantially match within the measurement accuracy limits.

Therefore, in connection with the calibration, the output levels of the two transceivers 2, 3 are measured, compared with each other and subsequently adjusted on the basis of the result of the comparison so that they essentially match. . In this case, the output level is 2
The measurement is performed using the analog / digital converter 5 of the two transmitter / receivers 2 and 3, but the conversion rate may differ depending on the manufacturing instruction. Therefore, before actually measuring the output level, it is preferable to first determine the relative difference between the conversion rates of the analog / digital converters 5 included in the transceivers 2 and 3. The purpose is to allow the deviations so identified to be subsequently taken into account in the evaluation of the output level, because such deviations in the conversion rate are This is because the measured value may be impaired.

Therefore, it is preferable to carry out the calibration in two stages. In the first stage, different conversion rates (for manufacturing instructions) of the analog / digital converter are determined with high relative accuracy in each chip or in each transceiver 2, 3.

For this purpose, the input / output control unit 21 sends via the serial interface the corresponding control information item to the two transceiver devices 2, 3, which control information item is transmitted by the transceiver device 2, 3. It is evaluated by the decentralized control unit 4 included in 3 and converted into a turn-off signal for the transistor 13 provided on the output side. In this way, the transistor is switched to have a high impedance at the beginning of calibration, so that
The transceivers 2 and 3 are separated from the wire cores A and B in order to prevent external influences. The two transistors are field effect transistors that exist because of some form of protection.

The resistor 12 already mentioned is in each case an external transistor 13 corresponding to the transceiver 2 or 3.
, But very high manufacturing accuracy of 0.1% is required for the resistor. On the input side, the analog / digital converter 5 included in the transceivers 2 and 3
Is a variable switch 1 formed by a transistor
It is connected to the both ends of the corresponding resistor 12 or the reference voltage V _REF via 0 and 11. Variable switch 10, 11
Are driven by the corresponding control unit 4 in combination with the central control unit 1.

In order to perform the calibration, the variable switches 10, 1
1 indicates that the voltage drop across the corresponding resistor 12 is
It is switched so that it is applied to the digital converter 5.
Further, by using the variable switch 9, the external transistor 13
The end of the resistor 12 connected to is connected via a capacitor 15 by an alternating current. That is, during calibration,
An AC connection exists between the outputs of the two transceivers 2, 3 to which the AC signal is applied by the input / output control unit 21 of the controller 1. The circuit block diagram shown in FIG. 1 may in particular be designed such that a plurality of core pairs A, B, for example four core pairs, can be calibrated together using a capacitor 15. In this case, the individual transceivers 2, 3
In order to calibrate via the variable switch 9, it has to be connected to the capacitor 15 in a time division multiplexed manner.

In the process of developing the circuit, care must be taken to ensure that exactly the same current, which is not impaired by the leakage resistance or leakage capacitance, flows through the series resistor 12. If the same current flows through the two series resistors 12, the voltage drop across the two series resistors (within a certain tolerance) is the same. Therefore, the voltage drop across the resistor 12 is supplied to the analog / digital converter 5 via the switches 10 and 11 and digitized to the control device via the low pass filter 15 and then the variable switch 19. 1 digital signal processor 20 for determination. The variable switch 19 of the controller 1 enables the digital signal processor 20 to compare the measured and digitized voltage amplitudes to determine the relative difference between the conversion rates of the two analog-to-digital converters 5. It is driven by the input / output control unit 21.
If a relative deviation between the conversion rates is detected by the digital signal processor 20, said deviation is stored, so that all digital measurements of the analog-to-digital converter 5 have a determined relationship, i.e. a determined value. It can be corrected by the relative deviation of the conversion rate. Since the linearity and relative resolution of the analog / digital converter 5 is 70 dB (12 bits), the output level or the voltage drop across the output resistor 12 is measured after this stage, and the output resistor 12 Compared with accuracy, it is possible to calibrate with high accuracy as a result.

After this first stage, the actual calibration is carried out in the second stage. To that end, in the second stage, the analog-to-digital converter 5 is used to measure the voltage drop across the resistor 12 and, as a result, the two transceivers 2
The output level of is detected. These measured values are also transmitted via the capacitor 17, the low pass filter 18, and the variable switch 19 to the digital signal processor 2 of the control device 1.
0 and the input / output control unit 21. The measurement result is determined again by the digital signal processor 20, and as a result, the correction value for correcting the corresponding output signal is input to the two transmitting / receiving devices 2 and 3 via the serial interface according to the comparison result. You can In each case, this correction value is adjusted to the corresponding control unit 4 in order to match the reference voltage to the amplitude of the corresponding output signal of the transceiver 2 or 3.
Stored in the output buffer 7 and applied to the signal path of the corresponding transceiver, so that the same output level of the two transceivers 2, 3 is obtained within the measurement tolerance limit.

In order to further improve the matching of the output levels, in particular the second stage may be repeated. [Brief description of drawings]

1 is a schematic block diagram of a preferred exemplary embodiment of an apparatus according to the present invention.

Continuation of the front page (56) Reference JP 58-79314 (JP, A) JP 7-235942 (JP, A) JP 11-225172 (JP, A) JP 2000-148262 (JP, A) Actual development Sho 53-70841 (JP, U) (58) Fields investigated (Int.Cl. ⁷ , DB name) H04L 25/02 H04M 11/00 302 H04B 3/50

Claims (19)

(57) [Claims] 1. Using corresponding transmission devices (2, 3),
Two partial signals are generated and transmitted via each core (A, B) of the line, and a transmission signal is transmitted via a two-core line formed from the AC difference of the two partial signals. The output level is generated at the connection part of the transmission device (2, 3) connected to the core parts (A, B) of the line. Then, after the output level of the transmission device (2, 3) is calibrated, the transmission signal is transmitted through the cores (A, B) of the line. 2. The method according to claim 1, wherein for calibration purposes, the connecting part comprises a corresponding core part (A,
Separated from B), the output levels of the connections are measured, compared and set in such a way that they approximately match. 3. The method according to claim 2, wherein the output level of the connection is in each case measured by analog / digital conversion, and before the measurement of the output level at the connection, two analog / digital A method, characterized in that the relative difference between the conversion values is detected and taken into account in the subsequent measurement of the output level. 4. A method according to claim 2 or 3, wherein the output level of the connections is determined by detecting the voltage drop across a resistor (12) connected in series with each connection. A method characterized by being measured. 5. The method according to claim 2, wherein the output level at the connection portion of the transmission device (2, 3) connected to the core portion (A, B) is measured and compared, and then the comparison is performed. Based on the result, an output level correction value is generated and is taken into account in the corresponding one of the transmission devices (2, 3) during the subsequent transmission of the corresponding partial signal. 6. The method according to claim 5, wherein each partial signal is amplified in a corresponding transmission device (2, 3) before being transmitted through the corresponding core of the line, and the output level is The correction value is used as a correction value for a reference voltage in amplification of a corresponding partial signal. 7. The method according to claim 2, wherein after the calibration is performed, a new calibration is performed in order to further improve the matching of the output levels of the connection parts. how to. 8. A device for transmitting a transmission signal via a two-core line, comprising: a first transmission device (2) for transmitting a first partial signal via a first core portion (A) of the line. ), A second transmission device (3) for transmitting a second partial signal via the second core (B) of the line, and, in the form of an AC difference between the two partial signals via the line, So that the desired transmission signal is transmitted, the first and second
Control device (1) for driving the transmission device (2, 3)
And level control means (5, 12) for measuring the output level of the transmission device (2, 3), and the control device (1) is measured by the level detection means (5, 12). The output levels of the two transmission devices (2, 3) are compared with each other, and the transmission device (2, 3,
3) so that almost the same output level is output,
A device configured to generate a control signal for calibrating a transmission device (2, 3). 9. The device according to claim 8, wherein the level detection means includes one resistor for each transmission device (2,
3) a resistor (12) connected in series between the output connection and the corresponding core (A, B) of the line, for measuring the output level of each resistor (12). A device characterized in that a voltage drop across both ends is detected. 10. Device according to claim 8 or 9, wherein the level detection means comprises an analog / digital converter (5) for each transmission device (2, 3), via which:
Device, characterized in that a corresponding output level is supplied to the control device (1). 11. The device according to claim 10, wherein the control device (1) assigns analog / allocation signals to each transmission device (2, 3) prior to calibration of the transmission device (2, 3).
Device, characterized in that it is arranged to check the relative difference between the conversion rates of the digital converter (5) and to use this difference as a reference for subsequent calibration. 12. The device according to claim 11, wherein a capacitor (15) is provided, via which
The control device (1) for confirming the relative difference between the conversion rates of the analog / digital converter (5) comprises a transmission device (2,
In order to compare the voltage drop across each resistor (12) in this state with an AC signal applied to the output connection of 3), the output connection of the corresponding transmission device (2, 3) Device, characterized in that the connection of the unconnected resistor (12) is connected with respect to an alternating current. 13. The device according to claim 12, wherein the control device (1) is arranged to determine a determined relative ratio between the conversion rates of the analog / digital converter (5) during the subsequent measurement of the output level. Device characterized in that it is arranged to correct the measured value provided by the analog-to-digital converter (5) by the difference. 14. The device according to claim 9, wherein the transistor (13) in each case comprises the output connection of the transmission device (2, 3) and the corresponding core of the line. (A,
B), characterized in that the control device (1) separates the transmission device (2, 3) from the core (A, B) of the line for calibration via this transistor. . 15. The device according to any one of claims 8 to 14, wherein the control device (1) is based on a comparison result between the output levels measured by the level detection means (5, 12). In the form of a correction value supplied from the control device (1) for correcting the output level to one of the transmission devices (2, 3),
A device configured to generate a control signal for calibrating a transmission device (2, 3). 16. The device according to claim 15, wherein each transmission device (2, 3) has an amplification means (7) for amplifying a corresponding partial signal, and each transmission device (2). 2, 3) have storage means (4) for storing the correction value supplied from the control device (1), and the control device (1) corrects the reference voltage value of the amplification means (7). In order to do so, a device is provided which supplies a correction value to the amplification means (7). 17. Device according to any of claims 8 to 16, characterized in that the two transmission devices (2, 3) are arranged on separate chips. 18. A method of using the device according to any one of claims 8 to 17, characterized in that the transmission signal is transmitted over a telephone line. 19. A method of using the device of claim 18, wherein the telephone line is an ISDN telephone line.