JP3447535B2 - Thin film transistor and method of manufacturing the same - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film transistor used for driving a pixel electrode in an active matrix type liquid crystal display device or the like, and particularly good connection between a switching element and a pixel electrode via an insulating film. The present invention relates to a thin film transistor having an electrode structure for performing.

[0002]

2. Description of the Related Art In recent years, semiconductor devices typified by ICs and LSIs, electronic devices incorporating these semiconductor devices, home electric appliances and the like have been developed and sold in large quantities in the market. Nowadays not only TV sets but V
TRs, personal computers, and the like have also become widespread, and are no longer uncommon. Above all, a liquid crystal display device is attracting attention as a display having advantages of being thin, lightweight, and low in power consumption. In particular, an active matrix type liquid crystal display device in which a switching element such as a thin film transistor (hereinafter referred to as a TFT) is provided for each pixel so as to control each pixel with excellent resolution and a clear image can be obtained. It is getting attention for a reason.

A TFT using an amorphous silicon thin film is known as a conventional active element, and many active matrix type liquid crystal display devices equipped with this TFT have been commercialized. Currently, a pixel TFT for driving a pixel electrode and a pixel driving TFT as an active element replacing the TFT using the amorphous silicon thin film.
There is great expectation for a technique for forming a TFT using a polycrystalline silicon thin film, which has a possibility that a drive circuit for driving the TFT can be integrally formed on one substrate.

The polycrystalline silicon thin film has higher mobility than the amorphous silicon thin film used in the conventional TFT, and it is possible to form a high performance TFT. If the driving circuit for driving the pixel driving TFT is integrally formed on one inexpensive glass substrate, the manufacturing cost will be significantly reduced as compared with the conventional case.

As a technique for forming a polycrystalline silicon thin film which becomes an active layer of such a polycrystalline silicon TFT on a glass substrate, an amorphous silicon thin film is deposited on the glass substrate and then a temperature of about 600.degree. Solid-state growth method of heat-treating for several hours to several tens of hours, or laser crystallization method of irradiating pulsed laser light such as excimer laser to instantly melt and recrystallize the amorphous silicon thin film And other methods have been proposed.

In this active matrix type liquid crystal display device, ITO (Indium Tin Ox) is used as a pixel electrode.
There is a transmissive liquid crystal display device using a transparent conductive thin film such as ide) and a reflective liquid crystal display device using a reflective electrode such as a metal for a pixel electrode. Originally, the liquid crystal display device is not a self-luminous display, so in the case of a transmissive liquid crystal display device, an illuminating device, a so-called backlight, is arranged behind the liquid crystal display device and is displayed by the light incident from there It is carried out. Further, in the case of a reflective liquid crystal display device, display is performed by reflecting incident light from the outside with a reflective electrode.

In the case of the reflection type liquid crystal display device, since the backlight is not used, the power consumption is extremely small, but the display brightness and the contrast are influenced by the use environment or the use condition, that is, the ambient brightness. have.

On the other hand, in the case of the transmissive liquid crystal display device, since the display is performed by using the backlight as described above, the power consumption is large, but it is bright and high without being significantly affected by the ambient brightness. It has an advantage that a display having a contrast can be performed.

By the way, the above-mentioned pixel electrode made of a transparent conductive thin film such as ITO or metal is TF
It is connected to the drain electrode of T and is formed so as to have a constant interval with the adjacent gate wiring and source wiring so as not to be short-circuited. In recent years, in order to expand the effective area of the pixel electrode, an interlayer insulating film 58 made of a polyimide resin or an acrylic resin is formed on the entire surface of the substrate 51 including the TFT as shown in FIG. The drain electrode 61 of the TFT and the pixel electrode 64 formed on the interlayer insulating film 58 through the opened contact hole 63.
Pixel electrode structure on the protective film that connects the
Called the on-pass structure).

According to this method, the pixel electrode 64 is insulated from the gate wiring and the source wiring by the interlayer insulating film 58 made of polyimide resin or acrylic resin. It is possible to arrange the wirings above the wiring so as to be overlapped with each other, whereby the effective area of the pixel electrode 64, that is, the aperture ratio can be increased. Further, since the interlayer insulating film 58 made of polyimide resin or acrylic resin can easily flatten the steps caused by the TFT, the gate wiring, and the source wiring, it also has an effect of extremely reducing the alignment disorder of the liquid crystal layer 70. Have

However, in the above method, the interlayer insulating film 58 made of polyimide resin or acrylic resin is deposited to a thickness of 1 μm or more, for example, 2 μm to 4 μm in order to flatten the steps caused by the TFT, the gate wiring, and the source wiring. Need to let. Therefore, the step difference due to the contact hole 63 opened for connecting the pixel electrode 64 and the drain electrode 61 of the TFT becomes large, and the connection between the pixel electrode 64 and the drain electrode 61 of the TFT is often not good. Will occur.

By depositing the interlayer insulating film 58 made of resin, the step difference caused by the TFT, the gate wiring, and the source wiring is reduced, but the contact hole 63 is formed.
Is reflected on the surface of the pixel electrode 64, and a large step is generated in a partial area of the pixel electrode 64.
Therefore, there is a problem in that the alignment of the liquid crystal layer 70 is disturbed and the display quality is degraded.

Therefore, conventionally, as shown in FIG. 13, for example, as disclosed in Japanese Patent Laid-Open No. 4-220625, the contact hole 63 is almost level with the surface of the interlayer insulating film 58 made of resin. Conductor 7 such as metal
The method of providing 1 is proposed. This manufacturing method uses T
Conductor 7 made of metal or the like on the drain electrode 61 of the FT
1 is formed, and after depositing an interlayer insulating film 58 for flattening the steps of TFTs, etc., the interlayer insulating film 58 is etched so that the surface of the conductor 71 is exposed, and the pixel electrode 64 is connected. Is.

Further, Japanese Patent Publication No. 1-35351, Japanese Patent Laid-Open No. 1-68727 or Japanese Patent Laid-Open No. 4-30562.
As disclosed in Japanese Unexamined Patent Publication No.
There is also proposed a manufacturing method in which a conductor 71 such as plating is formed by an electrochemical method between the pixel electrode 64 and the pixel electrode 64, that is, in the contact hole 63 portion, and the pixel electrode 64 is connected thereto.

Further, as disclosed in Japanese Patent Laid-Open No. 9-146118, the diameter of the contact hole opened in the interlayer insulating film is made larger than the diameter of the contact hole opened in the gate insulating film on the source region. As a result, a method of forming contact holes in a stepwise manner to increase the connection area with the pixel electrode has also been proposed.

[0016]

The shape of the surface of the substrate as described above is a major factor that causes disorder in the alignment of the liquid crystal layer. This is because if there are irregularities on the surface of the substrate, the alignment of the liquid crystal layer is disturbed at that portion. Recently, as shown in FIG. 12 described above, the pixel-on-passive structure alleviates the step difference due to the TFT, the gate wiring, and the source wiring, and when the planarizing film is formed, the substrate surface has almost unevenness. Absent.

However, in order to form the pixel electrode thereafter, a step corresponding to the film thickness of the pixel electrode and a recess due to a contact hole for connecting the pixel electrode and the drain electrode of the TFT are formed. The step difference corresponding to the film thickness of the pixel electrode is at most about several thousand Å, but the depression due to the contact hole is several μm, which is so large that it cannot be compared with the step difference corresponding to the film thickness of the pixel electrode.

Further, in order to improve the connection between the drain electrode of the TFT and the pixel electrode, the contact hole may be processed into a tapered shape so as to have an inclination, but it is necessary to miniaturize the TFT. As a result, the contact holes are becoming finer in size, and it is not possible to perform extreme taper shape processing. That is, the size of the contact hole becomes large if it is processed into an extremely tapered shape. If the size of the contact hole is increased, the step due to the contact hole is reflected on the surface of the pixel electrode as described above, and a large step is generated in a partial area of the pixel electrode, and the alignment of the liquid crystal layer is caused by the step. Is a major factor that causes deterioration of display quality.

This effect is particularly remarkable when the size of the pixel electrode is minute. For example, if the pixel electrode size is 25
If the contact holes are 5 μm square and the contact holes are 5 μm square, the ratio of the contact holes to the area of the pixel electrode is 4%. However, in the step of opening the contact hole, a dimension shift due to etching is likely to occur, and if the dimension of the contact hole becomes 10 μm square at the time of completion, the proportion of the contact hole will reach 16%. Under such circumstances, it is not easy to eliminate the inconvenience caused by the step difference in the contact hole while maintaining good connection between the drain electrode of the TFT and the pixel electrode.

The conventional method as described above has been proposed as a method for solving such a problem, and in the conventional method disclosed in Japanese Patent Laid-Open No. 4-220625, the TFT After forming a conductor made of metal or the like on the drain electrode and depositing a film for flattening steps such as TFT, the surface of the conductor is exposed.
A structure in which a pixel electrode is connected to that portion is disclosed. Therefore, it is considered that the surface of the pixel electrode becomes flat and the disorder of the alignment of the liquid crystal layer due to the step of the contact hole and the poor connection between the pixel electrode and the drain electrode of the TFT can be reduced.

However, in this method, a conductor made of a columnar metal or the like having a film thickness approximately equal to the film thickness of the interlayer insulating film made of polyimide resin or acrylic resin, that is, 2 μm to 4 μm is formed in the contact hole portion. Need to be formed. In order to form such an electric conductor, it is considered that the electric conductor is usually formed by a sputtering method or a plasma CVD method. Film peeling may occur during or after film formation. Further, even if the film formation is normally completed, it takes a longer time to etch the film to pattern it into a columnar shape, and such a method is not easy.

On the other hand, Japanese Patent Publication No. 1-35351, Japanese Patent Laid-Open No. 1-68727 or Japanese Patent Laid-Open No. 4-30562.
In the conventional method disclosed in Japanese Patent Laid-Open No. 7, etc., a conductor is formed between the drain electrode of the TFT and the pixel electrode, that is, a contact hole by an electrochemical method such as plating, and the pixel is formed there. A configuration such as connecting electrodes is disclosed. According to these, the conductor that connects the drain electrode and the pixel electrode is formed in the contact hole portion in a self-aligned manner, so that a photolithography process for forming the conductor is not necessary and is further connected to the conductor. It is possible to eliminate the step due to the surface of the pixel electrode, especially the contact hole.

However, in this method, the adhesion between the conductor and the drain electrode formed by an electrochemical method such as plating is not always good. Depending on the metal material forming the drain electrode, an oxide film or the like is easily formed on the surface thereof. In general, Al, Ti, etc., which are widely used as electrodes and wiring materials of TFTs, correspond to this. If an oxide film or the like is formed on the surface of the metal material, not only a plating layer having a sufficient film thickness cannot be obtained, but also the adhesiveness will not be good.
Such metal materials require complicated steps such as various surface treatments in advance, which requires considerable know-how.

Further, in the conventional method disclosed in Japanese Patent Laid-Open No. 9-146118, the contact hole formed in the interlayer insulating film is smaller than the diameter of the contact hole formed in the gate insulating film on the source region. Form a large diameter,
As a result, a configuration is disclosed in which contact holes are formed in a stepwise shape to connect pixel electrodes. According to this, it is considered that a good connection can be obtained because the contact area between the drain electrode and the pixel electrode increases.

However, according to this method, although the contact area between the drain electrode and the pixel electrode is increased, the step due to the contact hole still exists, and the alignment disorder of the liquid crystal layer due to the step remains unsolved.

The present invention has been made in view of the above-mentioned conventional problems, and in a thin film transistor used for driving a pixel electrode in an active matrix liquid crystal display device or the like, a contact connecting upper and lower electrodes. The purpose is to suppress the disconnection of the electrodes caused by the step due to the holes and to obtain a stable connection between the electrodes.

[0027]

A thin film transistor according to claim 1 of the present invention comprises a semiconductor thin film, a gate insulating film, a gate electrode, a source electrode, which are laminated on an insulating substrate.
Drain electrode, these semiconductor thin film, gate insulating film,
In a thin film transistor having a resin insulating film that covers a step formed by a gate electrode, a source electrode and a drain electrode to form a flat surface, the surface of the drain electrode is made of a material different from that of the drain electrode, and C
A cap electrode made of a thin film of u is formed, and a contact hole reaching the cap electrode and having a larger diameter in the upper portion than in the bottom portion is opened in the resin insulating film, and Ag or Au is formed in the contact hole. Consists of
A metal film is filled and electrically connected to the cap electrode at the bottom of the contact hole,
It is characterized in that it is electrically connected to the upper electrode formed on the resin insulating film above the contact hole to electrically connect the drain electrode and the upper electrode. The above object is achieved.

[0028]

[0029]

[0030]

[0031]

The method of manufacturing a thin film transistor according to claim 2 of the present invention is a method of manufacturing a thin film transistor in which a semiconductor thin film, a gate insulating film, a gate electrode, a source electrode, and a drain electrode are sequentially laminated on an insulating substrate. In the method, on the surface of the drain electrode, a metal thin film different in material from the drain electrode and made of any one of Ni, Cr, Cu, Fe, and W, or a conductive oxide semiconductor thin film made of ITO or SnO ₂ is used. A step of forming a cap electrode made of, and a step of depositing a first resin insulating film on the insulating substrate, the first resin insulating film forming a flat surface by covering the step created by the stack formation, and the first resin. Depositing a second resin insulating film on the insulating film;
A step of forming a contact hole of a predetermined shape in the resin insulating film, and a diameter larger than that of the contact hole reaching the cap electrode in the first resin insulating film and opening in the second resin insulating film. A contact hole formed in the first resin insulation film by filling a metal film by a plating method into the contact hole formed in the first and second resin insulation films. Electrical connection is made to the cap electrode at the bottom of the hole, and electrical connection is made to the upper electrode formed on the second resin insulation film at the top of the contact hole opened in the second resin insulation film. And a step of electrically connecting the drain electrode and the upper electrode, whereby the above-mentioned object is achieved.

At this time, the contact hole is filled.
The metal film formed is a metal thin film that forms the cap electrode.
The same material is preferable.

At this time, the cap electrode is made of Cu.
Consists, it is preferred that the metal film is filled in the contact hole is Ag or Au.

[0035]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a sectional view showing a TFT of the present invention, and FIG. 2 is a plan view thereof. Note that FIG. 1 shows a cross section taken along the line AA 'in FIG.

T as an active element in the present invention
As shown in FIG. 1, the FT generally has the following configuration. A base coat film 2 made of a SiO ₂ film or the like is deposited on an insulating substrate 1 made of glass or the like, and an active layer 3 of a TFT made of a silicon thin film is formed in a predetermined shape on the base coat film 2. The active layer 3 is formed on the active layer 3. The gate insulating film 4 is formed by depositing an insulating film such as a SiO ₂ film. A gate electrode 5 made of a metal material such as Al is formed in a predetermined shape on the active layer 3 with the gate insulating film 4 interposed therebetween.

Here, in the active layer 3, a source region and a drain region 6 into which impurity ions are implanted and a channel region 7 into which an impurity ion is not implanted are formed in a region below the gate electrode 5, and thereafter, An insulating film is deposited on the entire surface to form an interlayer insulating film 8. A contact hole 9 is opened in the interlayer insulating film 8 and the gate insulating film 4 above the source region and the drain region 6, and
A source electrode 10 and a drain electrode 11 made of a metal material such as
Respectively connected to.

On the drain electrode 11, N
The cap electrode 12 was formed by depositing a metal film, which is hard to be oxidized, represented by i and Cr, or a transparent conductive film such as ITO.

After that, a polyimide resin or an acrylic resin is applied to the entire surface to form a flattening film 13, a contact hole 14 is opened in the flattening film 13, and the cap electrode 12 is plated by a plating method. Form layer 15. Then, a metal such as Al or a transparent conductive thin film such as ITO is deposited on the plated layer 15 so as to be electrically connected and patterned into a predetermined shape to form the pixel electrode 16.

According to the present invention, the plating layer 15 fills the concave portion caused by the contact hole 14, and the pixel electrode 16 is electrically connected to the plating layer 15. The surface becomes flat, so that the surface of the pixel electrode 16 does not have irregularities that disturb the alignment of liquid crystal molecules.

In the present invention, the cap electrode 12 is formed on the drain electrode 11 when the plating layer 15 is formed.
As a result, the plated layer 15 can be stably formed. Therefore, there is no need for a special device or complicated pretreatment other than newly installing the plating process equipment, and the conventional active matrix type liquid crystal display device or TFT is manufactured except for the process of forming the plating layer 15. The film can be easily manufactured by the film forming method and the etching method used for this.

(First Embodiment) The manufacturing method in the first embodiment of the present invention will be described in detail below with reference to the drawings. 3 to 4 are cross-sectional views showing the manufacturing process of the TFT according to the first embodiment.

As shown in FIG. 3A, a TFT is formed on an insulating substrate 1 such as a glass substrate by a known method. The method of creation is as follows.

First, the base coat film 2 made of a SiO ₂ film or the like is deposited on the glass substrate 1 by the sputtering method or the plasma CVD method. Next, a polycrystalline silicon thin film, an amorphous silicon thin film, or the like is applied to, for example, 30 nm-50
When the deposited film has a thickness of about m, and the deposited film is an amorphous silicon thin film, it is polycrystallized by being irradiated with laser light from above. The polycrystallized silicon thin film is patterned into a predetermined shape and becomes the active layer 3 of the TFT.

Next, an insulating film such as a SiO ₂ film is deposited on the active layer 3 to form a gate insulating film 4, and the active layer 3 is formed.
A gate electrode 5 made of a metal material such as Al is formed in a predetermined shape on the gate insulating film 4.

Next, impurity ions are implanted into the active layer 3 using the gate electrode 5 as a mask, and then a heat treatment for activating the implanted impurity ions is performed to form a source region and a drain region 6. At this time, a channel region 7 in which impurity ions are not implanted is formed in the region below the gate electrode 5.

Thereafter, an SiO ₂ or SiN _x film or the like is deposited on the entire surface to form the interlayer insulating film 8. Finally, the interlayer insulating film 8 located above the source region and the drain region 6
After the contact hole 9 is opened in the gate insulating film 4, a source electrode 10 and a drain electrode 11 made of a metal material such as Al are formed, and the source electrode 10 and the drain electrode 11 are connected to the source region and the drain region 6. It The TFT according to the first embodiment is manufactured in this way.

Although the coplanar type TFT using the polycrystalline silicon thin film for the active layer 3 has been described in the first embodiment, it may be an inverted stagger type TFT using the amorphous silicon thin film for the active layer 3. .

After that, a metal film or a transparent conductive thin film made of a material different from that of the drain electrode 11 was deposited on the drain electrode 11 and patterned into a predetermined shape to form a cap electrode 12. At this time, Ni, Cr, Cu, Fe, W or the like can be used as the metal film, and ITO or S can be used as the transparent conductive thin film.
It is possible to use nO ₂ or the like.

Next, as shown in FIG. 3B, a planarization film 1 is formed by applying polyimide resin, acrylic resin or the like on the entire surface.
3 is formed. In the first embodiment, Optomer SS (manufactured by Japan Synthetic Rubber Co., Ltd.) is used as the resin, and is applied and formed on the substrate 1 so as to have a thickness of 2 μm to 4 μm, for example, 2 μm at the maximum.

Next, a contact hole 14 was opened in the flattening film 13 located above the cap electrode 12. For the opening of the contact hole 14, dry etching with oxygen gas can be used. In the first embodiment, the oxygen gas flow rate is 400 sccm, and the high frequency power is 600.
The contact hole 14 was formed by etching under the conditions of W and gas pressure of 20 mTorr. Further, the inner wall of the contact hole 14 was formed by inclining at an angle of approximately 80 ° to 60 °. In addition, this contact hole 14
At the time of opening, the diameter of the contact hole 14 on the side of the drain electrode 11 is made relatively small in consideration of alignment accuracy so as to surely open on the drain electrode 11, and the surface side of the flattening film 12 is formed. It is desirable that the diameter of the drain electrode 11 be within the range that does not exceed the outer dimension of the drain electrode 11.
This is important for ensuring the connection between the electrodes and not unnecessarily lowering the aperture ratio when the TFT is used in a liquid crystal display device or the like. At this time, the flattening film 1
The resin used in 3 may have photosensitivity.

Next, as shown in FIG. 4A, a metal film is filled in the contact hole 14 by a plating method to form a plating layer 15. In general, the plating method is often referred to as an electrolytic plating method, and a DC current is passed through an aqueous solution containing metal ions to be plated to obtain a metal film on the cathode surface. The state of this plating process is shown in FIG. As the equipment prepared in this process,
A plating solution 19 and a plating tank 20 containing the plating solution 19;
Besides, there is a DC power supply 21. An electrode made of the same material as the metal to be plated is generally used for the anode 22, and a nickel electrode is used when Ni is plated and a silver electrode is used when Ag is plated. Further, as the metal to be plated, Cu, Ag, Au, Cr, Fe, Ni, Pt or the like can be used. In the present invention, it is not particularly necessary to limit the metal to be plated, but it is preferable to decide in consideration of the compatibility with the base material as described later.
Cu and Ag are particularly promising. For example, Ni can be plated relatively easily and is widely used for industrial purposes, and Cu, Ag, etc. are considered to be suitable for use in electrodes because they have sufficiently low electric resistance. is there. As the aqueous solution, for example, in the case of Ni or Ag, nickel sulfate, nickel chloride, silver cyanide or the like is used.

In the first embodiment, plating is performed using Ag. As the plating liquid, for example, Silbrex II
(Manufactured by Nippon Electroplating Engineers), current density 1 A / dm ² , plating solution temperature 25
Plating was performed at about C for about 2 minutes to form a plated layer 15 having a thickness of about 2 μm. The thickness of the plating layer 15 can be determined by controlling the current density and time. The current density and the temperature of the plating solution differ depending on the type of the plating solution and may be appropriately determined. In the first embodiment, the current density is 1 to 5 A / dm ² , and the plating solution temperature is 20 to 3
The conditions were set within the range of 0 ° C. Such a condition in the first embodiment is determined in consideration of the fact that when the area of the portion to be plated such as the contact hole 14 is small, it is easy to obtain a good result with a low current density, which is easy . Also
Of.

Next, the steps before and after the plating step will be described. Before the plating step, the surface of the object to be plated is washed with water and, if necessary, the surface is treated with hydrochloric acid or the like. After the plating step, it is washed with warm pure water at about 70 ° C. and dried. In the first embodiment, an example of single metal plating is shown, but alloy plating may also be used.

Next, as shown in FIG. 4B, a transparent conductive thin film such as ITO or a metal film such as Al is deposited so as to be in electrical contact with the plating layer 15, and a photoresist mask is used. By patterning, the pixel electrode 16 having a predetermined shape is formed.

In the first embodiment, the cap electrode 12 made of a metal film of Ni, Cr, Cu, Fe, W or the like or a transparent conductive thin film of ITO or SnO ₂ is formed on the drain electrode 11. There is. This cap electrode 12
The ITO, SnO _{2 and the} like that form the are originally oxide thin films, and are themselves oxide semiconductors having conductivity. Therefore, there is little change in the surface condition such as the formation of an insulating oxide film on the surface like a metal material, and it is possible to always ensure good conduction. In addition, Ni, Cr, C
The surface of the metal film of u, Fe, W, etc. is hard to be oxidized,
Further, it has a characteristic that the adhesion becomes particularly good when the plating layer 15 is formed thereon. Especially Ni on Ni
Adhesion is good between the same metals such as plating, Cr plating on Cr, etc., Ag plating or A plating on Cu.
Similarly, good adhesion can be obtained when u plating is performed. Therefore, in the first embodiment, the good quality plating layer 15 could be easily formed.

As described above, the cap electrode 12
Is formed for the purpose of ensuring electrical continuity and adhesion with the plating layer 15, the film thickness may be about 1000 Å or less, and can be easily formed by a sputtering method or the like.

Since the inner wall of the contact hole 14 is formed at an angle of approximately 80 ° to 60 °, the contact hole 1 is formed between the bottom and the upper part of the contact hole 14.
There is a difference in the diameter of 4. For example, the bottom of the contact hole 14 is 4 μm square, and the film thickness of the planarizing film 13 is 2 μm.
When the inner wall has an angle of 80 ° to 60 °, the area of the upper portion of the contact hole 14 is about 50 to 80% larger than that of the bottom portion. That is, the pixel electrode 16
Therefore, the area of the portion connected to is increased, and it is possible to secure a good connection with the pixel electrode 16 as compared with the conventional case. At this time, some heating may be required depending on the plating solution used, but in that case, heating equipment for the plating tank may be prepared as an auxiliary equipment.

Although not shown, an alignment film is formed on the entire surface after this, and after alignment treatment, a counter substrate having a color filter, a counter electrode, etc. formed thereon is bonded,
A liquid crystal display device can be completed by injecting liquid crystal between the substrates.

(Embodiment 2) Next, the manufacturing method according to another embodiment of the present invention will be described in detail with reference to the drawings. 5 to 7 are cross-sectional views showing the manufacturing process of the TFT according to the second embodiment.

As shown in FIG. 5A, after the TFT is formed, a flattening film 13 made of resin is formed. The manufacturing process of the TFT in the second embodiment is the same as in the first embodiment.
The description is omitted because it is similar to.

As shown in FIG. 5B, a contact hole 14 was opened in the flattening film 13 made of resin. This con
For the opening of the tact hole 14 , dry etching using oxygen gas can be used. In the second embodiment,
First, oxygen gas flow rate 400sccm, high frequency power 600
The contact hole 14 was formed by etching under the conditions of W and gas pressure of 20 mTorr.

Next, as shown in FIG. 6A, a fluorine-based gas such as CF ₄ , SF ₆ , CHF ₃ or the like is added at 1 to 50 of the total flow rate of the etching gas during the etching process of the contact hole 14. % And then continued to be etched to form a contact hole 14. In the second embodiment, by adding the fluorine-based gas, the etching rate is improved, the etching progresses to some extent in the lateral direction at the upper part of the contact hole 14, and a gentle slope is formed as compared with the bottom part. .

In the second embodiment, the contact hole 1
The angle of the wall surface of 4 is about 80 ° at the bottom and about 60 at the top.
It became about 45 °. The stage in the middle of the etching in which the fluorine-based gas is added refers to the time when a certain amount of etching progresses in the film thickness direction of the flattening film 13, and the amount can be appropriately determined by converting it from the etching rate. It is good, but in the second embodiment, it is a time point when the etching progresses about 1/3 in the film thickness direction of the flattening film 13. Also,
The proportion of the fluorine-based gas to be added may be appropriately determined,
The etching rate changes depending on the type and ratio of the fluorine-based gas added, and the contact hole 14 is accordingly changed.
The angle of the wall surface will also be affected. However, if the proportion of addition exceeds 50%, the etching rate will decrease, which is not preferable.

Next, as shown in FIG. 6B, a metal film is filled in the contact hole 14 by a plating method to form a plating layer 15. Since the details of the plating method are the same as those in the above-described first embodiment,
The description is omitted here.

Next, as shown in FIG. 7, a transparent conductive thin film such as ITO or A so as to make electrical contact with the plating layer 15 is formed.
A metal film such as 1 is deposited and patterned using a photoresist mask to form a pixel electrode 16 having a predetermined shape.
To form. In the second embodiment, the contact hole 1
Since the slope of 4 is formed more gently than that of the bottom, the connection area between the plating layer 15 and the pixel electrode 16 is significantly increased. As in Embodiment 1 or Embodiment 2 described above, in order to fill the metal film in the contact hole having a larger diameter in the upper portion than in the bottom portion,
The plating method is very effective.

(Third Embodiment) Next, details of a manufacturing method according to another embodiment of the present invention will be described with reference to the drawings. 8 to 10 show the TFT according to the third embodiment.
FIG. 6 is a cross-sectional view showing the manufacturing process of.

As shown in FIG. 8A, after the TFT is formed, a flattening film 13 made of resin is formed. The manufacturing process of the TFT in the third embodiment is the same as in the first embodiment.
The description is omitted because it is similar to.

As shown in FIG. 8B, a second flattening film 17 is formed by coating the flattening film 13 with polyimide resin or acrylic resin. At this time, the second flattening film 1
7 need not be formed as thick as the flattening film 13. In the third embodiment, Optomer SS (manufactured by Japan Synthetic Rubber Co., Ltd.) is used as the resin, and is several thousand Å to 1 μm, for example, 5000 Å at maximum.
The coating was formed on the substrate so that the thickness was about the same. In addition,
The flattening film 13 was applied and formed on the substrate so as to have a thickness of about 2 μm.

Next, as shown in FIG. 9A, a contact hole was opened in the second flattening film 17 made of resin.
This contact hole is opened with a larger diameter than the contact hole 14 which is opened in the flattening film 13 in the next step. For the opening of the contact hole, dry etching using oxygen gas can be used. In the third embodiment, first, the oxygen gas flow rate is 400 sccm and the high frequency power 60.
The contact hole 18 was formed by etching under the conditions of 0 W and a gas pressure of 20 mTorr. The size of the contact hole 18 at this time must be determined within a range that does not impair the aperture ratio of the pixel when the TFT is used in a transmissive liquid crystal display device. In the third embodiment, the contact hole 14 is larger than the contact hole 14 by 1 to 2 μm so that the contact hole 14 has an opening of 5 to 6 μm square.

Next, as shown in FIG. 9B, a contact hole 14 was opened in the flattening film 13 made of resin. For the opening of the contact hole 14, dry etching with oxygen gas can be used. Third Embodiment
First, the oxygen gas flow rate is 400 sccm, and the high frequency power is 6
Etching was performed under the conditions of 00 W and a gas pressure of 20 mTorr to form the contact hole 18.

Next, as shown in FIG. 10A, a metal film is filled in the contact hole 14 and the contact hole 18 by a plating method to form a plated layer 15. The details of the plating method are the same as those in the first embodiment described above, and thus the description thereof is omitted here.

Next, as shown in FIG. 10B, a transparent conductive thin film such as ITO or a metal film such as Al is deposited so as to be in electrical contact with the plating layer 15, and a photoresist mask is used. By patterning, the pixel electrode 16 having a predetermined shape is formed. In the third embodiment, the resin 2 is used.
Contact holes 14 and 18 having different diameters are opened in the planarizing films 13 and 17 of the layer, and the portions are filled with a metal film by a plating method. Therefore, although the etching process is increased by one due to the opening of the contact holes 14 and 18, the connection area between the plating layer 15 and the pixel electrode 16 can be greatly expanded.

Further, as in the third embodiment, in order to fill the metal film into the contact hole having a larger T than the bottom and the diameter of the upper portion of the contact hole being larger than that of the bottom portion, the plating method is used. It is very effective.

[0075]

As described above, in the thin film transistor of the present invention, when the drain electrode having upper and lower contacts is connected through the contact hole to the upper electrode, the drain electrode is formed on the surface of the drain electrode. Form a cap electrode made of a different material and made of a Cu thin film , and the contact hole is filled with a metal film made of Ag or Au, so that the connection between the drain electrode and the upper electrode is ensured. It becomes possible to do it.

In the thin film transistor of the present invention, by filling the contact hole portion with the metal film, the concave step caused by the contact hole can be alleviated, and the disconnection of the pixel electrode can be prevented. The connection between the drain electrode and the pixel electrode can be made more reliable. Further, since it is possible to prevent the occurrence of alignment disorder of the liquid crystal molecules due to the contact hole, it is possible to obtain good display quality.

Further, in the thin film transistor of the present invention, the contact hole having a shape in which the diameter of the upper portion is larger than the diameter of the bottom portion is formed, and the contact hole portion is filled with the metal film by the plating method. The connection area between the pixel electrode and the drain electrode can be greatly expanded. Further, since this metal film is formed by the plating method, it can be formed very easily.

Furthermore, in the thin film transistor of the present invention, it is not necessary to use a special method or a special device when manufacturing the thin film transistor, and a method and a manufacturing device which have been conventionally used for manufacturing a TFT are used. It is possible to manufacture efficiently without increasing the number. Further, by using the thin film transistor manufactured in this way, it is possible to efficiently manufacture an active matrix type liquid crystal display device having good display characteristics.

[Brief description of drawings]

FIG. 1 is a sectional view showing a thin film transistor of the present invention.

FIG. 2 is a plan view showing a thin film transistor of the present invention.

3A and 3B are cross-sectional views showing the manufacturing process of the thin film transistor according to the first embodiment.

FIGS. 4A and 4B are cross-sectional views showing the manufacturing process of the thin film transistor in the first embodiment, following FIGS. 3A and 3B.

5A and 5B are cross-sectional views showing a manufacturing process of the thin film transistor according to the second embodiment.

FIGS. 6A and 6B are cross-sectional views showing the manufacturing process of the thin film transistor in the second embodiment, following FIGS. 5A and 5B.

FIG. 7 is a cross-sectional view showing the manufacturing process of the thin film transistor according to the second embodiment, which is subsequent to FIGS. 6A and 6B.

8A and 8B are cross-sectional views showing the manufacturing process of the thin film transistor according to the third embodiment.

9A and 9B are cross-sectional views showing the manufacturing process of the thin film transistor according to the third embodiment, following FIGS. 8A and 8B.

FIGS. 10A and 10B are cross-sectional views showing the manufacturing process of the thin film transistor in the third embodiment, following FIGS. 9A and 9B.

FIG. 11 is a drawing showing a plating process in the present embodiment.

FIG. 12 is a cross-sectional view showing a thin film transistor having a pixel-on-passage structure.

FIG. 13 is a cross-sectional view showing a thin film transistor in the related art.

[Explanation of symbols]

1 Insulating substrate 2 Base coat film 3 Active layer 4 Gate insulation film 5 Gate electrode 6 Source and drain regions 7 channel area 8 Interlayer insulation film 9 contact holes 10 Source electrode 11 drain electrode 12 Cap electrode 13 Flattening film 14 contact holes 15 plating layer 16 pixel electrodes 17 Second flattening film 19 plating solution 20 plating tank 21 DC power supply 22 Anode 51 Insulating substrate 58 Interlayer insulation film 60 source electrode 61 drain electrode 63 contact holes 64 pixel electrodes 70 Liquid crystal layer 71 conductor

─────────────────────────────────────────────────── --- Continuation of the front page (56) References JP-A-9-26602 (JP, A) JP-A 64-68727 (JP, A) JP-A 4-268536 (JP, A) JP-A 4- 358129 (JP, A) JP-A-5-326462 (JP, A) (58) Fields investigated (Int.Cl. ⁷ , DB name) H01L 29/786 H01L 21/336 H01L 21/302 H01L 21/3065 G02F 1/1368

Claims (4)

(57) [Claims] 1. A semiconductor thin film, a gate insulating film, a gate electrode, a source electrode, and a drain electrode laminated on an insulating substrate, and a semiconductor thin film, a gate insulating film, a gate electrode, a source electrode, and a drain electrode. In a thin film transistor having a resin insulating film that covers a step to form a flat surface, a cap electrode that is made of a Cu thin film and is made of a material different from that of the drain electrode is formed on the surface of the drain electrode, A contact hole reaching the cap electrode and having a larger diameter at the upper portion than at the bottom portion is opened in the resin insulating film, and the contact hole is formed of a metal made of Ag or Au.
The film is filled, electrically connected to the cap electrode at the bottom of the contact hole, and electrically connected to the upper electrode formed on the resin insulating film at the upper part of the contact hole, A thin film transistor, wherein a drain electrode and the upper electrode are electrically connected. 2. A semiconductor thin film and gate insulation on an insulating substrate.
The film, gate electrode, source electrode, and drain electrode are sequentially stacked.
In the method for manufacturing a layered thin film transistor, a material for the drain electrode is formed on the surface of the drain electrode.
Different and either Ni, Cr, Cu, Fe or W
Consisting Ranaru metal thin film or ITO or SnO ₂
Forming a cap electrode made of a conductive oxide semiconductor thin film
And a step generated on the insulating substrate due to the formation of the stacked layers.
A first resin insulation film that covers the
Stacking step and depositing a second resin insulation film on the first resin insulation film
And a contact hole of a predetermined shape on the second resin insulation film.
And opening the first resin insulation film to reach the cap electrode.
And a contact opened in the second resin insulation film
Form a contact hole with a smaller diameter than the hole
Process and contact holes formed in the first and second resin insulation films.
By filling the metal film with a plating method,
The bottom of the contact halls opened in the first resin insulating film
Part is electrically connected to the cap electrode,
Above the contact hole opened in the resin insulation film of
And the upper electrode formed on the second resin insulation film and the electrode.
The drain electrode and the upper electrode are electrically connected by electrically connecting.
And a step of connecting electrically.
Manufacturing method of transistor. 3. A metal filled in the contact hole
The film is made of the same material as the metal thin film forming the cap electrode.
The thin film transistor according to claim 2, wherein
Manufacturing method of star. 4. The cap electrode is made of Cu, and
The metal film filled in the contact hole is Ag or Au.
The thin film transistor according to claim 2, wherein
Manufacturing method of star.