JP3330429B2 - Semiconductor integrated circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a gain-controlled FET.
Related to a semiconductor integrated circuit that constitutes an amplifier circuit by arranging
In particular, the present invention relates to a countermeasure for preventing deterioration of an amplification function at a low gain.

[0002]

2. Description of the Related Art Conventionally, a semiconductor integrated circuit using an FET has been developed to be applied to a high-frequency circuit particularly in the fields of TV and communication. As one of such semiconductor integrated circuits, there is an amplifier circuit that requires FET gain control. FIG. 5 is a diagram showing a conventional amplifying circuit using a Schottky gate FET (hereinafter, referred to as MESFET) as an FET. A MESFET 1 for signal amplification comprising a gate 1g, a source 1s and a drain 1d, and the MESFET 1
A resistor 2 for applying a bias voltage to the gate 1g of the ESFET 1, an input coupling capacitor 3, an output coupling capacitor 4, and a drain bias application choke coil 5 are provided. Reference numeral 11 denotes a gain control terminal, which is connected to the gate electrode 1g of the FET 1 via the resistor 2. 12 is an input terminal,
It is connected to the gate 1g of the FET 1 via the input coupling capacitor 3. An output terminal 13 is connected to the drain 1d of the FET 1 via the output coupling capacitor 4. Reference numeral 14 denotes a power supply voltage application terminal, which is connected to the drain 1d of the FET 1 through the drain bias application choke coil 5. In this amplifier circuit, gain control voltage applying means (not shown) for changing a bias applied to the gain control terminal 11 is provided to keep the output signal strength constant with respect to a change in input signal strength. It is carried out.

[0003]

In the above-mentioned conventional semiconductor integrated circuit, when the intensity of the signal input to the input terminal 12 is large, the gain is reduced to keep the intensity of the output signal of the amplifier circuit constant. That is, it is necessary to make the gain low. At that time, in the amplifier circuit configured as described above, in order to lower the gain, the maximum control voltage may be reduced to near the threshold voltage of the MESFET for signal amplification. . (1) The input impedance changes due to the change in the internal parasitic resistance of the MESFET, and the input return loss deteriorates. (2) The intermodulation distortion depends on the intensity of the input signal, but when the intensity of the input signal is high, the second-order and third-order intermodulation distortions deteriorate.

[0004] The present invention has been made in view of the above, and an object of the present invention is to provide a signal amplification F having a gain control function.
Degradation of input return loss and intermodulation distortion by arranging an active element that operates when a strong input signal is present and allows a part of the input signal to escape to ground Is to prevent it effectively.

[0005]

A semiconductor integrated circuit according to the present invention.
Is a signal amplifying FET that amplifies a signal input to the gate side and outputs the amplified signal through an output terminal;
Gain control voltage applying means for externally applying a gain control voltage to the gate of the signal amplification FET so that the intensity of the output signal from the output terminal becomes constant with respect to the change in the intensity of the input signal to the gate of T; An active element comprising an FET which operates when the intensity of the input signal of the signal amplification FET is equal to or higher than a predetermined value and allows a part of the input signal to flow to the ground side; Amplification FET
And connected to the gain control voltage application terminal and through a capacitor to ground to ground, and the ground to ground via a resistor gate of the active element, connects the drain of the active element to the gate of the signal amplifier FET with, between the gate of the gain control terminal and the signal amplifying FET, the drain of the active element - it is obtained by the configuration of connecting a resistor in parallel with the source.

The source of the signal amplification FET is grounded via a diode having a rising voltage higher than the threshold voltage of the signal amplification FET, and the source-drain of the signal amplification FET is connected via a resistor. To be connected by electric wiring.

[0007]

With the above arrangement, the semiconductor integrated circuit of the present invention can be used.
When the intensity of the input signal is equal to or higher than a predetermined value, the gate bias is reduced by the gain control voltage applied from the gain control voltage applying means so as to reduce the gain of the signal amplification FET, and the signal amplification FET Works with At this time, the circuit formed using the active elements is conducted at a high frequency, thereby preventing the input return loss from deteriorating. At the same time, a part of the input signal is escaped to the ground side by the active element, so that the intensity of the signal actually input to the signal amplification FET is maintained at a predetermined value, and the characteristic that increases as the input signal increases. The intermodulation distortion having the saturation saturates around a certain value, and the deterioration of the intermodulation distortion is prevented. In addition, by setting the gain control voltage applied by the gain control voltage applying means in advance so as to be equal to or higher than the threshold value of the active element in the case of a strong input signal, when the input signal exceeds the threshold value of the active element, Since the FET, which is an element, operates and is terminated at a high frequency by the channel resistance, deterioration of the input return loss is prevented. Further, a part of the input signal is released from the source of the FET, which is an active element, to the ground via the capacitor. That is, the operation of the first aspect of the present invention can be obtained with a simple setting of the gain control voltage, and the design of the amplifier circuit becomes easy.

Further, since the source of the signal amplifier FET is connected to the ground side, without applying a source voltage of the signal amplifying FET from outside, effects described above can be obtained. Therefore, the configuration of the gain control voltage applying means is simplified.

[0009]

The first and second embodiments of the present invention will be described below.

FIG. 1 shows a configuration of an amplifier circuit which is a semiconductor integrated circuit according to a first embodiment. A signal amplification MESFET 1, a gate electrode bias application resistor 2, and an input coupling are shown. It is the same as the conventional circuit shown in FIG. 5 in that a capacitor 3, an output coupling capacitor 4, and a choke coil 5 for applying a drain bias are provided. 5, 11 is a gain control terminal, 12 is an input terminal, 13 is an output terminal, and 14 is a power supply voltage application terminal.

Here, as a feature of the present invention, MESFE
An active MESFET 8 as an active element according to the first aspect of the present invention is disposed on the gate 1g side of T1. The source 8s of this active MESFET 8 is grounded to the ground via the bypass capacitor 6, and the gate 8g
Is grounded via the resistor 7 to the ground, and the drain 8d is connected to the gate of the MESFET1. The source 8s of the active MESFET 8 is also connected to the gain control terminal 11.

The source potential of the signal amplification MESFET 1 is Vss, the threshold voltages of the MESFETs 1 and 8 are Vp, the gain control voltage is Vagc, and when a weak signal is input, Vagc ≧ −Vp, Vagc−Vss When Vagc is set so that> Vp, the active MESFET
8 is turned off, and the MESFET 1 for signal amplification operates in the same manner as a conventional amplifier circuit.

On the other hand, when a strong signal is input, if Vagc is set such that Vagc ≦ −Vp, Vagc−Vss = Vp, the signal amplification MESF
ET1 operates near the threshold voltage Vp, and the gain decreases. At this time, since the active MESFET 8 is turned on, the input side of the signal amplification MESFET 1
Termination is performed at a high frequency by the channel resistance of the ET8, and deterioration of the input return loss can be prevented.

Further, a part of the input signal is generated by the active MESFE.
T8, the signal is released to the ground via the bypass capacitor 6, and the signal intensity input to the gate 1g of the MESFET 1 for signal amplification is reduced, so that deterioration of intermodulation distortion can be prevented.

Second Embodiment Next, a second embodiment according to the third aspect of the present invention will be described with reference to FIG.
It will be described based on. In the first embodiment, the signal amplification M
Although the source potential Vss of the ESFET 1 was applied from the outside, in the second embodiment, as shown in FIG.
The source 1 s of the ESFET 1 is a level shift diode 9
Is connected to the ground via a ground line. Further, in order to apply a current to the diode 9 regardless of the bias state of the signal amplification MESFET 1, the signal amplification MESFET 1
A resistor 10 is connected in parallel between the source 1s and the drain 1d.

The basic operation of the second embodiment is the same as that of the first embodiment, and the same effects as those of the first embodiment can be obtained.

FIGS. 3 and 4 show the input return loss of the conventional amplifier circuit and that of the amplifier circuit of the present invention.
4 shows intermodulation distortion characteristics. FIG. 3 shows a change characteristic of the input return loss with respect to a change of the input signal strength. The solid line shows the characteristic in the conventional amplifier circuit, and the broken line shows the characteristic in the amplifier circuit of the present invention. This data is obtained under the condition that the gain control is performed so that the output signal strength becomes constant. As shown in the figure, it can be seen that in the present invention, the input return loss is kept good even when the input signal strength increases.

FIG. 4 shows the change characteristics of the intermodulation distortion with respect to the change of the input signal strength. The solid line shows the characteristic in the conventional amplifier circuit, and the broken line shows the characteristic in the amplifier circuit of the present invention. At this time, the gain control is performed so that the output signal strength becomes constant. As shown in the figure, even if the input signal strength increases, if the input signal strength is -30 dBm or more, 2
The intermodulation distortion is almost constant in the third and third orders, and does not continue to increase as the input signal intensity increases unlike the conventional amplifier circuit. That is, an effect is shown in which when the input signal is stronger than about -30 dBm, part of the input signal is released from the source of the active FET to the ground Grd via the bypass capacitor 6.

[0019]

As described above, according to the present invention ,
As a configuration of a semiconductor integrated circuit, a signal amplification FE for amplifying a signal input to a gate and outputting the amplified signal from an output terminal
T, means for applying gain control so as to keep the output intensity constant with respect to changes in the input signal, and an FET which operates when the input signal intensity exceeds a predetermined value to release a part of the input signal to the ground side. Since the active element and the configuration are provided, the input return loss and intermodulation distortion characteristics at the time of a strong input signal are improved, so when used for signal amplification of a receiver such as a television, a set in a strong electric field region is used. In addition to the effect of improving the image quality, the circuit design can be simplified by setting the gain control voltage to be equal to or higher than the threshold value of the active element in the case of a strong input signal.

The source of the signal amplifying FET is
Gain control voltage application
The configuration of the means can be simplified.

[Brief description of the drawings]

FIG. 1 is an electrical wiring diagram of a high-frequency amplifier circuit according to a first embodiment.

FIG. 2 is an electrical wiring diagram of a high-frequency amplifier circuit according to a second embodiment.

FIG. 3 is a diagram showing a change characteristic of an input return loss.

FIG. 4 is a diagram illustrating a change characteristic of intermodulation distortion by the present invention and a conventional amplifier circuit.

FIG. 5 is an electric wiring diagram of a conventional high frequency amplifier circuit.

[Explanation of symbols]

 Reference Signs List 1 MESFET for signal amplification 1s Source 1d Drain 1g Gate 2 Resistor for bias application 3 Input coupling capacitor 4 Output coupling capacitor 5 Drain bias choke coil 6 Bypass capacitor 7 Resistance 8 Active MESFET (active element) 8s Source 8d Drain 8g Gate 9 Level shift diode 11 Gain control terminal (gain control voltage application terminal) 12 Input terminal 13 Output terminal 14 Power supply voltage application terminal 15 Source terminal

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int. Cl. ⁷ , DB name) H03G 1/00-3/18 H03F 1/32

Claims (2)

(57) [Claims] A signal amplifying FET for amplifying a signal input to a gate side and outputting the amplified signal via an output terminal; and a signal from the output terminal for a change in intensity of an input signal to a gate of the signal amplifying FET. Gain control voltage applying means for externally applying a gain control voltage to the gate of the signal amplification FET so that the intensity of the output signal is constant; and when the intensity of the input signal of the signal amplification FET is equal to or higher than a predetermined value. And an active element composed of an FET that allows a part of the input signal to flow to the ground side. The source of the active element is connected to the gain control voltage application terminal of the signal amplification FET and is connected via a capacitor. is grounded to ground Te, the gate of the active element is grounded to the ground through a resistor, the drain of the active device is connected to the gate of the signal amplification FET, utilization Between the gate control voltage application terminal and the signal amplifying FET, the drain of the active element - a semiconductor integrated circuit, characterized in that the resistor in parallel with the source is connected. 2. The semiconductor integrated circuit according to claim 1 , wherein a source of said signal amplifying FET is grounded to a ground via a diode having a rising voltage higher than a threshold voltage of said signal amplifying FET. A semiconductor integrated circuit, wherein the source and the drain of the FET are connected by electric wiring via a resistor.