JP3305490B2 - Method for manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a MOS semiconductor device, and more particularly to a method for manufacturing a MOS semiconductor device having a gate electrode wiring having a polycide structure composed of a polysilicon film and a refractory metal silicide film formed thereon. The present invention relates to a method for manufacturing a semiconductor device.

[0002]

2. Description of the Related Art In response to demands for miniaturization and high-speed MOS semiconductor devices, a polycide structure is used as a gate electrode wiring. In a gate electrode wiring having a polycide structure, a refractory metal silicide film is formed on a polysilicon film. In order to form such a polycide wiring, a polysilicon film is deposited on a gate oxide film, a refractory metal silicide film is deposited thereon, and then the refractory metal silicide film and the polysilicon film are photoengraved. And by etching to form a gate electrode wiring. And
In order to form a source / drain diffusion layer by ion-implanting impurities into a substrate in a self-aligned manner (self-alignment), ion implantation is performed using a gate electrode wiring as a mask. An oxide film is formed on the refractory metal silicide layer by high-temperature heat treatment in order to prevent the drain impurity from penetrating.

In the case of forming a source / drain diffusion layer having an LDD (Lightly Doped Drain) structure, after patterning a gate electrode wiring, ion implantation for forming a shallow diffusion layer is performed, and thereafter, a CVD oxide film or high-temperature oxidation is performed. A film is formed, and the oxide film is etched back to form a sidewall spacer on the side surface of the gate electrode wiring. Thereafter, ion implantation for forming a deep diffusion layer is performed on the substrate using the gate electrode wiring and the side wall spacer as a mask. In this case, too, side wall spacer formation is performed to prevent the source / drain impurities from penetrating into the channel region. Later, an oxide film is formed on the refractory metal silicide film by performing a high-temperature heat treatment in an oxidizing atmosphere.

In a high-temperature heat treatment step of forming an oxide film on a refractory metal silicide film, the surface of the gate electrode wiring may be roughened due to abnormal oxidation, or the refractory metal silicide film may be peeled off. In addition, the stress of the refractory metal silicide film causes a high-density interface state to be generated at the interface between the substrate and the gate oxide film, causing a problem that the breakdown voltage is deteriorated.

In order to solve such a problem, prior to the step of forming an oxide film on the refractory metal silicide by high-temperature heat treatment, an oxide protection film such as a silicon nitride film or a silicon oxide film is formed on the refractory metal silicide film. It has been proposed to form a film (see JP-A-4-207525).

[0006]

When the gate electrode wiring is formed by the method proposed in the cited reference, an oxide protective film is formed on the high melting point metal silicide in the step of patterning the gate electrode wiring. In some cases, the oxidation protective film remains locally. If the oxidation protection film remains locally, the refractory metal silicide film and the polysilicon film thereunder also remain in that portion, resulting in poor patterning.

The present invention solves reliability problems such as abnormal oxidation of the polycide wiring surface and peeling of the high-melting-point silicide film. And to prevent the polysilicon film from remaining.

[0008]

According to the present invention, a laminated film of a polysilicon film and a refractory metal silicide film is formed on a gate oxide film, and the laminated film is patterned into a gate electrode wiring shape. After forming a thin oxide film on the exposed surface of the gate electrode wiring, the gate electrode wiring is oxidized. A method for forming a thin oxide film includes exposing the substrate to oxygen plasma at a low temperature of 200 to 400 ° C., exposing the substrate to far ultraviolet rays in an oxidizing atmosphere at a low temperature, or exposing the substrate to a gas containing ozone at a low temperature. Is the way. The far ultraviolet here is about 20
It is a wavelength region of not more than 00 °, preferably a wavelength near 1800 °.

The refractory metal silicide film is a commonly used titanium silicide, tantalum silicide, molybdenum silicide, tungsten silicide or the like.

[0010]

According to the first to fourth aspects of the present invention, after the substrate is patterned into a gate electrode wiring shape having a polycide structure, the substrate is exposed to far ultraviolet rays in a gas containing oxygen plasma or ozone or in an oxidizing atmosphere to obtain a high melting point metal. A thin oxide film is formed on the silicide film. Since this thin oxide film is formed after the patterning of the gate electrode wiring, no other film such as an oxide film is formed on the refractory metal silicide film in the step of patterning the gate electrode wiring. The conversion can be performed with high reliability.

In the oxidation step performed before the ion implantation step for forming the source / drain diffusion layers, a thin oxide film is formed on the refractory metal silicide film. The thin oxide film has a function of reducing the diffusion rate of the oxidizing species, which prevents abnormal oxidation of the refractory metal silicide film and prevents the refractory metal silicide film from peeling off.

[0012]

FIG. 1 shows an embodiment in which the present invention is applied to a process for forming a MOS transistor having an LDD structure. (A) After forming a channel stopper layer 4 and a field oxide film 6 on a silicon substrate 2 according to a normal process,
A gate oxide film 8 is formed on the exposed surface of the substrate 2 to a thickness of 100 to 250 °. A phosphorus-doped polysilicon film 10 is deposited thereon by a CVD method to a thickness of 1000 to 2500 °. A tungsten silicide film 12 as a refractory metal silicide film is deposited thereon by PVD to a thickness of 1000 to 1000 μm.
Deposit to a thickness of 2500 °.

Next, the tungsten silicide film 12 and the polysilicon film 10 are patterned into a gate electrode wiring shape by photolithography and etching. Using the gate electrode wiring pattern and the field oxide film 6 as a mask, phosphorus or arsenic ions are implanted into the substrate 2 to form a shallow diffusion layer having an LDD structure. The injection energy at this time is 30 to
90 KeV, dose amount is 5 × 10 ^{12 to} 5 × 10 ¹³ / cm
² In this ion implantation, even if an oxide film is not formed on the silicide film 12, since the silicide film 12 which has not been subjected to heat treatment after deposition is amorphous, the implanted impurities can pass through the gate electrodes 12 and 10 into the channel region of the substrate. There is no. The same applies when another high melting point metal silicide film is used instead of the tungsten silicide film 12.

(B) CVD so as to cover the gate electrode wiring
After depositing an oxide film or a high-temperature oxide film to a thickness of 1000 to 2500 °, etch back is performed to form a sidewall spacer 14 on the side surface of the gate electrode wiring.

(C) Next, a thin oxide film 16 is formed on the silicide film 12 by exposing the substrate to oxygen plasma. The oxide film 16 is, for example, an oxide film having a thickness of 30 to 50 °. As a method of exposing to oxygen plasma, for example, a barrel type ashing apparatus is used at a pressure of 0.6 to 1.0 Torr and an O ₂ flow rate of 1
A plasma is formed at a temperature of 00 to 500 sccm, and the substrate is exposed to the plasma at a temperature of about 300 ° C. afterwards,
The substrate is heated to about 900 ° C. in an oxidizing atmosphere to further form an oxide film 18 on the silicide film 12.

(D) Thereafter, arsenic ions are implanted using the gate electrode wiring and sidewall spacers 16 and the field oxide film 6 as a mask to form a deep diffusion layer having an LDD structure. The injection energy at this time is 2
0 to 70 KeV, dose amount is 1 × 10 ¹⁵ to 8 × 10 ¹⁵ /
cm ² . At this time, since the oxide film 18 is formed on the gate electrode wiring, the impurity does not penetrate into the channel region of the substrate even by ion implantation for forming the deep diffusion layer 20. Thereafter, an interlayer insulating film is deposited according to a normal process, a contact hole is opened, and a metal wiring is formed.

As a method of forming the thin oxide film 16 in the step (C) of FIG. 1, instead of exposing the substrate to oxygen plasma, the substrate is exposed to oxygen or an atmosphere containing oxygen at a wavelength of 2000 ° or less, preferably around 1800 °. The thin oxide film 16 can also be formed by exposing to a deep ultraviolet ray. The thin oxide film 16 can also be formed by exposing the substrate to a gas containing ozone. In each case, the substrate temperature is as low as about 300 ° C.

FIG. 2 shows an embodiment in which the present invention is applied to a method for forming a MOS transistor having a single drain structure diffusion layer. (A) As in FIG. 1, a gate electrode wiring having a polycide structure is formed. (B) Exposing the substrate to oxygen plasma, exposing the substrate to ultraviolet light in an oxidizing atmosphere, or exposing to an atmosphere gas containing ozone by heating the substrate to a low temperature of 300 ° C. without forming a sidewall spacer. Thereby, a thin oxide film 16 is formed on the surface of the gate electrode wiring.

(C) Then, an oxide film 18 is formed on the gate electrode wiring by performing a heat treatment in an oxidizing atmosphere. Thereafter, arsenic ions for forming source / drain diffusion layers are implanted into the substrate using the gate electrode wiring covered with the oxide film 18 and the field oxide film 6 as a mask. After that, an interlayer insulating film, a contact hole, and a wiring are formed according to a normal process.

[0020]

[0021]

According to the present invention, since a thin oxide film is formed on the surface of the polycide gate electrode at a low temperature, abnormal oxidation due to oxidation at a high temperature before ion implantation is suppressed. And the reliability of the polycide wiring can be improved. Since no oxide film or the like is formed on the refractory metal silicide film at the stage of patterning the polycide gate electrode wiring, the etching is performed as designed and no residue as in the cited example is generated.

[Brief description of the drawings]

FIG. 1 is a process sectional view showing one embodiment.

FIG. 2 is a process sectional view showing another embodiment.

[Explanation of symbols]

 Reference Signs List 2 silicon substrate 8 gate oxide film 10 polysilicon film 12 tungsten silicide film 13, 20 ion-implanted region 14 sidewall spacer 16 thin oxide film 18 oxide film

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H01L 29/78 H01L 21/28 H01L 21/336

Claims (4)

(57) [Claims] 1. A method for manufacturing a semiconductor device, comprising forming a gate electrode wiring by the following steps (A) to (F). (A) a step of forming a gate oxide film on a semiconductor substrate; (B) a step of depositing a polysilicon film on the gate oxide film; and (C) a step of depositing a refractory metal silicide film on the polysilicon film. (D) patterning the refractory metal silicide film and the polysilicon film into a gate electrode wiring shape; (E) exposing the substrate to oxygen plasma at 200 to 400 ° C. to form a thin oxide film on the exposed surface of the gate electrode wiring (F) Then, a step of oxidizing the gate electrode wiring. 2. A method for manufacturing a semiconductor device, comprising forming a gate electrode wiring by the following steps (A) to (F). (A) a step of forming a gate oxide film on a semiconductor substrate; (B) a step of depositing a polysilicon film on the gate oxide film; and (C) a step of depositing a refractory metal silicide film on the polysilicon film. (D) a step of patterning the refractory metal silicide film and the polysilicon film into a shape of a gate electrode wiring; and (E) exposing the substrate to ultraviolet rays in an oxidizing atmosphere at 200 to 400 ° C. to expose an exposed surface of the gate electrode wiring. (F) a step of oxidizing the gate electrode wiring thereafter. 3. A method for manufacturing a semiconductor device, wherein a gate electrode wiring is formed by the following steps (A) to (F). (A) a step of forming a gate oxide film on a semiconductor substrate; (B) a step of depositing a polysilicon film on the gate oxide film; and (C) a step of depositing a refractory metal silicide film on the polysilicon film. (D) a step of patterning the refractory metal silicide film and the polysilicon film into a gate electrode wiring shape; and (E) exposing the substrate to a gas containing ozone at 200 to 400 ° C. to form a thin film on the exposed surface of the gate electrode wiring. Forming an oxide film; and (F) then oxidizing the gate electrode wiring. 4. A method for manufacturing a MOS semiconductor device having an LDD structure, wherein after patterning into a gate electrode wiring shape in step (D), ion implantation for forming a shallow diffusion layer is performed, and then step (E). Before forming a thin oxide film with the above, an insulating film covering the gate electrode wiring is deposited, and the insulating film is etched back to form a sidewall for forming a deep diffusion layer in a later step on the side surface of the gate electrode wiring. 4. The method of manufacturing a semiconductor device according to claim 1, further comprising a step of forming a spacer.