JP3385794B2 - Reset circuit - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention is incorporated in a battery power supply device for supplying power to a controller for controlling a load, and can reset the controller in a relatively short time when the dry battery is removed. The present invention relates to improvement of the reset circuit.

[0002]

2. Description of the Related Art Conventionally, as a battery power supply device of this type,
The one shown in FIG. 7 is known.

The above device comprises a CPU 103 constituting the above controller, a regulator IC3 connected to a power feed line 107 to the CPU 103 and a ground line 109, a series body of a current limiting resistor R1 and a small capacity electrolytic capacitor C1, and A medium capacity electrolytic capacitor C2 is provided. The above device
Also, the connection point A between the resistor R1 and the capacitor C1 and the feeder line 1
07 and the reset input terminal of the CPU 103 and the ground wire 10
It also comprises a voltage detector IC4 connected to each of 9 and a current limiting resistor R4 connected between the output side of the regulator IC3 and the output side of the voltage detector IC4. The device further includes a diode D1 connected to a power supply line 107 between the power supply line side terminal of the resistor R1 and the power supply line side terminal of the capacitor C2.
And a power supply line 111 to the load 113 connected to the power supply line 107 at the power supply line side terminal of the resistor R1, and the power supply line 1
It also comprises a diode D2 connected to 11. The terminal of the resistor R1 on the power supply line side and the ground line 109 of the capacitor C1.
A plurality of dry batteries 105 are removably connected to the side terminals, while the load 113 is connected to the CPU 103.
The switching transistor 115 which is turned on / off by the output from the resistor, the resistor R5, and the constant voltage diode ZD.
Are connected.

The regulator IC3 is for supplying a predetermined regulated voltage to the CPU 103, and continues to output the regulated voltage until the input voltage drops to a preset threshold level. The regulator IC3 will be described later in detail. Voltage detector IC4
Is in a drive state when the input voltage becomes equal to or higher than the minimum operating voltage of the detector IC4, and when it is detected that the input voltage has dropped to a voltage level for resetting the CPU 103, the resistor R4 causes the detector A low level voltage is applied to the reset input terminal of the CPU 103 by forming a closed loop through the IC4 to the ground line 109 and passing a current.

The CPU 103 is reset when a low level voltage is applied to its reset input terminal from the voltage detector IC4, and holds the reset state while the low level voltage is applied. The capacitor C1 is
When the dry battery 105 is removed, the voltage detector IC4
Functions as a power supply for driving the. On the other hand, the capacitor C2 is a backup capacitor for preventing the CPU 103 from malfunctioning due to a voltage drop generated when the load 113 is driven by the CPU 103.

In the diode D1, the charge charged in the capacitor C2 at the time of connecting the dry battery 105 is the dry battery 10.
When 5 is pulled out, it flows into the voltage detector IC4 through the resistor R1, and this increases the time from when the dry battery 105 is pulled out until the CPU 103 is reset, and prevents the reset from being lost even if the battery is replaced. It is provided to do so (when the battery is not reset, the function to detect the battery voltage drop and display the battery dead notice cannot be reset, and the battery dead notice remains displayed even if the battery is replaced). Also, the diode D2
Is provided to prevent the current from flowing from the load side to the dry battery 105 and charging the dry battery 105 due to the counter electromotive force generated when an L load such as the motor load 113 is driven.

Next, the operation of each part of the battery power supply device having the above configuration will be described with reference to the timing chart of FIG.

First, when a plurality of dry batteries 105 are connected at time t1 as shown in FIG. 7, the voltage at point A rises due to the time constant determined by the resistor R1 and the capacitor C1 and the voltage is detected at time t2. The minimum drive voltage level at which the device IC4 is driven is reached. On the other hand, the voltage at the point B reaches the voltage level immediately after subtracting the voltage drop due to the diode D1 from the power supply voltage. Then, the voltage applied to the reset terminal of the CPU 103 becomes a high level at which the reset state is released at time t3 (that is, when the voltage detector IC4 reaches the reset detection voltage level).

Next, when the dry battery 105 is removed at time t4, the voltage at the point A becomes the applied voltage from the capacitor C1, but this voltage decreases due to the current consumption of the voltage detector IC4, and at time t5 the CPU 103. To a voltage level for resetting. When this voltage level is detected, the voltage detector IC4 detects the CP in the above-described manner.
It outputs a low level voltage for resetting U103. As a result, the CPU 103 enters the reset state at time t5, and after time t5, the capacitor C1 has a small capacity,
Since the capacitor C2 has a medium capacity, the voltage at the points A and B sharply drops to 0V at the time t6.

[0010]

By the way, in the apparatus shown in FIG. 7, the diode D2 is connected to the feeder line 111 as described above.
Is connected to the load 113 side, the dry battery 105
The voltage obtained by subtracting the voltage drop in the forward direction of the diode D2 from the output voltage is applied. Therefore, when the output voltage of the dry cell 105 decreases with the passage of time, the voltage applied to the load 113 becomes lower than the threshold level for driving the load earlier than when the diode D2 is not connected.

On the other hand, as for the diode D1 connected to the power supply line 107, the voltage obtained by subtracting the voltage drop in the forward direction of the diode D1 from the output voltage of the dry cell 105 is applied to the regulator IC3 in the same manner as above. Therefore, when the output voltage of the dry cell 105 decreases with the passage of time, the voltage applied to the regulator IC3 can continue to output the regulated voltage earlier than when the diode D1 is not connected. It will be below the threshold level.

Therefore, even if the output voltage of the dry battery 105 is above the above-mentioned threshold levels, the dry battery 1
It was uneconomical to replace 05.

Further, in the apparatus shown in FIG. 7, the dry battery 105 is used.
Other than that, there is no driving power source for the load 113.
It was also difficult to stably drive the load 113 when the output voltage from the load decreased.

Therefore, an object of the present invention is to extend the battery replacement period in a battery power supply device for supplying power to a controller for controlling a load, and to reset the controller in a relatively short time when the battery is removed. It is to provide a reset circuit capable of performing.

[0015]

The first aspect of the present invention is as follows.
In a reset circuit that is built in a battery power supply device for supplying power to a controller that controls a load and that resets the controller, when a battery is connected, charges are accumulated by power supply from the battery, A battery connection / non-connection judging means for judging a battery connection / non-connection by detecting a voltage of a portion to which the battery is connected and a capacitor for backing up a controller, and the battery connection / non-connection judging means for not connecting the battery When it is determined that the discharge circuit forming means for forming a discharge circuit for forcibly discharging the charge accumulated in the capacitor and the voltage of the capacitor are detected, the detected voltage is equal to or lower than a preset threshold level. And a reset means for resetting the controller at the time.

A second aspect of the present invention is built in a battery power supply device for supplying power to a controller for controlling a load,
In the reset circuit for resetting the controller, when a battery is connected, a capacitor for accumulating electric charges from the power supply from the battery and backing up the load and the controller, and a result of the battery non-connection determination are notified. Sometimes, a discharge circuit forming means for forming a discharge circuit for forcibly discharging the electric charge accumulated in the capacitor, and a voltage of the capacitor are detected, and when the detected voltage is equal to or lower than a preset threshold level. Resetting means for resetting the controller, wherein the controller detects voltage of a portion to which the battery is connected, determines battery connection / non-connection, and when the battery is not connected, forms the discharge circuit. It is characterized in that the means is notified.

[0017]

According to the first aspect of the present invention, when the battery connection / non-connection judging means judges that the battery is not connected, the electric charge accumulated in the capacitor is forcibly discharged to reset the controller. Since the discharge circuit for forming the battery is formed, it is possible to extend the battery replacement time, and it is possible to reset the controller in a relatively short time when the battery is removed.

According to the second aspect of the present invention, the controller detects the voltage of the portion to which the battery is connected to determine whether the battery is connected or not, and when it is determined that the battery is not connected, the discharge circuit is formed. I decided to notify the means,
The battery replacement period can be extended, and the controller can be reset in a relatively short time when the battery is removed.

[0019]

Embodiments of the present invention will now be described in detail with reference to the drawings.

FIG. 1 shows an embodiment of a battery power supply device to which the reset circuit of the present invention is applied.

The above-mentioned device has CPUs 3 and C for inputting various sensor signals to control the load 13 such as an electric motor.
Regulator IC3, resistor R6, and small-capacity electrolytic capacitors C2 and C connected to the power supply line 8 to PU3 and the ground line 9
A voltage detector IC5 connected to the reset terminal of PU3 and the ground line 9 is provided. The device is further connected to a current limiting resistor R4 connected between the output side O of the regulator IC3 and the output side O of the voltage detector IC5, and the power supply line 7 and the ground line 9 to remove the dry battery 5. At times, the automatic discharge circuit 1 for setting the CPU 3 in the reset state in a relatively short time is also provided. The device also includes a power supply line 12 to a load 13 connected to the power supply line 7 at the power supply line side terminal of the large-capacity electrolytic capacitor C1, and the power supply line 12 includes a load 13 and a CPU 3 from the load 13. The switching transistor 15, which is turned on / off by the output of the above, the resistor R5, and the constant voltage diode ZD are connected.

The automatic discharge circuit 1 includes a bias resistor R1 connected to the midpoint 11 of the series body of the dry batteries 5 and the ground line 9, respectively, and an inverting logic in which the power supply terminal is connected to the power supply line 7 and the ground line 9. The circuit IC2 includes a current limiting resistor R3 connected between the output side of the inverting logic circuit IC2 and the feeder line 7.
The automatic discharge circuit 1 further includes a midpoint 11 and an inverting logic circuit IC.
The voltage detector IC1 connected to the input side of 2 and the ground line 9, and the current limiting resistor R2 connected between the power supply line 7 and the output side of the voltage detector IC1 and the input side of the inverting logic circuit IC2. Also equipped with.

The voltage detector IC1 is an open collector output (open drain output) voltage detector, and is configured to be in a driving state when the input voltage exceeds the minimum operating voltage of the detector IC1. There is. Voltage detector I
C1 is a power source (when the input voltage (= voltage applied to point A) is equal to or higher than the minimum operating voltage of the detector IC1 and equal to or lower than the voltage detection setting level (voltage of two dry batteries 5). A closed loop for flowing a current (= Vcc1 / R2) through the resistor R2, the output terminal O of the detector IC1 and its ground terminal G from the side of the four dry batteries 5 in series is formed. The voltage detector IC1 does not form the closed loop when the input voltage is lower than its minimum operating voltage.

The inverting logic circuit IC2 receives the input voltage (= point B
Voltage applied to the circuit) is VDD (= VCC1) of the circuit IC2.
At the level, the output voltage (= voltage applied to point C) level is the ground level (VSS = 0) of the circuit IC2.
V). Then, from the VCC side, the resistor R3 and the circuit IC2
To form a closed loop for passing a current to the ground terminal G through the output terminal O of the. Similarly, the inverting logic circuit IC2 is
When the input voltage is between the VDD level and the ground level and is close to the VDD level, the output voltage level becomes a value close to the ground level of the circuit IC2 and forms a closed loop as described above. When the input voltage is between the VDD level and the ground level and is close to the ground level, the output voltage level becomes a value close to the VDD level of the circuit IC2 and the closed loop is not formed. Similarly, in the inverting logic circuit IC2, when the input voltage is close to the ground level (VSS = 0V) of the circuit IC2, the output voltage becomes the VDD level of the circuit IC2 and does not form the closed loop.

The large-capacity electrolytic capacitor C1 is caused by the voltage drop caused when the load is driven by the CPU 3,
The dry battery 105 functions as a backup capacitor for preventing the CPU 3 from malfunctioning and also absorbs the current flowing from the load 13 side by the counter electromotive force generated on the load 13 side when the load 13 is started.
It also functions to prevent it from flowing into.

A three-terminal positive voltage regulator is used as the regulator IC3. When the dry battery 5 is connected as shown in FIG. 1, the regulator IC3 uses the voltage Vcc1 applied from the dry battery 5 as an input voltage (= voltage applied to the point D) to form resistors R4 and CP.
A predetermined regulated voltage V is applied to the power supply terminal (= point E) of U3.
Continue to output CC2. The output of the regulated voltage Vcc2 is obtained by removing the dry cell 5 from the large capacity electrolytic capacitor C1.
When the applied voltage from V.sub.1 is used as the input voltage, the applied voltage is a threshold value of the voltage level at which the regulated voltage V.sub.CC2 can be maintained from V.sub.CC1 (that is, the voltage level for resetting the CPU3: TH in FIG. It continues until it falls to (shown) (time T5 to time T6 in FIG. 2). Then, the output voltage of the regulator IC3 drops rapidly with a slight delay after the applied voltage drops below the threshold value (from time T7 in FIG. 2).

Like the voltage detector IC1, the voltage detector IC5 is an open collector output (open drain output) voltage detector, and is driven when the input voltage exceeds the minimum operating voltage of the detector IC5. Is configured to be. The voltage detector IC5 has its input voltage (= point D
Voltage applied to the detector IC5 is equal to or higher than a predetermined operating voltage of the detector IC5 and the voltage applied to the point E is lower than the minimum operating voltage of the CPU3 (time T1 to T2 in FIG. 2), the regulator IC3 outputs Resistor R4, output terminal O of the detector IC5
And a closed loop for passing a current i3 through its ground terminal G and holding the voltage level at point F at a low level for continuing the reset of CPU3. Voltage detector I
C5 forms the closed loop when it detects that the input voltage has dropped from VCC to the voltage level (TH) for resetting the CPU 3 (time T6 in FIG. 2) due to the removal of the dry cell 5. Then, the current i3 is passed. As a result, the voltage level at the point F becomes a low level for setting the CPU 3 in the reset state (time T6 in FIG. 2). Then, when the input voltage further decreases and becomes lower than the minimum operating voltage, the voltage detector IC5 is in the drive stopped state. In addition,
In the voltage detector IC5, the input voltage is higher than the minimum operating voltage, and VCC1 is the regulated voltage V of the regulator IC3.
The detector IC5 does not form the closed loop at a voltage level (above the TH level) at which CC2 can be maintained (time T5 to T6 in FIG. 2).

The CPU 3 is in a so-called low active state which is reset when a low level voltage is applied to the reset input terminal (= point F) from the voltage detector IC5. From T4 and time T6, the reset state is entered. The CPU 3 holds the reset state while the low level voltage is applied to its reset input terminal.

Next, the operation of each part of the battery power supply device having the above configuration will be described with reference to the timing chart of FIG.

First, a case where a plurality of dry batteries 5 (four in this case) are connected as shown in FIG. 1 will be described.

At time T1, when a plurality of dry batteries 5 are connected, the voltage at point D immediately becomes the voltage Vcc1 of the series body of the plurality of dry batteries 5, and the battery power supply device is turned on. On the other hand, the voltage at the point A immediately becomes the voltage at the midpoint of the series body of the dry batteries 5 (in this case, the voltage of the series body for two dry batteries). As a result, the voltage detector IC1 forms a closed loop as described above, so that a current (= Vcc1 / R2) flows through the closed loop. Therefore, the voltage at the point B becomes a value (approximately 0 V) close to the ground level voltage of the voltage detector IC1 at time T1.

Since this value is also a value close to the ground level voltage of the inverting logic circuit IC2 at the same time, the circuit IC
A voltage of VDD level is output from the second output terminal O. Therefore, since the above-mentioned closed loop is not formed, the current (i2 = Vcc1 / R3) does not flow, and the voltage at point C changes to time T.
At 1 it is VDD.

As described above, when the voltage at the point D becomes Vcc1, the voltage at the point E, that is, the output voltage from the regulator IC3 gradually rises and reaches the minimum operating voltage of the CPU 3 at time T2. Then, at time T3, the predetermined operating voltage of the CPU3, VCC2, is reached.

Here, from time T1 to time T4, the voltage at the point H rises due to the time constant due to the resistor R6 and the capacitor C2 and is lower than the reset detection level of the voltage detector IC5. Since the closed loop as described above is formed, the current i3 flows. Therefore, the voltage at the point F becomes a value (approximately 0V) close to the ground level voltage of the voltage detector IC5 from time T1 to time T4.

As described above, the CPU 3 is reset when a low level voltage is applied to its reset input terminal, so that the current i3 flows and the voltage from the voltage detector IC5 is close to the ground level voltage. The reset state is maintained while the value is applied. However, at the time T4, when the voltage at the point H reaches the reset detection setting level of the detector IC5 or more, the current i3 stops flowing, so that the voltage at the point F becomes Vcc2 which is the voltage at the point E at the time T4. It is a value close to. Therefore, the reset state of the CPU 3 is released at this point.

Next, the case where a plurality of dry batteries 5 are removed will be described.

Time T5 when a plurality of dry batteries 5 are removed
Then, the voltage accumulated at the large-capacity electrolytic capacitor C1 maintains the voltage at the point D at Vcc1 which is the voltage level immediately before the dry battery 5 is removed. Therefore, the battery power supply device remains in the ON state. On the other hand, the voltage at the point A immediately becomes the ground level of the voltage detector IC1. As a result, the closed loop described above is not formed, and the current (= Vcc1 / R2) does not flow.
Therefore, the voltage at the point B becomes a value close to the voltage Vcc1 at the point D at the time T5.

At the same time, this value is VD of the inverting logic circuit IC2.
Since the voltage is also close to the D level voltage, the output terminal O of the circuit IC2 outputs a voltage level close to the ground level of the circuit IC2. Therefore, the closed loop described above is formed and the discharge current i2 from the capacitor C1 flows, so that the voltage at the point C becomes a value close to the ground level of the circuit IC2 at the time T5.

As described above, since the discharge current i2 flows, the electric charge accumulated in the electrolytic capacitor C1 is gradually consumed. Therefore, after the time T5 of FIG. The voltage of is gradually reduced accordingly.

Here, when the voltage at the point H reaches the time T6 at which the voltage is lowered to the reset detection setting level for resetting the CPU 3, this is detected by the voltage detector IC5 to form the closed loop and the current i3 is generated. Flowing. As a result, the voltage at the point F becomes a low level at which the CPU 3 is reset at time T6.

On the other hand, since the electric current accumulated in the large-capacity electrolytic capacitor C1 is further consumed by the current i3 flowing in this way, the voltage at the point D further decreases, and C
The voltage is lowered to the minimum operating voltage of the voltage detector IC5 which is lower than the minimum operating voltage of PU3. Therefore, the voltage at point E is CP
When U3 is reset, the voltage drops to the minimum operating voltage of the voltage detector IC5 which is lower than the minimum operating voltage of the CPU3. The power supply voltage device is turned off at time T7 when the voltage at the point E becomes equal to or lower than the minimum operating voltage of the CPU3.

As is clear from the above description, in the above device, the time T at which the discharge of the electrolytic capacitor C1 is started.
The shorter the interval between 5 and the time T7 when the voltage at the point E becomes equal to or lower than the minimum operating voltage of the CPU 3, the more preferable it is.

According to this embodiment, since the automatic discharge circuit 1 for discharging the electric charge accumulated in the electrolytic capacitor C1 when the dry battery 5 is pulled out is provided, the electrolytic capacitor C1 has a large capacity. Moreover, even when the discharge current i1 flowing from the electrolytic capacitor C1 to the regulator IC3 and the voltage detector IC5 side is small, when the dry cell 5 is removed, the discharge current i2 automatically starts to flow to the current limiting resistor R3 side. Therefore, the electrolytic capacitor C1
Since the electric charge accumulated in is consumed as the consumption currents i1 and i2 and decreases, and the voltage at the point D decreases accordingly, the CPU 3 is reset in a relatively short time,
The battery power supply can be turned off.

Therefore, unlike the device of FIG. 7, there is no automatic discharge circuit 1 and a plurality of electrolytic capacitors C1 and C2 are provided.
Is connected and the discharge current from these electrolytic capacitors C1 and C2 is also small, the charge accumulated in the electrolytic capacitors C1 and C2 after the dry battery 105 is removed is consumed by the discharge current and the point D The voltage drops and C
It does not take a long time until the PU 103 is reset.

Further, by providing the large-capacity electrolytic capacitor C1, not only the backup of the CPU 3 and the stable driving of the load 13 are possible, but also the load 13
The current flowing from the load 13 side due to the counter electromotive force generated on the side is absorbed by the large-capacity electrolytic capacitor C1,
It is possible to prevent the current from flowing into the dry battery 5.

It should be noted that the above-mentioned contents are only related to one embodiment of the present invention and the present invention is not limited to the above contents.

For example, in this embodiment, a plurality of dry batteries 5 are used.
Multiple (4) to detect whether or not
It was decided to detect the voltage from the midpoint of the series body of the dry batteries 5, but in the above series body, the voltage is detected from the connection point between the series body of three dry cells 5 and one dry cell 5. Good. Further, in the configuration in which the series bodies of the four dry batteries 5 are connected in parallel, the voltage may be detected from the midpoint of one of the series bodies.

Further, the above-mentioned voltage detector IC1 can also be constructed by using a MOSFET which is a voltage control type element. Further, the inverting logic circuit IC2 can be configured by using one inverter element, or can be configured by using a plurality of elements so that the output is inverted with respect to the input. . Further, by adopting elements having large resistance values as the current limiting resistor R2 and the bias resistor R1, it is possible to reduce the power consumption of the automatic discharge circuit 1.

If an element having a small resistance value is used for the current limiting resistor R3, the time from the removal of the plurality of dry batteries 5 to the resetting of the CPU 3 can be shortened and the resistance value is large. If an element is adopted, the above-mentioned time becomes long.
The time until the CPU 3 is reset can be arbitrarily set depending on whether the CPU 3 is adopted.

Furthermore, when a battery is connected and a battery voltage drops below a predetermined voltage when a battery is connected, a "battery dead notice" is displayed or a voltage lower than the above predetermined voltage is displayed. In addition, "Battery replacement" may be displayed.

FIG. 3 shows another embodiment of the battery power supply device to which the reset circuit of the present invention is applied.

The battery power supply device of the present embodiment is constructed so that the CPU is reset at the same time when the dry battery 5 is removed. The device described above includes a forced discharge circuit 14 having a current limiting resistor R10 and a switching transistor Q1 in place of the automatic discharge circuit 1 used in the above embodiment in order to forcibly discharge the charge stored in the large-capacity electrolytic capacitor C1. The main feature is that is connected.

The above apparatus further includes a CPU 20 having an A / D (analog / digital) conversion function, and this CP.
A battery voltage detection circuit 17 having voltage dividing resistors R7 and R8, which connects between the analog signal input terminal of U20 and the midpoint 11 of the series body of the dry batteries 5, is provided.

Other than the above, each part shown in FIG. 3, that is, the resistor R
6, small-capacity electrolytic capacitor C2, three-terminal positive voltage regulator IC3, voltage detector IC5, current limiting resistor R4, power supply line 12, load 13, switching transistor 15 for load driving, resistor R5, and constant voltage diode ZD Is the same as that shown in FIG.
Detailed description thereof will be omitted. The CPU 22
When the voltage applied to the input terminal is at a low level (lower than the threshold value X described later), the ON signal is output to the switching transistor Q1.

Next, the operation of each section having the above configuration will be described with reference to the flowchart of FIG.

First, a series body of the dry batteries 5 (four dry batteries 5
3) is connected to the device as shown in FIG. 3, a voltage obtained by dividing the voltage of two dry batteries 5 by resistors R7 and R8 is applied to the CPU 20. in this case,
The value of the digital data indicating the divided voltage is the minimum voltage value X applied to the CPU 20 when the dry battery 5 is connected to the above-mentioned device when the dry battery 5 is new.
It should be larger than (hereinafter referred to as threshold X) (step 201). Therefore, the ON signal is not output from the CPU 20, and the switching transistor Q1 maintains the OFF state (step 205).

On the other hand, when the series body of the dry batteries 5 is pulled out from the device, the value of the voltage applied to the CPU 20, that is, the value of digital data at that time becomes 0, which is naturally smaller than the threshold value X. (Step 20
1). As a result, an ON signal is output from the CPU 20,
The switching transistor Q1 becomes conductive. Due to this conduction, the charge accumulated in the electrolytic capacitor C1 becomes a discharge current i4 (= Vcc1 / R10) and flows through the current limiting resistor R10 and the switching transistor Q1 (step 20).
2), the voltage at point D drops rapidly. In this way
Since the electric current accumulated in the electrolytic capacitor C1 is rapidly consumed by the flow of the discharge current i4, the voltage at the point H is also rapidly reduced.

Here, when the voltage at the point H drops to the reset detection setting level for resetting the CPU 20 (step 203), this is detected by the voltage detector IC5 and a closed loop similar to that in the above embodiment is formed. Then, the current i3 flows. As a result, the voltage at point F is C
PU20 goes to a reset low level, CPU
20 is reset.

Since the current i3 flows in this way,
Since the electric charge accumulated in the electrolytic capacitor C1 is further consumed, the voltage at the point D further decreases to the minimum operating voltage of the voltage detector IC5 lower than the minimum operating voltage of the CPU 20. Therefore, the voltage at the point E drops to the minimum operating voltage of the voltage detector IC5 that is lower than the minimum operating voltage of the CPU 20 when the CPU 20 is reset. The device is turned off when the voltage at the point E becomes equal to or lower than the minimum operating voltage of the CPU 20.

When the battery is connected again, the reset is released (step 204) and the above flow is repeated.

FIG. 5 is another flowchart showing the operation of each unit of the battery power supply device shown in FIG.

This flowchart uses the device shown in FIG. 3 in which the CPU 20 has a built-in internal reset circuit, and the resistors R4 and R6 and the small-capacity capacitor C are used.
2. The processing operation when the voltage detector IC5 and the forced discharge circuit 14 having the resistor R10 and the switching transistor Q1 are not connected. If the CPU 20 itself has an internal reset circuit, the power supply voltage is equal to the above-mentioned threshold value X.
When recognizing that the size has become smaller, the resistors R4, R6, the small-capacitance capacitor C2, and the voltage detector IC5 necessary for applying the reset signal to the CPU 20 are unnecessary because the reset can be performed by itself. Further, since it is not necessary to forcibly discharge the electric charge accumulated in the electrolytic capacitor C1, the forced discharge circuit 14 is also unnecessary.

In FIG. 5, when it is determined that the value of the digital data indicating the power supply voltage has become smaller than the threshold value X (step 201), the CPU 20 itself resets immediately (step 206). In this case as well, for the same reason as above, the CP is connected from the power source side through the resistors R7 and R8.
A process of sequentially checking the voltage level applied to U20 is performed (step 204).

FIG. 6 shows still another embodiment of the battery power supply device to which the reset circuit of the present invention is applied.

As in the embodiment of FIG. 3, the battery power supply device of this embodiment is also designed so that the CPU is reset at the same time when the dry battery 5 is removed. In the above device as well, the forced discharge circuit 14 is connected in order to forcibly discharge the charge stored in the large-capacity electrolytic capacitor C1.

The above-mentioned device further uses a voltage detector IC1 (which is the same as the voltage detector IC1 in FIG. 1) for connecting between the digital signal input terminal of the CPU 22 and the midpoint 11 of the series body of the dry batteries 5. The battery voltage detection signal output circuit 17 having the above) is provided. The battery voltage detection circuit 17 is grounded via the resistor R1.

Other than the above, each part shown in FIG. 6, that is, the resistor R
6, small-capacity electrolytic capacitor C2, three-terminal positive voltage regulator IC3, voltage detector IC5, current limiting resistor R4, power supply line 12, load 13, switching transistor 15 for load driving, resistor R5, and constant voltage diode ZD Is the same as that shown in FIG.
Detailed description thereof will be omitted. The CPU 22
When the voltage level applied to the input terminal is "H", an ON signal is output to the switching transistor Q1.

Next, the operation of each section in the above configuration will be described.

As shown in the figure, when the series body of the dry batteries 5 is connected to the above device, the input voltage to the voltage detector IC1 (= voltage applied to the point A) is the detector IC1.
Above the minimum operating voltage and below the voltage detection set level (voltage for two dry batteries 5). for that reason,
The voltage detector IC1 is in a driving state, and a closed loop for flowing a current (= VCC2 / R9) from the power source side through the regulator IC3, the resistor R9, the output terminal O of the voltage detector IC1 and its ground terminal G is formed. This allows the CPU 22
Since the voltage applied to the low level is low level, the ON signal is not output from the CPU 22 to the switching transistor Q1 and the CPU 22 is not reset.

On the other hand, when the series body of the dry batteries 5 is removed from the device, the input voltage to the voltage detector IC1 becomes lower than the minimum operating voltage of the detector IC1, so that the closed loop by the detector IC1 is formed. Not done. for that reason,
The voltage level of Vcc2 (that is, the high level voltage) is the CPU
Since the voltage is applied to the CPU 22, the CPU 22 outputs an ON signal to the switching transistor Q1 to instantly discharge the electric charge accumulated in the electrolytic capacitor C1, so that the CPU 22 enters the reset state as described above. .

It should be noted that the above-mentioned contents are only related to the respective embodiments according to the present invention, and it is needless to say that the present invention is not limited to the above-mentioned contents.

[0072]

As described above, according to the present invention,
In a battery power supply device for supplying power to a controller that controls a load, to provide a reset circuit that can extend the battery replacement period and can reset the controller in a relatively short time when the battery is removed. You can

[Brief description of drawings]

FIG. 1 is a circuit configuration diagram of an embodiment of a battery power supply device to which a reset circuit of the present invention is applied.

2 is a timing chart showing the operation of each part of the apparatus shown in FIG.

FIG. 3 is a circuit configuration diagram of another embodiment.

4 is a flowchart showing the operation of each part of the apparatus shown in FIG.

5 is another flowchart showing the operation of each unit of the apparatus of FIG.

FIG. 6 is a circuit configuration diagram of still another embodiment.

FIG. 7 is a circuit configuration diagram of a conventional battery power supply device.

8 is a timing chart showing the operation of each part of the apparatus shown in FIG.

[Explanation of symbols]

1 Automatic discharge circuit 3 CPU 5 dry batteries 13 load R3 current limiting resistor C1 large capacity electrolytic capacitor IC1, IC5 voltage detector IC2 Inversion logic circuit IC3 regulator

Continuation of the front page (56) Reference JP-A-1-190229 (JP, A) JP-A-63-95825 (JP, A) Actually open 62-103166 (JP, U) Actually open 58-46231 (JP , U) Jitsukai Sho 62-22632 (JP, U) Jitsuhei 3-4130 (JP, Y2) (58) Fields investigated (Int.Cl. ⁷ , DB name) H02J 1 / 00-9 / 08

Claims (3)

(57) [Claims] 1. A reset circuit that is built in a battery power supply device for supplying power to a controller that controls a load, and that resets the controller, stores charge by power supply from the battery when the battery is connected. A capacitor for backing up the load and the controller; a battery connection / non-connection judging means for detecting a voltage of a portion to which the battery is connected and judging battery connection / non-connection; A discharge circuit forming means for forming a discharge circuit for forcibly discharging the electric charge accumulated in the capacitor when the means determines that the battery is not connected, and the detection voltage is preset by detecting the voltage of the capacitor. A reset circuit configured to reset the controller when the threshold value is equal to or lower than the threshold level. 2. A battery-powered device for supplying power to a controller for controlling a load, wherein a reset circuit for resetting the controller stores a charge when power is supplied from the battery when the battery is connected. A capacitor for backing up the load and the controller; and a discharge circuit forming means for forming a discharge circuit for forcibly discharging the electric charge accumulated in the capacitor when a determination result of battery disconnection is notified, And a reset unit that detects the voltage of the capacitor and resets the controller when the detected voltage is equal to or lower than a preset threshold level, and the controller detects the voltage of a portion to which the battery is connected. , Battery connection / non-connection is determined, and when it is determined that the battery is not connected, the discharge circuit forming means Reset circuit is characterized in that as the notification to. 3. The reset circuit according to claim 2, wherein the discharge circuit forming means is a semiconductor switching element which is connected in parallel to the load and whose conduction / non-conduction state is controlled by the controller. Characteristic reset circuit.