JP3220176B2 - Drawing data creation method, data conversion method, and data conversion device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a technique for creating drawing data for an electron beam drawing apparatus from circuit design pattern data for a semiconductor integrated circuit device, and more particularly to a technique for compressing design pattern data. For example, the present invention relates to drawing data creation for a device including a large number of repetitive patterns such as a semiconductor memory device.

[0002]

2. Description of the Related Art With the enlargement and miniaturization of semiconductor integrated circuit devices, a technique of drawing a pattern on a mask or a wafer using an electron beam drawing apparatus has been adopted. To draw a predetermined pattern on a mask or a wafer by an electron beam drawing apparatus using design pattern data for an LSI device created by logic design, circuit design and layout design, the pattern data is drawn by electron beam drawing. It must be converted to drawing data for the device. Such conversion includes removing overlaps to prevent a decrease in drawing accuracy due to multiple exposure caused by overlapping of figures in a pattern defined by design pattern data, and expanding or reducing a figure defined by design pattern data. This is for performing dimensional correction for the case where the user wants to draw by hand, correction of the proximity effect due to scattering of the electron beam at the time of drawing, processing for decomposing the above-mentioned pattern into basic figures that can be drawn by an electron beam drawing apparatus, and the like. The above data conversion,
This is usually done on a large computer.

[0003] With the scale-up and miniaturization of LSI devices, the amount of data processed by an electron beam lithography system is steadily increasing. In conventional electron beam drawing technology,
When converting the design pattern data into the drawing data, all the graphics specified by the design pattern data to be converted into the drawing data are converted into the drawing data one by one. Therefore, the computer processing time required for data conversion and the amount of drawing data have increased, and it has become impossible to efficiently convert drawing data into highly integrated LSI devices such as DRAMs.
Therefore, a technique for compressing drawing data in order to reduce the amount of drawing data has been proposed. An example of a document describing such a technique is JP-A-57-122529 (published on July 30, 1982). Such a technique recognizes a repetitive pattern defined in the pre-drawing data for the entire pattern converted from the design pattern data, and registers a pattern representing all of the same pattern in an area including the same pattern, This is used at important points to try to compress the amount of data required for actual drawing.

[0004]

However, in the prior art, all figures recognized from the design pattern data are once converted into drawing data and then data compression is performed. The computer processing time until the drawing data to be obtained is not reduced. Also,
The present invention has found that when this data compression technique is directly applied to the compression of design pattern data, the pattern defined by the drawing data obtained by the data conversion has an undesirable discontinuity or an undesirable overlap. Was done. That is, as described above, since the drawing data defines a pattern as a set of figures from which overlap is removed to prevent double exposure, a repeated pattern to be subjected to data compression overlaps with an adjacent figure. It has come to be understood as something without. On the other hand, in the design pattern data, a repetition pattern which is a unit of repetition and a figure adjacent thereto generally have an overlap due to the nature of taking into account the enlargement / reduction of the figure and defining the pattern as a set of rectangular figures. Because they have.

The present inventor has found a need for a technique for compressing data by recognizing a repetitive pattern specified directly by design pattern data or a pattern repeated twice or more in consideration of the overlapping of figures.

One object of the present invention is to create electron beam drawing data from design pattern data by taking into account the degree of overlap between a repetitive pattern or a plurality of identical patterns defined by the design pattern data and a figure adjacent thereto. It is an object of the present invention to provide a drawing data creation method, a data conversion method, and a data conversion device capable of efficiently obtaining drawing data by compressing data.

Another object of the present invention is to provide a drawing data creation method, a data conversion method, and a data conversion device capable of reducing the drawing data creation time and the drawing data amount.

The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.

[0009]

The following is a brief description of an outline of a typical invention among the inventions disclosed in the present application.

That is, a pattern to be drawn usually includes a repetitive portion divided into a plurality of regularly arranged unit cells, and a non-repeating portion adjacent to the repetitive portion. The design pattern data corresponds to a repetition part, and a repetition data part defining at least one repetition pattern for a unit cell by providing an overlap between adjacent repetition patterns, and a non-repetition data part corresponding to a non-repetition part And In one aspect of the present invention, repetition information for specifying a repetition pattern is generated from design pattern data, and a repetitive graphic frame is generated based on the repetition information. The repetitive graphic frame defines a unit area cut out from the repetitive pattern, and this unit area is equivalent to a part of the repetitive portion of the pattern by repeatedly arranging the unit areas so as not to overlap between adjacent unit areas. It becomes something. In addition, based on the repetition information, one of the unit cells and data of at least the unit cell adjacent to the unit cell are selected, and the data of the unit cells are expanded to generate processing target repeated pattern data. The processing target repetition pattern data and the non-repetition pattern data portion are subjected to graphic processing operations to generate a processed repetition pattern data and a processed non-repetition data portion. Is extracted from the processed repetition pattern data in the above described repetition frame, and basic pattern data is formed therefrom. This basic pattern data is repeatedly used to draw a repeated portion of the pattern.

The repetitive pattern grasped from the design pattern data partially overlaps the figure adjacent thereto, and the magnification, mirror reversal / rotation, overlap removal, pattern correction are applied to the key points of such design pattern data. Assuming that graphic processing such as is performed, when generating basic pattern data from the repetition information and the repetition pattern data, the basic pattern data exists around the repetition pattern according to the overlapping range of the repetition pattern data and the repetition pattern. It is desirable to generate the basic pattern data while developing the data including the data of the repeating pattern.
On the other hand, in the repetitive portion specified by the repetitive pattern data, in the vicinity of the boundary with the non-repetitive portion adjacent thereto, it is necessary to generate the outer peripheral portion pattern data while maintaining the individual regularity with the non-repetitive portion. .

According to another aspect of the present invention, a design pattern data is stored in a non-repeated portion grasped from circuit design pattern data or an outer peripheral portion of a repeated pattern portion adjacent to the non-repeated portion. Alternatively, based on the design pattern data and other designation information (for example, reference information on whether or not to be a target of data compression), a plurality of identical patterns are recognized, and arrangement information for defining an area of the same pattern is acquired. Based on this arrangement information, generate ubiquitous basic pattern data corresponding to one unit area of the same pattern while maintaining regular continuity with surrounding graphics;
Further, drawing data corresponding to the same pattern may be generated based on the ubiquitous basic pattern and the arrangement information. By doing so, it is possible to compress the design pattern data also to the non-repeated pattern portion or the outer peripheral portion of the repetitive portion adjacent to the non-repeated portion, and expand all the figures included in such an area. It is not necessary to create drawing data.

The generation of the drawing data corresponding to the repetitive portion may include a process of removing overlap of figures included in the basic pattern and correcting the pattern while maintaining regularity between the patterns included in the repetitive portion. it can.

Furthermore, a semiconductor integrated circuit device is formed by drawing a mask pattern on a mask or a wafer according to the drawing data obtained as described above.

[0015]

According to the above-described means, a repetition pattern or the same pattern is grasped by recognizing the regularity included in the design pattern data. Then, from such patterns, basic pattern data and the like for a unit area defined without overlapping are generated in consideration of processes such as overlap removal of patterns and pattern correction. By doing so, based on the basic pattern data and its repetition information, etc.,
What is necessary is just to perform the conversion processing to the drawing data for the drawing apparatus such as the overlap removal and the pattern correction for preventing the double exposure. Therefore, it is not necessary to sequentially convert all figures included in the design pattern data into drawing data. As a result, the processing time for creating the drawing data can be reduced, and the amount of the drawing data can be reduced by compressing the drawing data corresponding to the basic pattern by repeated expression.

[0016]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS First, the positioning of the method of the present invention in the process of developing and manufacturing a semiconductor integrated circuit device will be described with reference to FIG.

In the development of a semiconductor integrated circuit device, a logic design, a circuit design, and the like are performed after the specification is determined, and a layout design is performed based on the design. Thereby, required design pattern data of the semiconductor integrated circuit device is obtained. When manufacturing a semiconductor integrated circuit device based on this, the same data is given to the electron beam drawing data conversion system 1 and converted into drawing data. Then, a pattern is drawn on a mask or a wafer by the electron beam drawing apparatus 2 based on the drawing data, and a predetermined manufacturing process is performed by using various mask patterns formed in this manner, thereby obtaining a desired semiconductor integrated circuit device. Is formed. The electron beam drawing data creation method according to the present invention is reflected in the electron beam drawing data conversion system 1.

For example, an example of a semiconductor integrated circuit device formed by the above method is shown in a plan view of a chip in FIG.
The semiconductor integrated circuit device shown in FIG. 1 includes a large number of repetitive patterns, such as a DRAM and a mask RO.
It is a semiconductor memory like M.

This semiconductor integrated circuit device includes four memory cell arrays 11 to 14 on the surface of a semiconductor substrate 10 such as silicon, and row address decoders 15 and 16 for addressing memory cells included therein, and A column address decoder 17, column selection circuits 19 and 20 for conducting bit lines of a memory cell to be addressed to a common data line and the like, sense amplifier arrays 21 to 24 for amplifying information read to the bit lines, internal timing signals Generator 25 that generates
And a buffer circuit 2 for exchanging data and address signals with the outside.
6 are provided, and the buffer circuits and the like are connected to bonding pads 27.

The design pattern data for the memory has, for example, a hierarchical structure as shown in FIG. In this hierarchical structure, a memory cell array (eg, two-dimensionally repeated at regular intervals) of memory cells is used as a unit of a data cell 30 for a memory cell including data defining a repeating pattern. An array data section (repeated data section) 31 for the repetitive section and a non-repeated data section 32 for the non-repeated section are included. For example, the array data section 31 in the design pattern data is a target of data compression. According to the chip plan view of FIG. 2, the data cell 30 serving as a repeating unit defines a pattern of a memory cell (hereinafter, also generally referred to as a unit cell) in the case of an LSI memory. The unit 31 corresponds to the memory cell arrays 11 to 14 (hereinafter, also generally referred to as a repeating unit).

Here, the design pattern data for one mask pattern used for producing the semiconductor integrated circuit device shown in FIG. 2 is, for example, a data cell constituting the array data portion 31 as shown in FIG. 30 pattern data 30P and the arrangement coordinates of each data cell 30 on the chip (for example, the coordinates in the corresponding array data section)
30A, and the pattern data 32P of the non-repeated data section 32. In FIG. 4, data 30P includes the arrangement coordinates of each array data section 31 on the chip, and data 32P includes the arrangement coordinates of the non-repeated data section 32 on the chip.

An electron beam lithography data conversion system 1 for inputting the above design pattern data and creating electron beam lithography data for the electron beam lithography apparatus 2 includes, for example, as shown in FIG. , And generates repetition information to be used as a partial relation for defining a repetition pattern included therein, and generates repetition information for setting a repetitive graphic frame.
A repetitive graphic frame setting unit 40, a representative processing target pattern data generating unit for generating growth pattern data to be subjected to processing such as overlap removal and dimensional correction based on the output of the repetitive information generation / repetitive graphic frame setting unit 40 41, a graphic processing / basic pattern generation unit 42 which receives an output of the generation unit 41, performs overlap removal between adjacent graphics, corrects dimensions of a predetermined graphic, corrects a proximity effect, and generates a basic pattern.
An electron beam drawing data generation unit 43 that performs processing such as decomposition into a basic figure for drawing on the processing result of the figure processing / basic pattern generation 42. The data obtained from the data generating unit 43 is drawing data, which is given to the drawing control unit 44 of the electron beam drawing apparatus 2, and the exposure unit 45 draws a pattern on a mask or a wafer according to the control.

Next, an example of the creation of drawing data by the system 1 will be described with reference to the processing in the respective function realizing means shown in FIG. 5, that is, generation of repeated information / setting of a repeated figure frame, generation of representative processing target pattern data, figure processing / basic processing. The description will be given in order according to the pattern generation and the electron beam drawing data generation.

In the design pattern data input to the system 1, the repeating pattern included in the unit cell defined by each data cell 30 constituting the array data 31 is the repeating pattern included in the adjacent unit cell or the adjacent non-repeating pattern. The figure partially overlaps with the figure included in the section, and both are connected to each other. For example, in FIG. 6, which shows a pattern defined by the design pattern data for the polysilicon gate included in the memory cell array, a partially overlapping region surrounded by a dashed line is the memory cell 130 (data in the design pattern data). (Corresponding to cell 30), and the repeating pattern in each memory cell 130 includes a plurality of rectangular figures. In the adjacent memory cell 130, a part of a rectangular figure serving as a connection portion between repetition patterns overlaps. Overlap of this shape is to be performed, such as magnification changing unit cells to be reliably maintain the connection of the repeating pattern with each other are included in the adjacent unit cell.
In the present invention, “at least a unit cell is used.
One repeating pattern between adjacent repeating patterns
"Repeated data part specified by providing overlap"
For example, the overlap between adjacent “memory cells 130” in FIG.
Is intended.

Generation of repetitive information / setting of repetitive graphic frame

When design pattern data including information for specifying a unit cell is provided, it is determined whether there are two or more data cells defining the same pattern in the design pattern data, and if so, those patterns ( It generates repetition information indicating the arrangement of the repetition pattern). For example, referring to an information format as shown in FIG. 4, repeated information is generated from the unit cell pattern data 30P and the unit cell arrangement coordinates 30A.

Referring to FIG. 8, an example of a processing procedure for generating repeated information will be described. A given design pattern data is searched to select a plurality of data cells defining the same pattern (8-1). Next, arrangement coordinates are obtained for each pattern defined by the selected data cell (8-2). Next, the selected data cells are sorted by the X coordinate and the Y coordinate for each pattern, and the coordinate interval of an adjacent area (called a unit area) including the same pattern is obtained (8-3). It is determined whether the obtained interval is constant (8-4). If the interval is constant, the same pattern is continuously repeated, so the start coordinates, the number of repetitions, and the repetition interval of the unit area including the pattern to be repeated are set in steps. Using the information obtained in 8-2 and 8-3, it is obtained (8-5), and the continuous repetition pattern data is compressed (8-6). In step 8-4, if the interval is not constant, it is determined whether the area of the unit region including the same pattern is larger than a predetermined value (arbitrarily determined) (8-7). The compression of the continuously repeated pattern data is performed (8-8). In step 8-7, data compression is not performed if the data size becomes larger.

Therefore, the repetition information does not overlap regions including a large number of repetition patterns defined in the design pattern data, and furthermore, the repetition information substantially excludes a part of the end figure from one repetition pattern. This is information for defining (unit area) in a plurality of areas including a target portion, and may include a start coordinate of the unit area, the number of repetitions, and a repetition interval. For example, in FIG.
0 is one unit area (also referred to as a repetitive graphic frame),
This is defined by the repetition intervals Px and Py, and is determined so that a part of the figure at the end is removed so as to eliminate a partial overlap of the repetition pattern included in the memory cell (unit cell) 130. (See Step 8-5).
Therefore, a set of repeating patterns in the memory array is composed of unit areas (repeating graphic frames) 5 as shown in FIG.
It can be thought of as a set of zeros. The continuity of the adjacent unit area (repeated graphic frame) 50, that is, the connection state is maintained.
Moreover, there is no overlap. Such a unit area (repeated graphic frame) 50 has, for example, a repetition period (hereinafter simply referred to as a pitch) in each of two orthogonal directions (referred to as X direction and Y direction) of the same graphic (rectangle) between the repeated patterns. Is determined based on For example, in FIG. 6, the X direction length Px of the unit area (repeated graphic frame) 50 is the same as the X direction pitch of the same graphic in the repeated pattern included in the adjacent memory cell (unit cell). The length Py in the Y direction of 50) can be the same as the Y direction pitch of the same figure between adjacent patterns.

Generation of representative processing target pattern data

Based on the repetition information for defining the repetitive graphic frame 50, magnification change, mirror reversal, rotation, overlap removal, and / or reversal of key points of design pattern data to be performed in many cases later. A specific repeating graphic frame (unit area) according to the connection state between adjacent repeating patterns so that connections between patterns included in adjacent unit areas are maintained without overlapping even if pattern correction or the like is performed.
By expanding the pattern data (for example, on a work memory of a computer) including a unit area adjacent to 50, for example, a unit area (repeated graphic frame) of m columns and n rows surrounding and surrounding the unit pattern, the representative processing target pattern is obtained. Generate data (m, n; positive integer). The pattern included in the unit area (repeated graphic frame) 50 obtained in this manner can represent the pattern of another unit area (repeated graphic frame) 50 in each unit cell as long as the pattern is not affected by the non-repeated part. .

Graphic processing / Basic pattern data generation

The representative pattern data of the array data section 31 and the pattern data of the non-repeated data section obtained by the pattern data generating section 41 are subjected to graphic overlap removal and dimensional correction.

Proximity effect correction (correction for preventing the drawing accuracy from deteriorating due to scattering of electron beams at the time of drawing) is performed on the data subjected to the graphic processing in this manner, and the processed repetitive pattern data and the processed Give a non-repeated data part. The graphic processing and the proximity effect correction are known techniques (for example, Proc. IEDM, pp 558, respectively).
-561, Dec. 1983, Proc. 18thDA
Conf, June 1981, pp 563-570). Among the obtained processed pattern data, the pattern data for the above-described specific unit area, that is, the central unit area, in the representative processing target pattern data is extracted, and is used as basic pattern data. The extracted pattern data for the central unit area corresponds to a portion of the processed repetitive pattern data that exists in the graphic repetition frame.

Therefore, in the data shown in FIG. 9, the data corresponding to the repetition pattern defined by a large number of repetitive graphic frames 50 included in the center portion of the array data portion 31 is represented by the repetition information REPDATA and the basic pattern data 51. Compressed.

As shown in FIG. 10, the outer peripheral portion of the array portion (repeated portion) 131 is expected to be individualized depending on the connection condition with the pattern included in the non-repeated portion 132, so that the basic pattern data 51 Cannot define the pattern. The range of the outer peripheral portion is determined by the pattern of the non-repeating portion 132,
It is determined according to the degree of biting into the inside of the array unit 131 for connection. In the data shown in FIG. 9, a non-repeated part 132 defined by a non-repeated data part 32
Is shown as an example where the pattern does not penetrate beyond one or more repetitive graphic frames (unit areas) 50 only on the outermost periphery of the array section 131 defined by the array data section 31. In this case, since the pattern in the outermost repeated graphic frame affects the pattern of the adjacent repeated graphic frame on the inner side, the state of the pattern at the boundary between the adjacent two and the area of the unit cell are taken into consideration. Then, the pattern data in the outermost repetitive graphic frame is determined (see step 8-7 in FIG. 8).

Therefore, as shown in FIG. 9, the pattern data defining the array portion 131 may be handled as a part of the pattern data 53 (the data of the non-repeated portion 132) in the outermost repeated figure frame. ), Basic pattern data 51, and repetition information REPDATA. Thus, data compression is performed on the input design pattern data before creating the drawing data.

Generation of electron beam drawing data

The pattern data obtained by the graphic processing / basic pattern generator 42 is output as electron beam drawing data via a data format change including a basic figure (trapezoidal pattern) which is a drawing unit of the electron beam drawing apparatus 2. Is done. The drawing data output in this manner is created based on the pattern data that has been compressed before the drawing data is generated, and the drawing data itself is also subjected to data compression with respect to the repeated pattern portion. That is, the writing data corresponding to the repetitive pattern is stored in the memory in the electron beam writing apparatus, and when writing the pattern, the writing data is read from the memory and used for the writing process.

Next, another example of data compression processing (repetition information generation and basic pattern generation) for the array section (repetition section) will be described with reference to FIGS.

In the example of FIGS. 11 and 12, the repetitive graphic frame 2
The size 50 is set in the X and Y directions with the sizes Px and Py corresponding to the horizontal and vertical repetition intervals of the unit cell, respectively, with the origin of the coordinate system defining the arrangement of the unit cells 230 at the lower left in the drawing. In this case, the repeating pattern included in unit cell 230 is P from the repetitive graphic frame 250 in the X and Y directions.
It may exist in a region apart from x and / or Py, and it is necessary to consider the connection relationship between one unit cell and unit cells around it.

FIG. 12 is a view focusing on the X direction. A rectangle indicates an area where a unit cell pattern exists, and a section between two vertical lines FR11 to FR12 indicates the length of the repeating frame in the X direction. Representatively represented. The repetition frame includes a part of the repetition pattern of the peripheral unit cells in addition to the corresponding unit cell pattern. For example, in FIG. 12, if attention is paid to a repetition frame corresponding to a hatched unit cell pattern, the repetition frame includes a part of the repetition pattern of the unit cells for two columns on each of the left and right sides. Therefore, in order to obtain a basic pattern, data for unit cells in five columns (because the same is true for the Y direction, data for unit cells in 5 rows × 5 columns, to be correct) is developed. Processing pattern data. After performing the graphic processing on the representative processing pattern data, the data of the central unit cell is repeatedly cut out in a graphic frame. The extracted data is the basic pattern data 251.

As can be seen from FIG. 12, regarding the outer peripheral portion of the array portion, the number of overlaps (overlapping state) of the unit cells of the outer peripheral two rows with those of the peripheral cells differs from that of the central portion of the array portion. Not subject to compression. The outer two rows include a part of the unit cell pattern for the outer four rows. Therefore, in consideration of the connection between the outer two rows of the array section and the inside of the array section, data cells for the unit cells corresponding to the four outer rows of the array section are developed and combined with figure data outside the array section. After the graphic processing of the pattern, the combined data is adopted as data to be converted into drawing data except for the inner two rows of the outer four rows. As a result, the data compressible area in the array section is a section excluding two rows on the outer periphery of the array section.

FIGS. 13 and 14 show a technique for expanding the data compressible area of the array section. That is, the unit cell 33
0 is obtained and the figure frame 35 is repeated at a distance of Px / 2 and Py / 2 in the X and Y directions from the center.
Determine 0. FIG. 14 focusing on the X direction as in FIG.
In this case, the length in the X direction is 2
In the repetitive graphic frame typically represented by the distance between the vertical lines FR21 and FR22, not only the corresponding unit cell pattern but also the pattern of the peripheral unit cells (unit cells in one row on the left and right in FIG. 14). (The same applies to the Y direction). Therefore, in order to obtain a basic pattern, data for a unit cell in three columns is developed (correctly, data for a unit cell in three rows × three columns, because the same applies to the Y direction). Processing pattern data. After performing graphic processing on this representative processing pattern data,
The data of the center unit cell is repeatedly cut out with the figure frame. The cut-out data is the basic pattern data 351.

As can be seen from FIG. 14, with respect to the outer peripheral portion of the array portion, the number of overlaps (overlapping state) of these cells with the peripheral cells is different from that of the central portion of the array portion. , Are not subject to compression. In addition, a part of the pattern of the unit cell of two rows of the outer circumference is included in the one row of the outer circumference. Therefore, in consideration of one row of the outer periphery of the array section and the connection inside the array section, data cells for unit cells corresponding to two rows of the outer periphery of the array section are developed and combined with figure data outside the array section. After the graphic processing of the pattern, the combined data is adopted as data to be converted into drawing data, except for the inner one row of the outer two rows. As a result, the data compressible region in the array portion is a portion excluding one row on the outer periphery of the array portion.

Next, another example of data compression for the outer peripheral area of the array section will be described.

In the above description, all the graphics are developed in the outer peripheral area, and the data to be converted is obtained by performing the synthesizing process with the graphics outside and inside the array section. With respect to such an area, based on design pattern data and information indicating an intrusion state of an external figure, a common pattern partially common to each unit cell is cut out.

For example, as shown in FIG. 15, the unit cell 4 located on the outer periphery of the array portion adjacent to the non-repeated portion 432
In step 30, the same pattern 60 that does not interfere with the figure randomly entering from the non-repeated portion is cut out. The information on the external invading figures required when recognizing the same pattern may be given separately from the design pattern data, or information specifying the range of the figure invading from the outside in each repetition pattern. May be stored in the pattern data in advance together with the coordinate information of the repeated pattern. The recognition of the same pattern 60 is recognized from such additional information and the repeating pattern of the unit cell, and the recognition state is given by the arrangement rule of the graphic frame defining the range of the same pattern 60. A ubiquitous basic pattern is generated for this graphic frame through necessary graphic processing in the same manner as described above. As described above, by using the ubiquitous basic pattern common to the unit cells with respect to the data of the unit cells included in the outer peripheral portion of the array unit, the data can be compressed. Note that such a method can be applied to the non-repetitive section 432 as well.

According to the above embodiment, the following effects can be obtained.

(1) A repetitive pattern such as an array portion regularly arranged in the design pattern data is recognized, and based on this recognition, a repetitive graphic frame is formed so as to eliminate a partial overlap between the repetitive patterns. In addition to the determination, the repetition information of the same figure is acquired, and in order to consider the connection state with the unit cell of the frame, the necessary unit cell patterns are arranged around the specific unit cell pattern according to the connection state. Then, after performing necessary graphic processing, basic pattern data is generated by using a pattern inside the repetitive graphic frame at the center. In addition, in consideration of the intrusion of a figure from the outside and the connection state with the unit cell inside, necessary graphic processing is performed on the outer peripheral portion of the array portion in a state where all the outer peripheral portions are expanded, and the outer peripheral portion is subjected to necessary graphic processing. To acquire the data to be converted into the drawing data in. Therefore, the data to be converted from the input design pattern data into the drawing data defining the array portion is the data at the outer peripheral portion of the array portion, the basic pattern data generated from the data contained in one repetitive graphic frame. , And data can be compressed to a state that can be specified by the repetition information REPDATA of the repetitive graphic frame.

(2) By the above operation and effect, it is possible to reduce the amount of data to be converted into drawing data, and further reduce the amount of drawing data. For example, the data amount of a 1-Mbit DRAM can be reduced to about half that of the prior art.

(3) Due to the effect (1), since the data to be converted into the drawing data is compressed, computer processing time such as data transfer and arithmetic processing required for the conversion into the drawing data is reduced. be able to. For example, 1Mbit DRAM
, The computer processing time could be reduced to less than half of the conventional one.

(4) Recognizing the same pattern that is partially ubiquitous or at an irregular interval even in the outer peripheral portion and the non-repeated portion of the array portion, and generating ubiquitous basic pattern data corresponding to the same pattern, By adding a process of compressing data to be converted into drawing data based on the basic pattern data and their repetition information, all the figures are developed and drawn on the outer peripheral portion of the array portion and the non-repetitive portion. Drawing data can be obtained even more efficiently and with a reduced data amount as compared with the case of obtaining data for data conversion.

Although the invention made by the inventor has been specifically described based on the embodiments, it is needless to say that the present invention is not limited thereto and can be variously modified without departing from the gist thereof. No.

For example, in the above embodiment, the pattern of the polysilicon gate included in the memory cell was shown as a specific example of the repetition pattern. However, the present invention is not limited to this. The present invention can be similarly applied to pattern generation of various masks required in a manufacturing process of a semiconductor integrated circuit. Also,
The data format of the design pattern data is not limited to that described in the above embodiment, and can be changed as appropriate.

In the above description, the invention made mainly by the present inventor is described in the field of application DRA,
Although the description has been given of the case where the present invention is applied to the formation of a mask pattern of a memory LSI such as M, the present invention is not limited thereto. A one-chip microcomputer including a ROM,
The present invention can be widely applied to formation of mask pattern data for a semiconductor integrated circuit such as a peripheral controller. Further, the present invention can be applied not only to a semiconductor integrated circuit but also to the creation of electron beam drawing data for a device requiring a predetermined pattern such as a wiring board.

[0056]

The effects obtained by typical ones of the inventions disclosed in the present application will be briefly described as follows.

That is, a repetition pattern is specified from design pattern data including a repetition data portion defining a repetition pattern by providing an overlap between adjacent patterns and a non-repetition data portion corresponding to a non-repetition portion of the pattern. Obtain repetition information, based on this, keep the regular continuity of the repetition pattern, find a repetitive graphic frame etc. that determines specific unit areas that do not overlap each other, and Since the basic pattern for drawing the repetitive portion is generated by performing the graphic processing, the conversion processing to the sequential drawing data for all the figures included in the design pattern data is not required. The effects of reducing computer processing time, reducing the amount of data to be converted into drawing data, and reducing the amount of drawing data can be achieved. There is.

Also, the same pattern existing partially or unevenly at the outer peripheral portion and the non-repeated portion of the repetition area is recognized, and the uneven basic pattern corresponding to the same pattern is generated. And processing for compressing the data to be converted into drawing data based on their arrangement information, so that all the graphics can be expanded to the outer peripheral portion and non-repeated portion of the repeated use area and converted to drawing data. There is an effect that the drawing data can be obtained even more efficiently than when the target data is obtained.

[Brief description of the drawings]

FIG. 1 is an example flowchart illustrating a series of processing procedures from development to manufacture of an LSI device.

FIG. 2 is a plan view of an example of a semiconductor integrated circuit device to which the present invention can be applied;

FIG. 3 is an explanatory diagram showing an example of a hierarchical structure of design pattern data.

FIG. 4 is a diagram illustrating an example of a data format of design pattern data.

FIG. 5 is an example block diagram of an electron beam drawing data conversion system according to an embodiment of the present invention.

FIG. 6 is an example plan view showing a continuous state of a repeating pattern.

FIG. 7 is a plan view of an example of a unit area defined by a repeated graphic frame in the repeated pattern corresponding to FIG. 6;

FIG. 8 is an explanatory diagram showing an example procedure for generating repeated information / setting a repeated graphic frame;

FIG. 9 is an explanatory diagram showing an example of a method of compressing data to be converted into drawing data in the method according to one embodiment of the present invention.

FIG. 10 is a diagram illustrating an example of a relationship between an outer peripheral portion of an array portion and a non-repeated portion;

FIG. 11 is an explanatory view showing another embodiment according to the present invention.

FIG. 12 is an explanatory diagram for explaining an influence of a peripheral pattern on a region within a repetition frame in the example of FIG. 11;

FIG. 13 is an explanatory view showing still another embodiment according to the present invention.

FIG. 14 is an explanatory diagram for explaining an influence of a peripheral pattern on a region within a repetition frame in the example of FIG. 13;

FIG. 15 is an explanatory diagram in the case where attention is paid to the same pattern in the outer peripheral portion of the array section in another embodiment.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Electron beam drawing data conversion system 2 Electron drawing apparatus 11 to 14 Memory cell array (repeated part) 30 Data cell 30P Data cell pattern data 30A Arrangement coordinates 130 Memory cell 31 Array data part (repeated data part) 131 Array part 32 Non Repetitive data part 132 Non-repeated part 32P Pattern data of non-repeated part 40 Repetition information generation / repeated figure frame setting part 41 Representative processing target pattern data generation part 42 Graphic processing / basic pattern generation part 43 Electron drawing data generation part 44 Drawing control Unit 45 exposure unit 50 repeated figure frame 51 basic pattern data 53 pattern data REPDATA repeat information 230 unit cell 250 repeated figure frame 251 basic pattern data 330 unit cell 350 repeated figure frame 430 unit cell 432 non-repeated Phloem

Claims (8)

(57) [Claims] 1. A method for creating drawing data for a writing apparatus from circuit design pattern data including at least data for defining a repetitive pattern, comprising: Acquiring repetition information that defines a plurality of unit areas (50) that do not overlap with each other; and maintaining the regularity of the repetition pattern based on the acquired repetition information so that the repetition patterns do not overlap with each other. Generating basic pattern data (51) defining a pattern for one unit area; and including the repetitive pattern for a unit area group of inner and outer peripheral portions of the entire area defined by the repetition information. region
The continuous regularity of the repetition pattern is maintained while taking into consideration the connection with the non-repeated portion area outside the
Peripheral pattern data (5
3) generating a region (3) including the same pattern based on the basic pattern data, the outer peripheral portion pattern data, and the repetition information.
Generating drawing data corresponding to 0), and a drawing data creation method including: 2. A method for creating drawing data for a drawing apparatus from circuit design pattern data, the method comprising recognizing the same pattern that is present repeatedly based on the design pattern data or the design pattern data and other designation information. And obtaining arrangement information for defining a unit area (50) including the same pattern; and a unit area including the same pattern based on the arrangement information.
In consideration of the connection with the surrounding pattern outside the set, the unit area in the set facing the surrounding pattern is considered.
Generating a data ubiquitous basic pattern ubiquitous in the unit, the drawing data creation method comprising, generating a drawing data corresponding to the same pattern on the basis of the data and the location information of the ubiquitous basic pattern . 3. The method of generating drawing data corresponding to the same pattern includes the same pattern and a unit including the same pattern.
3. The drawing according to claim 2, further comprising a process of removing overlapping of figures included in the ubiquitous basic pattern and correcting the pattern while maintaining a regular connection relationship with surrounding patterns outside the set of regions. Data creation method. 4. It is grasped from circuit design pattern data.
4. The drawing data creation method according to claim 3, wherein drawing data corresponding to an outer peripheral portion of the repeating portion adjacent to the non- repeating portion is generated. 5. A method of converting design pattern data for a semiconductor integrated circuit device into drawing data for drawing a pattern with a drawing device, wherein the pattern is a plurality of regularly arranged units. A repetition part (11) divided into cells and a non-repetition part adjacent to the repetition part, while the design pattern data corresponds to the repetition part of the pattern, and Data part (31) for defining at least one repetition pattern by providing an overlap between adjacent repetition patterns
And a non-repeated data portion (32) corresponding to the non-repeated portion of the pattern; generating repetition information specifying the at least one repetition pattern from the design pattern data; Generating a repetitive graphic frame described below based on information, the repetitive graphic frame defines a unit area cut out from the repetitive pattern, and this unit area does not provide overlap between adjacent unit areas. It is equivalent to a part of the repeating portion of the pattern by repeatedly arranging, and selects data of one of the unit cells and at least a unit cell adjacent to the unit cell based on the repeating information. Generating processing target repetition pattern data by expanding the data of the unit cells; Performing a graphic processing operation on the pattern data and the non-repeated pattern data part to generate a processed repetitive pattern data and a processed non-repeated data part; and processing for the one unit cell in the processed repetitive pattern data. Of the already repeated pattern data, extracting a portion existing in the figure repeating frame, forming basic pattern data therefrom, and the basic pattern data for repeatedly using for drawing a repeated portion of the pattern, Storing, in a memory, a processed non-repeated data portion used for drawing a non-repeated portion of the pattern. 6. The data conversion method according to claim 5, wherein the repetition information includes position information of the unit area, the number of repetitions of the unit area, and a repetition interval between the unit areas. 7. The design of an outer peripheral portion of a repeated portion of the pattern when the unit cell is arranged two-dimensionally and a graphic exists beyond a boundary between a repeated portion (11) of the pattern and a non-repeated portion. 6. The data conversion method according to claim 5, wherein the pattern data is transferred to a repetition portion, and the basic pattern data is not used for drawing an outer peripheral portion of the repetition portion of the pattern. 8. A device for converting design pattern data for a semiconductor integrated circuit device into drawing data for drawing a pattern with a drawing device, wherein the pattern is composed of a plurality of regularly arranged units. A repetition part (11) divided into cells and a non-repetition part adjacent to the repetition part, while the design pattern data corresponds to the repetition part of the pattern, and Data part (31) for defining at least one repetition pattern by providing an overlap between adjacent repetition patterns
And a non-repeated data portion (32) corresponding to the non-repeated portion of the pattern, wherein from the design pattern data, repetition information for specifying the at least one repetition pattern is generated, and First means for generating a repetitive graphic frame for defining a unit area cut out from the repetition pattern based on the repetition information; and one of the unit cells based on the repetition information. And at least a second unit for selecting data of a unit cell adjacent to the unit cell and generating the processing target repetitive pattern data by expanding the data of the unit cells; and being coupled to the second unit, The processing target repetitive pattern data and the non-repeated pattern data portion are subjected to graphic processing operation, A third means for generating a processed non-repeated data portion; and a graphic of the processed repetitive pattern data for the one unit cell, the graphic form being coupled to the third means. Fourth means for extracting a portion present in the repeating frame and forming basic pattern data therefrom; the basic pattern data for repeated use for drawing a repeated portion of the pattern; And a memory for storing a processed non-repeated data portion for use in rendering the portion.