JP3297577B2 - Package for storing semiconductor elements - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a package for accommodating a semiconductor device such as an LSI (Large Scale Integrated Circuit) or the like, and more particularly to the formation of an identification mark on the outer surface of the package.

[0002]

2. Description of the Related Art There are various types of semiconductor element housing packages for housing semiconductor elements, such as side blazed packages, top blazed packages, and bottom blazed packages, depending on the mounting positions of external lead terminals. FIG. 2 is a sectional view showing a general configuration of a conventional top braze package.

A conventional package 21 for housing a semiconductor element shown in a sectional view in FIG. 2 is made of, for example, aluminum oxide sintered body, mullite sintered body, aluminum nitride sintered body, silicon carbide sintered body or the like. Made of material, semiconductor element on top
A mounting portion 22a for mounting and housing 26 and a plurality of metallized wiring layers 23, which are made of a sintered body of a refractory metal powder such as tungsten or molybdenum / manganese derived from the periphery of the mounting portion 22a to the outer periphery. Insulating substrate having 23
22 and external lead terminals 24 attached to the metallized wiring layers 23 via a brazing material such as silver brazing or gold-silicon brazing to electrically connect the semiconductor element 26 to an external electric circuit.
24, and a lid 25. The semiconductor element 26 is mounted and fixed on the mounting portion 22a of the insulating base 22 via an adhesive 27 made of a brazing material such as gold-silicon brazing. The electrodes 26 are electrically connected to the metallized wiring layers 23 via bonding wires 28, and then the lid 25 is placed on the upper surface of the insulating base 22 with a sealing material 29 such as brazing material, glass, resin, or the like. The semiconductor element 26 is hermetically sealed inside a container formed of the insulating base 22 and the lid 25 via a joint 29 or by welding. Thereby, a semiconductor device as a product is obtained.

On the lower surface of the insulating base 22, an identification mark 30 indicating the product number or manufacturer name of the semiconductor device or the direction of the semiconductor device is formed. Thus, it is possible to confirm the product number and the manufacturer name of the semiconductor device, or the directionality of the semiconductor device. Such an identification mark 30 is generally formed of a metallized layer made of a high melting point metal such as tungsten or molybdenum or an insulating layer having a color tone different from that of the insulating base 22, and usually has a thickness of about 20 to 50 μm. .

[0005] Such a package 21 for housing a semiconductor element.
The method for bonding and fixing the semiconductor element 26 to the mounting portion 22a of the insulating base 22 is as follows: the insulating base 22 is heated to a temperature at which the adhesive 27 is melted or higher, and the mounting portion 22 of the heated insulating base 22 is heated.
a, the semiconductor element 26 is placed via the adhesive 27, and the semiconductor element 26 is scribed a plurality of times.
A method is employed in which the adhesive 27 is wet and spread between a and the lower surface of the semiconductor element 26, and then the adhesive 27 is cooled and solidified.

A heater block is used to heat the insulating base 22, and the insulating base 22 is mounted on a flat mounting surface provided on the upper surface of the heater block such that the lower surface thereof is in close contact with the heater base. Heating to temperature has been performed.

[0007]

However, in the conventional package 21 for accommodating a semiconductor element, since the thickness of the identification mark 30 formed on the lower surface of the insulating base 22 is about 20 to 50 μm, the flatness of the heater block is reduced. Insulation base 22 on mounting surface
When the lower surface of the insulating substrate 22 is placed,
Mark 30 between the lower surface of the heater and the mounting surface of the heater block.
A gap was formed due to the thickness of the substrate. Therefore, the transfer of heat from the heater block to the insulating base 22 is hindered, and there is a problem that it takes a long time to heat the insulating base 22 to a predetermined temperature.

Further, the contact between the lower surface of the insulating base 22 and the mounting surface of the heater block is deviated, and the contact area between the two becomes extremely small, and the insulating base 22 is locally heated and steeply enters inside. Since a large temperature gradient is formed, there is also a problem that a large thermal stress is generated and a crack or a crack is generated in the insulating base 22.

On the other hand, a concave portion is formed on the lower surface of the insulating substrate, and the concave portion is used as an identification mark, so that the lower surface of the insulating substrate and the mounting surface of the heater block are almost uniformly contacted. A package for housing a semiconductor element has been proposed. However, according to this, although the contact state for heating the insulating base is improved, the color tone of the identification mark and the insulating base becomes the same, so that it is difficult to visually recognize the identification mark by a camera or the like. There was a point.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problems of the prior art, and it is an object of the present invention to make it easy to visually recognize an identification mark by a camera and to recognize the lower surface of an insulating substrate and a heater block. An object of the present invention is to provide a package for housing a semiconductor element, which can uniformly contact the mounting surface of the semiconductor element and can perform heating for bonding and fixing the semiconductor element in a short time and uniformly.

[0011]

According to the present invention, there is provided an insulating base having a mounting portion on which a semiconductor element is mounted on an upper surface and an identification mark attached on a lower surface; A semiconductor element housing package having a space for housing a semiconductor element, wherein at least a region of the lower surface of the insulating base facing the mounting portion has a height equal to or higher than the height of the identification mark. A flat adherent layer having a thickness is formed so as to expose the identification mark.

[0012]

According to the semiconductor device housing package of the present invention, the height of the identification mark is equal to or higher than the height of the identification mark in the region of the lower surface of the insulating base opposite to the mounting portion on which the semiconductor device is mounted. Since the flat adherent layer having a height is formed so that the identification mark is exposed, when the insulating base is placed on the heater block when the semiconductor element is adhered and fixed to the mounting portion, the insulating base is formed. A flat adhered layer formed at least in a region opposed to the mounting portion on the lower surface and the mounting surface of the heater block are uniformly contacted without being affected by the identification mark, so that the heat of the heater block is good and It can be transmitted uniformly to the insulating substrate. Therefore, the temperature of the mounting portion of the insulating base becomes a predetermined temperature in a short time, and the semiconductor element can be efficiently bonded and fixed.

When the adhered layer is formed so as to cover almost the entire lower surface of the insulating base, the insulating base comes into contact with the mounting surface of the heater block due to the flat large area of the adhered layer. In addition, since the contact between the insulating base and the heater block is not biased as in the case where only the conventional identification mark is formed, it is possible to prevent the insulating base from being locally heated. Therefore, a steep temperature gradient is not formed in the insulating substrate, and it is possible to prevent a large thermal stress from being generated and the insulating substrate from being cracked or cracked.

Further, since the identification layer is formed so that the identification mark is exposed, even if the adhesion layer is formed over substantially the entire lower surface of the insulating base, the identification mark can be visually or camera-mounted. It can be easily recognized.

Next, the present invention will be described in detail with reference to the accompanying drawings.

FIG. 1 is a sectional view showing an embodiment of a package for housing a semiconductor element according to the present invention.

In the semiconductor device housing package 1 shown in FIG. 1, reference numeral 2 denotes an insulating base, and a concave shape for mounting and housing the semiconductor device 6 on the upper surface thereof by bonding and fixing the semiconductor device 6 with an adhesive 7 made of brazing material. It has a mounting portion 2a. Note that glass, resin, or the like may be used for the adhesive 7 as necessary.
Reference numeral 5 denotes a lid, which is joined to the upper surface of the insulating base 2 via a sealing material 9 such as a brazing material, glass, resin, or by welding, so that the lid 5 and the insulating base 2 are connected to each other. This forms a space for housing the semiconductor element 6 in an airtight manner.

The insulating substrate 2 is made of an electrically insulating material such as an aluminum oxide sintered body, a mullite sintered body, an aluminum nitride sintered body, and a silicon carbide sintered body, and is formed by a conventionally known ceramic green sheet laminating method. Have been made.
For example, in the case of an aluminum oxide sintered body,
By adding a suitable organic binder, solvent, etc. to the raw material powders such as aluminum oxide, silicon oxide, magnesium oxide, calcium oxide, etc. to make a slurry, and using the doctor blade method or calendar roll method A ceramic green sheet (ceramic green sheet) is formed. Thereafter, the ceramic green sheet is subjected to an appropriate punching process, and a plurality of the green sheets are laminated and fired at a temperature of about 1600 ° C.

A plurality of metallized wiring layers 3.3 are formed from the periphery of the mounting portion 2a of the insulating base 2 to the outer peripheral edge, and a semiconductor element is provided around the mounting portion 2a of the metallized wiring layers 3.3. 6 are bonding wires 8.8
The external lead terminals 4.4 connected to an external electric circuit are electrically connected to the outer peripheral edge of the upper surface of the insulating base 2 by a brazing material such as silver brazing or gold-silicon brazing. Is attached via brazing.

The metallized wiring layers 3, 3 function as conductive paths for connecting each electrode of the semiconductor element 6 to an external electric circuit, and are formed of a sintered body of a high melting point metal powder such as tungsten, molybdenum, manganese or the like. I have.

The metallized wiring layers 3 and 3 are formed by adding a metal paste obtained by adding a suitable organic binder and a solvent to a high melting point metal powder such as tungsten, molybdenum and manganese to a ceramic green sheet serving as an insulating substrate 2. A predetermined pattern is printed and applied in advance by a conventionally well-known screen printing method, and these are connected by via holes, so that the insulating base 2 is formed from the periphery of the mounting portion 2a to the outer peripheral edge.

On the exposed surfaces of the metallized wiring layers 3, 3, a metal such as nickel or gold having excellent corrosion resistance and excellent wettability with a brazing material is applied by plating to a thickness of 1.0 to 20 μm. In this case, the oxidation corrosion of the metallized wiring layers 3.3 can be effectively prevented, and the brazing of the external lead terminals 4, 4 to the metallized wiring layers 3.3 is preferable.

Further, external lead terminals 4.4 are soldered and attached to the metallized wiring layers 3.3 via a brazing material such as silver brazing or gold-silicon brazing.
4 is a semiconductor element 6 housed in a space inside the package 1
Is electrically connected to an external electric circuit. By connecting the external lead terminals 4 to the external electric circuit, the semiconductor element 6 can be connected to the metallized wiring layers 3.3.
In addition, it is connected to an external electric circuit via the external lead terminals 4.

The external lead terminals 4 are made of a metal material such as an iron-nickel-cobalt alloy or an iron-nickel alloy.
For example, it is formed into a predetermined shape by employing a conventionally known metal working method such as a rolling method or a punching method on an ingot made of a metal such as an iron-nickel-cobalt alloy.

On the lower surface of the insulating base 2, a metallized layer made of a refractory metal such as tungsten or molybdenum, or an insulating layer having a different color tone from the insulating base 2 provides a semiconductor device number, manufacturer name, or directionality of the semiconductor device. Is formed on the insulating substrate 2. Since the identifying mark 10 has a color tone different from the color tone of the insulating substrate 2, it can be easily recognized visually or by a camera or the like. The product number, manufacturer name, or direction of the semiconductor device can be easily confirmed.

The identification mark 10 is formed on a lower surface of the insulating base 2 by printing and firing a high melting point metal paste such as tungsten on a ceramic green sheet serving as the insulating base 2 in a predetermined pattern. It is deposited to a thickness of about 20 to 50 μm from its lower surface.

A package 1 for accommodating a semiconductor element according to the present invention.
In a region of the lower surface of the insulating base 2 facing at least the mounting portion 2a, a flat covering layer 11 having a height equal to or higher than the height of the identification mark 10 exposes the identification mark 10. The deposition layer 11 is characterized in that it is formed over substantially the entire lower surface of the insulating base 2 as shown in FIG. Further, in order to increase the efficiency of heat conduction to the mounting portion 2a, the heat conductive layer may be formed only in the region facing the mounting portion 2a and in the vicinity thereof. This deposition layer 11
It is important that the height from the lower surface to the surface of the insulating base 2 is equal to or higher than the height of the identification mark 10 and that the surface is formed substantially flat. The operation and effect of the present invention are achieved. Deposition layer
The thickness of 11 can be about 20 to 100 μm,
This is preferable in that the effect of the height of the insulating substrate 2 can be eliminated and heat conduction to the insulating base 2 can be efficiently performed.

The covering layer 11 may be formed of, for example, an insulating layer made of substantially the same material as that of the insulating base 2, glass, resin, or the like. When the adhered layer is formed of substantially the same material as that of the insulating substrate 2, cracking or peeling due to a difference in thermal expansion coefficient between the insulating substrate 2 and the insulating substrate 2 does not occur. Preferably, layer 11 is formed of substantially the same material as insulating substrate 2.

In order to form the deposition layer 11, for example, a suitable organic binder
An insulating paste obtained by adding and mixing a solvent or the like is printed and applied to a lower surface of the insulating substrate 2 or a ceramic green sheet to be a lower surface of the insulating substrate 2 and is baked to be adhered. At this time, when the covering layer 11 is also formed in the vicinity of the identification mark 10, it is formed so as to expose the identification mark using an appropriate printing screen or the like. The order of forming the adhered layer 11 and the identification mark 10 may be either first according to the manufacturing process of the package 1.

If the adhered layer 11 is formed at least in a region on the lower surface of the insulating substrate 2 opposite to the mounting portion 2a, the function and effect unique to the present invention can be obtained. If the insulating substrate 2 is formed on almost the entire surface except for 10, the contact area between the insulating substrate 2 and the mounting surface of the heater block can be made sufficiently large to bring the insulating substrate 2 to a predetermined temperature in a very short time. Therefore, it is preferable that the covering layer 11 is formed on almost the entire lower surface of the insulating base 2.

Thus, according to the above-described semiconductor device housing package 1, the semiconductor device 6 is mounted and fixed on the bottom surface of the mounting portion 2a of the insulating base 2 via the adhesive 7, and the respective electrodes of the semiconductor device 6 are pumped. The lid 5 is connected to the predetermined metallized wiring layers 3 via the wirings 8, 8, and then the lid 5 is joined to the upper surface of the insulating base 2 via the sealing material 9 or by welding. The semiconductor element 6 is hermetically accommodated in a space formed by the lid 5 and the semiconductor element 6 to be a semiconductor element as a product.

It should be noted that the present invention is not limited to the above-described embodiment, and that various changes and improvements can be made without departing from the spirit of the present invention.

[0033]

According to the package for housing a semiconductor element of the present invention, at least a region of the lower surface of the insulating base opposed to the mounting portion on which the semiconductor element is mounted is provided with an identification mark attached to the lower surface thereof. A flat deposition layer having a height equal to or higher than the height is formed so that the identification mark is exposed. Therefore, when the semiconductor element is adhered and fixed to the mounting portion, the lower surface of the insulating base and the heater are removed. The mounting surface of the block can be uniformly contacted, and the insulating base can be heated well and uniformly. Therefore, the temperature of the mounting portion of the insulating base becomes a predetermined temperature in a short time, and the semiconductor element can be efficiently bonded and fixed.

In particular, when the adhered layer is formed so as to cover almost the entire lower surface of the insulating base, there is no bias in the contact between the insulating base and the heater block, so that the insulating base is locally heated. Accordingly, it is possible to prevent a large thermal stress from being generated due to the formation of a steep temperature gradient in the insulating base, thereby preventing the insulating base from being cracked or cracked.

Further, since the adhered layer is formed so that the identification mark is exposed, even if the adhered layer is formed over substantially the entire lower surface of the insulating base, the identification mark is visually or camera-mounted. It can be easily recognized.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view showing one embodiment of a semiconductor element storage package according to the present invention.

FIG. 2 is a cross-sectional view illustrating a conventional semiconductor element storage package.

[Explanation of symbols]

 1 ····· Package for housing semiconductor element 2 ····· Insulating base 2a ······································ Metallized wiring layer 4 ························ · Lid 6 · · · · · Semiconductor element 10 · · · · Identification mark 11 · · · · Deposited layer

Claims (1)

(57) [Claims] 1. An insulating base having a mounting portion on which a semiconductor element is mounted on an upper surface, and an identification mark attached on a lower surface, and a lid, for accommodating the semiconductor element therein. In a semiconductor element storage package having a void, a flat adherend layer having a height equal to or higher than the height of the identification mark is provided on at least a region of the lower surface of the insulating base facing the mounting portion. And a semiconductor element housing package formed so as to expose the identification mark.