JP3270220B2 - Display device and integrated circuit for driving the same - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a display device and an integrated circuit of a display device having a plurality of output terminals, and has a great effect particularly in a liquid crystal display device and an integrated circuit for driving the liquid crystal display device. The following description is directed to a case where the present invention is applied to a simple matrix type liquid crystal display device.

[0002]

2. Description of the Related Art FIG. 2 is a conceptual diagram of a general simple matrix type liquid crystal display device. In FIG. 2, a plurality of row electrodes X1, X2... Xm are connected to a row electrode driving circuit 203, and a plurality of column electrodes Y1, Y2. The control circuit 201 and the drive power supply circuit 2
The original display signal 205 is supplied to the control circuit 201. Pixels Pmn are formed at the intersections of the row electrodes Xm and the column electrodes Yn arranged in a matrix. Independent signals are applied to each row electrode and each column electrode so that each pixel can take an arbitrary lighting state. Each of the row electrode driving circuit 203 and the column electrode driving circuit 202 may be constituted by one or more integrated circuits, or both may be included in one integrated circuit. In the following description, each of the plurality of row electrodes is connected to a different output terminal of the row electrode driving integrated circuit, and each of the plurality of column electrodes is a column electrode separate from the row electrode driving integrated circuit. Assume that they are connected to different output terminals of the driving integrated circuit.

It is known that the optical response of a liquid crystal depends on the effective value of a voltage applied between electrodes sandwiching the liquid crystal.
On the other hand, since the liquid crystal is electrically capacitive, a current corresponding to a change in applied voltage flows. If there is a resistance component in this current path, a voltage drop due to the current flowing through the resistance occurs,
The drive voltage applied to the liquid crystal is distorted. The distortion of the driving voltage changes the effective voltage applied to the liquid crystal, resulting in various deteriorations in display quality. Therefore, care is taken to reduce the parasitic resistance component parasitic on the current path as much as possible and to make the value of the parasitic resistance component uniform. In view of the above, the row electrode driving integrated circuit or the column electrode driving integrated circuit (hereinafter collectively referred to as a driving integrated circuit) is also designed such that its output characteristics are uniform at many output terminals.
Being manufactured.

In general, the row electrode groups and column electrode groups on a display panel are arranged in parallel at a constant pitch, respectively, at least in a display portion of a liquid crystal display panel. On the other hand, the output terminals of the driving integrated circuits are not always arranged in a line at the same pitch, and the arrangement density is usually different from the arrangement density of the electrodes in the display portion on the liquid crystal display panel. Therefore, a wiring portion (hereinafter referred to as a wiring development portion) for developing and connecting the array of the output terminals of the drive integrated circuit to the array of the electrodes on the display panel is required.

FIG. 3 is a configuration diagram showing a specific configuration example of the wiring developing section. FIG. 3A is a configuration diagram showing an example in which the wiring developing section is performed on an external member such as a printed board, which is different from the liquid crystal display panel. In FIG. 3A, drive integrated circuits 301 and 302 are external members 3 such as a printed circuit board.
The terminal is connected to the wiring 304 on the external member 303. The wiring 304 is connected to the external member 303.
Developed to the electrode pitch of the liquid crystal display panel 305 above,
The liquid crystal display panel 30 is connected via a connection member 306 such as a PC.
5 electrodes. The wiring 304 is a wiring developing unit 3
At 07, the output is expanded to the pixel electrode pitch of the display portion 308 on the liquid crystal display panel 305 from the arrangement of the output terminals of the drive integrated circuits 301 and 302. In this case, the wiring developing section 307 is on the external member 303. FIG. 3 (a)
In addition to the example shown in FIG. 7, the wiring developing section 307 may be provided on the connection member 306 such as the FPC, or in a system called tab connection, the drive integrated circuits 301 and 302 are provided directly on the connection member 306. Therefore, the wiring developing unit 307
Are also provided on the connection member 306.

FIG. 3B shows an example in which the wiring developing section 307 is provided on a portion of the liquid crystal display panel 305 other than the display portion (hereinafter referred to as a non-display portion). In FIG. 3B,
The drive integrated circuits 301 and 302 are provided on a portion outside the display on the liquid crystal display panel 305 by chip-on-glass (hereinafter referred to as COG).
The terminals are connected to the wiring 304 in the wiring developing unit 307 outside the display. The wiring 304 is developed at the pixel electrode pitch of the display portion 308 of the liquid crystal display panel 305. Drive integrated circuit 3
01 and 302 are supplied with various power supplies and signals from outside the liquid crystal display panel 305 via external terminals 309 and connection members (not shown).

In the wiring developing section 307, each wiring 304 is provided so as to be as thick and short as possible so as to reduce the absolute value of the parasitic resistance.
However, as is apparent from FIG. 3, the length of each wiring 304 is not constant. That is, in the case of FIG. 3, the wiring near the center of each drive integrated circuit is relatively short, and the wiring near the end is relatively long.

FIG. 4A is a partially enlarged view of the conventional wiring developing section 307 when the conventional COG technique is used as shown in FIG. 3B. The output terminal of the integrated circuit 301 is connected to the wiring 3 at the connection 401 of the corresponding wiring 304.
04. When a conductive paste or the like is used for this connection, a part of the wiring 304 may be thinned as shown in FIG. 4A in order to prevent the paste from flowing out. The wiring near the center 301b and the wiring near the end 301a of the circuit 301 are provided so as to be as thick and short as possible so that the absolute value of the parasitic resistance is as small as possible. In this case, if the resistance value of the wiring material of the wiring 304 is sufficiently small, even if a difference occurs in the parasitic resistance due to the difference in the length of each wiring, the waveform distortion does not affect the display. No problem. However, for example, when the wiring 304 in FIG. 3 is provided with a material having a relatively high resistance such as indium tin oxide (hereinafter referred to as ITO), the parasitic resistance of each wiring cannot be ignored, and the length of each wiring In this case, the parasitic resistance differs depending on the pixel electrode, and the signal distortion differs for each pixel electrode.
As a result, the value of the effective voltage applied to the pixels that should originally have the same display differs depending on the distortion, and therefore, there is a problem that the same display state is not obtained.

FIGS. 4 (b) and 4 (c) show the configuration using two driving integrated circuits, and the output from the driving integrated circuit when the conventional wiring method as shown in FIG. 4 (a) is performed. FIG. 4 is a schematic diagram illustrating a parasitic resistance R of a wiring member up to a display portion of a liquid crystal display panel, corresponding to a position of a pixel electrode. FIG.
(B) shows a case where the output terminal of the drive integrated circuit is relatively simply arranged, and the parasitic resistance changes relatively simply with respect to the pixel electrode position. In this case, the parasitic resistance of the pixel electrode connected to the central portion of each driving integrated circuit is low, and the parasitic resistance increases as the pixel electrode is connected to a portion farther from the central portion of the driving integrated circuit. As a result, band-like unevenness is observed at both ends and the center of the liquid crystal display panel.

FIG. 4C shows an example in which the arrangement of the output terminals of the integrated circuit is not simple, the output terminals are arranged in units of a plurality of blocks, and the wiring is performed in different routes in units of blocks. In this case, the parasitic resistance does not always increase as the electrode is farther from the integrated circuit. In the portion where the resistance changes on the stairs as in this example, very clear and band-like unevenness is observed.

Conventionally, in order to avoid such inconvenience,
Measures have been taken such as covering the ITO with a metallic material to reduce the absolute value of the parasitic resistance. However, a method of adding a special process in manufacturing a liquid crystal panel, such as covering a metal on ITO, is not only extremely costly, but also requires COG.
When the technique is used, there is a problem that the connection between the metal part and the terminal of the integrated circuit is deteriorated. In contrast,
Japanese Patent Application Laid-Open No. 03-289626 discloses that the length of a wiring route
When the length is L and the width is D, L / D
To a constant value k (where 5 <k <100
0) The invention that makes the resistance value of each routing part uniform by
It is listed. Furthermore, Japanese Patent Application Laid-Open No. 05-72563
Also, the wiring resistance from the voltage application section to the display section is the same.
The invention that sets the width and length of the transparent conductive film is described.
I have.

[0012]

Problems to be Solved by the Invention
No. 9626 and JP-A-05-72563.
In each of the described inventions, the resistance value of the wiring path is set to a constant value
And if it is feasible, it will certainly work
Is big. However, display devices with fine wiring paths (
Display device using the COG method).
In some cases, it is extremely difficult to make the resistance of the wire path the same.
You. In such a case, the present invention solves the difference in wiring resistance.
The purpose of the present invention is to effectively eliminate display unevenness caused by the above.

[0013]

A first means used by the present invention to solve the problem is to adjust the parasitic resistance of each wiring 304 by changing the width or length of the wiring, and to change the wiring resistance.
Elimination of parts where rapid change occurs, smooth resistance change
It is to make it. A second means used by the present invention to solve the problem is that the inside of the driving integrated circuit is
That is, a compensation element for compensating for a difference in external wiring resistance is provided at the output terminal.

[0014]

According to the first aspect of the present invention, originally the wiring length is long wirings such increasing the wiring width, originally wiring length is short wire lengthening the small wiring width or line length
Due to the operation, the wiring resistance value changes suddenly with respect to the pixel position
To provide a smooth overall resistance change to avoid
Wiring, the signal waveform generated at each pixel electrode
The distortion also changes smoothly, and the phenomenon that unevenness is observed on the display screen is greatly reduced. According to the second means of the present invention, by providing a difference between the compensation element at the output end of the drive integrated circuit corresponding to the long wiring and the compensation element at the output end of the drive integrated circuit corresponding to the short wiring, The generated distortion amount of the liquid crystal drive voltage waveform can be made uniform.

[0015]

FIG. 5 (a) is a schematic view of a wiring developing section showing an embodiment of the present invention, and corresponds to FIG. 4 (a) showing a conventional example. In FIG. 5A, the wiring near the end portion 301a of the drive integrated circuit 301 having a long wiring length has a large wiring width, and the wiring near the central portion 301b having a short wiring length has at least a part of the wiring width. Or a bypass is provided to increase the wiring length, and wiring is performed so that the parasitic resistance does not suddenly change with respect to the pixel position.

FIGS. 5B and 5C respectively show FIGS.
Conventional wiring resistance distribution shown in (b) and (c) (broken line)
Shows an example of the result (solid line) improved by the method shown in FIG. 5 (b) and 5 (c), the overall resistance difference is small, and there is no portion where the resistance changes abruptly with respect to the pixel position. Therefore, no unevenness is observed on the display screen.

In the first embodiment, the wiring developing section 307 is used.
The present invention can be applied not only to the inside but also to the wiring portion having the same pitch as the pixel electrode pitch of the display portion.

Although the method shown in FIG. 5A is effective,
There may be cases where sufficient implementation is not possible. That is, as the wiring density increases, it becomes difficult to increase the width of the wiring to a necessary level. On the other hand, it is difficult to reduce the width of the wiring without limitation. Further, depending on the arrangement of the output terminals of the drive integrated circuit, it may not be possible to provide a detour.

FIG. 1A is a structural conceptual view showing a second embodiment of the present invention. In FIG. 1A, an output circuit 102 inside a driving integrated circuit 101 is connected to an output terminal 103 via a compensation element 104. Each output terminal 103 (O1
, O2, O3... Om).
4 (Z1, Z2, Z3... Zm) are the drive integrated circuit 1
The value is appropriately set in consideration of the difference in wiring resistance from each output terminal outside of O.01.

FIG. 1B shows an embodiment in which the compensation element in FIG. 1A is a simple resistor. As shown by the broken line in FIG. 1B, the parasitic resistance of the external wiring corresponding to each output terminal 103 of the drive integrated circuit 101 is the largest corresponding to the output terminals O1 and Om. It simply decreases as it approaches the center of the integrated circuit. Therefore, as for the compensating element 104 of the driving integrated circuit 101, Z1 and Zm corresponding to the output terminals O1 and Om are the highest as shown by the dashed line in FIG. The resistance corresponding to the output terminal closer to the section is simply reduced. Then, the liquid crystal display device 305 is output from the output circuit 102.
As shown by the solid line in FIG. 1 (b) , the combined wiring resistance up to the display section becomes uniform for each output.

Although the embodiment shown in FIG. 1 shows the case where the parasitic resistance changes relatively simply, the present invention can cope with the case where the parasitic resistance changes complicatedly as shown in FIG. That is, of course.

When the compensation element is a resistor, the internal resistance of the transistor can be used as the resistance element in addition to the diffusion resistance, the polysilicon resistance and the like. Further, the output transistor 102 may be provided by changing the channel width W and the channel length L of the output transistor. It goes without saying that a combination of these may be used.

The difference in wiring resistance from the output terminal 103 of the driving integrated circuit 101 to the display of the liquid crystal display device 305 is not always constant depending on the size of the liquid crystal display panel and the number of pixel electrodes. Therefore, among the various cases assumed, the compensation element 104 in the drive integrated circuit 101 is set and set for the case where the resistance difference is the smallest (or appropriately), and for the other cases, the method shown in FIG. A method of compensating for is considered.

Also in this case, since a part of the resistance difference has already been compensated inside the driving integrated circuit 101,
The amount of compensation to be compensated for by the width and length of the external wiring is reduced, and more effective compensation can be easily performed. In this case, when the arrangement of the output terminals 103 of the integrated circuit 101 is blocked and the wiring causes a wiring resistance difference in block units, the effect of the embodiment of FIG. 1 is particularly large. If it is necessary to change the value of the compensation element 104 depending on the case, the following method can be considered.

FIG. 6 shows a third embodiment of the present invention.
FIG. 9 is a configuration diagram of the compensation element 104 according to the second embodiment shown in FIG. In FIG. 6, an output line 601 from the output circuit 102 shown in FIG.
Connect to 3. The resistance element 602 is formed by using an internal resistance of a transistor in addition to a diffusion resistance, a polysilicon resistance, and the like. The resistance element 602 includes a plurality of contact portions 60.
3 is provided. FIG. 6 shows a case in which the resistance value between the contact portions is substantially constant.
03 is arranged such that the resistance value between the contact portions is 1:
It may be installed so that it changes to 2: 4: 8 ...
You may install so that it may have another relationship.

The unnecessary portion of the resistance element 602 is
4 shorted. This short circuit can be changed to a different state only by changing the mask for providing the wiring aluminum of the drive integrated circuit 101, for example. Therefore, if several types of masks are prepared, a driving integrated circuit 101 having different compensation elements 104 can be obtained.

As described above, the internal resistance of the transistor can be used as the compensating element 104. In this case, the method of making the value of each compensating element 104 different is as follows. 1. A method of changing the dimensions of a transistor by making the voltage applied to the gate of the transistor the same. 2. A method of changing the voltage applied to the gate of the transistor by making the size of the transistor constituting each compensation element 104 the same. There are three methods of changing the voltage applied to the gate of the transistor after changing the dimensions of the transistor.

In any case, if the voltage applied to the gate of the transistor constituting each compensating element 104 can be adjusted outside the driving integrated circuit 101, various wirings can be formed using one type of driving integrated circuit 101. It is possible to respond to the conditions. For example, 1. When the method of (1) is used, the same voltage applied to the gate of the transistor is applied to the driving integrated circuit 10.
1 and by changing this voltage, different compensation characteristics such as A and B shown in FIG. 8 can be obtained.

FIG. 7 is a circuit diagram showing a fourth embodiment of the present invention. In FIG. 7, the main component of each of the compensating elements 104 is a parallel circuit in which the drains and the sources of the P-channel transistor 701 and the N-channel transistor 702 are commonly connected. The gate of the P-channel transistor 701 is connected to the divided output terminal of the voltage divider 703, and the gate of the N-channel transistor 702 is connected to the divided output terminal of the voltage divider 704. One terminal of the voltage divider 703 is connected to the high potential side Vdd of the power supply via the P-channel diode 705, and the other terminal is connected to the output terminal of the regulator 707. One terminal of the voltage divider 704 is connected to the low potential side Vss of the power supply via the N-channel diode 706, and the other terminal is connected to the output terminal of the regulator 708.

The voltage dividers 703 and 704 are similar to the resistance element 602 in FIG. 6 and have a number of output terminals. Different voltages obtained by dividing the voltages applied to both ends of the voltage dividers 703 and 704 are output to the respective output terminals. The gates of the P-channel transistor 701 and the N-channel transistor 702 are connected to a voltage divider 7 respectively.
03, 704. A number of compensating elements 104 are similarly provided, each compensating element 104
And the positions of the output terminals of the voltage dividers 703 and 704 connecting the gates,
A difference is provided between the characteristics of each compensation element 104.

The regulators 707 and 708 are located outside the driving integrated circuit 101 and can adjust the voltage applied to one end of the voltage dividers 703 and 704. The P-channel diode 705 and the N-channel diode 706 have a function of compensating the threshold voltage of the transistor, and compensate for variations in the manufacturing process of the threshold voltage and changes due to temperature. By adjusting the adjusters 707 and 708 to change the voltage applied to the gate of the transistor constituting each compensation element 104, it is possible to obtain compensation characteristics having different characteristics as shown in FIGS. I can do it.

FIG. 9 is a circuit diagram showing a fifth embodiment of the present invention. In FIG. 9, the compensating element 104 basically includes a resistor 901 and a capacitor 902. The resistor 901 may be constituted by an internal resistor of the output circuit 102.
An output line 601 of the output circuit 102 is connected to one end of a capacitor 902 and an output terminal 103 via a resistor 901 (directly when the resistor 901 is represented by the internal resistance of the output circuit 102). The other end of the capacitor 902 is connected to a power supply (Vdd or Vss) directly or via a resistor 903. The output of the output circuit 102 is distorted in waveform at the output terminal 103 due to the integration effect of the resistor 901 and the capacitor 902. The amount of distortion is determined by the resistance 901 and the capacitance 9
02, and changes depending on the value of the resistor 903. Therefore, by appropriately changing one or more of these values in accordance with the amount of distortion of the liquid crystal driving voltage caused by the external wiring, the amount of distortion inside the driving integrated circuit 101 and the amount of distortion due to the external wiring can be reduced. The value of the total distortion amount can be adjusted.

Although the above description has been made with respect to a simple matrix type liquid crystal display device, an active type liquid crystal display device,
It is also applicable to a recently developed method of simultaneously driving pixels across a plurality of rows (referred to as active addressing, multi-line selection, etc.). Further, the present invention can be applied to various liquid crystal display devices such as a ferroelectric liquid crystal and an anti-ferroelectric liquid crystal, and can be applied to other display devices other than the liquid crystal.

[0034]

As described above, according to the present invention, no special process is added to the manufacture of the liquid crystal display panel, so that the display unevenness due to the difference in the wiring resistance is eliminated without increasing the cost. And a display device with good display quality can be provided at low cost. In ferroelectric liquid crystals and antiferroelectric liquid crystals, the optical response of the liquid crystal does not depend on the effective value of the applied voltage, but on the absolute value of the applied voltage. Display unevenness is likely to occur, and the present invention is extremely effective.

[Brief description of the drawings]

FIG. 1 is a configuration diagram and a characteristic diagram of a driving integrated circuit according to a second embodiment of the present invention.

FIG. 2 is a conceptual configuration diagram of a simple matrix type liquid crystal display device.

FIG. 3 is a schematic diagram of a wiring development section showing a conventional example.

FIG. 4 is an enlarged view of a wiring development portion and a distribution diagram of a parasitic resistance showing a conventional example.

FIG. 5 is an enlarged view of a wiring development portion and a distribution diagram of a parasitic resistance according to the first embodiment of the present invention.

FIG. 6 is a configuration diagram of a compensation element 104 according to a third embodiment of the present invention.

FIG. 7 is a configuration diagram of a compensation element 104 according to a fourth embodiment of the present invention.

FIG. 8 is a characteristic diagram according to a fourth embodiment.

FIG. 9 is a configuration diagram of a compensation element 104 according to a fifth embodiment of the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 101 Drive integrated circuit 102 Output circuit 103 Output terminal 104 Compensation element 301 Drive integrated circuit 301a Near end 301b Near center 304 Wiring 307 Wiring development part

Claims (4)

(57) [Claims] 1. An output circuit comprising : a plurality of output circuits;
Display device having a plurality of output terminals for drawing out to a part
Integrated circuit for at least one part of an output circuit
Different internal impedance between the
Resistive element with gate electrode
And the gate voltage of the transistor resistance element is
The pole voltage is configured to be controllable from outside.
Drive integrated circuit. 2. The transistor resistance element according to claim 1, further comprising :
Between the output circuit and the output terminal.
2. The drive integration circuit according to claim 1, wherein the drive integration circuit is inserted into the drive integration circuit.
Road 3. A drive train according to claim 1 or claim 2.
A display device using an integrated circuit. 4. The driving integrated circuit according to claim 1, further comprising :
Bypass at least part of multiple wiring paths connecting poles
Routes, or narrow at least some of the wiring
4. The display device according to claim 3, wherein the resistance value is increased.
Place.