JP3264517B2 - Vertical structure heterojunction bipolar transistor - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a vertical structure heterojunction.
The present invention relates to a bipolar transistor , and more particularly, to a vertical structure heterojunction bipolar transistor for power amplification.

[0002]

2. Description of the Related Art Recently, a demand for a transistor for power amplification in a microwave band has been increasing. Among them, a vertical heterojunction bipolar transistor (hereinafter, referred to as "HBT") having higher gain and lower output conductance than GaAs FETs already in practical use has attracted attention as means for realizing a high efficiency amplifier. (See, for example, NL Wang et al., "Ultra High Power Efficient Operation of Common Emitter and Base Common HBTs at 10 GHz", IEEE Transactions on Microwave Theory and Technics, vol. 38, N
o.10, pp1381-1389).

[0003] As is known, the HBT operates at a high current density, so that the heat generation density inevitably increases.
Therefore, in order to operate properly, the heat generated at the junction (pn junction) formed on the substrate surface must be efficiently released to the outside of the semiconductor substrate. The above document employs a means for escaping the heat generated at the joint to the back side of the substrate. In other words, while thinning the semiconductor substrate, a via hole (a hole penetrating from the back surface of the substrate to the front surface of the substrate) is provided directly below the electrode drawn from the junction to the periphery, and a metal material having good heat conductivity is provided in the via hole. Is embedded. The electrode structure of a bipolar transistor is widely examined not only for the microwave band but also for a bipolar transistor.
As can be seen in Japanese Patent Application Laid-Open No. 5 (1999) -2005, a junction formed on the surface of a semiconductor substrate (an approximately rectangular base region is provided on a semiconductor substrate (collector), and an emitter region having an interdigital (interdigital) structure is provided in the base region). Is provided with a bump electrode protruding from the substrate surface. Specifically, a thin film electrode is provided in substantially the entire region of the base region and the emitter region, and the bump electrode is provided on a portion of each thin film electrode having a predetermined area other than the interdigital structure portion (lead electrode portion). I have. In this transistor, heat generated at the junction can be efficiently released to the outside of the substrate through the bump electrode.

[0004]

The above-mentioned HBT
Then, the following problem arises. (i) In addition to shaving the substrate thinly and opening the via hole, the wafer is cracked and the yield is reduced. (ii) The via hole is at least 5 μm or more away from the joint (heat-generating portion) due to restrictions on processing accuracy. For this reason, it is difficult to effectively reduce the thermal resistance. (iii) In the microwave band, the emitter lead wire from the junction has an inductance that cannot be ignored and acts as a feedback inductance, resulting in a loss.

[0005] Because of such many problems, the HBT could not be put to practical use for power amplification in the microwave band. Here, it is conceivable to solve the problem of heat dissipation by providing the bump electrodes described above. However, in JP-A-3-3335, since the bump electrode has a certain width, the bump electrode is provided not on the interdigital structure but on the extraction electrode having a predetermined area. In this state, there is a limit in reducing the parasitic capacitance (Cbe, Cbc, Cec) of the element. Further, since the bump electrode is provided at a position separated from the interdigital structure, the emitter inductance cannot be sufficiently reduced. For this reason, the bump electrode has not been adopted for a transistor for a microwave band.

SUMMARY OF THE INVENTION It is an object of the present invention to efficiently release heat generated at a joint formed on the surface of a substrate, to reduce inductance and parasitic capacitance of a lead wire, and to increase power amplification in a microwave band. Vertical Structure Heterojunction Bipolar Transistors
It is to provide the data.

[0007]

In order to achieve the above object, a vertical structure heterojunction bipolar transistor according to the present invention is provided.
The star is located in the base region formed on the surface of the semiconductor substrate.
An emitter region forming a junction is provided at an interface with the base region, and the junction is divided into a plurality of portions in the emitter region, and is provided immediately above the emitter region in common with each of the plurality of divided junctions. And a width dimension of the emitter region substantially coincides with a width dimension of the bump electrode.

The bump electrode is preferably made of gold or a metal containing gold.

Preferably, the bump electrodes are connected to a heat sink.

The plurality of divided joints are a plurality of strip-shaped fingers arranged in parallel, and the length in the longitudinal direction of the fingers and the width of the bump electrodes in this direction are 5 μm to 5 μm. It is desirable to set it in the range of 40 μm.

[0011]

The bump electrode provided immediately above the emitter region and commonly provided at each of the plurality of junctions is located very close to the heat generating portion. For example, in the case of an emitter top type HBT, the distance between the bump electrode and the heat generating portion (base / collector junction) is the sum of the emitter thickness and the base thickness (about 0.5 μm).
Becomes That is, the lead-out distance is about one tenth as compared with the case where the conventional via hole is provided or the case where the bump electrode is provided on the lead-out electrode portion. Therefore, by connecting the bump electrodes to the heat sink, the heat radiation efficiency is significantly increased, and the thermal resistance is greatly reduced. At the same time, since the emitter is grounded at the shortest distance from the emitter and with a thick ground line, the inductance is extremely reduced. In addition, the following advantages are obtained when the width dimension of the emitter region and the width dimension of the bump electrode (dimension of the cross section of the portion in contact with the substrate side) substantially coincide with each other as compared with the case where they do not coincide There is. First, when the width of the bump electrode is smaller than the width of the emitter region, the radiation efficiency of the portion of the emitter region protruding around the bump electrode is reduced. On the other hand, when the two dimensions match, heat is radiated efficiently over the entire emitter region. On the other hand, if the width of the bump electrode is larger than the width of the emitter region, the bump electrode connected to the emitter protrudes into the base region or the collector region. The capacitance Cce) increases, and the element characteristics deteriorate. On the other hand, when the two dimensions match, such a parasitic capacitance is suppressed to a small level. As a result, the element characteristics are improved as described above.
This vertical structure heterojunction bipolar transistor can be put to practical use for power amplification in the microwave band.

Further, when the bump electrode is made of gold or a metal containing gold, the thermal conductivity is higher than when the bump electrode is made of a general lead-tin alloy. Therefore, the thermal resistance is further reduced.

Further, when the bump electrode is connected to a heat sink, as described above, the heat radiation efficiency is significantly increased, and the thermal resistance is greatly reduced.

In addition, the junction divided into a plurality of portions in the emitter region is often a plurality of strip-shaped finger portions arranged in parallel. This is because, in a high-frequency transistor, it is desirable to reduce the base finger resistance by reducing the emitter finger width (the emitter finger width is generally set to 1 to 10 μm due to processing accuracy and other restrictions). In this case, the dimension of the finger region in the longitudinal direction and the dimension of the bump electrode in this direction are:
When it is set in the range of 5 μm to 40 μm, there are the following advantages as compared with the case where it is set outside this range. First, when the length in the longitudinal direction of the finger portion and the size of the bump electrode in this direction are set to 5 μm or less, the thermal resistance of the bump electrode becomes extremely large. In general, the width and height dimensions of the bump electrode are almost the same, so that the gap between the element surface and the heat sink connected to the bump electrode is narrowed, which is not preferable because the parasitic capacitance increases. Moreover, it is difficult to stably form such a small-sized bump electrode. On the other hand, when both dimensions are set to 5 μm or more, the thermal resistance of the bump electrode and the parasitic capacitance between the element surface and the heat sink can be reduced to practical levels.
In addition, the bump electrodes can be formed by a general process using a plating method. On the other hand, when the length in the longitudinal direction of the finger portion and the size of the bump electrode in this direction are set to 40 μm or more (the width of the bump electrode is generally set to 80 to 110 μm), the present invention is applied. From various experimental results by the inventor, the collector resistance, the base resistance, the electromigration of each electrode of the collector and the base, and the parasitic capacitances Cbe and Cce become nonnegligible levels,
It was found that the device characteristics deteriorated. On the other hand, when both dimensions are set to 40 μm or less, the collector resistance, the base resistance, and the parasitic capacitances Cbe and Cce can be respectively reduced to practical levels. Note that the parasitic capacitances Cbe and Cce in this case are the capacitances between the base region and the collector region exposed in the gap or the periphery of the strip-shaped finger portion and the bottom surface of the bump electrode facing each of the regions. .

[0015]

EXAMPLES Hereinafter, heterojunction Baipo to the vertical structure of the present invention
The transistor will now be described in detail with reference to examples.

FIG. 1 shows a plane pattern of an npn emitter top type HBT for microwave power amplification according to one embodiment of the present invention, and FIG. 2 shows a cross section of the HBT. As shown in these figures, this HBT is composed of a sub-collector layer 12, a collector layer 8,
It includes a base layer 7 and an emitter layer 5 (hereinafter, the sub-collector layer 12 and the collector layer 8 are collectively referred to simply as "collector layer 8"). As a junction, a base / collector junction is formed at the interface between the collector layer 8 and the base layer 7 and a base / emitter junction is formed at the interface between the base layer 7 and the emitter layer 5. A collector electrode 9, a base electrode 6, and an emitter electrode 3 are provided on each of the semiconductor layers 8, 7, and 5, respectively. Further, the Ti layer 2 is located immediately above the emitter electrode 3.
, A columnar bump electrode 1 made of gold (Au) is provided. As shown in FIG. 1, the emitter layer 5 is divided into four strip-shaped finger portions 5a arranged in parallel, and the base electrode 6 is exposed in gaps (and both sides) of the finger portions 5a. The base layer 7 is patterned in a comb shape. The emitter electrode 3 is formed in a substantially circular pattern and has four finger portions 5.
a, while being insulated from the base electrode 6 by the interlayer insulating film 11. The collector electrode 9
Are formed on both sides of the base electrode 6.

In the case of a high-frequency junction, it is desirable that the width of the emitter finger 5a is small in order to reduce the base resistance. However, due to processing accuracy and other restrictions, the width of the finger 5a is generally 1 to 4 μm. Set to range. Similarly, it is desirable that the widths of the base electrode 6 and the collector electrode 9 are also small. However, the width is set to a general range of 1 to 3 μm from the viewpoint of processing accuracy and electromigration resistance. On the other hand, the length in the longitudinal direction of the finger portion 5a is set in the range of 5 to 40 μm. The width (diameter) of the bump electrode 1 is set to be substantially the same as the size of one side of the region where the finger portions 5a are arranged, that is, one side of the emitter region (substantially square).
It is in the range of μm. In this embodiment, the emitter region is substantially square. However, when the emitter region has a rectangular shape or the like, the length of the finger portion 5a in the longitudinal direction is defined as the width of the emitter region, which is defined as the width of the bump electrode 1. It is better to make them approximately match the dimensions. The reason for this is to prevent a portion of the base electrode 6 and the collector electrode 9 extending in the longitudinal direction (a wiring portion existing outside the region of each semiconductor layer) from being covered with the bump electrode 1 and generating unnecessary capacitance. is there. However, the emitter region is substantially square as in this embodiment,
The provision of the columnar bump electrode 1 is easy to manufacture.

This HBT is manufactured as follows.
First, as shown in FIG. 2, a known procedure (for example, described in IEICE Technical Report ED90-135)
As a result, the surface of the semi-insulating GaAs substrate 10 becomes AlGaAs /
Collector layer 8, base layer 7, emitter layer 5 made of GaAs
And the base electrode 6 and the collector electrode 9 are formed (the sum of the thicknesses of the base layer 7 and the emitter layer 5 is about 0.5 μm). Next, using polyimide as the interlayer insulating film 11, the base electrode 6 and the collector electrode 9 are covered, and an opening is provided directly above the emitter finger portion 5a (note that the base electrode 6 and the collector electrode 9 are located outside the element). The opening for connection is opened at a remote location (not shown).) Thereafter, Ti / Pt is placed immediately above the emitter region.
An emitter electrode (protective electrode layer) 3 made of / Au is formed in a substantially circular pattern. Further, a SiNx film (not shown) is deposited on the entire surface as a passivation film, and a circular opening is provided in a portion of the SiNx film on the emitter electrode 3 (a region where the bump electrode 1 is to be provided). Next, a Ti layer 2 is deposited on the entire surface. Next, a resist is applied and photolithography is performed to provide a circular opening in a portion of the resist on the emitter electrode 3 (a region where the bump electrode 1 is to be provided).
Then, a bump electrode 1 made of Au is formed by plating. Finally, the remaining resist is removed, and the Ti layer 2 existing in a region other than the bump electrode 1 is removed by wet etching, thereby completing the fabrication.

The distance between the bump electrode 1 of the HBT and the heat-generating portion (base / collector junction) is the sum of the emitter thickness and the base thickness (about 0.5 μm) and is extremely close.
Therefore, as shown in FIG. 3, by bonding the upper portion 1a of the bump electrode 1 to the heat sink 4 (flip chip bonding), the heat radiation efficiency can be significantly increased, and the thermal resistance can be greatly reduced. At the same time, the ground can be grounded with the shortest distance from the emitter electrode 3 and with a thick ground line, so that the inductance can be reduced to a minimum. Therefore, this HBT can be put to practical use for power amplification in the microwave band.

Further, since the bump electrode 1 is made of gold (Au), the thermal conductivity can be increased as compared with the case where the bump electrode 1 is made of a general lead-tin alloy, so that the thermal resistance can be further reduced. it can.

Further, since the width of the emitter region and the width of the portion 1b of the bump electrode 1 on the substrate side are made substantially the same, the entire region of the emitter region can be efficiently radiated. In addition, the bump electrode 1 does not protrude into the base region or the collector region. Therefore, the base-emitter capacitance Cbe and the emitter-collector capacitance Cc
Parasitic capacitance such as e can be suppressed to a small level. Therefore, device characteristics can be improved.

From the results of various experiments conducted by the present inventors, the size of the emitter finger portion 5a in the longitudinal direction and the size of the bump electrode 1 in this direction are set in the optimum range of 5 to 40.
It is set to μm. Therefore, the HBT can reduce the thermal resistance of the bump electrode 1 and the parasitic capacitance between the element surface and the heat sink 4 to practical levels. Moreover, the bump electrode 1 can be formed by a general process using a plating method (if the width of the bump electrode is less than 5 μm, it cannot be formed by the plating method). Further, the collector resistance, the base resistance, and the parasitic capacitances Cbe and Cce can be respectively reduced to practical levels. In this case, the parasitic capacitances Cbe and Cce are the capacitances between the base region and the collector region exposed in the gap or the periphery of the strip-shaped finger portion 5a and the bottom surface of the bump electrode 1 facing each of these regions. . The upper limit of the length in the longitudinal direction (and the width of the bump electrode 1) of the emitter finger portion 5a is set to 40 μm because of the limitation due to the peak current density of the high-frequency signal in the base electrode 6. For example, consider a transistor having four emitter finger portions 5a having a width of 3 μm as a transistor having a size suitable for implementing the present invention. The base electrode 6 has an ohmic contact layer having a thickness of 800 to 1000 ° on the base layer 7.
(Ti layer / AuZn or AuMn layer) is provided, and an Au layer having a thickness of 4 μm superposed thereon is led out of the region of the base layer 7 as a wiring. Operating frequency of this transistor
f = fт / 10 typically when operating under the conditions of (f _{T =} 15GHz), as shown in FIG. 4, the base electrode as the longitudinal dimension of the emitter fingers 5a is long 6
The peak current density flowing through the line increases linearly. And
When the length of the emitter finger portion 5a exceeds about 40 μm, the electron
It exceeds the migration allowable current density (7 × 10 ⁵ A / cm ² ). For this reason, it is desirable that the length in the longitudinal direction of the emitter finger portion 5a be set to 40 μm or less. In addition, as a material of the wiring portion of the base electrode 6,
It is conceivable to use W, Al, or Cu instead of Au. However, when W is used, although the allowable current density is certainly increased, there is a problem that the electric resistance is large. Al and Cu have a smaller allowable current density than Au. As a result, Au is suitable for the material of the wiring portion of the base electrode 6 as in the above example. As described above, the dimension of the emitter finger portion 5a in the longitudinal direction is 5 to 40 μm.
Is preferred. In particular, a 3 μm wide emitter finger
When this is provided, it is preferable that the dimension of the emitter finger portion 5a in the longitudinal direction is 20 μm from the viewpoint of high frequency characteristics.

In this embodiment, heat was not radiated from the back surface of the element substrate 10 in particular. However, the back surface of the substrate 10 was naturally thinned, and the heat was transferred through a heat transfer solder, a case cap and the like. It may be combined with a means for radiating heat.
In the HBT, the bump electrode 1 is connected to the emitter electrode 3
, But is not limited to this. The bump electrode 1 may be connected to the base electrode 6 or the collector electrode 9 instead of the emitter electrode 3;
Instead of using the electrode, only heat dissipation may be performed via the insulating film.

In this embodiment, the collector layer 8, the base layer 7, and the emitter layer 5 are formed on the semiconductor substrate 10 in this order. On the contrary, the emitter layer, the base layer, and the collector layer may be formed in this order. Good. In addition, each of the semiconductor layers 8, 7,
The conductivity type of No. 5 may be inverted from npn type to pnp type.

The structure of the transistor may be a single hetero bipolar transistor (SHBT) in which only the emitter layer has a large band gap, or a double hetero bipolar transistor (DHBT) using a wide band gap material for the collector layer. good. Toes
The transistor is a vertical structure heterojunction bipolar transistor.
Any transistor is acceptable.

The composition of each of the semiconductor layers 8, 7, 5 is as follows:
It is not limited to AlGaAs / GaAs, for example, In
Other lattice-matched systems such as GaAs / InAlAs and InGaAs / InP may be used, and lattice-mismatched systems such as InGaAs / AlGaAs may be used.

In order to improve device characteristics, O 2,
B, H ions or the like may be implanted immediately below the external base to reduce Cbc, or a device isolation structure by ion implantation may be used.

[0028]

As is clear from the above, the vertical length of the present invention
According to the heterojunction bipolar transistor having the mold structure, the distance between the bump electrode and the heat generating portion can be made extremely shorter than before. Therefore, by bonding the bump electrodes to the heat sink, the heat radiation efficiency can be remarkably increased, and the thermal resistance can be greatly reduced. At the same time, the shortest distance from the emitter and
Since the grounding is performed by the thick grounding line, the inductance can be reduced to a minimum. Therefore, this HBT can be put to practical use for power amplification in the microwave band. Also,
When the width of the emitter region is substantially equal to the width of the bump electrode, heat can be efficiently radiated over the entire emitter region and the base-emitter capacitance C can be improved.
The parasitic capacitance such as be and the capacitance Cce between the emitter and the collector can be suppressed to a small level, and the element characteristics can be improved.

Further, when the bump electrode is made of gold or a metal containing gold, the thermal conductivity can be made higher than when it is made of a general lead-tin alloy, so that the thermal resistance can be further reduced. .

When the bump electrode is connected to a heat sink, the heat radiation efficiency is significantly increased and the thermal resistance is greatly reduced, as described above.

The plurality of junctions in the emitter region are a plurality of strip-shaped fingers arranged in parallel, and the length in the longitudinal direction of the finger and the width of the bump electrode in this direction are set as follows. When set in the range of 5 μm to 40 μm, the thermal resistance of the bump electrode, the parasitic capacitance between the element surface and the heat sink, the collector resistance,
The base resistance and the parasitic capacitances Cbe and Cce can be reduced to practical levels. In addition, the bump electrodes can be formed by a general process using a plating method.

[Brief description of the drawings]

FIG. 1 is a diagram showing a planar pattern of an HBT according to an embodiment of the present invention.

FIG. 2 is a diagram showing a cross-sectional structure of the HBT.

FIG. 3 is a diagram showing a state in which the HBT is flip-chip bonded to a heat sink.

FIG. 4 is a diagram showing a relationship between an emitter finger length L and a base electrode peak current density.

[Explanation of symbols]

 Reference Signs List 1 bump electrode 2 Ti layer 3 emitter electrode 4 heat sink 5 emitter layer 6 base electrode 7 base layer 8 collector layer 9 collector electrode 10 semi-insulating GaAs substrate 11 interlayer insulating film 12 sub-collector layer

Claims (4)

(57) [Claims] 1. A semiconductor device comprising: a base region formed on a surface of a semiconductor substrate; and an emitter region forming a junction at an interface with the base region, wherein the junction is divided into a plurality in the emitter region. A bump electrode common to each of the plurality of divided junctions is provided directly above the emitter region, and a width dimension of the emitter region and a width dimension of the bump electrode substantially match. To a vertical structure
B junction bipolar transistor . 2. The vertical structure according to claim 1, wherein the bump electrode is made of gold or a metal containing gold .
Terror junction bipolar transistor . 3. The vertical structure according to claim 1, wherein the bump electrode is connected to a heat sink .
Terror junction bipolar transistor . 4. The joining portion divided into a plurality of portions is a plurality of strip-shaped finger portions arranged in parallel, and the length of the finger portion in the longitudinal direction and the width of the bump electrode in this direction are 5 μm or more. The vertical structure according to claim 1, wherein the vertical structure is set within a range of 40 µm.
A heterojunction bipolar transistor .