JP3126240B2 - Serial printer device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a serial printer, and more particularly to a serial printer having a synchronizing signal generating circuit for synchronizing the movement of a carriage having a print head and the printing operation of a print head.

[0002]

2. Description of the Related Art In a serial printer, printing (printing) is performed while scanning a carriage on which a printing head of a printing means is mounted in a horizontal direction with respect to a printing medium. Then, density unevenness of the recording result occurs. In particular, in a color printer, a shift in color registration occurs, which is a problem.

Conventionally, as one method for solving these problems, a configuration in which the amount of movement of a carriage equipped with recording means with respect to the apparatus main body is detected, and the recording operation is performed by the recording means while synchronizing with the detection result. It has been known.

That is, a scale section of a linear encoder is fixed on a main body side, and a detection section of a linear encoder is mounted on a carriage which moves relatively to the scale section, and an output signal from the detection section is amplified. Then, the recording signal is taken out of the carriage and a recording signal is generated in synchronization with the amplified signal, thereby preventing print density unevenness and color registration deviation.

A conventional example will be described with reference to the drawings.
FIG. 4 is a circuit diagram showing a configuration of a conventional synchronous signal generating circuit. The relative position of the carriage relative to the apparatus main body is detected by detecting a scale portion of a linear encoder mounted on the carriage and fixed to the apparatus main body. The detection unit 101 of the linear encoder for detecting the magnetic field is composed of an MR element head or the like that operates based on the magnetoresistance effect, and is provided with a pair of magnetic detection elements 102 and 103 integrally. The detection unit 101 is connected to a substrate 5 mounted on a carriage indicated by a broken line in the figure. Amplifiers 104 and 105 for constituting a constant current circuit, an amplifier 106 for amplifying a detected signal, and a comparator 107 are connected to the substrate 5 in a known manner.
Is output. The comparator 107 is connected to a variable resistor 201 for determining a reference voltage.
It is mounted on a substrate 5 and is adjusted on a carriage.

The operation of the above circuit configuration will be described. The magnetic sensing elements 102 and 103 have constant current circuits 104 and 1 respectively.
A constant current is supplied through the switch 05. Detection unit 101
Moves with respect to the scale portion of the linear encoder fixed to the apparatus main body, on which the magnetic pattern is recorded in advance at regular intervals, the resistance values of the magnetic detection elements 102 and 103 change, and the amount of change in the resistance value Is detected as a voltage change and amplified by the amplifier 106, and the amplified signal is input to one input terminal of the comparator 107. In the comparator 107, the amplified signal is
It is compared with a reference voltage set in advance by the adjustment of the variable resistor 201 and input to the other input terminal of the comparator 107, and an output signal 303 is obtained as a synchronization signal.

[0007]

However, in the above-mentioned conventional example, the output fluctuation of the detection device may adversely affect the print recording result. The operation when such an MR element is used in the detection unit of the linear encoder will be described. FIG. 8A is a waveform diagram showing the relationship between the signal 301 input to the comparator 107 and the reference voltage 302. FIG. 8B is a waveform diagram of the synchronization output signal 303 obtained when the relationship shown in FIG. The input signal 301 to the comparator 107 shows a waveform close to a sine waveform that changes at a constant period as shown in the figure.

On the other hand, as a result of obtaining the reference voltage 302 as the threshold value of the output signal 303 of the comparator, a deviation between the input signal 301 and the reference voltage appears as a duty fluctuation of the output signal, as can be seen from FIG. If a recording and printing operation is performed in synchronization with the output signal 303, a shift in ruled lines and uneven density in an output image will occur, and the recording quality will be significantly reduced.

FIG. 9 is a diagram for explaining the recording operation, and shows a state in which the driving of the recording means is executed on the recording medium in synchronization with the above-mentioned output signal 303 and the dot D is recorded. As shown in the drawing, since the pitch between the dots D fluctuates, the density unevenness of the recording result occurs. In particular, in color printing, it causes color registration deviation.

As shown in FIG. 8B, the printing direction and printing timing of the carriage are normally detected by the comparator outputs A and B phases which are 90 ° out of phase with each other. At the time of the level, when the clock of the phase A falls, it is determined that the direction is the forward direction, when the clock of the phase A rises, it is determined that the direction is the reverse direction, and when the phase B is at the high level, it is printed at the rising or falling of the phase A. As shown in FIG. 8C, when the duty ratio is smaller than 25%, the direction cannot be detected. As shown in FIG. 8D, when the duty ratio exceeds 75%, printing is performed twice in one clock. There was a disadvantage of becoming.

In addition, when the conventional example is viewed from another viewpoint, there is a possibility that noise which may cause a count error in the synchronization signal generating circuit may enter. Explaining based on FIG.
FIG. 5A shows a normal waveform, and FIG.
FIG. 5C shows a typical example of a waveform including noise.
FIG. 5D and FIG. 5E show waveforms that are considered to hardly appear but have a probability of 0. FIG.
(F) shows waveforms including the above-mentioned various noises expected to enter the synchronization signal generation circuit. FIG. 5 (g) is FIG.
FIG. 14 shows an output waveform of the comparator when the waveform of FIG. As can be seen from FIG. 5 (f), although the noise components indicated by b and c cross the zero level even if they are small, count errors easily occur. However, noises g and h of the same level do not cause count errors. Also, since large noises such as d and e rarely occur,
The waveforms of d and e hardly occur.

SUMMARY OF THE INVENTION Accordingly, a first object of the present invention is to provide a serial printing apparatus capable of suppressing duty fluctuation and setting a duty ratio to 50%.

A second object of the present invention is to provide a serial printer device provided with a noise removing circuit for preventing a count error due to noise entering a synchronization signal generating circuit.

[0014]

In order to achieve the above-mentioned first object, the present invention provides a recording apparatus which reciprocates on an apparatus main body and synchronizes with the movement of a carriage on which the recording means is mounted. In a serial printer device that performs recording by a scale unit of a linear encoder provided on the device body, a detection unit of a linear encoder mounted on the carriage to detect the position of the scale unit, Synchronizing circuit means for receiving the output signal as an input signal and comparing with a reference voltage to generate an output signal having a pulse waveform as a synchronizing signal; and determining the wavelength of the pulse waveform of the output signal from the synchronizing signal generating circuit means. A counter for measuring and outputting a signal with a duty ratio of 50%;
And a serial printer device having the following features.

According to another aspect of the present invention, there is provided a serial printer which reciprocates on an apparatus body and performs recording by a recording unit while synchronizing movement of a carriage on which the recording unit is mounted. In the device, a scale portion of a linear encoder provided on the device body,
A detection unit of a linear encoder mounted on the carriage for detecting the position of the scale unit; a signal output from the detection unit is received as an input signal and compared with a reference voltage to generate a pulse waveform as a synchronization signal; Synchronizing signal generating circuit means for generating an output signal; and a noise removing circuit for removing noise that may enter the synchronizing signal generating circuit means and may be included in the output signal. A pulse generating circuit for generating a pulse at the timing of a rising edge and a falling edge of the output signal from the signal generating circuit means, a delay circuit for delaying a pulse from the pulse generating circuit, and a delayed pulse from the delay circuit At the rise of the signal, the state of the output signal from the synchronization signal generating circuit means is latched and output, and the fall of the pulse is In those employing a serial printer apparatus characterized by having a circuit for outputting to latch the state of the output signal from the synchronizing signal generating circuit means.

[0016]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a perspective view of a main part of a serial printer device shown together with a recording medium. In FIG. 1, a carriage 1 indicated by a dashed line has a recording portion 1h of an ink jet recording system or the like mounted thereon, and is guided by a guide shaft 11 having a spiral groove formed on an outer peripheral surface, and locked by rotation of the guide shaft 11. The recording sheet (recording medium) is driven along a spiral groove to reciprocate the recording sheet 13 wound on the outer peripheral surface of the platen 12 in a direction indicated by an arrow in FIG. A so-called serial printer which forms images and characters by recording dots D at a pitch P on the device 13 is constructed.

An encoder for obtaining a synchronization signal is built in the carriage 1 constructed as described above. This encoder is a magnetic linear encoder, and a scale portion 501 of a linear encoder in which a magnetic pattern is recorded on a magnetic material formed on the surface of a wire at a print pitch density equivalent to, for example, 180 dots / inch (dpi) or 360 dpi. A magnetic head main body 502 composed of an MR element or the like is fixed inside the carriage 1 while being fixed to the apparatus main body 100, and enables position detection by movement of the carriage 1.

A flexible printed circuit board 503 for extracting an output signal from an MR element in the magnetic head to the outside is connected to the magnetic head body 502, and a contact portion 504 is connected to a connector (not shown). In this way, it is connected to the substrate 5 mounted on the carriage 1 and shown by the broken line in the figure.

FIG. 2 is a circuit diagram showing the configuration of a synchronization signal generating circuit according to the present invention. The scale section of a linear encoder mounted on the carriage and fixed to the apparatus main body is detected. Detecting unit 10 of a linear encoder for detecting the relative movement position of the carriage with respect to the apparatus main body
Reference numeral 1 denotes an MR element head or the like that operates based on the magnetoresistive effect, and integrally includes a pair of magnetic detection elements 102 and 103. The detection unit 101 is connected to a substrate 5 mounted on a carriage indicated by a broken line in the figure. The substrate 5 includes amplifiers 104 and 105 for forming a constant current circuit and an amplifier 1 for amplifying a detected signal.
06 and the comparator 107 are connected in a known manner, and output an output signal 108. This output signal is input to the counter unit 7. A variable resistor 201 for determining a reference voltage is connected to the comparator 107, mounted on the substrate 5, and adjusted on a carriage.

FIG. 3 is a diagram showing a detailed circuit configuration of the counter section 7 shown in FIG. The frequency divider A109 composed of a trigger flip-flop or the like
7 is １ ／ frequency-divided. On the other hand, the output signal of the oscillator 113 is input to the frequency divider B114. Divider A
The output signals of the frequency divider 109, the frequency divider B114, and the oscillator 113 are output from the respective gates 110, 111, 112, 115, 11
6, 117, and 119 are input to an addition / reverse operation counter I115 such as TTL and an addition / inverse operation counter J116.

Next, the operation of this circuit will be described with reference to FIGS.
This will be described with reference to FIG. A constant current is supplied to the magnetic detecting elements 102 and 103 via constant current circuits 104 and 105, respectively, and as the magnetic head 101 moves along the scale section 501 of the linear encoder shown in FIG. , The resistance of the magnetic sensing elements 102 and 103 changes according to the movement, the amount of the change is detected as a voltage change, and the signal amplified by the amplifier 106 is
Is input to one of the input terminals. The output signal 108 of the comparator (FIG. 4A) is converted into a high and low clock for each wavelength by the frequency divider 109 of FIG. 3 (FIG. 4B). The frequency divider A109 is output from the oscillator 113.
A pulse (FIG. 4D) that is sufficiently shorter than the output signal of FIG. Each gate 110, 111, 112, 115, 1
16 and 117, when the output signal of the frequency divider A109 is high, the number of clocks of the output signal (FIG. 4C) of the frequency divider A114 is added to the addition / inversion counter 115.
When the output signal of the frequency divider A109 is low, the oscillator 11
3 is the number of clocks of the output signal of the addition / inversion counter I11
5 is calculated backward. At this time, since the clock frequency of the oscillator 113 is twice the clock frequency of the output signal of the frequency divider B114, as shown in FIG. The count number is calculated back to 0. Also, an addition / reverse operation counter J118
As shown in FIG. 4F, when the output signal of the frequency divider A109 is low, it is added, and when it is high, it is calculated backward.

As described above, the counters I and J are back-calculated after the addition, and when the count becomes zero, the counters I and J set the ripple clock output signal to low. Gate 123
When either of the counters I and J outputs a ripple clock output as shown in FIG.
Output to the K input terminal of the flip-flop 124;

On the other hand, D flip-flops 119 and 12
0 and the gate 121 output the output signal 10 of the comparator.
The signal which goes high at the rising edge of the clock signal 8 and goes low after one clock of the oscillator 113 as shown in FIG.
It outputs to the J input terminal of the K-flip-flop 124.

The JK-flip-flop 124 is shown in FIG.
As shown in (i), a signal which becomes high at the rise of the gate 121 and becomes low at the rise of the gate 123 is output.

Thus, the JK-flip-flop 124 can output a clock having a duty ratio of 50%. In this embodiment, TTL1 is set in the counter.
Although 91 and the like are used one by one, the duty ratio approaches 50% when two or more stages are used. A suitable example is TT
L191 is used in two stages and the clock of the oscillator is 500 ns
About. The clock of the output signal of the comparator is 1
Since it is about 60 μs, 160 1 μs clocks of the output signal of the frequency divider B can be counted. The counter can count up to 8 bits (256), which is a sufficient value.
Since the delay of these gates is about 10 ns, 500
This value can be ignored for ns. If the count number is ±
Even if it fluctuates by one, the duty ratio is 50 ± 0.3125%. It is also possible to preset the clock for the error. If further accuracy is required, the frequency of the oscillator may be increased and the counter may be multi-staged accordingly. Note that the circuits and components (counters, frequency dividers, and the like) of the embodiment are merely examples, and the invention is not limited thereto as long as they have equivalent functions.

In the first embodiment, the present invention is directed to a counter for setting the duty ratio to 50%.
In the second embodiment described below, a noise removing circuit is used instead of the counter.

FIG. 6 shows an example of a noise removing circuit. D
-Flip-flops 201, 202, gates 203, 2
Reference numerals 04 and 205 denote circuits for detecting rising and falling edges of the output signal 108 of the comparator and generating pulses. The three gates 203, 204, 20
5 (AND circuit, NAND circuit, OR circuit) is EX-N
Although one OR (exclusive NOR) circuit can be used instead, the configuration is shown by three gates for easy understanding of the function. The delay circuit 206 can be easily realized by connecting several stages of D flip-flops in series, but it is necessary to provide a delay time larger than the noise pulse width. When there is an output signal of the comparator as shown in FIG.
A pulse as shown in (c) is obtained. The D-flip-flop 207 latches and outputs the output signal of the comparator at the rise of this pulse (FIG. 10B). With the above circuit configuration, noise can be removed.

The circuit example shown in FIG. 6 is an example, and other circuit configurations can be adopted. For example, the D-flip-flop 207 is changed to a T-flip-flop, and the gate 2
05 may be measured by a counter, and a pulse may be sent to the T-flip-flop only in the case of an odd number (when the lower 1-bit output is high).

[0029]

As described above, according to the present invention,
By providing a counter unit for measuring the wavelength of the synchronous output signal and setting the duty ratio of the synchronous output signal pulse waveform to 50%, a serial printer device capable of high quality printing can be obtained.

Further, by providing a removing circuit for removing noise which may enter the synchronizing signal generating circuit,
A serial printer device that can obtain a synchronization signal output pulse without counting errors due to noise can be obtained.

[Brief description of the drawings]

FIG. 1 is a perspective view of a main part of a serial printer of the present invention.

FIG. 2 is a circuit diagram of a synchronization signal generation circuit including a counter unit according to the present invention.

FIG. 3 is a circuit diagram illustrating an example of a counter unit.

FIG. 4 is a time chart showing waveforms of main parts of a counter unit.

FIG. 5 is a waveform diagram including various noises that may enter the synchronization signal generation circuit.

FIG. 6 is a circuit diagram illustrating an example of a noise removal circuit.

FIG. 7 is a diagram showing a conventional synchronous signal generation circuit.

FIG. 8 is various waveform diagrams for explaining the operation of the synchronization signal generation circuit.

FIG. 9 is a drawing showing a recording result of a conventional example.

FIG. 10 is a waveform diagram for explaining the operation of the noise elimination circuit.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Carriage 2 Flexible cable 4 Printer control circuit board 5 Board 7 Counter section 11 Guide shaft body 102, 103 Magnetic detection element 107 Amplifier 108 Synchronous output signal line 501 Linear encoder scale section 109, 114 Divider 115, 118 Addition / reverse operation Counter 124 JK-flip-flop 201, 207 D-flip-flop

Claims (1)

(57) [Claims] 1. A scale of a linear encoder provided on an apparatus main body in a serial printer apparatus which reciprocates on the apparatus main body and performs recording by a recording means while synchronizing with movement of a carriage on which the recording means is mounted. And a detection unit of a linear encoder mounted on the carriage for detecting the position of the scale unit. A signal output from the detection unit is received as an input signal, compared with a reference voltage, and used as a synchronization signal. Synchronizing signal generating circuit means for generating an output signal having a pulse waveform; and a noise removing circuit for removing noise that may enter the synchronizing signal generating circuit means and possibly be included in the output signal. Generating a pulse at the timing of the rising edge and the falling edge of the output signal from the synchronization signal generating circuit means. A pulse generation circuit that, a delay circuit for delaying a pulse from the pulse generating circuit,
The state of the output signal from the synchronizing signal generation circuit means is latched and output at the rise of the delayed pulse from the delay circuit, and the state of the output signal from the synchronization signal generation circuit means at the fall of the pulse. A circuit for latching and outputting.