JP3106589B2 - Load disconnection detector - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a load disconnection detector for detecting a disconnection of a heater, for example, a heater disconnection when a plurality of heaters are connected in parallel in a heater control by a phase control method.

[0002]

2. Description of the Related Art A conventional general heater break detector is shown in FIG.
As shown in FIG. 8, a current flowing through the heater is detected by a CT current detection circuit 82 via a current transformer 81, rectified by a rectification circuit 83, and smoothed by a smoothing circuit 84 to obtain a detection voltage. The comparison circuit 85 compares the reference voltage from the reference set circuit 86 with the detection voltage, and outputs a high or low signal according to the presence or absence of a disconnection from the output circuit 87.

As a heater disconnection detector employing a phase control method, as shown in FIG. 19, a load current is supplied from an AC power supply 91 to a heater 92, and a load voltage detecting transformer 9 is used.
3, a load voltage is detected, rectified by a full-wave rectifier circuit 94, smoothed by a smoothing circuit 95, and used as a reference voltage by a comparison detection circuit 99.
On the other hand, the load current is detected by the load current detection CT 96, rectified by the full-wave rectifier circuit 97, smoothed by the smoothing circuit 98, added to the comparison detection circuit 99, and compared with the reference voltage to detect a heater break. There are things that I try to do.

[0004]

Among the above-described conventional heater disconnection detectors, the former performs ON / OFF of all phases.
Although it functions in the control by the SR and the relay, in the case of the phase control, there is a problem that erroneous detection may be caused because the normal control is performed even when the reference set current is not reached.

[0005] By the way, when heat control of a plant (molding machine, electric furnace, etc.) is performed, the temperature distribution of the whole plant is deteriorated by one heater, and when a disconnection occurs, resin is imposed on a mold of a molding machine or the like due to a sudden accident. There is a problem that the heater is clogged and the like, and it is usual that a plurality of heaters are connected in parallel and used. As described above, the above-described conventional latter is used as a heater disconnection detector in a case where a plurality of heaters are used. Since the voltage of the load is directly detected and used as the reference voltage, the reference voltage is changed in response to the increase or decrease by the phase control of the current, and the disconnection of the plurality of heaters can be detected. However, in the heater disconnection detector in such a conventional phase control method, firstly, the phase delay of the load voltage detecting transformer, the delay of the CT phase, and the waveform distortion due to the CT detection sensitivity have a small phase angle. The error between the reference voltage and the current waveform increases as the phase angle decreases. Therefore, the width of the detectable phase becomes narrow (up to π / 4).

Since the detection sensitivity also changes with the ON phase,
The limit of the rated detection sensitivity becomes close to -30%, and -10% of the market requirement is not satisfied. Due to the above, at the time of the initial setting, it is necessary to set all ON states once and then set, and it is not possible to cope with an application which normally controls in the vicinity of the π / 2 phase (this is the most common).

There is a problem. In other words, this conventional method has a problem that, in practical use, the detection of a plurality of heater disconnections by the phase control can be applied to only a very limited application. Second, a load voltage detection transformer is required separately from the power supply transformer, and there is a problem that space efficiency is poor.

The present invention has been made in view of the above-mentioned problems, and enables detection of disconnection when a plurality of loads (heaters) are connected in parallel and used. It is an object of the present invention to provide a load disconnection detector with improved detection sensitivity and stable detection sensitivity regardless of the phase control angle.

[0009]

A load disconnection detector according to the present invention comprises a load current extractor, a means for deriving an AC of a power supply for supplying power to a load, and a first means for detecting a zero crossing of the AC voltage. A zero-cross detection circuit, a second zero-cross detection circuit that detects a zero-cross of the extracted load current, first and second timing generation circuits that generate a predetermined timing based on the zero-cross, A first peak hold circuit that holds the level of the derived power supply voltage, a second peak hold circuit that holds the level of the load current waveform extracted at the timing,
It comprises a comparison circuit for comparing the outputs of the first peak hold circuit and the second peak hold circuit to determine the presence or absence of a disconnection.

In this load disconnection detector, a zero cross of the AC power supply voltage is detected by a first zero cross detection circuit, and a timing signal is generated by a first timing generation circuit based on the zero cross. A predetermined angle of the AC power supply voltage is cut off, and its peak is held by a first peak hold circuit. On the other hand, the load current also has a zero cross detected by a second zero cross detection circuit, and a second timing signal generation circuit similarly generates a timing signal based on the zero cross 2 and uses the timing signal to determine a predetermined angle of the load current signal. The minute is cut off and the peak is held by a second peak hold circuit.

First, with the load in a normal state, adjustment is made so that the peaks of the AC voltage and the load current signal become equal, and then the AC voltage, that is, the reference voltage is lowered by K% (for example, 10%) and set. By doing so, if there is no load disconnection during the detection operation, the comparison circuit does not output a disconnection detection signal, but if one of the plurality of loads is disconnected and the current drops below K%, the comparison circuit Becomes lower than the reference voltage, and the comparator outputs a disconnection detection signal.

[0012]

The present invention will be described in more detail with reference to the following examples. FIG. 1 is a block diagram showing a schematic configuration of a heater disconnection detector according to an embodiment of the present invention. This heater disconnection detector is connected to the transformer signal input circuit block 1
, A transformer signal timing circuit block 2, a transformer signal peak hold / smoothing circuit 3, a CT signal input circuit block 4, and a CT signal timing circuit block 5.
, A CT signal peak hold / smoothing circuit 6, and a comparison processing circuit block 7.

Although details of these circuits will be described later, the transformer signal input circuit 1 takes a transformer voltage waveform (waveform (a) in FIG. 2) as a transformer signal (reference) from both ends of the secondary side of the power transformer. Put in. The transformer signal timing circuit block 2 detects the zero cross of the transformer signal and, as shown in FIG.
A timing signal is made low by an amount corresponding to the angle preceding by / 8, and the transformer signal is cut by the phase control angle π / 8 according to this timing waveform [waveform (c) in FIG. 2]. Transformer signal peak hold and smoothing circuit 3
Takes the peak of the transformer signal cut out at the π / 8 part and smoothes it (waveform (d) in FIG. 2). Further, the CT signal input circuit 4 takes in the load current waveform from the CT unit as a CT signal [waveform (e) in FIG. 3]. The CT timing circuit block 5 detects the zero-cross point of the CT signal, and uses this as a reference, as shown in FIG.
A timing waveform similar to that of FIG. Then, the CT signal is converted into a phase control angle π / 8 by this timing waveform.
(The waveform (g) in FIG. 3). The CT signal peak hold / smoothing circuit 6 takes the peak of the signal cut out at the portion of π / 8 and smoothes it (waveform (h) in FIG. 3).
The comparison processing circuit block 7 receives the output of the transformer signal peak hold / smoothing circuit 3 and the output of the CT signal peak hold / smoothing circuit 6 so that both levels are the same in the initial set mode with a normal heater. After adjusting to
Switch to the alarm (detection) mode, and lower the reference voltage by a predetermined value (for example, 6%). The timing at which the transformer signal timing circuit block 2 and the CT signal timing circuit block 5 cut off from the zero cross at a phase control angle of π / 8 is that the phase of the load current that is normally performed is π / 8 or less. This is because it can be cut off almost in the ON state. Therefore, if there is a guarantee, the angle of the timing may be equal to or more than π / 8 or less.

In the heater disconnection detector of this embodiment, for example, if the load is ten heaters connected in parallel, if all ten heaters are normal and there is no disconnection,
The level input from the CT signal peak hold / smoothing circuit 6 to the comparison processing circuit block 7 is higher than the reference voltage, and no disconnection detection signal is output. However, if one of the ten wires breaks, the load current becomes 90% of the normal value, so that the level input to the comparison processing circuit block 7 becomes lower than the reference voltage, and
A disconnection detection signal is output.

Next, a specific circuit example of the heater disconnection detector of the above embodiment and its operation will be described. FIG. 4 is a circuit diagram showing a specific circuit of the transformer signal input circuit 1. On the secondary side of the power transformer 11, a diode stack 12
There are connected, is input secondary side A of the power transformer 11, the voltage of B is pressurized to about 1/4 minutes, respectively resistors R ₁ to R ₄ in the OP amplifier 13, 14. OP amplifier 1
The waveforms at the input terminals A ′ and B ′ of the terminals 3 and 14 are
1 is half-wave rectified by the diode stack 12, and becomes as shown in FIG. Since the GND of the circuit is used as a reference, there is a slight offset (eg, 1.72 V). In order to remove the offset at the terminals A ′ and B ′, the difference between these voltage waveforms is obtained by the OP amplifier 15 and is used as a transformer signal (waveform (c) in FIG. 5).

FIG. 6 is a circuit diagram showing a specific circuit of the transformer signal timing circuit block 2. When this circuit is divided into blocks, as shown in FIG. 7, a zero-cross detection circuit 21, a timing signal formation circuit 22, and a waveform processing circuit 23
It is composed of The operation of the circuit block 2 will be described with reference to the waveform diagram shown in FIG. First, a transformer signal input from the transformer input circuit 1 [(a) of FIG. 8]
, The zero cross point is detected by the OP amplifier 24.
FIG. 8B shows a zero cross signal. Next, a timing signal is formed. Detection of disconnection of heater by phase control angle π / 8
In order to make it possible, the timing width t _T = T / 2 × １ ／ (= π / 8) as shown in FIG.
Creates a timing signal that is a period. That is, O
The transistor Tr ₂ is repeatedly turned on / off by the output of the P amplifier 24. When the transistor Tr ₂ is turned on,
The + input terminal of the OP amplifier 25 is connected to the negative power supply voltage V ₋ (= −
6.2V). On the other hand, the transistor Tr
If ₂ is turned off, the + side input terminal of the OP amplifier 25, the positive supply voltage V ₊ (= 7V), the time constant of the CR τ _t (C
→ C ₁ , R → R ₁₂ , R ₁₃ , R ₁₄ ).
Thus, the voltage waveform at the + input terminal of the OP amplifier 25 is
The sawtooth waveform shown in FIG. Also, the OP amplifier 25
The reference voltage _Vref is applied to the-input terminal of the. The reference voltage V _ref is set so that the angle at which the sawtooth wave exceeds V _ref becomes π / 8 in FIG. Sawtooth wave and the reference voltage V _ref is inputted to the OP amplifier 25, whose output has a waveform shown in (d) of FIG. 8, the transistor Tr ₃ becomes only the OFF period of the [pi / 8 from the zero-crossing point, over therebetween, outputs from point E as trans waveform processing signal by cutting a transformer signal from Boryuumu VR ₁ [in FIG. 8 (e)].

FIG. 9 is a circuit diagram showing a specific circuit of the transformer signal peak hold and smoothing circuit 3. Π / 8 output from point E of transformer signal timing circuit block 2
The transformer waveform processing signal [(a) in FIG. 10] cut out by [1] is converted to a direct current by a peak hold circuit including an OP amplifier 31, a diode D ₂ , an OP amplifier 32, etc. [(b) in FIG. R ₁₈ and capacitor C ₃
And a reference signal [(c) in FIG. 10] is created. When the power is turned on, the transistor Tr ₄ receives a signal from a prohibition time circuit block (not shown), and short-circuits the capacitor C ₃ for a certain period of time when the power is turned on to prohibit output, thereby preventing malfunction. doing.

FIG. 11 is a circuit diagram showing a specific circuit of the CT signal input circuit block 4. A signal from a CT (current transformer) 41 is amplified by an OP amplifier 42. Volume VR
Reference numeral ₃ denotes a setting volume for disconnection of a plurality of heaters. FIG. 12 shows a CT signal timing circuit block 5
3 is a circuit diagram showing a specific circuit of FIG. The CT timing circuit block 5 includes a CT signal zero-cross detector 51, a zero-cross signal rising detector 52, and a timing controller 53.

First, the CT signal zero-cross detector 51 amplifies the signal [FIG. 13 (a)] from the point F of the CT signal input circuit block 4 by 40 times by the OP amplifier 54 [FIG. 13 (b)]. ]. This amplified signal and the reference voltage V
_The zero-cross point is detected by comparing _ref with the OP amplifier 55 (FIG. 13C). But,
Here, since 0 V is not used as the comparison reference voltage, the zero cross point is not strictly detected. In addition, OP amplifier 5
5 has hysteresis in the comparison operation. The reason will be described later.

As shown in FIG. 13B, the CT amplified signal is compared with a reference voltage _{Vref other} than 0 V to detect the CT zero-cross signal, so that the CT zero-cross signal depends on the magnitude of the load current and the state of the phase control. Misalignment may occur. In order to reduce this deviation, the OP amplifier 54 performs amplification about 40 times. The zero-cross signal shown in FIG. 13C output from the CT zero-cross detector 51 is input to a CT zero-cross rising detector 52 composed of NAND circuits 56 and 57, and only the zero-cross rising as a reference of the timing signal is detected. FIG. 13
(D), the CT zero cross rising signal shown in FIG.

Here, the hysteresis of the OP amplifier 55 will be described. If the CT amplified signal is shown exactly, FIG.
As shown in (3), noise and distortion due to DC components appear when used in three phases. If a zero cross signal is obtained by performing comparison around 0 V, there is a possibility that the zero cross point may be doubled due to distortion due to the DC component. The hysteresis is provided to prevent chattering due to noise, including noise when used in three phases. Since the noise height due to the three phases is about 1.0 V, the hysteresis width is about 2.5 V.

Next, the operation of the timing signal control section 53 will be described. As shown in FIG. _14E , t _CT = T / 2, as shown in FIG. 14E, in order to enable detection of disconnection of the heater up to the phase control angle π / 8, similarly to the timing signal forming section of the transformer.
It is necessary to create a timing signal that is × 1/8 (= π / 8). For this purpose, first, the RS flip-flop 58
The AND circuit 59 includes a CT zero-cross rising detection section 52.
When a higher signal is input, the transistor Tr ₆ is turned off to output a low signal to the NAND circuit 60. By turning off the transistor Tr _6, the capacitor C ₅ starts charging time constant _{τ CT (C → C 5,} R → R 29, R 30, R 31). On the other hand, the + input terminal voltage of the OP amplifier 61 is the reference voltage V _ref (V _ref ≒ 8.95 V) as in the case of the trans timing signal forming circuit 22. OP amplifier 61
When the _negative side input voltage becomes higher than the reference voltage _Vref , OP
The output voltage [(d) in FIG. 14] of the amplifier 61 becomes high. Therefore, NAND circuit 60 to output a high, transistor Tr ₆ is turned on. The moment the capacitor C ₅ is discharged, the negative power supply _V - is pulled up (= -6.2V). Then, the output of the OP amplifier 61 becomes low again. CT zero cross detection rising signal is set signal,
The output voltage of the OP amplifier 61 becomes a reset signal, and by repeating these, the output of the NAND circuit 59 has a waveform shown in FIG. By the CT timing signal, the transistor Tr ₇ repeats on / off, and the output terminal G outputs a CT signal as shown in FIG.
A waveform processing signal is output.

FIG. 16 is a circuit diagram showing a specific circuit of the CT signal peak hold and smoothing circuit 6. The circuit configuration and operation of the CT signal peak hold / smoothing circuit 6 are the same as those of the transformer signal peak hold / smoothing circuit 3, and therefore detailed description is omitted. FIG. 17 is a circuit diagram showing a specific circuit example of the comparison processing circuit block 7. In FIG. 17, a switch SW is a switch for switching between a set mode and an alarm mode. Switch SW to terminal A20
To the set mode, and to the terminal A22 side to enter the alarm mode.

To set the multiple heater disconnection detection function, the changeover switch SW is set to the set side. Thereby, the transformer waveform smoothed signal and the CT waveform smoothed signal are
The comparison is made by the P amplifier 71. When the output of the CT signal is adjusted by the volume VR ₃ and the CT waveform smoothed signal becomes lower than the transformer waveform smoothed signal, the output of the OP amplifier 71 becomes high, and the output of the AND circuit 75 becomes high if the signal having a phase angle of π / 8 or more is high. If it becomes a high signal, an abnormality detection circuit (not shown)
Only the OPEN and LED are turned on. At this time, the AND circuit 74 is not output by the output of the OP amplifier 73, and the heater disconnection detection signal is not output, that is, the relay output circuit does not operate.

Next, the changeover switch SW to the alarm side, lowering the transformer waveform smoothed signal to a connection point level of the resistor R ₂₀ and R _21. When the CT waveform smoothed signal becomes lower than the connection point level, the output of the OP amplifier 71 is set high, the output of the OP amplifier 73 is also high, and the output of the AND circuit 74 is high. That is, the heater disconnection detection signal becomes high. However, since the output of the OP amplifier 72 is low, the output of the AND circuit 75, that is, the set state detection signal is always low. Note that the resistor R ₄₇ and the capacitor C ₈ are provided to prevent noise malfunction.

[0026]

According to the present invention, a load voltage detecting transformer is not required, so that it is not necessary to connect detection wires to both ends of the load, and the outer shape of the disconnection detector can be reduced. Further, the detection sensitivity becomes substantially constant regardless of the phase control angle. Therefore, initialization can be performed at any phase angle. Further, there is an effect that the disconnection detection sensitivity is improved.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a schematic configuration of a heater disconnection detector according to an embodiment of the present invention.

FIG. 2 is a waveform chart for explaining the overall operation of the heater disconnection detector of the embodiment.

FIG. 3 is a waveform chart for explaining the overall operation of the heater disconnection detector of the embodiment.

FIG. 4 is a diagram showing a specific circuit example of a transformer signal input circuit block of the heater disconnection detector of the embodiment.

FIG. 5 is a waveform chart for explaining the operation of the transformer signal input circuit block.

FIG. 6 is a circuit diagram showing a specific circuit example of a transformer signal timing circuit block of the heater disconnection detector according to the embodiment.

FIG. 7 is a block diagram showing a schematic configuration of the transformer signal timing circuit block.

FIG. 8 is a waveform chart for explaining the operation of the transformer signal timing circuit block.

FIG. 9 is a circuit diagram showing a specific circuit example of a transformer signal peak hold and smoothing circuit of the heater disconnection detector according to the embodiment.

FIG. 10 is a waveform chart for explaining the operation of the transformer signal peak hold and smoothing circuit.

FIG. 11 is a circuit diagram showing a specific circuit example of a CT signal input circuit block of the heater disconnection detector of the embodiment.

FIG. 12 is a circuit diagram showing a specific circuit example of a CT signal timing circuit block of the heater disconnection detector of the embodiment.

FIG. 13 is a waveform chart for explaining the operation of the CT signal timing circuit block.

FIG. 14 is a waveform chart for explaining the operation of the CT signal timing circuit block.

FIG. 15 is a waveform chart for explaining a hysteresis operation of the CT signal timing circuit block.

FIG. 16 is a circuit diagram showing a specific example of a CT signal peak hold / smoothing circuit of the heater disconnection detector of the embodiment.

FIG. 17 is a circuit diagram showing a specific circuit example of a comparison processing circuit block of the heater disconnection detector of the embodiment.

FIG. 18 is a circuit block diagram showing a conventional heater disconnection detector.

FIG. 19 is a circuit block diagram showing another conventional heater disconnection detector.

[Explanation of symbols]

 1 transformer signal input circuit block 2 transformer signal timing circuit block 3 transformer signal peak hold / smoothing circuit 4 CT signal input circuit block 5 CT signal timing circuit block 6 CT signal peak hold / smoothing circuit 7 comparison processing circuit block

Continuation of the front page (56) References JP-A-2-183176 (JP, A) JP-A-2-227980 (JP, A) JP-A-2-51887 (JP, A) JP-A-2-90072 (JP) JP-A-3-53484 (JP, A) JP-A-63-205085 (JP, A) JP-A-2-12787 (JP, A) JP-A-2-134690 (JP, U) (58) Field surveyed (Int. Cl. ⁷ , DB name) H05B 3/00 320 G01R 31/02

Claims (1)

(57) [Claims] 1. A load current extractor, means for deriving an AC voltage of a power supply for supplying power to a load, a first zero-cross detecting circuit for detecting a zero-cross of the AC voltage, and a zero-cross of the extracted load current , A first and second timing generation circuit for generating a predetermined timing based on the zero cross, and a first peak hold for holding a power supply voltage level derived at the timing Circuit, a second peak hold circuit that holds the level of the load current waveform extracted at the timing, and outputs of the first peak hold circuit and the second peak hold circuit are compared to determine whether there is a disconnection. A load disconnection detector comprising a comparison circuit.