JP3103311B2 - RAKE receiver - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a code division multiple access (CDMA) system using direct spread spectrum.
on Multiple Access).

[0002]

2. Description of the Related Art One of the methods for coping with multipath fading in direct spread spectrum communication is path diversity. That is, the delay time of each spatial path is detected from a delay profile in which a pilot symbol is transmitted and the despread signal is converted into a power, and the phase rotation amount of each spatial path is determined from the despread signal based on the delay time. Detecting and extracting the signal components that have passed through each spatial path from the received signal based on the amount of the detected signals and performing in-phase synthesis, this method is called a RAKE receiving method.

FIG. 3 is a block diagram showing a configuration example of a conventional RAKE receiver provided with such a receiving method. A matched filter 301, a delay profile generating circuit 302, memories 303, 305, 306, an effective path detecting circuit 30
4, a phase compensation circuit 307, an in-phase synthesis circuit 308, and a determination circuit 309. Hereinafter, this operation will be described.

[0004] The matched filter generates an impulse response of the received signal based on the correlation between the received signal and the despreading code, and the delay profile generation circuit 302 generates a delay profile by converting the impulse response into power to generate a delay profile. Write to FIG. 4 shows an example of this delay profile, in which the vertical axis represents the power and the horizontal axis represents the delay time, and large peaks appear at the delay times t1, t2, and t3. Each is represented. In addition, such a delay profile is likely to cause an error due to a noise component by only one measurement.
It is also possible to suppress noise components by averaging several recent measurement values and storing the average in the memory 303 again.

[0005] The valid path detection circuit 304 includes a memory 303
, And detects a delay time of a peak exceeding a predetermined threshold value as an effective path position representing a delay time of an effective path contributing to propagation. On the other hand, the memory 305 stores the impulse response output from the matched filter 301 over one symbol, and the effective path position detected by the effective path detection circuit 304 is given to the memory 305 as a timing signal. Is extracted as a demodulated signal corresponding to the path, and written into the memory 306.

As shown in FIG. 5, a received signal periodically includes a pilot signal (Pilot), and the pilot symbol has a predetermined pattern. It is possible to know for each path from the phase of each multipath wave how much the phase of the transmitted pilot symbol vector is rotated during reception. Therefore, when receiving a pilot symbol periodically inserted into the received signal, the phase compensation circuit 307 detects the phase of each multipath wave of the pilot symbol from the demodulated signal stored in the memory 306. Further, the phase rotation amount of each symbol transmitted between the pilot symbol and the next pilot symbol is estimated as an interpolated phase rotation amount obtained by interpolating the phase rotation amounts of pilot symbols before and after the symbol for each multipath wave. can do. Therefore, the phase compensation circuit 307
Compensates the phase rotation amount of the demodulated symbol corresponding to the path based on the estimated value of the phase rotation amount for each effective path, and in-phases the signal of each path and outputs the signal. The in-phase corrected signals of the effective paths are combined by the in-phase combining circuit 308,
In this way, the path diversity reception is performed, so that the fluctuation of the reception power due to the multipath fading can be suppressed and the SNR can be improved.

[0007] The signal of each symbol synthesized is determined by a decision circuit 3
09 and decoded. FIG. 6 shows the above-described in-phase synthesis, where the phase rotation amounts of the three paths are θ1,
When θ2 and θ3 are satisfied, the vector of each symbol is rotated in the opposite direction to obtain an in-phase (phase θ) signal, that is, a state in which phase compensation is performed.

FIG. 7 is a block diagram showing another example of the configuration of the conventional RAKE receiver. The same circuits as those in the conventional configuration of FIG. 3 are denoted by the same reference numerals. The difference is that the searcher 701 and the DLL (Delay
Locked Loop) 703 to 705 and correlator 706
708, etc. are used. In this configuration,
The received signal is input to the searcher 701, and when one symbol is input, the correlation with the despreading code is obtained for one sample. When the next one symbol is input, the correlation with the despreading code shifted by one sample from the previous symbol is obtained for one sample.
This is repeated until an impulse response of one symbol length is generated. When the impulse response is obtained in this way, the effective path position indicating the delay time of each path of the multipath fading is calculated from the delay profile generation circuit 302, the memory 303 and the effective path detection circuit
The detection at 04 is the same as in FIG.

In the case of FIG. 3 described above, since an impulse response is generated by a matched filter,
The delay profile of the symbol length was generated for each symbol. However, in the configuration example of the RAKE receiver shown in FIG. 7, the searcher 7 including one or a plurality of correlators is used.
01 generates an impulse response, so that it takes a long time until a delay profile of one symbol length is completed. Therefore, it is not sufficient to track the phase of the spreading code included in each path only by the delay time output from the effective path determination circuit, and the detected delay time of each path is not synchronized with DLLs 703 to 705. Used only for retraction. That is, DLLs 703 to 705
Are installed independently for each effective path, and after performing synchronization pull-in based on the delay time, perform phase tracking of each multipath wave (synchronization holding). Then, it outputs the synchronized demodulation timing to the correlators 706 to 709, respectively. The correlators 706 to 709 perform demodulation for each reception path based on the demodulation timing, and write the demodulated signal into the memory 306.

Thus, the demodulated signal for each path is stored in the memory 30.
6, the detection of the phase rotation amount of the pilot signal, the estimation of the phase rotation amount of each symbol using the detected value, and the synthesis are performed in the same manner as in the case of FIG. 3, and the SNR of the path diversity reception is obtained. Improvements are made.

[0011]

In the above-mentioned conventional configuration shown in FIG. 3, a matched filter is used for demodulation. However, as the code length of the spread code becomes longer, the number of taps increases. In this case, there is a problem that the power consumption becomes very large because the circuit is always operated.

In the case of the configuration shown in FIG.
It does not require large power consumption as in the case of. However, the DLL is composed of two correlators, and as many DLLs and correlators as the number of radio wave paths are prepared, that is, three correlators are required for one path. Therefore, there is a problem that the circuit scale becomes large.

An object of the present invention is to provide a RAKE receiver having a relatively simple circuit configuration and operating with low power consumption.

[0014]

According to the present invention, in order to achieve the above object, a despreading code is written in each tap,
A matched filter that generates an impulse response by calculating a correlation with the despreading code when receiving a pilot symbol inserted for each signal period, and stops its operation when a symbol other than the pilot symbol is received. A delay profile generation circuit for generating a delay profile from an impulse response generated for the pilot signal; and a delay for providing a maximum point exceeding a predetermined threshold value of the delay profile generated by the circuit. The time is detected as an effective path position giving an effective path at the pilot signal position, and the effective path positions of symbols other than the pilot signal are interpolated from the effective path positions generated for pilot signals before and after the symbol. To estimate as a calculated value And efficiency path detection circuit, provided for each effective path detected, estimated by said effective path detection circuit,
A correlator for demodulating the received signal at the effective path position for each effective path, and detecting the amount of phase rotation from the impulse response of the pilot signal, and determining the amount of phase rotation of the symbols other than the pilot signal, To estimate as a value calculated by interpolation from the phase rotation amounts generated for the pilot signals before and after, and to compensate for the phase of the demodulated symbols of each effective path demodulated by the correlator using the phase rotation amounts detected and estimated in this way. And a synthesizing circuit for synthesizing in-phase the demodulated symbols of the respective effective paths that have been phase-compensated by the phase compensating circuit.

Further, according to the present invention, when a despreading code is written in each tap and a pilot symbol inserted for each signal period is received, a correlation with the despreading code is obtained to generate an impulse response. When receiving a symbol other than a pilot symbol, a matched filter that stops its operation, and a delay profile generation circuit for generating a delay profile from an impulse response generated for the pilot signal,
A delay time that gives a maximum point exceeding a predetermined threshold value of the delay profile generated by the circuit is detected as an effective path position that provides an effective path at the pilot signal position, and a symbol other than the pilot signal is detected. An effective path detection circuit for estimating an effective path position as a value calculated by interpolation from an effective path position generated for pilot signals before and after the symbol;
A correlator for demodulating a received signal at a valid path position for each valid path detected and estimated by the valid path detection circuit in a time division manner for each valid path, and an impulse of the pilot signal While detecting the phase rotation amount from the response, the phase rotation amount of the symbols other than the pilot signal is estimated as a value calculated by interpolation from the phase rotation amounts generated for the pilot signals before and after the symbol, and thus estimated. A phase compensation circuit for compensating for the phase of each effective path demodulated symbol demodulated by the correlator based on the detected / estimated phase rotation amount, and for in-phase combining the demodulated symbols of each effective path phase compensated by the circuit; And a synthesizing circuit.

[0016]

Embodiments of the present invention will be described below. FIG. 1 is a block diagram showing a configuration example of a RAKE receiver according to the present invention. The matched filter 101, a delay profile generation circuit 102, memories 103, 105,
9, effective path detection circuit 104, correlators 106 to 10
8, a phase compensation circuit 110, an in-phase synthesis circuit 111, and a determination circuit 112.

In FIG. 1, although not shown, a signal PL indicating the pilot symbol position detected from the digital signal obtained by the determination circuit 112 is supplied to the matched filter 1.
01. The matched filter 101 operates only when the signal PL is given, that is, only when the pilot signal is received, and obtains the correlation between the despreading code written in each tap and the received signal to obtain the pilot signal. Generates an impulse response of the signal and stops operation when receiving other symbols. The delay profile generation circuit 102 generates a delay profile from the impulse response obtained by the matched
Write to 3.

The effective path detecting circuit 104 is provided in the memory 103
The delay time of each effective path, that is, the effective path position, is obtained from the delay profile stored in the same manner as in the prior art. However, since the matched filter 101 outputs only the impulse response of the pilot signal in this configuration, the effective path The detection circuit 104 can directly detect only the effective path position at the time of receiving the pilot signal. Therefore, the effective path detection circuit 104 estimates the effective path position at the time of a symbol other than the pilot signal by interpolation from the effective path positions of two pilot signals sandwiching the symbol. As the interpolation method, for example, as shown in FIG. 5, one slot contains one pilot signal and N-1 symbols, and the delay of the path i obtained from the pilot signal of one slot is considered. The time is tij, and the delay time of path i obtained from the pilot signal of the next slot is tij.
When +1 is set, the delay time Sijk of the path i of the symbol k is

Sijk = ｛(N−k−1) · (tij) + (k) · (tij
+1)｝ / (N−1), 1 ≦ k ≦ N−1. Here, the subscript i is the path number, and j is the slot number. Delay time Sijk obtained by this estimation
Is used as the delay time (effective path position) of the path i in the symbol k of the next slot j + 1.

On the other hand, the received signal is stored in the memory 105 as it is. The correlators 106 to 108 are provided for each path of the multipath, and when the time corresponding to the effective path position detected and estimated one slot before by the effective path detection circuit 104 is given as timing information, the correlator 106 to 108 The received signal is read from the memory 105, subjected to despreading processing, and outputs a demodulated signal corresponding to the path. The demodulated signal corresponding to each path is written to the memory 109, and thereafter, the phase compensation amount is detected and estimated by the phase compensation circuit 110, the phase compensation is performed on the demodulated signal of each path based on the detection and estimation, and the phase compensation is performed. Path diversity combining is performed by combining the demodulated signals in the in-phase combining circuit 111.

According to the configuration of FIG. 1 described above, the matched filter 101 operates only when receiving a pilot signal and stops operating when receiving another symbol.
As in the conventional example of FIG. 3, large power is no longer consumed. For example, in the case of 1 slot N symbols as shown in FIG. 5, the power consumption of the matched filter is 1/1 of FIG.
N. Further, since the delay profile of the pilot signal is obtained from the output of the matched filter, the calculation can be performed immediately, and it is not necessary to provide a DLL for each path as in the conventional example of FIG. . on the other hand,
Both the delay profile and the amount of phase rotation of symbols other than the pilot signal are estimated by interpolation and used for demodulation / combining in the next slot. In general, fluctuations in multipath fading occur during one slot period of a signal. Since the slot period is given so as to be sufficiently slow, almost accurate demodulation can be performed as described above.

FIG. 2 is a block diagram showing another example of the configuration of the RAKE receiver according to the present invention. The configuration example is different from the case of FIG. 1 in that a correlator is provided for each effective path in FIG. 1, but this is used as one correlator 201, and the signal of each path is The demodulation is performed in a time-division manner, and the other configuration is the same. According to this configuration, the power consumption can be reduced as in the case of FIG. 1, and the circuit configuration can be further simplified by using one demodulator correlator.

In the above description, the interpolation of the effective path position in the effective path detection circuit 104 uses the linear interpolation as shown in (Equation 1). Zero-order or quadratic interpolation or extrapolation may be used.

Further, as described with reference to FIG. 5, it has been described that only one pilot signal having a known waveform is transmitted in one slot, but only one pilot signal has a delay profile or phase rotation due to noise or the like. Sometimes the amount cannot be detected accurately. In such a case, two or more pilot signals are successively inserted into one slot, and noise is suppressed by averaging the delay profile and the amount of phase rotation obtained from these pilot signals, thereby achieving more accurate Detection is possible.

[0024]

According to the present invention, the power consumption of the matched filter can be greatly reduced, and only one correlator for signal demodulation is required for each effective path.
This has the effect of reducing the circuit scale.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration example of a RAKE receiver according to the present invention.

FIG. 2 is a block diagram showing another configuration example of the RAKE receiver according to the present invention.

FIG. 3 is a block diagram illustrating a configuration example of a conventional RAKE receiver.

FIG. 4 is a diagram illustrating an example of a delay profile.

FIG. 5 is an explanatory diagram of a format of a transmission signal.

FIG. 6 is an explanatory diagram of phase compensation in each path.

FIG. 7 is a block diagram illustrating another configuration example of a conventional RAKE receiver.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 101 Matched filter 102 Delay profile generation circuit 103, 105, 109 Memory 104 Effective path detection circuit 106-108, 201 Correlator 110 Phase compensation circuit 111 In-phase synthesis circuit 112 Judgment circuit

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-10-32523 (JP, A) JP-A-10-56442 (JP, A) JP-A-9-46174 (JP, A) JP-A 9-46 321667 (JP, A) (58) Field surveyed (Int. Cl. ⁷ , DB name) H04B 1/69-1/713 H04J 13/00-13/06 H04L 7/00

Claims (2)

(57) [Claims] 1. A despreading code is written to each tap,
A matched filter that generates an impulse response by calculating a correlation with the despreading code when receiving a pilot symbol inserted for each signal period, and stops its operation when a symbol other than the pilot symbol is received. A delay profile generation circuit for generating a delay profile from an impulse response generated with respect to the pilot signal; and a delay that provides a maximum point exceeding a predetermined threshold value of the delay profile generated by the circuit. The time is detected as an effective path position giving an effective path at the pilot signal position, and the effective path positions of symbols other than the pilot signal are interpolated from the effective path positions generated for pilot signals before and after the symbol. To estimate as a calculated value An effective path detection circuit, a correlator provided for each effective path detected and estimated by the effective path detection circuit, for demodulating a received signal at an effective path position for each effective path, and an impulse response of the pilot signal , And the phase rotation amount of a symbol other than the pilot signal is estimated as a value calculated by interpolation from the phase rotation amounts generated for pilot signals before and after the symbol, and thus detected. A phase compensation circuit for compensating the phase of each effective path demodulated symbol demodulated by the correlator based on the estimated amount of phase rotation, and for in-phase combining the demodulated symbols of each effective path phase compensated by the circuit; A RAKE receiver, comprising: a synthesis circuit. 2. A despreading code is written to each tap,
A matched filter that generates an impulse response by calculating a correlation with the despreading code when receiving a pilot symbol inserted for each signal period, and stops its operation when a symbol other than the pilot symbol is received. A delay profile generation circuit for generating a delay profile from an impulse response generated with respect to the pilot signal; and a delay that provides a maximum point exceeding a predetermined threshold value of the delay profile generated by the circuit. While detecting time as an effective path position that gives an effective path at the pilot signal position, the effective path positions of symbols other than the pilot signal are calculated from the effective path positions generated for pilot signals before and after the symbol. To estimate as a value calculated by interpolation An effective path detection circuit, and one correlator for executing a time-division demodulation of a received signal at an effective path position for each effective path detected and estimated by the effective path detection circuit for each effective path. While detecting the amount of phase rotation from the impulse response of the pilot signal, the amount of phase rotation of symbols other than the pilot signal was calculated by interpolation from the amount of phase rotation generated for pilot signals before and after the symbol. A phase compensation circuit for compensating the phase of the demodulated symbol of each effective path demodulated by the correlator based on the amount of phase rotation estimated and detected as described above, and demodulation of each effective path phase compensated by the circuit. A RAKE receiver, comprising: a combining circuit for performing in-phase combining of symbols.