JP3147360B2 - Polysilicon film forming method - Google Patents

Description

The present invention relates to a method for forming a polysilicon film used as a semiconductor film of a thin film transistor or the like.

[Prior Art] A thin film transistor is an active device in which a gate electrode is formed on an insulating substrate, a semiconductor layer such as polysilicon is formed thereon via an insulating layer, and a channel region is formed in the semiconductor layer. A region and a low-resistance source region and a drain region are formed, respectively, to constitute an FET (field effect transistor).

In such a thin film transistor, since the electrical characteristics of the active region of the thin film semiconductor layer affect the characteristics of the thin film transistor, it is possible to obtain a semiconductor layer having good characteristics.
It is important for improving the performance of the thin film transistor.

Therefore, conventionally, various formation methods have been considered in order to form a semiconductor layer having good characteristics.

However, in general, the substrate used for the thin film transistor is
Because it uses a material with a relatively low melting point, such as glass,
The formation method has limitations in terms of conditions, such as limitations in temperature.

As a method of forming a semiconductor layer in a low-temperature process,
When a polysilicon film is directly formed by a CVD method (Chemical Vapor Deposition), polysilicon having a small crystal grain size is formed, and electrical characteristics, particularly, effective mobility and threshold voltage are not sufficient.

Therefore, a method has been devised in which amorphous silicon is formed on a substrate and grain growth is performed centering on microcrystal nuclei of silicon present in the amorphous silicon, thereby obtaining a polysilicon film. However, even in this case, although the grain diameter is slightly larger than that of the above-described method, it is still insufficient.

Further, as a method for solving this defect, there is a method in which silicon ions are implanted into the entire surface of the amorphous silicon layer immediately after deposition, and then crystallization is performed by furnace annealing.

This method will be described with reference to FIG. FIG. 6 is a view showing a conventional method of forming a polysilicon film.

FIG. 6 (a) shows a state immediately after the deposition of the amorphous silicon layer on the substrate. In the figure, (4) shows a silicon nucleus existing at the interface between the substrate and the amorphous silicon layer (2). 4) is shown. The nucleus (4) is considered to be fine crystal grains of silicon having a diameter of about several tens of degrees.

Silicon ions (7) are implanted into this amorphous silicon layer to make these nuclei amorphous, thereby reducing the nucleus density near the interface between the amorphous silicon layer and the substrate (FIG. 6 ( b)).

Next, the entire substrate was annealed in a furnace at 600 ° C. for 500 hours to grow grains around these nuclei, thereby obtaining a polysilicon film (9) having a large grain diameter (No. 6). Figure (c).

[Problems to be Solved by the Invention] In the method, silicon ions are implanted into the entire surface of the amorphous silicon layer on the substrate to reduce the nucleus density to some extent, thereby increasing the distance to adjacent nuclei. This is to obtain a polysilicon film having a large grain size.

Therefore, when the nucleus density near the interface between the amorphous silicon layer and the substrate is reduced, it takes a long time to grow the grains in order to obtain large grains in the subsequent annealing step. .

If the nuclear density is not so low, the grain growth time is shorter than the former, but there is a disadvantage that the grain size becomes smaller.

 This is shown in FIG.

FIG. 4 shows how the polysilicon grows with respect to the annealing time.

That is, the horizontal axis indicates the annealing time, and the vertical axis indicates the relationship with the X-ray diffraction intensity indicating the growth of polysilicon.

Curve D in FIG. 4 shows the case where annealing is performed without implanting silicon ions. In this case, since the nucleus density is relatively high, grain growth starts simultaneously with annealing.
However, since the distance between each silicon microcrystal nucleus is relatively short, even if the grain grows, it immediately collides with the adjacent grain. Therefore, grain growth stopped immediately, and as a result, large grains could not be obtained.

Further, in the method in which silicon ions are implanted into the entire surface, as shown by the curve E in FIG. 4, since the nucleus density is relatively low, the polysilicon grains start growing for a certain period of time (point G in FIG. 4). Is shown).

After that, it took a long time, approximately 50 hours, for the polysilicon grain growth to begin for the first time.

It is an object of the present invention to solve such a conventional problem, to provide a method for reducing a crystallization time and forming a polysilicon film having a large grain size.

Another object is to obtain a thin film transistor having good electric characteristics using the semiconductor film.

[Means for Solving the Problems] The present invention relates to a step of depositing an amorphous silicon film on a substrate, and a method of forming an amorphous silicon film on an interface between the amorphous silicon film and the substrate on which the amorphous silicon film is formed. Silicon ions are accelerated so as to reduce the number of nuclei formed of silicon microcrystal grains, and a portion where the silicon ions are implanted on the amorphous silicon film and a portion where the silicon ions are not implanted are formed. A silicon ion implantation step of dividing and implanting silicon ions into the amorphous silicon film; and a heat treatment step of performing a heat treatment step after the silicon ion implantation step. Can be performed based on the ion implantation preventing film provided on the amorphous silicon film for blocking the passage of silicon ions, and the presence or absence of ion irradiation.

In short, the number of nuclei composed of silicon microcrystal grains existing at the interface between the amorphous silicon film deposited on the substrate and the substrate when silicon ions are implanted into the amorphous silicon film before the thermal process The silicon ions are accelerated so as to reduce the density, and the silicon ions are implanted only into a specific portion of the amorphous silicon film.

Means for defining this specific portion include an ion implantation preventing film that does not allow silicon ions to pass through, such as an inorganic film and an organic film provided on amorphous silicon, and a method of controlling the implantation region with the ion implantation apparatus itself. Applicable.

As the former ion implantation prevention film, any material can be used as long as it does not allow silicon ions to pass through.
There are O ₂ , SiN, SiO _x N _y , PSG, BPSG, BSG and the like, and examples of the organic film include polyimide, photosensitive resist and the like.

The inorganic film and the organic film are etched away except for the implantation region portion, and the implantation region portion is exposed to the amorphous silicon film surface, and silicon ions are implanted into the entire surface. Partial ion implantation is enabled.

Further, as a means for partially performing ion implantation depending on the presence or absence of ion irradiation, a general method can be applied, such as a method using an ion implantation apparatus.

As a typical example, there is a focused ion beam (FIB) method in which the irradiation of the ion beam is controlled to partially perform the irradiation. F
The ion beam can be scanned by the IB method to implant only a region that requires implantation without a mask such as an ion implantation prevention film.

In the heating step, any method may be used as long as it heats the entire substrate having amorphous silicon formed on its surface, and the heating can be performed using furnace annealing (heater heating), lamp annealing, laser annealing, or the like.

[Operation] According to the present invention, in order to implant silicon ions into an amorphous silicon film, an ion implantation prevention film is provided and ion beam irradiation is controlled so that ion implantation can be performed except for a specific portion. By doing so, it is possible to prevent the number of nuclei existing at the interface between the amorphous silicon film and the substrate from being extremely reduced, and to control the number of nuclei.

That is, it is possible to increase the nucleus density of silicon in a portion where ion implantation has not been performed and to lower the nucleus density of a portion where ion implantation has been performed.

Although the grains of polysilicon grow in two directions, a film thickness direction and a direction parallel to the film, the growth speed in the film thickness direction is higher than the growth speed in the direction parallel to the film.

As a result, since the silicon nucleus density is high in the portion where the ion implantation has not been performed, the distance between adjacent silicon nuclei is short. From this, the time required for the grain to grow and hit the adjacent grain to stop the growth is shorter than that in the portion where the ion implantation is not performed.

Therefore, polysilicon having a relatively small grain size is formed in a portion where the ion implantation is not performed.

On the other hand, in the ion-implanted portion, the grain growth is extremely slow because of few silicon nuclei, and the grain growth in the non-ion-implanted portion before the first nucleus in this region grows to the grain. Is completed, and the grains in the non-ion-implanted portion are grown in the direction parallel to the film centered on the grain, and this growth is performed until the grain that has grown from the region provided with the adjacent ion-implantation prevention film is met. grow up.

Therefore, it is possible to control the size of the grains by increasing the interval between the regions provided with the adjacent ion implantation preventing films to some extent.

As described above, the growth of the grains of the present invention can be shortened, which is started at the same time when the heat treatment is started.

[Embodiment] A first embodiment of the present invention will be described below with reference to FIGS.
This will be described with reference to the drawings.

An amorphous silicon film (2) is deposited on the quartz substrate (1) of FIG.
Next, as shown in FIG.
An SiO ₂ (3) film, which is an inorganic film, is deposited at a thickness of 1000 、, and the SiO ₂ (3) film is removed from the ion-implanted region (5) where ion implantation is to be performed by photolithography and etching. It is prescribed (FIG. 1 (c)).

In the present embodiment, the non-ion-implanted region (6) is taken as an example and is defined as a rectangle of 1 μm × 1 μm (FIG. 2), and the interval between the non-ion-implanted regions (6) is 5 μm. But,
The size, interval, and shape of the non-ion-implanted region (6) may be other than these, and are not particularly limited. Needless to say, they can be freely changed according to the purpose.

Next, as shown in FIG. 1 (d), Si ions (7)
Is implanted into the entire surface, so that Si ions are implanted in the ion-implanted region (5) and in the non-ion-implanted region (6).
Since there is a SiO ₂ film, ions are not implanted, and nuclei (4) which are largely present near the boundary between the amorphous silicon film and the substrate
Is not lost.

Therefore, the growth from the nucleus to the grains proceeds faster in the ion-implanted region (5) where many nuclei are present than in the non-ion-implanted region (6).

After Si ion implantation, annealing was performed in a nitrogen atmosphere at 600 ° C. for 30 hours (FIG. 1E).
(F)).

As a result, first, nuclei grow to grains in the non-ion-implanted region (6) having a high nucleus density.

At this time, since the growth of the grains in the film thickness direction is larger than the growth rate in the horizontal direction, the growth first proceeds and completes in the film thickness direction of the non-ion-implanted region (6) (8). After that, the growth progresses in the lateral direction, that is, between the different non-ion-implanted regions (6), and the growth continues until the grains grown in the different ion-implanted regions (5) collide with each other. Then, the growth stops (FIG. 1 (f)).

In this way, by forming a place where the growth of the grain is likely to occur and a place where the growth is less likely to occur, the polysilicon film (9) having a relatively large grain can be formed in a short time.

FIG. 5 shows this relationship, and FIG. 5 curve F shows the first embodiment, and FIG. 5 curve E shows the same conventional grain growth as FIG. 4 curve E. .

That is, in the first embodiment, as described above, the growth of grains started simultaneously with annealing, and it took about 30 hours until the growth of large grains was completed. This is about the conventional
The time was 2/3, indicating that the annealing time was significantly reduced.

Next, as a second embodiment, a case where silicon ion implantation is performed using the FIB method will be described with reference to FIG.

FIG. 7 shows a schematic configuration of the ion implantation apparatus.

First, from the gas supply source (20) to the ion source (21),
Ionized SiH ₄ or SiF ₄ gas (Si ⁺ , SiH ⁺ , S
iH ₂ ⁺ , SiH ₃ ⁺ , ...). The ion plasma generated in the ion source (21) is separated into a mass separator (22) by a diffusion pump incorporated in the ion source (21).
To separate only the necessary silicon ions ( ²⁸ Si ⁺ )
The ion accelerator (24) accelerates to increase the energy of the ions to the energy level required for ion implantation.

The accelerated ions are X-deflecting plate (25), Y-deflecting plate (26)
The presence or absence of implantation into the amorphous silicon film formed on the substrate (27) and the position of the implantation are determined.

That is, by controlling the X-deflecting plate (25) and the Y-deflecting plate (26), it is possible to determine a portion to be ion-implanted and a portion not to be ion-implanted. Become.

The ion implantation conditions at this time are 100 KeV, 2 × 10 ¹⁵ cm
^-2 .

Further, as a third embodiment, a method of manufacturing a thin film transistor using the method of the first embodiment of the present invention will be described with reference to FIG.

An amorphous silicon film (2) is deposited on a quartz substrate (1) by using a low pressure CVD method at 1000Å. Thereafter, a SiO ₂ film (3) is deposited at a thickness of 1000 ° by a similar low pressure CVD method (FIG. 3 (a)), and photolithography and etching are performed.
The non-ion-implanted area is 1 μm × 1 μm square, 5 μm
It was formed at m intervals. (FIG. 3 (c)) and then silicon +
By ion implantation, silicon ions are implanted into the ion implantation region (5). The injection conditions were 100 KeV, 2 × 10 ¹⁵ cm ⁻² . In the ion implantation, as shown in FIG. 7, the gas of SiH ₄ or SiF ₄ is ionized, and only the silicon ions ( ²⁸ Si ⁺ ) are taken out by the mass separator (22).
Accelerate with an ion accelerating (24) device, and perform XY scanning (25) (2
6) While injecting into the sample.

After that, the SiO ₂ film on the non-ion implanted region (6) is coated with 35C,
After removal by etching with 6% BHF (buffered hydrofluoric acid) for 1 minute. Furnace annealing was performed in a nitrogen atmosphere at 600 ° C. for 30 hours (FIG. 3D).

As a result of this annealing, silicon nuclei in the non-ion-implanted region (6) grow in the direction of arrow A. When growth in the film thickness direction is completed in advance, growth proceeds in the direction of arrow B. As a result, a large grain polysilicon film (9) can be formed in the ion-implanted region as shown in FIG. 3 (d).

Next, after the polysilicon film is patterned into an island shape so as to remove the portion other than the portion (C) where the thin film transistor is to be formed (FIG. 3E), the SiO ₂ film (10) 1 is formed by a low pressure CVD method.
Then, 3,000 ポ リ of a polysilicon film (11) was deposited by a low pressure CVD method.

Thereafter, high-concentration doping was performed by implanting P ⁺ ions under the conditions of 120 KeV and 4 × 10 ¹⁵ cm ⁻² (FIG. 3 (g)).

And by photolithography and etching,
Pattern the polysilicon gate (12),
Using the polysilicon gate as a mask, P ⁺ ions are 110 KeV,
After ion implantation under the conditions of 2 × 10 ¹⁵ cm ^-2, the dopant is activated by annealing at 600 C for 40 hours.
Source (13) and drain (14) portions were formed (FIG. 3 (h)).

Next, after depositing a SiO ₂ film (16) as a passivation film by 8000 mm by a low pressure CVD method, a contact hole is opened on the source (13) and drain (14) regions to form an Al electrode (15). Then, the thin film transistor of FIG. 3 (i) was formed.

In this embodiment, since a thin film transistor is formed using a polysilicon film having a large grain as a semiconductor of an active layer, it is possible to obtain a thin film transistor having a large electrical characteristic, that is, a large on-current and a low threshold voltage. Was.

In the third embodiment, the structure of the thin film transistor is shown as a planar type, but is not limited thereto.
Similarly, for an inverted staggered type in which a gate is formed on a substrate surface, a thin film transistor can be formed by a low-temperature process.

[Effects of the Invention] The present invention selectively determines a region in which silicon ions are to be implanted, and determines the number of nuclei composed of silicon microcrystal grains present at the interface between the amorphous silicon film deposited on the substrate and the substrate. Since the ion implantation is performed after accelerating the silicon ions so as to reduce the ion concentration, the portion where the silicon nucleus density is high where the ion implantation is not performed, that is, the portion where the growth rate is fast is set as the center of the grain growth and the ion implantation is performed. Since the area where the silicon nucleus density is low is used as a region for large grain growth, the annealing time for forming polysilicon is greatly reduced compared to the conventional polysilicon film, and the size of the grain is also increased over a long time. The same size as the annealed one was obtained.

In terms of the performance of the thin film transistor using the polysilicon film of the present invention, a thin film transistor having high on-current and low threshold voltage and good electric characteristics was obtained as an electric characteristic.

[Brief description of the drawings]

FIGS. 1 to 3 show an embodiment of the present invention, and FIGS. 1 (a) to 1 (f) show Si in the first embodiment.
FIG. 2 is an explanatory view of an ion implantation step, FIG. 2 is a perspective view of the ion implantation prevention film according to the present invention as viewed from above the substrate, and FIGS.
(I) is an explanatory view of a thin film transistor manufacturing process in the second embodiment, and FIG.
FIG. 5 is a graph showing the relationship between the X-ray diffraction intensity showing the degree of polysilicon growth and FIG. 5 shows a comparison between the prior art and the present invention. FIGS. 6 (a) to 6 (c) are diagrams showing the relationship between X-ray diffraction intensities, and FIGS.
FIG. 7 is a schematic explanatory view of the ion implantation apparatus used in the embodiment of the present invention. (1) Substrate (2) Amorphous silicon film (3) Si ion implantation prevention film (4) Nucleus

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Claims (1)

(57) [Claims] A step of depositing an amorphous silicon film on a substrate; and a nucleus comprising silicon microcrystal grains present at an interface between the amorphous silicon film and the substrate on which the amorphous silicon film is formed. Silicon ions are accelerated to reduce the number of silicon ions, and a portion where the silicon ions are implanted on the amorphous silicon film and a portion where the silicon ions are not implanted are separated from each other. 1. A method for forming a polysilicon film, comprising: a silicon ion implantation step of implanting silicon ions into a silicon substrate; and a heat treatment step of performing a heat treatment step after the silicon ion implantation step.