JP3141698B2 - Driving method of image sensor - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image sensor used for an image scanner, a facsimile, and the like, and more particularly, to a method for driving an image sensor to obtain a stable and accurate image signal.

[0002]

2. Description of the Related Art Conventionally, as this type of image sensor, there is a contact type image sensor which projects image information of a document or the like one-to-one and converts it into an electric signal. This image sensor divides an image into a large number of pixels (light receiving elements), and temporarily stores the charge generated in each light receiving element in the capacity between wirings in a specific block unit using a thin film transistor switching element (TFT). There is a so-called TFT-driven image sensor that sequentially reads out an electric signal in a time-series manner at a speed of several hundred KHz to several hundred MHz (for example, see Japanese Patent Application Laid-Open No. 2-265362). As described above, when a TFT is used, reading can be performed with a single driving IC, and there is an advantage that the number of driving ICs for driving an image sensor can be reduced,
In this type of image sensor, a TFT drive type is often used.

FIG. 8 shows an example of an equivalent circuit of such a TFT drive type image sensor. Hereinafter, this image sensor will be described with reference to FIG. This image sensor has a light-receiving element array 11 in which a plurality of light-receiving elements 11 ″ are arranged in a line at substantially the same length as the document width.
And a plurality of first light-receiving elements 11 "corresponding to each light-receiving element 11".
Of thin film transistors TTi, j (i = 1 to N, J = 1 to n) and a plurality of second thin film transistors TRi, j (i = 1 to N, J = 1 to 1) corresponding to each light receiving element 11 ″ one-to-one. n) and a matrix-shaped multilayer wiring group 13.

Here, the first thin film transistor TTi, j
Is for charge transfer, and the second thin film transistor T
Ri, j is for resetting the electric charge remaining in the light receiving element 11 ″.
The n light-receiving elements 11 ″ divided into light-receiving element groups 11 ′ of one block and forming one light-receiving element group 11 ′ are photodiodes Pi, j (i = 1 to N, J = 1 to n). The respective light receiving elements 11 ″ can be equivalently expressed by
Each of the first thin film transistors TTi, j is connected to a drain electrode of the first thin film transistor TTi, j.
They are also connected to the drain electrodes i and j, respectively.

The source electrode of the second thin-film transistor TRi, j is grounded, and the source electrode of the first thin-film transistor TTi, j is connected to the n-th light-receiving element via a multi-layer wiring group 13 connected in a matrix. Book common signal line 1
4 and the common signal line 14 is connected to the driving I
It is connected to C15. On the other hand, the gate electrode of each of the first thin film transistors TTi, j and the gate electrode of the second thin film transistor TRi, j are connected to the gate pulse generation circuit 16 so as to conduct for each block.

[0006] The photocharge generated in each light receiving element 11 "is accumulated for a certain period of time in the parasitic capacitance of the light receiving element and the overlap capacitance between the drain and gate of the first thin film transistor TTi, j. The thin-film transistor TTi, j is used as a charge transfer switch to sequentially transfer and store the wiring capacitance CLi (i = 1 to n) of the multilayer wiring group 13 for each block. First, a gate pulse .PHI.GT1 is transmitted from 16 via a gate line GTi (i = 1 to n) to turn on the first thin film transistors TT1,1-1 to1, n in the first block, and to turn on the first block. The charge generated in each light receiving element 11 ″ is transferred and accumulated in each wiring capacitance CLi. And each wiring capacitance C
The potential of each common signal line 14 changes due to the charge accumulated in Li, and an analog switch (not shown) in the driving IC 15 is sequentially turned on to output the preceding potential to the output line 17 in time series. It has become.

Further, a gate pulse .PHI.G is supplied via a gate line GRi (i = 1 to n) from the gate pulse generating circuit 16.
R1 is transmitted, and the second thin film transistors TR1,1 to TR1, n in the first block are turned on, and the untransferred charges remaining in the parasitic capacitance of each light receiving element and the overlap capacitance between the drain and the gate of the thin film transistor ( Reset).

Then, the gate pulses ΦGT2 to ΦGTn
As a result, the first thin film transistors TT2,1 to 2, n to TTN, 1 to TTN, n of the second to Nth blocks are respectively turned on, and the charge on the light receiving element side is transferred for each block, and the gate pulse ΦGR2 By ΦGRn, the second thin film transistors TR2,1 to TR2, n to TRN, 1 to TRN, n are
Each is turned on, and the residual charge on the light receiving element side is reset for each block. Further, the potential changed by the electric charge transferred to the common signal line 14 is sequentially read out by the driving IC 15, so that an image signal of one line in the main scanning direction of the original is obtained, and original feeding means such as a roller (FIG. (Not shown) to move the original and repeat the above operation,
An image signal of the entire document is obtained.

FIG. 9 is a timing chart of the main part of the image sensor having the above-described configuration, and the waveforms and timings of the main part will be described with reference to FIG. The drain potential of the first thin film transistor TT gradually rises during the accumulation of photocharges in a so-called dark state, while it largely increases in the accumulation of photocharges in a so-called bright state as compared to the dark state (see FIG. 9C). ,
When the first thin film transistor TT is turned on by the application of the gate pulse ΦGT (see FIG. 9A), the first thin film transistor TT sharply rises by a so-called feed-through voltage (FIG. 9).
(C)).

Then, by transferring charges from the drain electrode side so as to be in a state parallel to the potential of the source electrode of the first thin film transistor TT, the drain potential is lowered and the first thin film transistor TT is turned off. Then, the voltage drops sharply by the feedthrough voltage (see FIG. 9C). At this time, the potential appearing on the drain electrode side of the first thin film transistor TT is caused by residual charges. Subsequently, when the second thin film transistor TR is turned on by application of the gate pulse ΦGR, the drain potential of the first thin film transistor TT sharply rises again by the feedthrough voltage (see FIG. 9C), When the charge is transferred to the source potential of the thin film transistor TR, that is, VR, the potential drops, and when the second thin film transistor TR is turned off, the potential drops sharply by the feedthrough voltage (FIG. 9C )reference).
Then, the drain potential of the first thin film transistor TT at this time becomes the potential at the start of new photocharge accumulation.

On the other hand, the potential change at the source electrode of the first thin film transistor TT is constant during the accumulation of photocharge (see FIG. 9D), and the first thin film transistor TT is turned on by the application of the gate pulse ΦGT. When it is turned on, it rises sharply by the feedthrough voltage (see FIG. 9D). Then, charges are transferred to the source electrode side so as to be in parallel with the drain potential at this time, and the source potential rises, and when the first thin film transistor TT is turned off, it falls sharply by the feedthrough voltage. (See FIG. 9D). The source potential at this time reflects the amount of transferred charges, and the driving circuit 15 detects this potential.

Thereafter, M (not shown) in the driving IC 15
When the OS transistor is turned on, the source potential of the first thin film transistor TT sharply drops by the feed-through voltage, and as a result of resetting the charge, the potential V
It becomes an IC (see FIG. 9D). And the driving IC 15
When the MOS transistor (not shown) is turned off, the source potential of the first thin film transistor TT sharply rises by the feedthrough voltage. The potential at this time is a reference potential, and as a result of detection by the driving IC 15, a difference from the potential detected by the driving IC 15 when the first thin-film transistor TT is turned off first. This is output as a final sensor output.

By the way, the offset output V0 of the image sensor having such a configuration is as follows: V0 = (CP / (CP + CL)). Times. (Vf1-Vf2-Vf3-V)
f4 + VR-VIC). CP is a parasitic capacitance of the light receiving element, and CL is a wiring capacitance. Here, Vf1 is a feedthrough voltage on the drain side of the first thin film transistor TT (FIG. 9).
(C), Vf2 is a feedthrough voltage on the drain side of the second thin film transistor TR (see FIG. 9C), and Vf3 is a feedthrough voltage on the source side of the first thin film transistor TR (see FIG. 9D). , Vf4 are feedthrough voltages (see FIG. 9D) on the source side of the first thin film transistor by a MOS transistor (not shown) in the driving IC 15. Here, from the relationship between the capacitance values, the relationship that Vf1, Vf2> Vf3, and Vf3 is sufficiently larger than Vf4 holds, and Vf1, Vf2, Vf
Only f3 needs to be considered.

In order to obtain a multi-tone output in an image sensor, it is necessary to reduce the offset voltage V0. Considering the above equation, the offset voltage V
It can be understood that the value of each feedthrough voltage and the values of the voltages VR and VIC may be adjusted to reduce 0. When adjusting the values of the voltages VR and VIC, a high-precision voltage source is required, and it is desirable to use it as a ground (GND) potential. From the above equations, adjust the values of the voltages VR and VIC.
To reduce the offset voltage V0
Are the first thin film transistor TT and the second thin film transistor
TR size (W (gate width) / L (gate length))
Adjust the feedthrough voltage by adjusting
No. That is, when the size of the thin film transistor TR is reduced, the overlap capacitance is reduced, so that Vf1> V
f2 holds, and the offset voltage V0 can be reduced.

[0015]

However, when the size of the second thin film transistor TR is smaller than that of the first thin film transistor TT, the size (W /
L) is small, the on-current flowing between the drain and the source is small, so that the charge transfer thin film transistor T
When the driving conditions (conduction time) of T and the resetting thin film transistor TR are the same, there is a problem that the transfer time by the resetting thin film transistor TR becomes insufficient and the afterimage becomes large. Therefore, if a driving condition sufficient for charge transfer is set for each of the thin film transistors TT and TR, a new problem arises in that the reading speed is reduced. In order to avoid such inconvenience, it is conceivable to increase the size of both thin film transistors TT and TR while maintaining the configuration in which the size of second thin film transistor TR is smaller than that of first thin film transistor TT. Although it is possible to avoid a decrease in the size of the image sensor, the width of the image sensor is increased, and the manufacturing cost is increased, which is not practical.

The present invention has been made in view of the above-mentioned circumstances. Even in an image sensor having a configuration in which the size of the reset thin film transistor TR is smaller than that of the charge transfer thin film transistor TT and the offset voltage is reduced, the reading speed can be reduced. It is an object of the present invention to provide a method for driving an image sensor that can prevent an afterimage from occurring without causing deterioration.

[0017]

According to a first aspect of the present invention, there is provided a method for driving an image sensor, comprising: a light receiving element array in which a plurality of light receiving elements are arranged as one block; A plurality of first thin film transistors connected to each of the plurality of thin film transistors for transferring the charge generated in the light receiving element, and a plurality of second thin film transistors connected to each of the light receiving elements for resetting the charge remaining in the light receiving element after the charge transfer A thin film transistor, a capacitor unit connected to the first thin film transistor for storing the electric charge transferred through the first thin film transistor, and a common unit commonly connecting the first thin film transistor for each corresponding bit of each block. A connection line, a pulse for turning on the first thin film transistor for each block, and a pulse for turning on the second thin film transistor. A pulse generating means for generating a pulse for turning on each of the circuits, and a driving IC for outputting a charge of the capacitor portion as an image signal through the common signal line, In the image sensor driving method in which the size (W / L) of the thin film transistor is set to be smaller than the size (W / L) of the first thin film transistor, the conduction time of the second thin film transistor is set to be smaller than that of the first thin film transistor. It is characterized in that it is longer than the conduction time.

According to a second aspect of the present invention, there is provided a method of driving an image sensor, comprising: a light receiving element array in which a plurality of light receiving elements are arranged as one block;
A plurality of first thin film transistors connected to the respective light receiving elements for collectively transferring charges generated in the light receiving element array for all bits; and collectively transferring charges remaining in the respective light receiving elements for all bits after the charge transfer. A plurality of second thin-film transistors connected to the respective light-receiving elements for resetting the plurality of light-receiving elements, and a plurality of capacitance units connected to the first thin-film transistors for holding electric charges transferred via the first thin-film transistors A plurality of third thin-film transistors connected to the first thin-film transistor for transferring the charge held in each of the capacitance units; and a third thin-film transistor for holding the charge transferred by the third thin-film transistor. And the third thin film transistor is shared by the wiring capacitance portion connected to the thin film transistor and the corresponding bit of each block. A common signal line to be connected; and a driving IC for outputting an electric charge of the wiring capacitance portion as an image signal via the common signal line. The size (W / L) of the first and second thin film transistors Is a method for driving an image sensor set to be smaller than the size (W / L) of the third thin film transistor, wherein the conduction time of the first thin film transistor is made longer than the conduction time of the third thin film transistor. .

According to a third aspect of the present invention, in the driving method of the image sensor according to the second aspect, the conduction time of the second thin film transistor is made longer than the conduction time of the third thin film transistor.

[0020]

According to the first aspect of the present invention, the size of the reset second thin film transistor is set smaller than the size of the charge transfer first thin film transistor to adjust the feedthrough voltage of the second thin film transistor. In addition, the offset voltage can be reduced, and the conduction time of the second thin-film transistor is made longer than the conduction time of the first thin-film transistor. To prevent an afterimage from occurring.

According to the second aspect of the present invention, the size of the first thin film transistor for collective charge transfer is set smaller than the size of the third thin film transistor for sequential transfer, so that the feedthrough voltage of the first thin film transistor is reduced. By adjusting the offset voltage, the offset time can be reduced.
By making the conduction time longer than that of the thin film transistor, the charge generated in the light receiving element array can be reliably transferred without lowering the reading speed of the image signal.

According to the third aspect of the present invention, the feedthrough voltage of the second thin film transistor is adjusted by setting the size of the second thin film transistor for reset to be smaller than the size of the third thin film transistor for sequential transfer. In addition, the offset voltage can be reduced, and the conduction time of the second thin film transistor is made longer than that of the third thin film transistor. To prevent an afterimage from occurring.

[0023]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a method for driving an image sensor according to the present invention will be described with reference to FIGS. Here, FIG. 1 is a configuration diagram showing one configuration example of an image sensor using the image sensor driving method according to the present invention, and FIG.
Is an equivalent circuit diagram per pixel of the image sensor of FIG. 1,
FIG. 3 is a timing chart of a main part of the image sensor according to the present embodiment, FIG. 4 is a plan explanatory view of a reset thin film transistor TR and a charge transfer thin film transistor TT, and FIG. 5 is a configuration of the image sensor according to the second embodiment. FIG. 6 is an equivalent circuit diagram for one pixel of the image sensor of the second embodiment, and FIG. 7 is a timing chart of a main part of the image sensor of the second embodiment. The members, arrangements, and the like described below do not limit the present invention, and can be variously modified within the scope of the present invention.

Since the electrical equivalent circuit of the image sensor in this embodiment is basically the same as that shown in FIG. 8, first, FIG. 1 schematically shows the configuration of FIG. The overall configuration will be schematically described. still,
The same components as those shown in FIG. 8 are denoted by the same reference numerals. This image sensor has a light receiving element array 11 in which light receiving elements 11 ″ are arranged in a line.
And a plurality of first light-receiving elements 11 "corresponding to each light-receiving element 11".
Charge transfer section 12 composed of a plurality of second thin film transistors TR corresponding one-to-one to thin film transistors TT and light receiving elements 11 ″, and a matrix-like multilayer wiring group 13
A common signal line 14 for connecting the multilayer wiring group 13 to the driving IC 15; a driving IC 15 for reading a potential change of a wiring capacitance CL formed between the common wiring 14 and the ground; and a gate pulse for each of the thin film transistors TT and TR. ΦGT and Φ
And a gate pulse generating circuit 16 for generating GR as a main component.

FIG. 2 shows an equivalent circuit for one pixel. The equivalent circuit will be described below with reference to FIG. The equivalent circuit per pixel includes a photodiode P as a light receiving element, its parasitic capacitance CP, a first thin film transistor TT for charge transfer, a second thin film transistor TR for reset, a wiring capacitance CL, Amplifier 18 provided in the IC 15 for wiring and the wiring capacitance C
And a MOS transistor 19 for resetting L.

An overlap capacitance CGD (TT) is formed between the gate electrode and the drain electrode of the first thin film transistor TT, and an overlap capacitance CGS (TT) is formed between the gate electrode and the source electrode. Further, an overlap capacitance CGD (TR) is formed between the gate electrode and the drain electrode of the second thin film transistor TR, and an overlap capacitance CGS (TR) is formed between the gate electrode and the source electrode. .

Further, in this embodiment, the size (W (gate width) / L (gate length)) of the first thin film transistor TT and the second thin film transistor TR is set as follows. That is, assuming that the length of the source / drain electrode in the sub-scanning direction is W and the length of the gate electrode in the main scanning direction is L, as shown in FIGS.
In the thin film transistor TT, W / L = 180 to 240/12 (μm) and the second thin film transistor TT
In R, W / L = 162 to 216/12 (μ
m), and the size of the second thin film transistor TR is smaller than that of the first thin film transistor TT.

Next, the operation in the above configuration will be described with reference to FIG.
This will be described with reference to the timing chart of FIG. The drain potential of the first thin film transistor TT gradually rises during photocharge accumulation in a so-called dark state (see FIG. 3C).
On the other hand, at the time of accumulating photocharges in a so-called bright state, it rises greatly as compared with the dark state, and the first thin-film transistor Tg is applied by application of a gate pulse φGT (see FIG. 3A).
When T is turned on, it rises sharply by the so-called feed-through voltage (see FIG. 3C).

Then, by transferring charges from the drain electrode side so as to be in equilibrium with the potential of the source electrode of the first thin film transistor TT, the drain potential is lowered and the first thin film transistor TT is turned off. Then, the voltage drops sharply by the feedthrough voltage (see FIG. 3C). At this time, the potential appearing on the drain electrode side of the first thin film transistor TT is a residual potential. Here, if the pulse width of the gate pulse ΦGT in the present embodiment is expressed by the charge transfer time at the drain electrode and the source electrode of the above-mentioned first thin film transistor TT, 3.4 to 4.
The transfer time is set to 5 μs.

Subsequently, the second thin film transistor TR
When turned on by the application of the gate pulse ΦGR (see FIG. 3B), the drain potential of the first thin film transistor TT sharply rises again by the feedthrough voltage (FIG. 3).
(See (c)), the potential is lowered by transferring the charges until the source potential of the second thin film transistor TR, ie, VR, is reached, and the potential sharply drops by the feedthrough voltage when the second thin film transistor TR is turned off. (See FIG. 3C). Then, the potential of the first thin film transistor TT at this time becomes the potential at the start of the new photocharge accumulation. Here, the pulse width of the gate pulse ΦGR in the present embodiment is set to be longer than the pulse width of the gate pulse ΦGT described above, and is set to be a conduction time sufficient to discharge the residual charges ( (See FIGS. 3A and 3B).

On the other hand, the potential change at the source electrode of the first thin film transistor TT is constant during the accumulation of the photocharge (see FIG. 3D), and the first thin film transistor TT is turned on by the application of the gate pulse ΦGT. When turned on, the voltage rises sharply by the feedthrough voltage (see FIG. 3D). Then, charges are transferred to the source electrode side so as to be in equilibrium with the drain potential at this time, and the source potential rises, and when the first thin film transistor TT is turned off, it drops sharply by the feedthrough voltage. (See FIG. 3D). The source potential at this time reflects the amount of transferred charges, and the driving IC 15 detects this potential. Thereafter, the MOS transistor 19 is turned on, the source potential drops sharply by the feed-through voltage, charges are transferred until the VIC potential is reached, and the potential drops (see FIG. 3C). At this time, MO
Since the ON resistance of the S transistor 19 is smaller than that of the thin film transistor, the decrease is overlapped by the feedthrough voltage.

When the MOS transistor 19 is turned off, the source potential of the first thin film transistor TT becomes
It rises sharply by the feedthrough voltage. The potential at this time is a reference potential, and as a result of detection by the driving IC 15, a difference from the potential detected by the driving IC 15 when the first thin-film transistor TT is turned off first. This is output as a final sensor output. After all, in the present embodiment, the size of the reset second thin film transistor TR is changed to the first charge transfer thin film transistor TR.
By setting it smaller than the thin film transistor TT, the configuration in which the offset voltage is zero is obtained, while the conduction time of the second thin film transistor TR is reduced by the first thin film transistor TT.
By ensuring a sufficient time for resetting by making the conduction time longer than the conduction time, it is possible to prevent the occurrence of an afterimage without lowering the reading speed.

In the above-described embodiment, the photoelectric charge read out via the first thin film transistor TT is used for driving ICs.
Although the configuration using the multi-layer wiring group 13 arranged in a matrix to transfer the data to the matrix wiring 15 is used, the matrix wiring is connected to the gate pulse generation circuit 16 and the thin film transistors TT, T
The configuration may be such that it is used for a wiring portion connecting the gate electrode of R.

Next, a second embodiment will be described with reference to FIGS.
This will be described with reference to FIG. In the second embodiment, the image sensor in the first embodiment uses two TFTs per pixel, whereas three TFTs are used.
This is an example in the case of using. 1 and 2
The same reference numerals are used for the same components as those in the first embodiment shown in FIG. That is, as shown in FIG. 5, the image sensor has a light receiving element array 11 in which light receiving elements 11 'are arranged in a line.
, The charge transfer section 20, and the matrix-like multilayer wiring group 2
1, a common signal line 23 connecting the multilayer wiring group 21 to the driving IC 22, a driving IC 22 for reading a potential change of a wiring capacitance CL formed between the common signal line 23 and the ground,
A gate pulse generation circuit 24 that generates gate pulses ΦGT, ΦGR, ΦGM for each of the thin film transistors TT, TR, TM described below is a main component.

The charge transfer section 20 is connected to each light receiving element 1
1 ′ for a batch transfer of a plurality of charges corresponding to
Thin film transistor TT and a plurality of resetting second thin film transistors T corresponding to each light receiving element 11 ′ one to one.
R and a plurality of third thin film transistors TM for sequential transfer corresponding to each light receiving element 11 '.

As shown in FIG. 6, the equivalent circuit configuration per pixel of such an image sensor is a photodiode P as a light receiving element, its parasitic capacitance CP, and a first thin film transistor TT for collective charge transfer. A second thin film transistor TR for reset, a third thin film transistor TM for sequential transfer, a load capacitance CADD, a temporary storage capacitance CT, a wiring capacitance CL, and a detection amplifier provided in the driving IC 22. 25, and a MOS transistor 26 for resetting the wiring capacitance CL.

An overlap capacitance CGD (TT) is formed between the gate electrode and the drain electrode of the first thin film transistor TT, and an overlap capacitance CGS (TT) is formed between the gate electrode and the source electrode. And the second
An overlap capacitance CGD (TR) is formed between the gate electrode and the drain electrode of the thin film transistor TR, and an overlap capacitance CGS (TR) is formed between the gate electrode and the source electrode. Thin film transistor TM
The overlap capacitance CGD (TM) GA is formed between the gate electrode and the drain electrode, and the overlap capacitance CGS (TM) is formed between the gate electrode and the source electrode.

The offset output V0 of the image sensor having the above configuration is as follows: V0 = (CPCT / (CPCL + CPCT + CTCL)) × (Vf
1−Vf2−Vf3 + Vf4−Vf5−Vf6 + VR−VIC). CP is a parasitic capacitance of the light receiving element, CT is a temporary storage capacitance, and CL is a wiring capacitance. Here, Vf1 is the feedthrough voltage on the drain side of the first thin film transistor TT (see FIG. 7D), Vf2 is the feedthrough voltage on the drain side of the second thin film transistor TR (see FIG. 7D), Vf3 Is the first thin film transistor T
The feedthrough voltage on the source side due to T (see FIG. 7)
(F), Vf4 is the feedthrough voltage on the drain side of the third thin film transistor TM (see FIG. 7 (e)), and Vf5 is the feedthrough voltage on the source side of the third thin film transistor TM (see FIG. 7 (f)). ), V
f6 is a feedthrough voltage (see FIG. 7 (f)) on the source side of the third thin film transistor by a MOS transistor (not shown) in the driving IC 15.

In order to reduce the offset voltage V0, it is necessary to make (Vf1-Vf2-Vf3 + Vf4-Vf5-Vf6 + V
R−VIC) = 0, but considering that a high-precision power supply must be added to change VR and VIC, it is desirable to set VR = VIC = 0V.
(Vf1-Vf2-Vf3 + Vf4-Vf5-Vf6) = 0. Here, from the relationship of each capacitance value, Vf1, V
f2, Vf3, Vf4> Vf5, and the relationship that Vf5 is sufficiently larger than Vf6 holds, so that (Vf1−Vf2−Vf3)
+ Vf4−Vf5) = 0, and the first
And the size of the second thin film transistor TT, TR (W /
It can be understood that L) may be set smaller than the third thin film transistor TM for sequential transfer. In addition, the size relationship (W / L) of the first thin film transistor TT for collective charge transfer and the second thin film transistor TR for reset differs depending on the design of the capacitor of the image sensor and the like, and the offset voltage V0 is reduced. It is not certain which size will be smaller when doing so.

Next, the operation in the above configuration will be described with reference to FIG.
This will be described with reference to FIG. The photocharge generated by the photodiode P is generated for a certain period of time by the parasitic capacitance CP of the photodiode P and the over-charge between the drain and gate of each of the first thin film transistor TT for collective charge transfer and the second thin film transistor TR for reset. Wrap capacity CGD (T
T) and CGD (TR). Thereafter, the gate pulse ΦGT is applied to the gate electrode of the first thin film transistor TT for collective transfer of charges (see FIG. 7A), so that the first thin film transistor TT causes the gate pulse Φ
While the GT is applied, the conduction state is established, and the charge transfer to the batch transfer capacitor CT is performed.

The conduction of the first thin film transistor TT causes the drain potential and the source potential of the transistor TT to rise sharply by a so-called feed-through voltage when the transistor is turned on. It will drop steeply (Fig. 7
(See (d) and (e)).

Next, when the gate pulse ΦGR is applied to the gate electrode of the second thin film transistor TR (see FIG. 7B), the second thin film transistor TR is turned on while the gate pulse ΦGR is applied. Becomes
Parasitic capacitance Cp, additional capacitance CADD, overlap capacitance CGD
The untransferred charges remaining in (TT) and CGD (TR) are reset. Thereafter, when the gate pulse ΦGM is applied to the gate electrode of the third thin film transistor TM, the third thin film transistor TM generates the gate pulse ΦGM.
While the GM is being applied, the conduction state occurs (see FIG. 7).
(See (c) and (f)), the electric charge stored in the batch transfer capacitor CT is transferred to the wiring capacitor CL via the third thin film transistor TM.

Here, the gate pulse ΦGT,
The pulse width of ΦGR is set to be larger than the gate pulse ΦGM (see FIGS. 7A, 7B, and 7C). That is, the first thin film transistor TT for collective charge transfer
In addition, each charge transfer time by the reset second thin film transistor TR is set to be longer than the charge transfer time by the third transfer thin film transistor TM in order to prevent generation of an afterimage due to residual charge. .

When the third thin film transistor TM changes from a non-conductive state to a conductive state, the third thin film transistor T
While the source potential of M rises sharply by the so-called feed-through voltage, when it changes from the conductive state to the non-conductive state,
The voltage drops sharply by the feedthrough voltage (see FIG. 7).
(F)). Here, the feed-through voltage on the drain electrode side is several times to several hundred times larger than the capacitance on the drain electrode side of the third thin film transistor TM, so that it is higher than the feed-through voltage on the source electrode side. Several to several hundred times.

Since the potential of the common signal line 23 changes due to the electric charge accumulated in the wiring capacitance CL, this potential is read by the driving IC 22 after the third thin film transistor TM is turned off. After voltage detection, MOS
The wiring capacitance CL is reset by the conduction of the transistor 26, and the potential after the reset is used as a reference voltage for the drive I
The difference between the potential detected by C22 and the previously read potential is output as a sensor output. FIG. 7
In (c), the gate pulse ΦGM is equal to the gate pulse Φ
Although one output is shown between the GT and the gate pulse ΦGT, this is for convenience of explanation, and in practice, the gate pulse ΦGT and the gate pulse ΦGT are actually output.
During this period, the gate pulses ΦGM1 to ΦGMN are sequentially output to read out the photoelectric charges of all the pixels.

After all, in the second embodiment, the size of the first thin film transistor TT for batch transfer of charges and the second thin film transistor TR for reset is made smaller than that of the third thin film transistor TM for sequential transfer. , While obtaining a configuration in which the offset voltage is zero,
Thin film transistor TT, second thin film transistor TR
Is made longer than the conduction time of the third thin film transistor TM, thereby securing a sufficient time for batch transfer and resetting, thereby causing an afterimage without lowering the reading speed. It is designed to prevent that.

In the second embodiment, a structure is used in which a multilayer wiring group 21 arranged in a matrix is used to transfer photocharges read out via a third thin film transistor TM to a driving IC 22. However, this matrix wiring is connected to the gate pulse generating circuit 24 and the thin film transistor T.
It may be configured to be used for a wiring portion connecting to the M gate electrode.

[0048]

According to the first aspect of the present invention, in the image sensor in which the size of the reset thin film transistor is smaller than the size of the sequential transfer thin film transistor, the conduction time of the reset thin film transistor is sequentially reduced. , The offset voltage can be eliminated without lowering the reading speed of the pixel signal, and an image signal with less afterimage can be obtained.

According to the second and third aspects of the present invention, in the image sensor in which the size of the thin film transistor for batch transfer and the size of the thin film transistor for reset are set smaller than the size of the thin film transistor for sequential transfer, Since the conduction time of the thin film transistor and the conduction time of the thin film transistor for batch transfer are made longer than the conduction time of the thin film transistor for sequential transfer, the offset voltage can be eliminated without lowering the reading speed of the pixel signal, and an image with less afterimage can be obtained. This has an effect that a signal can be obtained.

[Brief description of the drawings]

FIG. 1 is a configuration diagram illustrating a configuration example of an image sensor in which a method for driving an image sensor according to the present invention is used.

FIG. 2 is an equivalent circuit diagram for one pixel of the image sensor of FIG. 1;

FIG. 3 is a timing chart of a main part of the image sensor of the present embodiment.

FIGS. 4A and 4B are plan views showing the sizes of a thin film transistor TT for sequential transfer and a thin film transistor TR for reset.

FIG. 5 is a configuration diagram illustrating a configuration example of an image sensor according to a second embodiment.

FIG. 6 is an equivalent circuit diagram for one pixel of the image sensor of the second embodiment.

FIG. 7 is a timing chart of a main part of the image sensor according to the second embodiment.

FIG. 8 is a configuration explanatory view showing one configuration example of an image sensor using a conventional driving method.

FIG. 9 is a timing chart for explaining a conventional driving method.

[Explanation of symbols]

11: light receiving element array, 12: charge transfer section, 13:
Multi-layer wiring group, 14: common signal line, 15: driving I
C, 16: Gate pulse generation circuit

──────────────────────────────────────────────────続 き Continuing from the front page (72) Inventor Hiroki Uesoko 2274 Hongo, Fujigo Rocks, Ebina-shi, Kanagawa Prefecture (72) Inventor Fumihiko Ogasawara 2274 Hongo, Hongo, Ebina-shi, Kanagawa Fujitsu Rocks (56) References JP-A-5-328010 (JP, A) JP-A-6-164828 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H04N 1/024-1/031

Claims (3)

(57) [Claims] 1. A light-receiving element array in which a plurality of light-receiving elements are arranged as a block and a plurality of blocks are arranged in a line, and a plurality of first light-receiving elements connected to each of the light-receiving elements and transferring charges generated in the light-receiving elements. A plurality of second thin film transistors connected to each of the light receiving elements and resetting the charge remaining in the light receiving elements after the charge transfer; and a plurality of second thin film transistors connected to the first thin film transistor through the first thin film transistor A capacitor portion for storing the transferred electric charges, a common connection line for commonly connecting the first thin film transistors for each corresponding bit of each block, and a conductive portion for making the first thin film transistors conductive for each block. Pulse generation for generating a pulse and a pulse for making the second thin film transistor conductive for each block And a driving IC for outputting the charge of the capacitor portion as an image signal via the common signal line, wherein the size (W / L) of the second thin film transistor is the size of the first thin film transistor An image sensor driving method set to be smaller than (W / L), wherein the conduction time of the second thin film transistor is made longer than the conduction time of the first thin film transistor. 2. A light-receiving element array in which a plurality of light-receiving elements are arranged as a block and a plurality of blocks are arranged in a line, and each of the light-receiving elements for transferring charges generated in the light-receiving element array for all bits at a time. A plurality of first thin film transistors connected to each other; a plurality of second thin film transistors connected to each light receiving element for collectively resetting charges remaining in each light receiving element for all bits after the charge transfer; A plurality of capacitors connected to the first thin film transistor for holding the charges transferred via the first thin film transistor; and a plurality of capacitor units connected to the first thin film transistor for transferring the charges held in the respective capacitor units. A plurality of third thin film transistors connected to each other, and the third thin film for holding electric charges transferred by the third thin film transistors A wiring capacitance portion connected to the transistor, a common signal line commonly connecting the third thin film transistors for each corresponding bit of each block, and a charge of the wiring capacitance portion via the common signal line to an image signal. And a driving IC that outputs the data as the size of the first and second thin film transistors (W /
L) is the size (W / L) of the third thin film transistor
A method for driving an image sensor, wherein the conduction time of the first thin film transistor is made longer than the conduction time of the third thin film transistor. 3. The conduction time of the second thin-film transistor is set to a third value.
3. The method according to claim 2, wherein the conduction time of the thin film transistor is longer than the conduction time of the thin film transistor.