JP3024243B2 - Image playback device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention decodes image data recorded on a medium, such as an image file device or an image terminal, or encoded image data transmitted via a communication path, and displays the decoded image data on a display screen. The present invention relates to an image reproducing apparatus for displaying. In particular, the present invention relates to an image reproducing apparatus that displays an image of an unspecified shape, such as an art object such as a painting, a sculpture, or a building, and a photograph thereof, on a display screen and scrolls the image without losing the definition of the image. .

[0002]

2. Description of the Related Art When an image is to be displayed on an image reproducing apparatus, the image may not match the screen size and aspect ratio specific to the image reproducing apparatus. In such a case, reduce the image and display it while providing a blank area on the top and bottom or left and right of the display screen, or use the screen full, and image the part that can not be displayed on the screen vertically or horizontally. I had to scroll to see it or use one of these methods. In particular, the latter method is advantageous for sufficiently expressing the definition of an image.

For this reason, in a conventional image reproducing apparatus, as described in, for example, JP-A-3-25494, it is attempted to provide a frame memory larger than a capacity corresponding to a screen that can be displayed on a display, and display the image on the screen. The entire image to be read is once written in the frame memory, the image data is partially read, displayed on a display, and scrolling is performed by changing the reading start position of the image data.

[0004]

However, in such a conventional image reproducing apparatus, if the image to be displayed is, for example, twice as large as the aspect ratio of the screen, three times as large as three times. A frame memory having a large capacity is required, and the amount of the memory increases. On the other hand, the absolute upper limit of the aspect ratio of an image that can be displayed by scrolling is limited by the memory capacity of the frame memory.

In order to store a high-definition image such as a high-definition image, a capacity of about 6 Mbytes per one screen is required. In addition, for high-speed operation, a video RAM is used, or a parallel-serial conversion process is performed. Is essential, and it is economically important to use less memory.

SUMMARY OF THE INVENTION An object of the present invention is to provide an image reproducing apparatus capable of reproducing an image having an aspect ratio different from the aspect ratio of the screen of the image reproducing apparatus while scrolling the image without losing the definition of the image. Is realized without increasing the capacity of the image memory, and the range of scrollable images is not limited by the frame memory capacity.

[0007]

In order to achieve the above object, according to the present invention, a frame memory for storing image data and supplying the same to a display, and a reading start position of an image to be read from the frame memory and displayed on the display are provided. From a read address generation circuit that specifies two or more locations, a read timing generation circuit, and data supplied from a recording medium or from outside the image reproducing apparatus.
An image decoding circuit for restoring image data, a write timing determination circuit for selectively writing only data at a specific position in the frame data among image data output from the image decoding circuit, and a write address generation circuit are provided. .

[0008]

When an image having an aspect ratio different from that of the screen of the image reproducing apparatus is displayed on the display, first, image data in an area of the entire image that can be displayed on the display screen is selected by the write timing determination circuit. Write to frame memory. Next, the read start position of the image data from the frame memory and the timing are moved in accordance with the scroll direction. On the other hand, the image decoding circuit performs decoding processing of the image data again, and selects only data of a portion that must be newly displayed on the screen by scrolling the obtained image data, and writes the selected data into the frame memory. At this time, the area to be written is overwritten on the part that goes out of the display screen by scrolling, and this part is displayed so as to be in contact with the image data stored in the frame memory from the beginning, and the newly written part Specify the read start position and timing of The display image can be scrolled by repeating the series of operations described above.

In this way, the image data of the portion moving out of the screen by scrolling is sequentially rewritten, so that the capacity of the frame memory only needs to be equivalent to the screen size of the display, and the size of the entire image is large. The size is not limited by the capacity of the frame memory.

[0010]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing a configuration of an image reproducing apparatus according to the present invention. First, the components of the entire apparatus will be described. CPU1, system memory 2, hard disk I / F3, magneto-optical disk I / F5, keyboard I / F
7, a decoding circuit 9 and a frame memory I / F 10 are connected by a system bus 18. The hard disk 4, magneto-optical disk 6, and keyboard 8 are connected to the hard disk I / F 3, the magneto-optical disk I / F 5, and the keyboard I / F 7, respectively. The output data of the decoding circuit 9 is written to the frame memory 11, and the data read from the frame memory 11 is converted into an analog video signal by the D / A converter 17 and displayed on the display 19. A write timing determination circuit 12, a write address generation circuit 13, a read address generation circuit 14, and a read timing generation circuit 15 are connected to the frame memory I / F 10. The clock generation circuit 16 generates a clock to be supplied to the decoding circuit 9, the D / A converter 17, the read address generation circuit 14, and the read timing generation circuit 15.

Next, the operation of each section will be described.

The hard disk 4 stores a system program for the CPU 1 to control each peripheral device, a reproduction program describing an image reproduction method, and the like. These programs are loaded into the system memory 2 and executed. Image data that has been encoded in advance is recorded on the magneto-optical disk 6, and is read out in response to an input instruction from the keyboard 8 or the like in accordance with the procedure specified by the above-described reproduction program, and is sent to the decoding circuit 9. And the image data is restored from the encoded data. The image data recorded on the magneto-optical disk 6 is usually subjected to an encoding process for data compression in order to increase the recordable capacity per disk and to reduce the reading time from the disk. DCT is used for data compression.
(Discrete cosine transform), VQ (vector quantization), DPCM (differential pulse code modulation) and the like are often used. In this embodiment, a case where DCT coding is used will be described as an example, but the present invention is not limited to such a compression processing method.

FIG. 2 shows an outline of a process of restoring the compressed image data performed in the decoding circuit 9. When encoding an image using DCT, image data is usually divided into square blocks, and processing is performed for each block. FIG. 5A shows a mode of image data block division. Here, it is assumed that an image is divided into adjacent 8 × 8 pixel blocks and encoded. The encoded image data is recorded on the magneto-optical disk 6 one by one from the upper left block to the right in order, and when it reaches the rightmost block in the top row, the next one is
Similarly, the blocks in the lower row are recorded in order from left to right, and finally reach the lower right block. The decoding circuit 9 decodes the input data in the order shown in FIG. 2A, performs a data rearrangement process, and as shown in FIG.
The image data is converted and output in the order of each line. In order to rearrange the image data, a memory such as a line buffer may be provided to change the order between the time of writing and the time of reading the restored data. Decoding circuit 9
Outputs a data clock synchronized with the image data together with the image data.
Sent to 2.

The write timing determination circuit 12 is a CPU
1 to judge whether or not to generate a write clock for the frame memory 11 from the clock output from the decoding circuit 9 based on the setting conditions given through the frame memory I / F 10, and according to the judgment result,
To supply a write clock. The write clock is also sent to the write address generation circuit 13 and used for counting up the write address of the frame memory 11. The write address generation circuit 13 is given a preset address value from the CPU 1 through the frame memory I / F 10, and the write timing determination circuit 1
The write address is set to a preset value in accordance with the timing of the preset signal given from Step 2. The conditions for generating the write clock and how to set the preset value of the write address will be described later in detail.

The read address generation circuit 14 counts clocks generated by the clock generation circuit 16 and generates a read address of the frame memory 11. The read timing generation circuit 15 generates a read clock for the frame memory 11 based on the clock signal generated by the clock generation circuit 16, and reads the read address generation circuit 1
4 to generate a preset signal of the read address. Each time this preset signal is generated, the address generated by the read address generation circuit 14 is
Is reset to a predetermined preset value given through the frame memory I / F 10. The generation timing of the preset signal is such that the video signal read from the frame memory 11 and output from the D / A converter 17 has a speed that matches the horizontal and vertical scanning frequencies of the display 19. In addition, a window display can be realized on the screen of the display 19 by generating a preset signal two or more times in one scanning cycle and giving different positions on the frame memory 11 with preset addresses. Although the synchronization signal of the display 19 is provided directly from the read timing generation circuit 15, the synchronization signal may be provided so as to be superimposed on the video signal.

Write timing determination circuit 12, write address generation circuit 13, read address generation circuit 1
4, and the read timing generation circuit 15 changes its operation method depending on the size of an image to be displayed on the screen of the display 19. Hereinafter, the case where the size of the displayed image is larger than the screen of the display 19 and the case where it is not so will be described separately.

The information on the size of the image is recorded on the magneto-optical disk 6 as additional information of the image data or as a part of the reproduction program of the hard disk 4.
Based on this information, the CPU 1 transmits information on an image reproducing method to each unit through the frame memory I / F 10.

When displaying image data of the same size or smaller than the screen of the display 19, the write timing determination circuit 12 determines that all data clocks supplied from the decoding circuit 9 are valid, and Is written into the frame memory 11. The preset signal of the write address is generated every time one scan line of the image is written,
The horizontal address value generated by the write address generation circuit 13 is preset to a predetermined set value, and the vertical address is incremented by one at each preset. If the image to be displayed is the same as the screen size, the horizontal address setting value should be the value corresponding to the leftmost edge of the screen.If the horizontal width of the image size is smaller than the screen, the image extends off the screen. An appropriate value may be set so as not to cause the problem. This value is determined by the user through an input from the keyboard or described in a reproduction program recorded on the hard disk 4.

The read timing generation circuit 15 generates a preset signal of a read address every horizontal scanning period, sets the horizontal value of the read address to a value indicating the left end in each scanning period, and sets the read address in the vertical direction. The address is counted up by one or a predetermined number larger than it.

As described above, the image data read from the magneto-optical disk 6 and restored by the decoding circuit 9 is read after being written into the frame memory 11 entirely.
The entire recorded image can be displayed on the screen of the display 19.

On the other hand, when an image larger than the screen size that can be displayed on the display 19 is to be displayed, first, of the image data recorded on the magneto-optical disk 6, only data that can be written to the frame memory 11. Is written, an image in a displayable range is displayed on the screen of the display 19, and then the entire screen is sequentially displayed on the screen by scrolling the screen. FIG. 3 shows a method of scrolling the screen in this manner.
This will be described with reference to FIG.

FIG. 3 shows the image data (a) recorded on the magneto-optical disk 6, the data (b) written in the frame memory 11, and the screen (c) displayed on the display 19 over time. Along the line from left to right. This example shows a case where the size of an image that can be displayed on the screen of the display 19 is equal to the capacity of the frame memory 11, and the image to be displayed on the screen is horizontally longer than the screen of the display 19. First, a portion 31a of the image data (a) that can be displayed on the display screen from the leftmost end is written to the frame memory 11. Since the data output from the decoding circuit 9 is a continuous data row for each horizontal scanning line as shown in FIG. 2B, the data stream 31a is extracted from this data row to extract the frame. In order to write data to the memory 11, the data clock output from the decoding circuit 9 is counted by the write timing determination circuit 12, and when the number of pixels to be written in the horizontal direction reaches the number of pixel data to be written to the frame memory 11, the write clock for the frame memory 11 is written. Is stopped, and thereafter, the pixel data 31b on the scanning line is ignored, and writing to the frame memory 11 is not performed. The write timing determination circuit 12 continues counting the clock output from the decoding circuit 9 thereafter, and when the image data moves to the next scanning line, presets the horizontal address of the write address generation circuit 13 and sets one vertical address. While counting up, the generation of the write clock is started again. Hereinafter, the same processing is repeated for each line, and the image data is written to the frame memory 11 up to the bottom line. Thus, the image data 34 is written into the frame memory 11 as shown on the left side of FIG.
An image 37 shown in FIG. 3C appears on the screen of FIG.

Next, a procedure for scrolling the display screen to the left according to the input from the keyboard 8 in FIG. 1 and the description of the reproduction program recorded on the hard disk 4 will be described.

When the display screen is scrolled, the encoded data is read from the magneto-optical disk 6 and restored to the image data by the decoding circuit 9 in the same manner as when the first image data is written. Write timing determination circuit 1
In step 2, the data clock is counted, and the output of the write clock is stopped until the count reaches the number of pixels of the image already written in the frame memory 11 in the horizontal direction, that is, the number of pixels that can be displayed on the display 19. Thereafter, a write clock is generated for a period of a fixed number of clocks provided from the CPU 1 via the frame memory I / F 10, and thereafter, the generation of the write clock is stopped until the pixel data on the line is restored again. The generation and stop of the write clock are similarly performed on the second and subsequent lines. As a result, of the image data output from the decoding circuit 9, only the portion 32b immediately to the right of the portion 32a already written in the frame memory 11 is selected and written into the frame memory 11.

At the same time as or before the start of the generation of the write clock in the write timing determination circuit 12, a preset signal of the write address is generated, and the address generated by the write address generation circuit 13 is already written in the frame memory 11. The image data is preset to an address indicating the leftmost portion in the scroll direction on the screen. Thereby, the image data 32
b is written to the portion 35a on the frame memory 11. On the other hand, the read timing generation circuit 15 counts the clock output from the clock generation circuit 16 and generates two preset signals per horizontal scanning cycle, and each of the preset signals is a read start timing of the area 35b in the frame memory 11. From the CPU 1 through the frame memory I / F 10 so as to give the read start timing of the area 35a.
5, the setting of the preset signal generation timing is performed. In this manner, the image data is read from the frame memory 11 from the area 35a and subsequently from the area 35b in the first period within one horizontal scanning cycle, and the screen 38 of the display 19 is displayed.

Further, the encoded data is read from the magneto-optical disk 6 and restored to image data by the decoding circuit 9. In the same manner as described above, the generation of the write clock in the write timing determination circuit 12 and the generation of the preset signal so that the image data portion 33b shown in FIG. And the preset address value of the write address generation circuit 13 are reset from the CPU 1. At the same time, the generation timing of the preset signal of the read address generated by the read timing generation circuit 15 and the preset value of the read address generation circuit 14 are used to read the signal from the frame memory 11 within one scanning period to the areas 36c, 36a, and 36b. The setting from the CPU 1 is performed so as to be performed in order. As a result, an image as shown at 39 in FIG.

According to the above procedure, the display 1
The screen 9 changes as shown at 37, 38, and 39, and the image that is wider than the screen can be scrolled so that the entire image can be viewed over time. In the above example, scroll display is performed in three stages. However, if the area width of data to be written to the frame memory 11 at one time is made narrower and the number of times of writing is increased, a smoother scroll can be realized. .

Also, in this example, the case where the horizontal width of the image is larger than the screen of the display has been described. At this time CP
The vertical value of the write address is given from U1 as a preset value, and the write timing determination circuit 12 counts the number of lines of the image output from the decoding circuit 9. If the address generated by the read address generation circuit 14 automatically returns to the first address after the last address of the frame memory 11, the read timing generation circuit 15 does not necessarily perform the operation twice in one vertical scanning period. There is no need to generate a preset signal.

Further, even when the image is larger than the displayable pixels of the display 19 in both the vertical and horizontal directions, the same processing can be performed. The scrolling direction can be not only from right to left as described above, but also from the reverse or from the center.

As described above, according to the present embodiment, scroll display can be realized while rewriting the image data in the frame memory, so that the number of displayable pixels of the display can be increased without increasing the required capacity of the frame memory. Even if the image is large, the entire image can be displayed without lowering its definition. Further, not only when the size of the image is larger than the size that can be displayed on the screen but also when successively displaying small images, it is effective to exchange the images while scrolling. In this case, the image data read from the magneto-optical disk during scrolling may be different from the image written in the frame memory.

By the way, depending on the state of use of the image reproducing apparatus, there is a case where the user wants to display the entire image on the screen and check it instead of scrolling the image. At this time, the data read from the magneto-optical disk 6 is
When the data is restored and written in the frame memory 11, the write clock generated by the write timing determination circuit 12 may be thinned out at a fixed rate with respect to the data clock generated by the decoding circuit 9. This can be easily realized by making the determination condition in the write timing determination circuit 12 such.

When the encoded data is read from the magneto-optical disk, a portion not to be written to the frame memory is also read, but this increases the efficiency of the encoding due to the image encoding method. This is because it is impossible to directly extract only the data at a specific position by utilizing the correlation in the horizontal direction of the image and making the code length variable. Usually, it is indispensable to adopt the above-mentioned method to increase the compression ratio of image data, and in this case, the writing speed to the frame memory is higher than the reading speed from the magneto-optical disk due to the high compression ratio. Since the overall speed is often defined, the present invention is effective as a countermeasure for this. At this time, even if the encoded data is divided into a plurality of files and recorded, the effect of the present invention is not affected, and the speed of the screen scroll does not depend on the method of dividing the file.

In the above example, the case where the capacity of the frame memory is exactly equal to one screen has been described. However, the present invention may be applied to the case where the capacity of the frame memory is larger. In such a case, the number of images to be read first from the magneto-optical disk is increased as much as possible in the frame memory, and scrolling is initially performed only by changing the read timing and position to reduce the number of accesses to the magneto-optical disk. be able to.

Further, according to the present invention, a scrolling function in a window as described below can be provided.

FIG. 4 is a diagram for explaining a method of realizing the in-window scroll function.

The scrolling in the window corresponds to the main image 41 stored in the magneto-optical disk 6 as shown in FIG.
Is synthesized and displayed in the window area 42 of the background image as shown in (b). At this time, the window area 4 of the background image is displayed.
The main image having an area larger than 2 is scrolled to display the entire image.

FIG. 4C shows a change in the contents of the image data written in the frame memory 11 during scrolling in the window in order from the left to the right over time. (D) shows a state of a screen displayed on the display 19 corresponding to FIG.
In this case, first, as shown in FIG. 4C, the upper part 43 of the main image and the window area 42 of the background image are stored in the frame memory 11.
Write to. The read timing generation circuit 15 counts the clock generated by the clock generation circuit 16 and
The time at which the background image 42 is read and the position at which the main image 43 is read are switched.
A screen 47 shown on the left side of (d) is displayed.

Subsequently, the main image data is read from the magneto-optical disk 6 and restored by the decoding circuit 9. The write timing determination circuit 12 detects the timing at which the portion 44 immediately below the image portion 45 already written in the frame memory 11 is restored and output, and the write clock is set so that this portion is written to the frame memory 11. Occurs. By providing a preset signal to the write address generating circuit 13, the main image written in the frame memory 11 can be rewritten sequentially from the top. At the same time, the preset timing of the read address of the main image generated by the read timing generating circuit 15 and the address preset value of the read address generating circuit 14 due to the change are changed, and a screen 48 of FIG. So that Thereafter, the procedure for changing the display position of the main image described above is repeated, and scrolling within the window is executed until the screen 49 shown in FIG.

As described above, according to the present invention, the size of the main image to be scrolled when executing the in-window scrolling is not restricted by the capacity of the frame memory. The function of scrolling in the window itself can be realized if the capacity of the frame memory is exactly one screen. In this case, after the background image is first written in the frame memory, the main image is written, and the generation timing of the read address is adjusted while selectively rewriting only the main image portion. Furthermore, by providing a frame memory capacity for two screens, a memory area is allocated to each of a main image and a background image, and a window synthesized with a window and a main screen or a screen containing only a background image can be instantly switched. Various types of display can be performed, such as moving the combination position of the main image.

In the image reproducing apparatus shown in FIG. 1, a hard disk is used as a recording medium for a system and a reproducing program. However, in the present invention, the type of the recording medium for the program is not limited. Also, the recording medium for the image data may be a storage medium capable of practically realizing the scroll speed, for example, a write-once optical disc or a CD-ROM. Further, a pointing device such as a mouse or a tablet other than the keyboard may be used as a means for specifying the playback screen. Also,
Although not shown, a screen may be automatically advanced by connecting to an audio reproducing device capable of giving information on elapsed time.

Next, a second embodiment of the present invention will be described.

FIG. 5 is a block diagram showing a configuration of an image reproducing apparatus according to a second embodiment of the present invention. In FIG. 5, the same parts as those in FIG.

In FIG. 5, instead of providing a recording medium for storing image data in the apparatus, a network I / F 50 and a buffer memory 51 are provided, and a large-capacity storage device 52 external to the image reproducing apparatus is encoded through a network 53. To obtain the image data. The encoded data sent from the network 53 is temporarily stored in the buffer memory 51, and thereafter, the data stored in the buffer memory 51 is sent to the decoding circuit 9 to restore the image data.
The image reproducing apparatus shown in FIG. 1 can operate in the same manner as the first embodiment except that the image data read from the magneto-optical disk 6 is replaced by the buffer memory 51, and the image data is larger than the screen of the display 19. Images can be scrolled and displayed, and window scrolling can be realized.

According to the present invention, by storing encoded data in the buffer memory, the amount of data that subsequently passes through the network can be reduced. According to the configuration of FIG. 5, the size of an image that can be scroll-displayed is limited by the capacity of the buffer memory 51. However, since the buffer memory 51 stores data compressed by encoding, scrolling is performed by increasing the frame memory. It is much more economical than increasing the size of the displayed image.

Although the above embodiment has been described with reference to an image reproducing apparatus, it goes without saying that the present invention can be applied not only to a reproducing apparatus but also to a reproducing section of a recording / reproducing apparatus.

[0047]

As described above, according to the present invention, even an image having an aspect ratio different from that of a display screen of an image reproducing apparatus can be reproduced to fill the entire screen without losing the definition, and the entire image can be scrolled. You can see. In addition, when displaying images while scrolling, the image data in the part that moves outside the screen is rewritten, so the frame memory capacity that is larger than the display screen size is not necessary. It is not limited by the capacity of the frame memory.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of an image reproducing apparatus according to a first embodiment of the present invention.

FIG. 2 is a diagram showing an image restoration method in a decoding circuit.

FIG. 3 is a diagram illustrating a scroll procedure.

FIG. 4 is a diagram illustrating scrolling in a window.

FIG. 5 is a block diagram showing a configuration of an image reproducing apparatus according to a second embodiment of the present invention.

[Description of Signs] 9: decoding circuit, 11: frame memory, 12: write timing determination circuit, 13: write address generation circuit, 14: read address generation circuit, 15: read timing generation circuit

Claims (2)

(57) [Claims] 1. A decoding circuit for decoding the encoded image data, a memory for storing the image data output from the decoding circuit, the desired image data to be output of the decoding circuit of the memory
In the image reproducing apparatus and a write address generator for generating an address for writing the position, based on the clock signal from the decoding circuit, the decoding circuit
From the image data output by
To select image data and write the selected image data
Clock signal to the memory and the address generation circuit.
And output the selected image data to the
Judge timing to specify start position to write to memory
And outputs the determined timing to the address generation circuit.
An image reproducing apparatus, comprising: a write timing determination circuit that performs the write timing determination. 2. A display for displaying an image, and a clock signal for reading arbitrary image data from the image data written in the memory is output to the memory, and reading of the arbitrary image data is performed. A read timing generation circuit that outputs a signal indicating a start timing to a read address generation circuit; and a read address generation circuit that generates an address of the arbitrary image data in accordance with the signal indicating a timing to start the read. 2. The image reproducing apparatus according to claim 1, wherein a signal for displaying an image at an arbitrary display position is output from the memory to the display, and the image is displayed on the display screen.