JP3002078B2 - Distortion amount measurement circuit - Google Patents
Distortion amount measurement circuitInfo
- Publication number
- JP3002078B2 JP3002078B2 JP5268723A JP26872393A JP3002078B2 JP 3002078 B2 JP3002078 B2 JP 3002078B2 JP 5268723 A JP5268723 A JP 5268723A JP 26872393 A JP26872393 A JP 26872393A JP 3002078 B2 JP3002078 B2 JP 3002078B2
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- power supply
- amplifier
- voltage
- distortion
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Landscapes
- Measurement Of Length, Angles, Or The Like Using Electric Or Magnetic Means (AREA)
Description
【0001】[0001]
【産業上の利用分野】本発明は、歪みゲージブリッジ回
路(以下、ブリッジ回路と称す)を用いた歪み量測定回
路に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a strain measuring circuit using a strain gauge bridge circuit (hereinafter, referred to as a bridge circuit).
【0002】[0002]
【従来の技術】従来、この種の歪み量測定回路では、ブ
リッジ回路のバイアス電源に直流電源を用い、その出力
信号を高性能直流増幅器(チョッパ増幅器等)で増幅す
るものや、ブリッジ回路に正弦波交流電源を用いてその
出力信号を交流増幅した後、検波回路、平滑回路を用い
て復調するものがある。2. Description of the Related Art Conventionally, in this kind of distortion amount measuring circuit, a DC power supply is used as a bias power supply of a bridge circuit, and an output signal thereof is amplified by a high-performance DC amplifier (a chopper amplifier or the like). There is a type in which an output signal is AC-amplified using a wave AC power supply and then demodulated using a detection circuit and a smoothing circuit.
【0003】[0003]
【発明が解決しようとする課題】しかしながら、前者は
コスト的に非常に高価であり、又後者についても検波回
路以降の零点変動や、回路が複雑になりノイズの影響を
受けやすい等の不都合があった。However, the former is very expensive in terms of cost, and the latter also has disadvantages such as zero point fluctuation after the detection circuit and the circuit becoming complicated and susceptible to noise. Was.
【0004】本発明はかかる不都合の無い歪み量測定回
路を提供することを目的とするものである。An object of the present invention is to provide a distortion measuring circuit free of such inconvenience.
【0005】[0005]
【課題を解決するための手段】この課題を解決するため
に本発明の歪み量測定回路は、交流電源に接続された歪
みゲージブリッジ回路の出力信号を、交流増幅器を介し
て互いに独立した2つのサンプルホールド回路に供給
し、このサンプルホールド回路で交流増幅器の出力信号
を交流電源電圧の極性に一致するように各半サイクルご
とに交互にサンプルホールドし、この2つの出力の差を
積分機能を有する差動増幅器で得るように構成したもの
である。In order to solve this problem, a distortion amount measuring circuit according to the present invention uses an output signal of a strain gauge bridge circuit connected to an AC power supply to two independent signals via an AC amplifier. The sample-and-hold circuit alternately samples and holds the output signal of the AC amplifier every half cycle so as to match the polarity of the AC power supply voltage, and has a function of integrating the difference between the two outputs. It is configured to be obtained by a differential amplifier.
【0006】[0006]
【作用】以上の構成により、交流増幅された出力信号
は、独立した2つのサンプルホールド回路と積分機能を
有する差動増幅器によって、効率的にその振幅値と一致
した直流出力に復調されるため、低コストの比較的簡単
な回路で、零点変動がなく、耐ノイズ性能も良好な歪み
量測定回路を実現することができる。According to the above configuration, the AC-amplified output signal is efficiently demodulated to a DC output having the same amplitude value by two independent sample-hold circuits and a differential amplifier having an integrating function. It is possible to realize a distortion amount measuring circuit which is low-cost and relatively simple, has no zero point fluctuation, and has good noise resistance performance.
【0007】[0007]
【実施例】以下、本発明の一実施例を図面に基づいて説
明する。An embodiment of the present invention will be described below with reference to the drawings.
【0008】図1は本発明におけるブロック図であり、
1は方形波交流ブリッジ電源2に接続された機械的歪み
を受けることによって抵抗値変化を生じるブリッジ回
路、3は交流(差動)増幅器、4,5は位相の異なる同
一極性の方形波出力信号を、それぞれ独立してサンプル
ホールドするサンプルホールド回路、6は積分機能を有
する差動増幅器、7は方形波交流ブリッジ電源2の電圧
位相に同期してサンプリングパルスを発生するサンプリ
ングタイミング回路である。FIG. 1 is a block diagram of the present invention.
1 is a bridge circuit which is connected to a square wave AC bridge power supply 2 and generates a resistance value by receiving a mechanical distortion, 3 is an AC (differential) amplifier, 4 and 5 are square wave output signals having different phases and the same polarity. , A sample-and-hold circuit that independently samples and holds, 6 is a differential amplifier having an integration function, and 7 is a sampling timing circuit that generates a sampling pulse in synchronization with the voltage phase of the square-wave AC bridge power supply 2.
【0009】以上のように構成された歪み量測定回路に
ついて、図2(A)〜(F)を用いてその動作を説明す
る。The operation of the distortion amount measuring circuit configured as described above will be described with reference to FIGS.
【0010】図2(A)は方形波交流ブリッジ電源2の
電圧波形(周波数f1)であり、ブリッジ回路1に対し
てそれぞれ180°位相の異なる同レベル(+V)の方
形波バイアス電圧を与えている。機械的歪みの一例とし
て図2(B)のような正弦波状の歪み量(周波数f0)
をブリッジ回路1が受け、その出力が交流(差動)増幅
器3で増幅されると図2(C)のようにf1がf0によ
って復調された方形波交流出力信号となり、サンプルホ
ールド回路4,5に入力される。FIG. 2A shows a voltage waveform (frequency f1) of the square-wave AC bridge power supply 2, in which a square-wave bias voltage of the same level (+ V) having a phase difference of 180 ° is applied to the bridge circuit 1. I have. As an example of mechanical distortion, a sinusoidal distortion amount (frequency f0) as shown in FIG.
Is received by the bridge circuit 1 and its output is amplified by the AC (differential) amplifier 3, f1 becomes a square wave AC output signal demodulated by f0 as shown in FIG. Is input to
【0011】サンプルホールド回路4,5は、前記方形
波交流ブリッジ電源電圧と同期したサンプリングタイミ
ング回路7によって発生するサンプリングパルス図2
(D)によって、おのおの同相の方形波電圧のピーク値
をホールドし、図2(E)のような+側包絡線及び−側
包絡線の波形出力信号となる。The sample and hold circuits 4 and 5 are provided with a sampling pulse generated by a sampling timing circuit 7 synchronized with the square-wave AC bridge power supply voltage.
By (D), the peak value of the in-phase square wave voltage is held, and the waveform output signal of the + side envelope and the − side envelope as shown in FIG. 2 (E) is obtained.
【0012】積分機能を有する差動増幅器6は、この2
つの出力値の差、即ち図2(E)の(1)−(2)の値
をシングルエンド出力する。The differential amplifier 6 having an integrating function is composed of
The difference between the two output values, that is, the values of (1)-(2) in FIG.
【0013】図3はサンプルホールド回路4,5及び差
動増幅器6の具体回路例であり、2個の差動AMP(ゲ
イン=2)の入力にFETQ1,Q2とコンデンサC
1,C2によるサンプルホールド回路を設け、C3,R
4によって積分回路を形成する極めてシンプルな回路構
成になっている。FIG. 3 is a specific circuit example of the sample-and-hold circuits 4, 5 and the differential amplifier 6. FETs Q1 and Q2 and a capacitor C are connected to the inputs of two differential AMPs (gain = 2).
1 and C2, a sample and hold circuit is provided.
4 forms an extremely simple circuit configuration forming an integrating circuit.
【0014】又、本実施例における前記ブリッジ電源周
波数(f1)は、約10kHzに設定されており、歪み力
の周波数(f0=0〜300Hz)に対して十分に大きい
分解能を持つと共に、前記積分機能によってサンプリン
グノイズ及び外乱ノイズが極めて低いレベルに抑えられ
ている。Further, the bridge power supply frequency (f1) in the present embodiment is set to about 10 kHz, has a sufficiently large resolution with respect to the frequency of the distortion force (f0 = 0 to 300 Hz), and has a high resolution. The function suppresses sampling noise and disturbance noise to extremely low levels.
【0015】図4(A),(B)は本発明における方形
波交流ブリッジ電源を模式的に表したものであり、前記
f1なる周波数でスイッチSが+V(Sa側)とGND
(Sb側)に切り換わり、その信号がブリッジ回路へ供
給される。ブリッジ回路に歪み力が無い状態(無信号
時)ではブリッジを構成する各歪みゲージRの抵抗値は
等しく、c,d出力点は零電位(以下、GNDとする)
に対して常に+V/2値に保たれている。FIGS. 4A and 4B schematically show a square-wave AC bridge power supply according to the present invention. At the frequency f1, the switch S is set to + V (Sa side) and GND.
(Sb side), and the signal is supplied to the bridge circuit. In the state where the bridge circuit has no distortion force (when there is no signal), the resistance values of the respective strain gauges R constituting the bridge are equal, and the c and d output points are zero potential (hereinafter referred to as GND).
Is always kept at + V / 2.
【0016】ブリッジ回路が歪み力を受け、相対する2
個の歪みゲージがR+Δrになった場合、その出力c,
dは、+V/2値を中心にSa,Sb点においてそれぞ
れΔev,−Δevとなり、図1における交流増幅器3
の出力0は{Δev−(−Δev)}・A=2Δev
A、即ち、従来の直流バイアス方式に対して2倍のブリ
ッジ出力が得られる。上記スイッチSに相当する回路
は、言うまでもなく例えば出力反転型C−MOS.IC
を用いて容易に実現できるものである。The bridge circuit is subjected to a distortion force, and the opposite 2
When the number of strain gauges becomes R + Δr, the output c,
d becomes Δev and −Δev at points Sa and Sb, respectively, centered on the + V / 2 value.
Output 0 is {Δev − (− Δev)} · A = 2Δev
A: That is, a bridge output twice as large as that of the conventional DC bias method is obtained. Needless to say, a circuit corresponding to the switch S is, for example, an output inversion type C-MOS. IC
It can be easily realized by using.
【0017】尚、以上の実施例では片電源による回路構
成であるが、正・負2電源を用いた場合でも基本的な動
作は同じであり、基準となる電圧が異なるのみである。Although the above embodiment has a circuit configuration using a single power source, the basic operation is the same even when two positive and negative power sources are used, and only the reference voltage is different.
【0018】又、ブリッジ回路のバイアス電源として方
形波交流電圧を用いているが、サンプリングタイミング
をその交流波高値の定点に位置させる工夫をすれば、他
のいかなる交流波形であっても本発明の目的は達成され
る。Further, although a square wave AC voltage is used as a bias power supply for the bridge circuit, any other AC waveform of the present invention can be used if the sampling timing is arranged at a fixed point of the AC peak value. The goal is achieved.
【0019】[0019]
【発明の効果】以上のように本発明によれば、ブリッジ
回路の出力点がGND(零電位)レベルに対して常に一
定レベルになるように、交流電圧をブリッジ回路に対し
て交叉的かつ対称に与えられるため、出力オフセットが
無く、ブリッジ出力感度が2倍になると言う特性に加
え、交流増幅及びシンプルな復調回路と言う構成から、
安価に低ドリフト、低ノイズの歪み量測定回路を実現で
きるものである。As described above, according to the present invention, the AC voltage is crossed and symmetrical with respect to the bridge circuit so that the output point of the bridge circuit is always at a constant level with respect to the GND (zero potential) level. In addition to the characteristic that there is no output offset and the bridge output sensitivity is doubled because of the AC amplification and the simple demodulation circuit,
It is possible to realize a low drift, low noise distortion amount measurement circuit at low cost.
【図1】本発明の歪み量測定回路の一実施例のブロック
図FIG. 1 is a block diagram of an embodiment of a distortion amount measuring circuit according to the present invention.
【図2】同各ポイントにおける波形図FIG. 2 is a waveform chart at each point.
【図3】同図1要部の一具体回路図FIG. 3 is a specific circuit diagram of a main part of FIG. 1;
【図4】同要部である方形波交流ブリッジ電源の模式図FIG. 4 is a schematic diagram of a square-wave AC bridge power supply, which is a main part of the same.
【符号の説明】 1 歪みゲージブリッジ回路 2 方形波交流ブリッジ電源 3 交流増幅器 4,5 サンプルホールド回路 6 差動増幅器 7 サンプリングタイミング回路[Description of Signs] 1 Strain gauge bridge circuit 2 Square wave AC bridge power supply 3 AC amplifier 4,5 Sample hold circuit 6 Differential amplifier 7 Sampling timing circuit
Claims (3)
ジ回路の出力信号を、交流増幅器を介して互いに独立し
た2つのサンプルホールド回路に供給し、このサンプル
ホールド回路で交流増幅器の出力信号を交流電源電圧の
極性に一致するように各半サイクルごとに交互にサンプ
ルホールドし、この2つの出力の差を積分する差動増幅
器で得るようにした歪み量測定回路。An output signal of a strain gauge bridge circuit connected to an AC power supply is supplied to two sample-and-hold circuits independent from each other via an AC amplifier, and the output signal of the AC amplifier is supplied to the AC power supply by the sample-and-hold circuit. A distortion measuring circuit which alternately samples and holds every half cycle so as to match the polarity of the voltage, and obtains the difference by a differential amplifier which integrates a difference between these two outputs.
位レベルに対して変動しないように、前記交流電源電圧
をブリッジに対して交叉的かつ対称に印加するように構
成した請求項1記載の歪み量測定回路。2. The distortion according to claim 1, wherein the AC power supply voltage is applied to the bridge in a crosswise and symmetric manner so that the output point of the strain gauge bridge circuit does not fluctuate with respect to the zero potential level. Quantity measurement circuit.
電源が方形波状の交流電圧である請求項1記載の歪み量
測定回路。3. The distortion amount measuring circuit according to claim 1, wherein the AC power supply applied to the strain gauge bridge circuit is a square wave AC voltage.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5268723A JP3002078B2 (en) | 1993-10-27 | 1993-10-27 | Distortion amount measurement circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5268723A JP3002078B2 (en) | 1993-10-27 | 1993-10-27 | Distortion amount measurement circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH07120207A JPH07120207A (en) | 1995-05-12 |
JP3002078B2 true JP3002078B2 (en) | 2000-01-24 |
Family
ID=17462456
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP5268723A Expired - Fee Related JP3002078B2 (en) | 1993-10-27 | 1993-10-27 | Distortion amount measurement circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP3002078B2 (en) |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1321315C (en) * | 2005-05-27 | 2007-06-13 | 南京航空航天大学 | Flexible strain signal spot colletion system |
JP4561500B2 (en) * | 2005-06-30 | 2010-10-13 | 株式会社日立製作所 | Wireless strain measurement system |
US7385443B1 (en) | 2007-01-31 | 2008-06-10 | Medtronic, Inc. | Chopper-stabilized instrumentation amplifier |
US8265769B2 (en) | 2007-01-31 | 2012-09-11 | Medtronic, Inc. | Chopper-stabilized instrumentation amplifier for wireless telemetry |
US9615744B2 (en) | 2007-01-31 | 2017-04-11 | Medtronic, Inc. | Chopper-stabilized instrumentation amplifier for impedance measurement |
US7391257B1 (en) * | 2007-01-31 | 2008-06-24 | Medtronic, Inc. | Chopper-stabilized instrumentation amplifier for impedance measurement |
US8380314B2 (en) | 2007-09-26 | 2013-02-19 | Medtronic, Inc. | Patient directed therapy control |
CN101925377A (en) | 2008-01-25 | 2010-12-22 | 麦德托尼克公司 | The detection of Sleep stages |
US9770204B2 (en) | 2009-11-11 | 2017-09-26 | Medtronic, Inc. | Deep brain stimulation for sleep and movement disorders |
US9924904B2 (en) | 2014-09-02 | 2018-03-27 | Medtronic, Inc. | Power-efficient chopper amplifier |
-
1993
- 1993-10-27 JP JP5268723A patent/JP3002078B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JPH07120207A (en) | 1995-05-12 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
LAPS | Cancellation because of no payment of annual fees |