JP3067772B2 - Complementary mixer circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a mixer circuit for performing frequency conversion of a carrier signal in wireless communication or the like.

[0002]

2. Description of the Related Art A mixer circuit is used for frequency conversion in a radio communication transceiver. The basic operation of this mixer circuit is to perform frequency conversion by multiplying two analog signals. As a mixer circuit suitable for an integrated circuit,
Gilbert cell type mixer circuits are widely used.

FIG. 8 shows a configuration of a conventional Gilbert cell type mixer circuit using MOSFETs. MN1, MN
Reference numeral 2 denotes an NchMOS transistor constituting the first differential pair 1, and a differential local (LO) signal L
O (+) and LO (-) are applied. MN3 and MN4 are NchMOS transistors forming the second differential pair 2, and have the same differential local signal LO at their gates.
(+) And LO (-) are applied. MN5 and MN6 are NchMOS transistors that constitute the third differential pair 3A, and have differential high frequency (RF) signals RF at their gates.
(+) And RF (-) are applied. MN7 is an NchMOS transistor functioning as a current source. Also, R
L1 and RL2 are load resistances common to the first and second differential pairs 1 and 2.

As described above, in the conventional Gilbert cell type mixer circuit, the transistors MN5 and MN6 convert a high-frequency signal into a differential current signal, and the transistors MN1 to MN
4 switches its current path according to the local signal, and the result of the multiplication of the high-frequency signal and the local signal is applied to one end of each of the load resistors RL1 and RL2 at a differential intermediate frequency (IF) signal IF (+), IF ( Output as-).

[0005]

Since the portable radio terminal is driven by a battery, low voltage operation is desired for miniaturization and weight reduction. However, this Gilbert cell type mixer circuit has a current source. , The vertical stacking of the transistors becomes three stages, so that a power supply voltage VDD of at least 1.5 to 2.0 V is required.

If the power supply voltage is to be further reduced, the drain junction capacitance of the transistor increases, making high-frequency operation difficult, resulting in a problem that it cannot be applied to wireless communication.

[0007] As described above, since operation is impossible at a power supply voltage of 1.5 V or less, when applied to a portable radio terminal,
Two or more dry batteries (1.5 V) or NiCd-based secondary batteries (1.2 V) were required in series, making it difficult to reduce the size and weight.

The present invention has been made in view of the above points, and an object of the present invention is to provide a mixer circuit that can operate normally even under a low power supply voltage of about 1 V.

[0009]

SUMMARY OF THE INVENTION In order to achieve the above object, a feature of the present invention is to provide a differential transistor pair including a pair of transistors for receiving a first differential multiplication signal and an inductor operating as a current source. A first series circuit in which a configured impedance circuit is connected in series, a second series circuit having the same configuration as the first series circuit, and a pair of differential outputs receiving the second multiplication signal. And a load amplifier (RL1, RL2) connecting the first series circuit and the second series circuit between a first power supply terminal (VDD) and a second power supply terminal. And the differential amplifier is directly supplied with power from the first power supply terminal (VDD), and outputs the respective differential outputs to the differential transistor pair of the first series circuit and the second series circuit. Coupled to a differential transistor pair and the load Anti and from the point of attachment to the respective series circuits, the product of the first multiplication signal and the second multiplied signal to the complementary mixer circuit which outputs a differential type.

The conductivity types of the transistors forming the first and second series circuits are opposite to the conductivity types of the transistors forming the differential amplifier.

The differential amplifier operates as a current source and a differential transistor pair that is inserted in series between the first power supply terminal and the second power supply terminal and receives a second multiplication signal. And an impedance circuit that performs the operation.

Preferably, a capacitor for cutting off direct current is inserted in a coupling path that couples the output of the differential amplifier to each of the series circuits.

By inserting a capacitor, the connection between each series circuit and the differential amplifier is cut off in a DC manner.
In addition, the conductivity type of the transistor forming the second series circuit and the conductivity type of the transistor forming the differential amplifier can be made the same.

Preferably, the impedance circuit substantially resonates at a frequency of the first multiplication signal or the second multiplication signal.
This is a parallel resonance circuit having a parallel circuit of a coil and a capacitor. Note that the frequency of the first multiplication signal is generally close to the second multiplication frequency, so that if it resonates with one of the multiplication signals, it is possible to have an impedance to act as a current source for both multiplication signals. If the Q of the parallel resonance circuit is too high, a resistor is inserted in parallel with the circuit to lower the Q. In addition, the impedance circuit has a high impedance that acts as a current source for high frequencies, and has a low resistance value for supplying direct current voltage to the transistor for direct current. It need not be, but may be a simple inductor.

[0015]

DESCRIPTION OF THE PREFERRED EMBODIMENTS [First Embodiment] FIG. 1 is a diagram showing a mixer circuit according to a first embodiment of the present invention. The same components as those shown in FIG. 8 are denoted by the same reference numerals.

In this embodiment, a parallel connection comprising an inductor L and a capacitance C is provided on the current supply side (source side) of a first differential pair 1 comprising transistors MN1 and MN2 to which a differential local signal is applied to a gate. A transistor MN that connects the resonance circuit 4 and applies the same differential local signal to the gate
3, a parallel resonance circuit 5 including an inductor L and a capacitor C is also connected to the current supply side (source side) of the second differential pair 2 including MN4.

The high frequency signal Pc applied to the gate
A parallel resonance circuit 6 including an inductor L and a capacitor C is connected to the current supply side (source side) of the third differential pair 3 including the hMOS transistors MP1 and MP2, and the output side (drain) of the transistors MP1 and MP2. Side) are connected to the current supply sides of the first and second differential pairs 1 and 2, respectively.

The load resistor RL1 is commonly connected to the drain of the transistor MN1 on the non-inverting side of the first differential pair 1 and the drain of the transistor MN4 on the inverting side of the second differential pair 2. Is commonly connected to the drain of the inverting transistor MN2 of the first differential pair 1 and the drain of the non-inverting transistor MN3 of the second differential pair 2.

As shown in FIG. 2A, the parallel resonance circuits 4 to 6 can be expressed in a form in which a parasitic resistance Rs is connected in series with the inductor L, and the frequency characteristic of the impedance is shown in FIG. ), The resonance frequency fo = 1 /
(2π√LC), the maximum real value zo = L / C
Take a Rs = RsQ ^2. Q is a value representing the sharpness of the resonance circuit.

Therefore, since the parallel resonance circuits 4 to 6 have high impedance near the resonance frequency fo, they have the same function as an electric current source for an AC signal. It should be noted that a small voltage drop occurs due to the small resistance Rs for the DC signal, but this is not a disadvantage in operation.

Since the first and second differential pairs 1 and 2 and the third differential pair 3 are inserted in parallel between the power supply VDD and the ground, the first and second differential pairs 1 and 2 are connected. , 2 and the third differential pair 3 are transmitted and received by two parallel resonance circuits 1 and 2 having a role of a current source.

The sum of the currents flowing through the transistors MN1, MN2 and MP1 is substantially constant due to the presence of the parallel resonance circuit 4 (current source).
The sum of the currents of the transistors MN4 and MP2 is substantially constant, and the sum of the currents of the transistors MP1 and MP2 is substantially constant. For example, when the drain current of one transistor MP1 of the third differential pair 3 increases due to the high frequency signal,
Since the current flowing through the first differential pair 1 acts in a decreasing direction, a high-frequency signal is propagated to the first differential pair.

Further, since the DC voltage drop in the parallel resonance circuits 4 to 6 is almost zero, the DC voltage between the power supply VDD and the terminals of the high-frequency signals RF (+) and RF (−) in the third differential pair 3 is reduced. The voltage becomes the gate-source voltage, and the bias current is determined. In the first and second differential pairs 1 and 2, the voltage between the terminals of the local signals LO (+) and LO (-) and the ground is the gate-source voltage. Therefore, the degree of freedom in bias setting is high, and low-voltage operation can be easily realized.

FIG. 3 shows a simulation waveform by HSPICE. The power supply voltage VDD is 1 V, local (L
O) The frequency of the signal is 1.71 GHz, the frequency of the high frequency (RF) signal is 1.95 GHz, and the output intermediate frequency (IF) signal is 240 MHz. Note that a low-pass filter was inserted into this intermediate frequency signal to clarify the difference frequency component (240 MHz).

As described above, by using the present invention, transistors are not stacked vertically, and operation in a GHz band is possible even at a low voltage of 1V.

[Second Embodiment] FIG. 4 shows a second embodiment of the present invention.
FIG. 3 is a diagram showing a mixer circuit according to the embodiment of the present invention, in which the relationship between the NMOS and the PMOS in the mixer circuit having the configuration shown in FIG. 1 is inverted. That is, the first and second differential pairs 1 and 2 to which differential local signals are applied are connected to PchMOS
Differential pair 1A, 2A composed of transistors MP3 to MP6
And the third differential pair 3 is replaced with a differential pair 3A including NchMOS transistors MN5 and MN6. The relationship between the power supply VDD and the ground is opposite to that in FIG. 1, the parallel resonance circuits 4 to 6 are connected to the sources of the corresponding differential pair transistors, and the load resistors RL1 and RL2 are connected to the drains of the corresponding transistors. ing.

[Third Embodiment] FIG. 5 shows a third embodiment of the present invention.
FIG. 3 is a diagram showing a mixer circuit according to the embodiment of the present invention, in which parallel resonance circuits 4A to 6A in the mixer circuit having the configuration shown in FIG. .

When the Q value of the parallel resonance circuit is sufficiently high,
Since the impedance is easily changed by the frequency, z
Known high resistance element Rp satisfying o = L / CRs> Rp
Can be connected in parallel to improve designability. Even in this case, no DC voltage drop occurs.

[Fourth Embodiment] FIG. 6 shows a fourth embodiment of the present invention.
FIG. 5 is a diagram showing a mixer circuit according to an embodiment of the present invention, in which a parallel connection of a resistor Rp to parallel resonance circuits 4 to 6 in the mixer circuit having the configuration shown in FIG. Also in this circuit, designability can be improved as in the circuit shown in FIG.

[Other Embodiments] In the embodiments described above, FETs (field effect transistors) are used. However, similar mixer circuits can be realized by using bipolar transistors. In this case, the drain of the FET may be replaced with a collector, the gate may be replaced with a base, the source may be replaced with an emitter, and the PchMOSFET may be replaced with an NPN transistor, and the NchMOSFET may be replaced with a PNP transistor.

Further, in each embodiment of FIGS. 1, 4, 5 and 6, the operation of the portion P surrounded by the dotted line is the same as that of FIG.
It is equivalent to the differential amplifier Q of (A) and can be replaced with a differential amplifier. In the embodiment of FIG. 1, the differential amplifier Q receives high-frequency signals RF + and RF− as inputs and outputs a differential output W
1 and W2 to the transistor pair (MN1, MN2) and (MN
3, MN4). The differential amplifier Q is inserted between the power supply VDD and the ground. The ground line of the differential amplifier Q is provided by the impedance circuits 4 and 5 via the output lines W1 and W2 in the embodiments of FIGS. 1 and 5, and in the embodiments of FIGS. Provided by amplifier ground wire QE.

Further, as shown in FIG. 7B, capacitors C1 and C2 for cutting off DC current can be inserted into the differential outputs W1 and W2 of the differential amplifier Q. In this case, the load inductors QL1 and Q
L2 needs to be inserted. When the capacitors C1 and C2 are inserted, the conductivity type of the transistor pair forming the differential amplifier Q is changed to the transistor pair (M
N1, MN2, MN3, MN4). Applying the differential amplifier of FIG. 7B to each embodiment of FIG. 1, FIG. 4, FIG. 5, or FIG. 6 and selecting the conductivity type (P-CH or N-CH) of each transistor pair is appropriate. Easy for traders.

[0033]

As described above, according to the present invention, a parallel resonance circuit having a high AC resistance and a low DC resistance is used in place of the current source using a conventional transistor. As a result, the transistor operates at a power supply voltage required for almost one stage of transistors, so that a low-voltage operation of about 1 V is possible.

Further, if a resistor is connected in parallel to the parallel resonance circuit, it is possible to suppress a large change in impedance depending on the frequency, thereby improving the design.

[Brief description of the drawings]

FIG. 1 is a circuit diagram of a mixer circuit according to a first embodiment of the present invention.

2A is an equivalent circuit diagram of a parallel resonance circuit, and FIG. 2B is an impedance characteristic diagram thereof.

FIG. 3 is a simulation waveform diagram of the mixer circuit of FIG. 1;

FIG. 4 is a circuit diagram of a mixer circuit according to a second embodiment of the present invention.

FIG. 5 is a circuit diagram of a mixer circuit according to a third embodiment of the present invention.

FIG. 6 is a circuit diagram of a mixer circuit according to a fourth embodiment of the present invention.

FIG. 7 is a configuration example of a differential amplifier.

FIG. 8 is a circuit diagram of a conventional mixer circuit.

[Explanation of symbols]

 1,1A First differential pair 2,2A Second differential pair 3,3A Third differential pair 4-6,4A-6A Parallel resonance circuit

Continuation of the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H03D 7/00 H03D ⁷ /12-7/14 G06G 7/163

Claims (9)

(57) [Claims] A first series circuit in which a differential transistor pair including a pair of transistors receiving a first differential multiplication signal and an impedance circuit including an inductor operating as a current source are connected in series; A second series circuit having a configuration similar to that of the first series circuit; and a differential amplifier that receives the second multiplied signal and provides a pair of differential outputs. ) And a second power supply terminal, the first series circuit and the second series circuit are connected by a load resistor (R
L1, RL2), and the differential amplifier is directly supplied with power from the first power supply terminal (VDD), and outputs each differential output to a differential transistor pair of the first series circuit and an impedance circuit. And a connection point of the differential transistor pair of the second series circuit and a connection point of the impedance circuit. From the connection point of the load resistance and each series circuit, the first multiplied signal and the A complementary mixer circuit for outputting a product of the second multiplication signal and the second multiplication signal in a differential type. A second amplifier connected in series between the first power supply terminal and the second power supply terminal;
And a differential transistor pair for receiving the multiplied signal of (i) and an impedance circuit operating as a current source.
A complementary mixer circuit as described. 3. The complementary mixer circuit according to claim 1, wherein a capacitor for blocking direct current is inserted into a coupling path that couples the output of the differential amplifier and each of the series circuits. 4. The complementary mixer circuit according to claim 1, wherein said impedance circuit is a parallel resonance circuit in which a capacitor is connected in parallel to said inductor so as to substantially resonate at a frequency of said first multiplication signal or said second multiplication signal. 5. The complementary mixer circuit according to claim 4, wherein a resistor is connected in parallel to said parallel resonance circuit. 6. The complementary mixer circuit according to claim 3, wherein the conductivity type of the transistor pair included in the first and second series circuits is the same as the conductivity type of the transistor pair included in the differential amplifier. 7. The transistor pair included in the first and second series circuits is constituted by N-channel MOS transistors, and the transistor pair included in the differential amplifier is constituted by P-channel MOS transistors. Item 3. The complementary mixer circuit according to Item 2. 8. The transistor pair included in the first and second series circuits is constituted by P-channel MOS transistors, and the transistor pair included in the differential amplifier is constituted by N-channel MOS transistors. Item 3. The complementary mixer circuit according to Item 2. 9. Each of said transistor pairs has two FET transistors, the sources of said FET transistors being coupled to an impedance circuit connected in series, and
The complementary mixer circuit of claim 1, wherein the drains of the T transistors are each coupled to a corresponding load circuit.